JP4625054B2 - Game machine - Google Patents

Description

  The present invention starts the variable display of the first identification information and derives and displays the display result based on the fact that the first execution condition of the variable display based on the winning of the first start opening is established. A second variable for starting the variable display of the second identification information and deriving and displaying the display result based on the display means and the second execution condition of the variable display based on the winning of the second start opening being established The present invention relates to a gaming machine such as a pachinko gaming machine that has a display means and shifts to a specific gaming state advantageous to the player when the specific display result is derived and displayed on either the first variable display means or the second variable display means. .

  As a gaming machine, a game ball, which is a game medium, is launched into a game area by a launching device, and when a game ball wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, a variable display unit capable of variably displaying the identification information (also referred to as “fluctuation”) is provided, and when the display result of the variable display of the identification information is a specific display result in the variable display unit, The state of the machine, more specifically, the state in which the gaming machine is controlled) is configured to give a predetermined game value to the player.

  The game value is the right that the state of the variable winning ball apparatus provided in the gaming area of the gaming machine becomes advantageous for a player who is easy to win, and the right for becoming advantageous for a player. In other words, or a condition for winning a prize ball is easily established.

  In a pachinko machine, a variable display of special symbols (identification information) that is started in the variable display section based on the establishment of a start condition (execution condition of variable display) such as a game ball winning in a start winning opening. As a result, a “big hit” occurs when a predetermined specific display mode is derived and displayed. Note that the derivation display is to stop and display a symbol (excluding stop before so-called re-variation). When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. The special winning opening is opened a predetermined number of times (for example, 15 times). An opening time (for example, 29 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Hereinafter, the opening period of each special winning opening may be referred to as a round.

  In the variable display section, the symbols other than the symbol that becomes the final stop symbol (for example, the middle symbol of the left and right middle symbols) are stopped and oscillated in a state in which they coincide with a specific display result for a predetermined time. There is a possibility that a big hit will occur before the final result is displayed due to scaling, deformation, or deformation, or when multiple symbols change synchronously with the same symbol, or the position of the displayed symbol changes. An effect that is performed in a state in which the state continues (hereinafter, these states are referred to as reach states) is referred to as reach effect. Further, the reach state and its state are referred to as a reach mode. Furthermore, variable display including reach production is called reach variable display. And when the display result of the symbol variably displayed on the variable display portion is not a specific display result, it becomes “out of” and the variability display state ends. A player plays a game while enjoying how to generate a big hit.

  In such a gaming machine, when the game ball is won at the start winning opening, when the variable display of the symbol cannot be started on the variable display portion (for example, when the variable display is not finished), the predetermined upper limit number The information indicating that the game ball has won at the start winning opening is stored. The stored information is referred to as start winning memory or hold memory. Then, a display indicating the number of reserved memories (the number of reserved memories) is made on a predetermined display unit. Note that when the number of reserved memories reaches the upper limit, even if a game ball wins the start winning opening, the start condition is not satisfied. That is, the winning of the game ball at the start winning opening becomes an invalid start winning.

  A gaming machine configured to change the upper limit number of reserved storage has been proposed (see, for example, Patent Document 1). Patent Document 1 describes that when the upper limit number of reserved storage is changed, the player performs a display capable of recognizing the changed upper limit number. Since the player can grasp the upper limit number by the display capable of recognizing the upper limit number, the player can play the game so as to reduce the occurrence of the invalid start winning.

JP 2001-62074 A (paragraphs 0049 to 0052)

  Among gaming machines that perform variable display of symbols, there are gaming machines that include two variable display portions. In each variable display section, when the variable display start condition corresponding to the variable display section is satisfied, variable display of the identification information is started. The variable display start condition is established based on, for example, the winning of a game ball in a start winning opening provided corresponding to each variable display unit. Therefore, the game control means for controlling the progress of the game determines whether or not a game ball has won each start winning opening. Further, the display control means displays the number of reserved memories for each start winning opening.

  When the display control means collectively displays the hold memory for each start winning port, the hold memory for the first start winning port (first hold memory) and the hold memory for the second start winning port (second hold) Are stored together, it is difficult for the player to recognize the upper limit number of each reserved storage. If the player cannot recognize the upper limit number of each hold memory, for example, the sum of the first hold memory and the second hold memory has not reached the upper limit number, but the first hold memory is When the upper limit is reached, that is, even if a game ball is won at the first start winning opening, an effective start win (a start win that occurs when the number of reserved memories is less than the upper limit and the variable display execution condition is There is a possibility that a game in which a game ball is won at the first start winning opening may be performed when the start winning is not established, that is, when the invalid starting prize is reached. When such a game is performed, the winning at the starting winning opening with respect to the starting condition is wasted.

  Accordingly, the present invention provides a storage device for each start winning opening in a gaming machine including first variable display means corresponding to the first starting winning opening and second variable display means corresponding to the second starting winning opening. A game machine capable of easily recognizing whether or not at least one of the reserved memory numbers has reached the upper limit number, that is, whether or not there is a room for increasing the reserved memory when displaying in a lump. The purpose is to provide.

The gaming machine according to the present invention has first identification information (for example, based on the fact that the first execution condition of variable display based on the winning of the first starting port (for example, the first starting winning port 13) is established. , First special symbol) to start variable display and derive and display the display result, for example, a first variable symbol display unit (for example, the first special symbol indicator 8a) and a second start port (for example, the second start winning prize port 14) The second variable for starting the variable display of the second identification information (for example, the second special symbol) and deriving and displaying the display result based on the fact that the second execution condition of the variable display based on the occurrence of the winning is established. The first effect that performs variable display of the first effect identification information (first decorative symbol) corresponding to the variable display of the first identification information in the display means (for example, the second special symbol display 8b) and the first variable display means. Identification information display means (for example, first decorative drawing Display 9a) and second effect identification information display means (for example, second effect display means for performing variable display of the second effect identification information (second decorative symbol) corresponding to the variable display of the second identification information in the second variable display means. A decorative symbol display 9b), and an effect display means (for example, an effect display device 9) for performing a display effect corresponding to variable display in the first effect identification information display means and the second effect identification information display means. A gaming machine that shifts to a specific gaming state (for example, a big hit gaming state) advantageous to the player when a specific display result (for example, a big hit symbol) is derived and displayed on either the variable display means or the second variable display means A command that controls the variable display of the first variable display means and the second variable display means, and can specify which of the first variable display means and the second variable display means is used for variable display of the identification information. (E.g., a first symbol variation specified command and the second symbol variation specifying command) game control means for transmitting (e.g., a microcomputer 560 for game control) and a first presentation identification information on the basis of commands the game controller sends Display control means, display control means for controlling the second effect identification information display means and the effect display means (for example, the effect control microcomputer 100), and the game control means counts the number of established first execution conditions. First counting means (for example, the part for executing the processing of step S322 in the gaming control microcomputer 560) and second counting means for counting the number of established second execution conditions (for example, in the gaming control microcomputer 560) , The portion for executing the processing of step S332) and the number of formations counted by the first counting means. Alternatively, based on the increase in the number of formations counted by the second counting means, the number of formations counted by the first counting means after transmitting a formation number identification command indicating which number of formations has increased. And a total number specifying command transmitting means for transmitting a total number specifying command capable of specifying a total number corresponding to the sum of the number of established values counted by the second counting means, and start of variable display after the first execution condition is satisfied When the condition is satisfied, the first variable display means starts variable display of the first identification information, derives and displays the display result, and after the second execution condition is satisfied, the second variable is displayed when the variable display start condition is satisfied. The variable display control means for starting the variable display of the second identification information by the display means and deriving and displaying the display result (for example, the processing of steps S107 and S131 in the game control microcomputer 560). A display unit (for example, a summation pending storage display unit) that displays a mixture of information that can identify the establishment of the first execution condition and information that can identify the establishment of the second execution condition. The effect control means includes an effect display device 9c having 18c, and the effect control means displays the number of established first execution conditions and the second execution condition in a predetermined display mode (for example, a red circle or a green circle). A display that can specify the number of established conditions, and a display that can identify the difference between the number of established first execution conditions counted by the first counting means and the upper limit number of the first execution conditions (for example, in a circle) It is characterized by including establishment number display control means (for example, a part for executing the processing of steps S915 and S937 in the production control microcomputer 100).

In the first aspect of the invention, the production control means causes the establishment number display means to perform a display capable of specifying the establishment number of the first execution condition and the establishment number of the second execution condition in a predetermined display mode. Since the display is made so that the difference between the established number of first execution conditions counted by the one counting means and the upper limit number of the first execution condition can be specified, the stored storage for each start winning opening is collectively performed. In the case of display, the player can easily recognize whether or not one of the reserved storage numbers has reached the upper limit number, and it is possible to reduce the occurrence of the invalid start winning by the player. In addition, the game control means transmits a command that can specify which of the first variable display means and the second variable display means allows the variable display of the identification information, so that the effect control can be performed without increasing the types of commands. The means can control the first effect identification information display means and the second effect identification information display means. In addition, the game control means indicates a number-of-establishment number identification command indicating which number of establishments has increased based on the increase in the number of establishments counted by the first counting means or the number of establishments counted by the second counting means. And a total number specifying command capable of specifying a total number corresponding to the sum of the number of establishments counted by the first counting means and the number of establishments counted by the second counting means. Therefore, the production control means can grasp which of the variable display means the execution condition of the variable display of the identification information has increased without increasing the types of commands transmitted from the game control means. Become.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, the overall configuration of a pachinko gaming machine 1 that is an example of a gaming machine will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as seen from the front.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) that can be opened and closed with respect to the outer frame, a mechanism plate (not shown) to which mechanism parts and the like are attached, and various parts (games to be described later) attached to them. A structure including the board 6).

  On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, there are provided a surplus ball receiving tray 4 for storing game balls that cannot be accommodated in the hitting ball supply tray 3, and a hitting operation handle (operation knob) 5 for firing the hitting ball. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. In addition, a game area 7 is formed on the front surface of the game board 6 in which a game ball that has been struck can flow down.

  An effect display device 9 composed of a liquid crystal display device (LCD) is provided near the center of the game area 7. The display screen of the effect display device 9 includes an effect symbol display area 91 for performing variable display of the effect symbols synchronized with the variable display of the first special symbol or the second special symbol. Therefore, the effect display device 9 corresponds to a variable display device that performs variable display of effect symbols. The effect display device 9 is controlled by an effect control microcomputer mounted on the effect control board. When the first special symbol display 8a is executing variable display of the first special symbol, the effect control microcomputer causes the effect display device 9 to execute the effect display along with the variable display, and the second special symbol display 8a executes the second special display. When the variable display of the second special symbol is executed on the symbol display 8b, the effect display is executed by the effect display device in accordance with the variable display, so that it is possible to easily grasp the progress of the game.

  On the left side of the lower part of the game board 6, there is provided a first special symbol display (first variable display means) 8a that variably displays a first special symbol as identification information. In this embodiment, the first special symbol display 8a is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9. In other words, the first special symbol display 8a is configured to variably display numbers (or symbols) from 0 to 9. On the lower right side of the game board 6, a second special symbol display (second variable display means) 8b for variably displaying the second special symbol as identification information is provided. The second special symbol display 8b is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9. That is, the second special symbol display 8b is configured to variably display numbers (or symbols) from 0 to 9.

  The small display is formed in a square shape, for example. In this embodiment, the type of the first special symbol and the type of the second special symbol are the same (for example, both 0 to 9), but the types may be different. Further, the first special symbol display 8a and the second special symbol display 8b may be configured to variably display numbers (or two-digit symbols) of, for example, 00 to 99, for example.

  Hereinafter, the first special symbol and the second special symbol may be collectively referred to as a special symbol, and the first special symbol indicator 8a and the second special symbol indicator 8b may be collectively referred to as a special symbol indicator.

  For the variable display of the first special symbol or the second special symbol, the first start condition or the second start condition, which is the variable display execution condition, is satisfied (for example, the game ball has the first start winning opening 13 or the second start winning opening) 14), a variable display start condition (for example, when the number of reserved memories is not 0 and the variable display of the first special symbol and the second special symbol is not executed) , A state where the big hit game is not executed) is established, and when the variable display time elapses, a display result (stop symbol) is derived and displayed. Note that winning means that a game ball has entered a predetermined area such as a winning opening. Deriving and displaying a display result is to stop and display a symbol (an example of identification information) (excluding stop before so-called re-variation). In this embodiment, the variable display start condition is established in the order in which the start prizes are generated regardless of the prizes in the first start prize slot 13 and the second start prize slot 14. The variable display start condition may be established by giving priority to one of winning in the winning opening 13 and winning in the second start winning opening 14. For example, when giving priority to winning in the first start winning opening 13, the variable display of the first special symbol and the second special symbol is not executed, and the big hit game is not executed. For example, even when the second reserved memory number is not zero, the variable display of the first special symbol is continuously executed until the first reserved memory number becomes zero.

  In the vicinity of the first special symbol display 8a, during the variable display time of the first special symbol by the first special symbol display 8a, the variable display of the first decorative symbol as a decorative (design) symbol is performed. A first decorative symbol display (first variable display) 9a is provided. In this embodiment, the first decorative symbol display 9a is composed of two LEDs. The first decorative symbol display 9a is controlled by an effect control microcomputer mounted on the effect control board. Further, in the vicinity of the second special symbol display 8b, during the variable display time of the second special symbol by the second special symbol display 8b, the variable display of the second decorative symbol as a symbol for decoration (production) is performed. A second decorative symbol display (second variable display section) 9b is provided. The second decorative symbol display 9b is composed of two LEDs. The second decorative symbol display 9b is controlled by an effect control microcomputer mounted on the effect control board.

  The first decorative symbol and the second decorative symbol may be collectively referred to as a decorative symbol, and the first decorative symbol display 9a and the second decorative symbol display 9b may be collectively referred to as a decorative symbol display. .

  The variation of the decorative pattern (variable display) is realized by continuing the state where the two LEDs are alternately lit. The variable display of the first special symbol on the first special symbol display 8a and the variable display of the first decorative symbol on the first decorative symbol display 9a are synchronized. The variable display of the second special symbol on the second special symbol display 8b is synchronized with the variable display of the second decorative symbol on the second decorative symbol display 9b. Synchronous means that the variable display start time and end time are the same, and the variable display period is the same. In addition, when the big hit symbol is stopped and displayed on the first special symbol display 8a, the LED on the side that recalls the big hit on the first decorative symbol display 9a remains lit. When the big-hit symbol is stopped and displayed on the second special symbol display 8b, the LED on the side that recalls the big-hit on the second decorative symbol display 9b remains lit. The functions of the first decorative symbol display 9a and the second decorative symbol display 9b may be realized by the effect display device 9. That is, the first decorative symbol and the second decorative symbol may be controlled to be variably displayed as images on the display screen of the effect display device 9.

  A winning device having a first start winning port 13 is provided below the effect display device 9. The game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a.

  A variable winning ball device 15 having a second starting winning port 14 through which a game ball can be won is provided below a winning device having a first starting winning port (first starting port) 13. The game ball that has won the second start winning opening (second start opening) 14 is guided to the back of the game board 6 and detected by the second start opening switch 14a. The variable winning ball device 15 is opened by a solenoid 16. When the variable winning ball device 15 is in the open state, the game ball can be awarded to the second starting winning port 14 (it is easier to start winning), which is advantageous for the player. In the state where the variable winning ball apparatus 15 is in the open state, it is easier for the game ball to win the second start winning opening 14 than the first starting winning opening 13. In addition, in a state where the variable winning ball device 15 is in the closed state, the game ball does not win the second start winning opening 14. Therefore, in a state where the variable winning ball device 15 is in the closed state, it is easier for the game ball to win the first starting winning port 13 than the second starting winning port 14. In the state where the variable winning ball apparatus 15 is in the closed state, it may be configured that the winning is possible (that is, it is difficult for the gaming ball to win) although it is difficult to win a prize.

  Hereinafter, the first start winning opening 13 and the second start winning opening 14 may be collectively referred to as a start winning opening or a starting opening.

  When the variable winning ball device 15 is controlled to be in the open state, the game ball heading for the variable winning ball device 15 is very likely to win the second start winning port 14. The first start winning opening 13 is provided directly under the effect display device 9, but the interval between the lower end of the effect display device 9 and the first start winning opening 13 is further reduced, or the first start winning opening is set. The nail arrangement around the first start winning opening 13 is made difficult to guide the game balls to the first starting winning opening 13 so that the winning rate of the second starting winning opening 14 is increased. It is also possible to make the direction higher than the winning rate of the first start winning opening 13.

  On the side of the first decorative symbol display 9a, the number of effective winning balls that have entered the first start winning opening 13, that is, the first reserved memory number (the reserved memory is also referred to as the start memory or the start prize memory) is displayed. A first special symbol storage memory display 18a comprising four displays is provided. The first special symbol storage memory indicator 18a increases the number of indicators to be lit by 1 each time there is an effective start winning. Then, each time the variable display on the first special symbol display 8a is started, the number of indicators to be turned on is reduced by one.

  On the side of the second decorative symbol display 9b is a second special symbol reserved memory display 18b comprising four indicators for displaying the number of effective winning balls that have entered the second start winning opening 14, that is, the second reserved memory number. Is provided. The second special symbol storage memory display 18b increases the number of indicators to be lit by 1 every time there is an effective start winning. Then, each time the variable display on the second special symbol display 8b is started, the number of indicators to be turned on is reduced by one.

  In addition, the display screen of the effect display device 9 displays an area (hereinafter referred to as a summed pending storage display unit 18c) that displays a total number (total number of pending pending memories) that is the sum of the first reserved memory number and the second reserved memory number. .) Is provided. Since the summation pending storage display unit 18c for displaying the total number is provided, it is possible to easily grasp the total number of execution conditions that have not met the variable display start condition. In addition, since the total reserved memory display unit 18c is provided, the first special symbol reserved memory display 18a and the second special symbol reserved memory display 18b may not be provided.

  The effect display device 9 is for decoration (for effects) during the variable display time of the first special symbol by the first special symbol display 8a and during the variable display time of the second special symbol by the second special symbol display 8b. A variable display of the effect symbol as the symbol is performed. The variable display of the first special symbol on the first special symbol display 8a and the variable display of the effect symbol on the effect display device 9 are synchronized. Further, the variable display of the second special symbol on the second special symbol display 8b and the variable display of the effect symbol on the effect display device 9 are synchronized. Synchronous means that the variable display start time and end time are the same, and the variable display period is the same. Further, when the jackpot symbol is stopped and displayed on the first special symbol display 8a and when the jackpot symbol is stopped and displayed on the second special symbol display 8b, the effect display device 9 reminds the jackpot The combination of is stopped and displayed.

  In this embodiment, as shown in FIG. 1, the variable winning ball apparatus 15 that opens and closes only the second starting winning opening 14 is provided. Any of the start winning ports 14 may be provided with a variable winning ball device that performs an opening / closing operation.

  Further, as shown in FIG. 1, a special variable winning ball device 20 is provided below the variable winning ball device 15. The special variable winning ball apparatus 20 includes an opening / closing plate, and when the specific display result (big hit symbol) is derived and displayed on the first special symbol display 8a, and the specific display result (big hit symbol) on the second special symbol display 8b. When the open / close plate is controlled to be open by the solenoid 21 in the specific game state (big hit game state) that occurs when the symbol is derived and displayed, the big winning opening serving as the winning area is opened. The game ball that has won the big winning opening is detected by the count switch 23.

  The game area 6 is also provided with winning ports (ordinary winning ports) 29, 30, 33, and 39 for paying out a predetermined number of premium game balls determined in advance based on winning of the game balls. The game balls won in the winning openings 29, 30, 33, 39 are detected by the winning opening switches 29a, 30a, 33a, 39a.

  A normal symbol display 10 is provided at the lower right side of the game board 6. The normal symbol display 10 variably displays a plurality of types of identification information (for example, “◯” and “x”) called normal symbols.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting the upper and lower lamps (the symbols can be visually recognized when turned on). For example, if the lower lamp is turned on at the end of the variable display, it is a hit. . When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In other words, the state of the variable winning ball apparatus 15 is a state that is advantageous from a disadvantageous state for the player when the normal symbol is a stop symbol (a state in which a game ball can be awarded at the second start winning port 14). To change. In the vicinity of the normal symbol display 10, a normal symbol holding storage display 41 having a display unit with four LEDs for displaying the number of winning balls that have passed through the gate 32 is provided. Each time there is a game ball passing through the gate 32, that is, every time a game ball is detected by the gate switch 32a, the normal symbol storage memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one. Further, in the probability variation state in which the probability of being determined to be a big hit compared to the normal state is high, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the variable winning ball apparatus 15 Opening time and opening times are increased. Even in the short state (the game state in which the variable display time of the special symbol is shortened) when the symbol variation time is shortened although it is not the probability variation state, the opening time and the number of times of opening of the variable winning ball device 15 are increased.

  On the left and right sides of the game area 7 of the game board 6, there are provided decorative LEDs 25 that are displayed blinking during the game, and at the lower part there is an outlet 26 for taking in a hit ball that has not won. In addition, two speakers 27 that utter sound effects and sounds as predetermined sound outputs are provided on the left and right upper portions outside the game area 7. A top frame LED 28a, a left frame LED 28b, and a right frame LED 28c provided on the front frame are provided on the outer periphery upper portion, the outer periphery left portion, and the outer periphery right portion of the game area 7. Also, a prize ball LED 51 that is turned on when there is a remaining number of prize balls is provided in the vicinity of the left frame LED 28b, and a ball cut LED 52 that is turned on when the supply ball is cut is provided in the vicinity of the right frame LED 28c. .

  In the gaming machine, a ball hitting device (not shown) that drives a driving motor in response to a player operating the hitting operation handle 5 and uses the rotational force of the driving motor to launch a gaming ball to the game area 7. ) Is provided. A game ball launched from the ball striking device enters the game area 7 through a ball striking rail formed in a circular shape so as to surround the game area 7, and then descends the game area 7. When the game ball enters the first start winning opening 13 and is detected by the first start opening switch 13a, if the variable display of the first special symbol can be started (for example, the variable display of the special symbol ends, 1), the first special symbol display 8a starts variable display (variation) of the first special symbol, and the first decorative symbol display 9a displays variable display of the first decorative symbol. The effect display device 9 starts variable display of effect symbols. In other words, the variable display of the first special symbol, the first decorative symbol, and the effect symbol corresponds to winning in the first start winning opening 13. If the variable display of the first special symbol cannot be started, the first reserved memory number is increased by 1 on condition that the first reserved memory number has not reached the upper limit value.

  When the game ball enters the second start winning port 14 and is detected by the second start port switch 14a, if the variable display of the second special symbol can be started (for example, the special symbol variable display ends, 2), the second special symbol display 8b starts variable display (variation) of the second special symbol, and the second decorative symbol display 9b displays variable display of the second decorative symbol. The effect display device 9 starts variable display of effect symbols. In other words, the variable display of the second special symbol, the second decorative symbol, and the effect symbol corresponds to winning in the second start winning opening 14. If the variable display of the second special symbol cannot be started, the second reserved memory number is increased by 1 on condition that the second reserved memory number has not reached the upper limit value.

  FIG. 2 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. 2 also shows the payout control board 37, the effect control board 80, and the like. A game control microcomputer (corresponding to game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. including. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. The I / O port unit 57 may be externally attached.

  On the main board 31, a random number generation circuit 501 for generating a hardware random number based on white noise is mounted. The game control microcomputer 560 inputs data output from the random number generation circuit 501 at a predetermined time, and sets the input data in a counter (region of the RAM 55) for generating random numbers.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  The RAM 55 is a backup RAM as a non-volatile storage means, part or all of which is backed up by a backup power supply created on the power supply board. That is, even if the power supply to the gaming machine is stopped, a part or all of the contents of the RAM 55 is stored for a predetermined period (until the capacitor as the backup power supply is discharged and the backup power supply cannot be supplied). In particular, at least data corresponding to the game state, that is, the control state of the game control means (the value of the special symbol process flag or the total pending storage number counter) and the data indicating the number of unpaid winning balls are stored in the backup RAM. The data corresponding to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power is restored after a power failure or the like occurs. Further, data corresponding to the control state and data indicating the number of unpaid prize balls are defined as data indicating the progress state of the game. In this embodiment, it is assumed that the entire RAM 55 is backed up.

  A reset signal from the power supply board is input to the reset terminal of the game control microcomputer 560. A reset circuit for generating a reset signal supplied to the game control microcomputer 560 and the like is mounted on the power supply board. When the reset signal becomes high level, the game control microcomputer 560 and the like are in an operable state, and when the reset signal becomes low level, the game control microcomputer 560 and the like are in an operation stop state. Therefore, an allowable signal that allows the operation of the game control microcomputer 560 or the like is output during a period when the reset signal is at a high level, and a game control microcomputer is output when the reset signal is at a low level. An operation stop signal for stopping the operation of 560 or the like is output. Note that the reset circuit may be mounted on each electric component control board (a board on which a microcomputer for controlling the electric parts is mounted).

  Further, a power-off signal indicating that the power supply voltage from the power supply board has dropped below a predetermined value is input to the input port of the game control microcomputer 560. That is, the power supply board monitors the voltage value of a predetermined voltage (for example, DC30V or DC5V) used in the gaming machine, and when the voltage value decreases to a predetermined value (the power supply voltage is reduced). A power supply monitoring circuit that outputs a power-off signal indicating that). In addition, a clear signal indicating that the clear switch for instructing to clear the contents of the RAM is operated is input to the input port of the game control microcomputer 560.

  Also, an input driver that provides the game control microcomputer 560 with detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a. The circuit 58 is also mounted on the main board 31. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a large winning opening in accordance with a command from the game control microcomputer 560. 31. Further, an information output circuit (not shown) for outputting an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer is also mounted on the main board 31.

  In this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 instructs the effect contents from the game control microcomputer 560 via the relay board 77. Upon receiving the effect control command, display control is performed on the first decorative symbol display unit 9a and the second decorative symbol display unit 9b that variably display the decorative symbol, and the effect display device 9 that variably displays the effect symbol.

  FIG. 3 is a block diagram illustrating a circuit configuration example of the relay board 77, the effect control board 80, the lamp driver board 35, and the audio output board 70. In the example shown in FIG. 3, the lamp driver board 35 and the audio output board 70 are not equipped with a microcomputer, but may be equipped with a microcomputer. Further, without providing the lamp driver board 35 and the audio output board 70, only the effect control board 80 may be provided for effect control.

  The effect control board 80 has an effect control microcomputer 100 including an effect control CPU 101 and a RAM. The RAM may be externally attached. Further, the RAM in the production control microcomputer 100 is not backed up. Therefore, when power supply is restored after a power failure or the like occurs, the effect control microcomputer 100 executes an initialization process to initialize the contents of the RAM. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives a capture signal from the main board 31 input via the relay board 77 ( An effect control command is received via the input driver 102 and the input port 103 in response to the effect control INT signal. Further, the effect control CPU 101 controls the display of the first decorative symbol display device 9a and the second decorative symbol display device 9b via the output port 106 based on the effect control command, and a VDP (video display processor) 109. The display control of the effect display device 9 is performed.

  In this embodiment, a VDP 109 that performs display control of the effect display device 9 in cooperation with the effect control microcomputer 100 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100 and maps the VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP. Then, the VDP 109 outputs the image data in the VRAM to the effect display device 9.

  The effect control CPU 101 reads necessary data from a character ROM (not shown) in accordance with the received effect control command. The character ROM is for storing character image data displayed on the effect display device 9, specifically, a person, characters, figures, symbols, etc. (including effect symbols) in advance. The effect control CPU 101 outputs the data read from the character ROM to the VDP 109. The VDP 109 executes display control based on the data input from the effect control CPU 101.

  The effect control command and the effect control INT signal are first input to the input driver 102 on the effect control board 80. The input driver 102 allows the signal input from the relay board 77 to pass only in the direction toward the inside of the effect control board 80 (does not pass the signal in the direction from the inside of the effect control board 80 to the relay board 77). It is also a unidirectional circuit as a regulating means.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 3 illustrates a diode. A unidirectional circuit is provided for each signal. Furthermore, since the effect control command and the effect control INT signal are output from the main board 31 via the output port 571 that is a unidirectional circuit, the signal going from the relay board 77 to the inside of the main board 31 is restricted. That is, the signal from the relay board 77 does not enter the inside of the main board 31 (the game control microcomputer 560 side). The output port 571 is a part of the I / O port unit 57 shown in FIG. Further, a signal driver circuit that is a unidirectional circuit may be further provided outside the output port 571 (on the relay board 77 side).

  Further, the effect control CPU 101 outputs a signal for driving the lamp to the lamp driver board 35 via the output port 105. Further, the production control CPU 101 outputs sound number data to the audio output board 70 via the output port 104.

  In the lamp driver board 35, a signal for driving the lamp is input to the LED driver 352 via the input driver 351. The LED driver 352 amplifies a signal for driving the lamp and supplies the amplified signal to each lamp provided on the frame side such as the top frame LED 28a, the left frame LED 28b, and the right frame LED 28c. Further, it is supplied to the decoration LED 25 provided on the game board side.

  In the voice output board 70, the sound number data is input to the voice synthesis IC 703 via the input driver 702. The voice synthesizing IC 703 generates voice or sound effect according to the sound number data, and outputs it to the amplifier circuit 705. The amplification circuit 705 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 703 to a level corresponding to the volume set by the volume 706 to the speaker 27. The voice data ROM 704 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data showing the output form of the sound effect or sound in a time series in a predetermined period (for example, the changing period of the effect design).

  Next, the configuration of the power supply substrate 910 will be described with reference to the block diagram of FIG. The power supply board 910 is provided with a power switch 914 for permitting or shutting off power supply to each electric component control board or mechanism component in the gaming machine. Note that the power switch 914 may be provided outside the power supply board 910 in the gaming machine. When the power switch 914 is in a closed state (on state), AC power (AC 24 V) is applied to the input side (primary side) of the transformer 911. The transformer 911 is for electrically insulating the AC power supply (AC24V) and the inside of the power supply substrate 910, and its output voltage is also AC24V. A varistor 918 as an overvoltage protection circuit is installed on the input side of the transformer 911.

  The power supply board 910 is installed independently of the electric component control board (the main board 31, the payout control board 37, the effect control board 80, etc.), and generates a voltage used by each board and the mechanical parts in the gaming machine. In this example, AC24V, VSL (DC + 30V), VLP (DC + 24V), VDD (DC + 12V) and VCC (DC + 5V) are generated. Further, a capacitor 916 serving as a storage holding means for holding the stored contents in the backup power supply (VBB), that is, the backup RAM, is charged from DC + 5V (VCC), that is, a power supply line for driving an IC or the like on each substrate. Further, a backflow prevention diode 917 is inserted between the +5 V line and the backup +5 V (VBB) line. Note that VSL is generated by rectifying and boosting AC 24 V with a rectifying element in the rectifying and smoothing circuit 915. VSL becomes a solenoid driving power source. VLP is a lamp lighting voltage, and is generated by rectifying AC24V with a rectifier element in the rectifier circuit 912.

  The DC-DC converter 913 serving as a power supply voltage generation unit has one or a plurality of switching regulators (two regulator ICs 924A and 924B are shown in FIG. 4), and generates VDD and VCC based on VSL. Relatively large capacitors 923A and 923B are connected to the input sides of the regulator ICs (switching regulators) 924A and 924B. Accordingly, when the power supply to the gaming machine from the outside is stopped, the DC voltages such as VSL, VDD, VCC, etc., decrease relatively slowly.

  As shown in FIG. 4, AC24V output from the transformer 911 is supplied to the connector 922B as it is. The VLP is supplied to the connector 922C. VCC, VDD and VSL are supplied to connectors 922A, 922B and 922C.

  The cable connected to the connector 922A is connected to the main board 31. The cable connected to the connector 922B is connected to the payout control board 37. Therefore, VBB is also supplied to the connector 922A. For example, a cable connected to the connector 922 </ b> C is connected to the lamp driver board 35. Each voltage is supplied to the effect control board 80 via the lamp driver board 35.

  In addition, a clear switch 921 having a push button structure is mounted on the power supply board 910. When the clear switch 921 is pressed, a low level (ON state) clear signal is output and output to the main board 31 via the connector 922A. If the clear switch 921 is not pressed, a high level (off state) signal is output. The clear switch 921 may have a configuration other than the push button structure. Further, the clear switch 921 may be provided other than the power supply board 910 in the gaming machine.

  Further, the power supply board 910 generates a reset signal for the microcomputer mounted on the electric component control board, amplifies the reset signal from the power supply monitor circuit 920 that outputs a power-off signal, and the power supply monitor circuit 920. And an output driver circuit 925 that amplifies the power-off signal and outputs the amplified signal to the connector 922B. The reset signal for the effect control microcomputer is transmitted to the effect control board 80 via the lamp driver board 35. Further, when the reset circuit is mounted on each electric component control board, the voltage value that makes the reset signal high may be made different (for example, the case of the main board 31 is made highest). The timing at which the reset signal for the game control microcomputer 560 becomes high level is the latest).

  A power-off signal from the power monitoring circuit 920, that is, a detection signal from the power monitoring means is input to the game control microcomputer 560 via an input port mounted on the main board 31. That is, the gaming control microcomputer 560 can confirm the occurrence of the stop of the power supply to the gaming machine by monitoring the input signal of the input port.

  Next, the operation of the gaming machine will be described. FIG. 5 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When power is supplied to the gaming machine and power supply is started, the input level of the reset terminal to which the reset signal is input becomes high level, and the gaming control microcomputer 560 (specifically, the CPU 56) After executing a security check process, which is a process for confirming whether the contents of the program are valid, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). Then, after initialization of the built-in device (such as CTC (counter / timer) and PIO (parallel input / output port) which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM can be accessed. (Step S5). In interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is This mode indicates an interrupt address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the on-state is detected in the confirmation, the CPU 56 executes normal initialization processing (steps S10 to S15 and steps S45 and S46).

  If the clear switch is not in the on state, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) has been performed when power supply to the gaming machine is stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process.

  After confirming that the power supply stop process has been performed, the CPU 56 performs data check of the backup RAM area (step S8). In this embodiment, a parity check is performed as a data check. Therefore, in step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power outage or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 restores the game state restoration process (steps S41 to S44) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). In addition, a display result designation command and a total pending storage number designation command are transmitted (step S44). Then, the process proceeds to step S15. Although there are a plurality of types of display result specifying commands, the processing in step S44 indicates the display result specifying command stored in the RAM 55 (the display result specifying command transmitted last when the power supply is stopped). Send a command based on the data. In addition, although the data indicating the total pending storage number is included in the total pending storage number designation command, in the process of step S44, the total pending storage number designation command including data indicating the total pending storage number stored in the RAM 55 is used. Send.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, special symbol buffer, total prize ball number storage buffer, special symbol process flag, award ball flag, out of ball flag, payout stop flag, etc. are selectively processed according to the control state. An initial value is set in the flag for this.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the effect control microcomputer 100 receives the initialization designation command, the effect display device 9 performs screen display for notifying that the control of the gaming machine has been performed, that is, initialization notification.

  The CPU 56 sets an abnormality notification prohibition flag (step S45) and sets a value corresponding to the prohibition period value in the prohibition period timer (step S46). The prohibition period value is a value indicating a period during which an abnormal winning notification described later is prohibited. The abnormality notification prohibition flag is a flag indicating that notification of an abnormal winning is prohibited, and is maintained in the set state until the prohibition period timer times out. Therefore, the start of the abnormal winning notification is prohibited for a predetermined period after the initialization notification is started in the effect display device 9.

  Further, the CPU 56 reads data from the random number generation circuit 501 (step S14A), sets the data read from the random number generation circuit 501 as an initial value in a counter for generating random 1 (a big hit determination random number). The data read from the random number generation circuit 501 is stored as an initial value in the random 1 initial value buffer in the RAM 55 (step S14B). The CPU 56 further reads data from the random number generation circuit 501, sets the read data as an initial value in a counter for generating random 5 (normal random number per symbol), and reads the data read from the random number generation circuit 501. Is stored as an initial value in a random 5 initial value buffer in the RAM 55 (step S14C). Note that a plurality of random number generation circuits 501 corresponding to each of the counters for generating random numbers (big hit determination random numbers, normal symbol determination random numbers) may be provided.

  In step S15, the CPU 56 sets a register of the CTC built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. The initial value random number is a random number for determining an initial value of a count value, such as a counter for generating a random number for determining whether or not to make a big hit (a big hit determination random number generation counter). A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls game devices such as a variable display device, a variable winning ball device, a ball payout device, etc. provided in the game machine itself. In a process for transmitting a command signal to be controlled by another microcomputer, or a game device control process), the count value of the random number generation counter for jackpot determination is one round (a random number generation counter for jackpot determination, etc.) When the value is incremented by the number of values between the minimum value and the maximum value that can be taken, the initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process of steps S20 to S35 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output, for example, when a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for storing necessary data in the backup RAM area. Next, detection signals of the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a are input via the input driver circuit 58, These state determinations are performed (switch processing: step S21).

  Next, the CPU 56 includes a first special symbol display 8a, a second special symbol display 8b, a normal symbol display 10, a first special symbol hold storage display 18a, a second special symbol hold storage display 18b, and a normal symbol. A display control process for controlling the display of the on-hold storage display 41 is executed (step S22). For the first special symbol display 8a, the second special symbol display 8b, and the normal symbol display 10, a drive signal is output to each display according to the contents of the output buffer set in steps S33 and S34. Execute control.

  Further, the CPU 56 performs a process for notifying an abnormal winning when it detects that a game ball has won a prize at a time other than the regular time (step S23: abnormal winning notification process).

  Next, a process of updating the count value of each counter for generating each determination random number such as a big hit determination random number used for game control is performed (determination random number update process: step S24). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S25 and S26).

FIG. 7 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Corresponding to the variable display of the first special symbol based on the winning of the game ball to the first start winning opening (first starting win) (or winning the game ball to the second starting winning opening) (Corresponding to the variable display of the second special symbol based on the 2nd start winning)) to determine whether or not to generate a big hit (for big hit determination)
(2) Random 2: Determine the detachment symbol (stop symbol) of the first special symbol and the second special symbol (for detachment symbol determination)
(3) Random 3: Determines the stop symbol of the first special symbol and the second special symbol when generating a big hit (for determining the big hit symbol)
(4) Random 4: Determine the variation pattern (variation time) of the first special symbol and the second special symbol (for variation pattern determination)
(5) Random 5: Determines whether or not to generate a hit based on a normal symbol (for normal symbol hit determination)
(6) Random 6: Determine the initial value of random 1 (for determining the random 1 initial value)
(7) Random 7: Determine the initial value of random 5 (for determining the random 5 initial value)
(8) Random 8: Decide whether or not to reach when it is not a big hit (for reach determination)
(9) Random 9: Determine gaming state (probability change state / normal state) (for game state determination)

  In step S24 in the game control process shown in FIG. 6, the game control microcomputer 560 uses (1) big hit determination random number, (3) big hit symbol determination random number, and (5) normal symbol determination determination. A counter for generating a random number and a gaming state determining random number of (9) is incremented (added by 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may use random numbers other than the random number of said (1)-(9). In this embodiment, the big hit determination random number is a software random number generated based on a program by the game control microcomputer 560. However, as the big hit determination random number, hardware external to the game control microcomputer 560 is used. Alternatively, a random number generated by hardware built in the game control microcomputer 560 may be used.

  In this embodiment, the random numbers (particularly, random numbers 1, 3, 4, and 9) shown in FIG. 7 are used for both the first special symbol variation and the second special symbol variation. The random number related to the fluctuation of the symbol may be different from the random number related to the fluctuation of the second special symbol.

  Further, the CPU 56 performs special symbol process processing (step S27). In the special symbol process, corresponding processing is executed in accordance with a special symbol process flag for controlling the first special symbol indicator 8a, the second special symbol indicator 8b, and the big prize opening in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Next, normal symbol process processing is performed (step S28). In the normal symbol process, the CPU 56 executes a corresponding process according to a normal symbol process flag for controlling the display state of the normal symbol display 10 and the open / close state of the variable winning ball apparatus 15 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S29).

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, starting information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 executes a prize ball process for setting the number of prize balls based on detection signals from the start port switch 13a, the count switch 23, and the prize port switches 29a, 30a, 33a, 39a (step S31). Specifically, the payout control is performed in accordance with winning detection based on any one of the first starting port switch 13a, the second starting port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a being turned on. A payout control command (award ball number signal) indicating the number of winning balls is output to a payout control microcomputer mounted on the substrate 37. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S32: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S33). For example, if the variation speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 outputs a drive signal in step S22 in accordance with the display control data set in the output buffer, whereby the first special symbol display unit 8a and the second special symbol display unit 8b Variable display of the second special symbol is executed.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in the output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S34). For example, when the start flag for normal symbol fluctuation is set, the CPU 56 switches the display state (“◯” and “×”) for the normal symbol fluctuation speed every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. In addition, the CPU 56 executes a normal symbol effect display on the normal symbol display 10 by outputting a drive signal in step S22 in accordance with the display control data set in the output buffer.

  Thereafter, the interrupt permission state is set (step S35), and the process ends.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes of steps S21 to S34 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 8 is an explanatory diagram showing a jackpot determination table. The jackpot determination table is a table in which a jackpot determination value to be compared with random 1 (random number for jackpot determination) is set. The big hit determination table is stored in the ROM 54. The jackpot determination table includes a normal jackpot determination table (see FIG. 8 (A)) used in a normal state (a gaming state that is not a probability change state) and a probability change jackpot determination table (see FIG. 8 (B)) used in a probability change state. ) The numerical values described in the left column of FIGS. 8A and 8B are jackpot determination values. The CPU 56 extracts a count value of a counter for generating a random 1 when an effective start winning occurs, and uses the extracted value as a random number for determining a big hit, and for starting a change in a special symbol When the random value matches the jackpot determination value shown in FIG. 8, it is determined that the first special symbol and the second special symbol are big hits (big hit or 2R big hit (small hit)).

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. The normal big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. In the case of the probable big hit and the normal big hit, the number of rounds is larger than that in the small hit, for example, 15 rounds.

  The 2R (2 rounds) big hit (small hit) is a big hit in which the number of times the big winning opening is opened in the big hit gaming state is allowed up to two times. When the small hit game ends, the game state does not shift to the probability change state.

  FIG. 9 is an explanatory diagram of a reach determination table. The reach determination table is a table in which a reach determination value to be compared with random 8 (a random number for reach determination) is set. The reach determination table is stored in the ROM 54. The reach determination table includes a determination table (see FIG. 9A) that is used when the total number of pending storages is 3 or less (less than 4) at the start of fluctuation of the first special symbol, and at the start of fluctuation of the first special symbol. A determination table (see FIG. 9 (B)) used when the total number of pending storage is 4 or more, and a determination table used when the total number of pending storage is 3 or less (less than 4) at the start of fluctuation of the second special symbol. (See FIG. 9 (C)) and a determination table (see FIG. 9 (D)) used when the total number of pending storages is 4 or more at the start of fluctuation of the second special symbol.

  The CPU 56 extracts the count value of the counter for generating the random 8 and makes the extracted value a reach determination random number value when the effective start winning is generated (at the time of starting the variation of the special symbol). When the reach determination random number value coincides with the reach determination value shown in FIG. 9, it is determined to reach.

  As shown in FIG. 9, when the total number of pending storage is large, the ratio determined to reach is low. Further, the reach determination table (see FIGS. 9A and 9B) used when the first special symbol starts to change and the reach determination table used when the second special symbol starts changing (FIGS. 9C and 9D). ))), The number of reach determination values is different. Specifically, the number of reach determination values in the reach determination table used at the start of the variation of the second special symbol is smaller. In this embodiment, the reach determination table to be used is changed depending on whether or not the total pending storage number is 4 or more. However, “4” is an example and is a value for changing the reach determination table to be used. Other values may be used as A plurality of values may be used as values for changing the reach determination table to be used. As an example, the reach determination table used when the total pending storage number is less than 4, the reach determination table used when the total pending storage number is 4 to 6, and the total pending storage number is 7 or more. A reach determination table is used.

  The determination random number and the display random number are counted up regularly (every 2 ms in this embodiment) by the CPU 56, and returned to the minimum value (for example, 0 or 1) when the count value exceeds the maximum value.

  Since the count value of the counter is periodically counted up, for example, when a count-up cycle or a cycle in which the counter count value makes one round is detected by any means, for example, a timing for generating a random value that matches the jackpot determination value Will be recognized. Then, it is possible to frequently generate “hit” by playing a game aimed at the timing at which a random number value that matches the jackpot determination value is generated. In some cases, an illegal board is attached to a gaming machine in order to aim at a timing at which a random number value that matches the jackpot value is generated. Such a fraudulent board introduces a signal output to the outside from the circuit part that performs game control, detects the start timing of the circuit part that performs game control based on the signal, and the random value that matches the jackpot determination value is The timing of occurrence is detected. Then, the unauthorized board can send a predetermined signal (start winning signal) to the circuit portion that controls the game so as to synchronize with the timing, and illegally generate a “hit”. As a result, there is a disadvantage in the game store where the gaming machine is installed.

  In order to prevent fraudulent acts due to fraudulent signals that aim to generate random numbers that generate “big hits”, the count value advances one round (for example, 631 if one of 631 types of random numbers is to be generated). In this case, it has been proposed to set a random value to the counter instead of returning the count value to a specific value (for example, 0). If such counter control is performed, it is difficult to aim at the generation of a random value that causes a “big hit” from the outside (see, for example, JP-A-11-70252). Hereinafter, setting a random value to the counter when the count value makes one round is referred to as changing the initial value of the counter.

  However, in the method described in Japanese Patent Application Laid-Open No. 11-70252, the initial value of the counter is not changed unless the count value of the counter for generating a random number makes one round.

  Generally, when the power supply to the gaming machine is started, the CPU 56 initializes the count value of the counter to a specific value (for example, 0), so that the count value of the counter is changed after the power supply to the gaming machine is started. Until one round, it becomes possible to aim at the generation timing of the random value that causes the “big hit”. Even when power supply to the gaming machine is not started, the CPU 56 sets the count value of the counter to a specific value (when a reset signal is given to the CPU 56 and the CPU 56 starts control from the initial state again). For example, since it is initialized to 0), it is possible to aim at the generation timing of a random value that causes “big hit” until the count value of the counter makes one round after the power supply to the gaming machine is started. End up.

  Therefore, in this embodiment, the CPU 56 changes the initial value of the counter when the count value of the counter has made one round, and also executes an initialization process (steps) that is executed when power supply to the gaming machine is started. In S10 to S15), data read from the random number generation circuit 501 is set as an initial value in a counter for generating a jackpot determination random number (see step S14B in FIG. 5). Further, data read from the random number generation circuit 501 is set as an initial value in a counter for generating a random number for determination per ordinary symbol (see step S14C in FIG. 5). Note that the CPU 56 executes the processes of steps S14B and S14C not only when the power supply to the gaming machine is started but also when the reset signal is input and the initialization process is executed.

  The random number generation circuit 501 is a circuit that generates a random number based on white noise. Random numbers based on white noise are uniform random numbers. The uniform random number is a random number in which the appearance probabilities of all the numerical values included in the section (numerical range) are the same in a predetermined section (for example, a numerical range such as 0 to 630 and 0 to 1023). . That is, each numerical value in the numerical value range is a random number generated randomly and at a similar rate.

FIG. 10 is a block diagram illustrating a configuration example of the random number generation circuit 501. However, FIG. 10 shows a configuration example in the case where the numerical range is 2 ⁴ = 16 (0 to 15). A random number generation circuit 501 illustrated in FIG. 10 is a circuit that generates M-sequence (maximum length sequences) codes as an example of random numbers based on white noise. A circuit that generates an M-sequence code (M-sequence random number) is often used in a communication system or the like as a circuit that generates a random number that can be regarded as white noise, that is, a digital random number based on white noise. A circuit that generates an M-sequence code generates 0 and 1 randomly. Further, the period of the generated pattern is theoretically maximum. Therefore, when a circuit that generates an M-sequence code is configured to serially output data, a bit (0 or 1) output from the circuit is continuously input from an arbitrary point in time, and n (positive In the case of (integer) bit data, the numerical value indicated by the n-bit data (any of 0 to 15 when n = 4) is the same as the numerical value indicated by the n-bit data output thereafter. There is randomness (the same numerical value appears without regularity in time), and each numerical value can be regarded as a random number.

  The random number generation circuit 501 calculates an exclusive OR of the shift register 502 that shifts data based on the clock signal input to the clock input terminal 504 and the output of the last stage and the output of the middle stage of the shift register 502. And an exclusive OR circuit 503. The output of the exclusive OR circuit 503 is input to the first stage of the shift register 502. Further, the output of the final stage of the shift register 502 is output from the output terminal 505. In this embodiment, it is input from the output terminal 505 to the game control microcomputer 560.

  The game control microcomputer 560 receives serial signal data from the shift register 502, but data obtained by dividing the input data every 4 bits (any one of 0 to 15 in decimal) is random. It is a random number.

In the example shown in FIG. 10, since the number of stages of the shift register 502 is 4, the numerical range is 2 ⁴ = 16 (0 to 15), but the numerical range is 2 ¹⁰ = 1024 (0 to 1023). If desired, the number of stages of the shift register 502 may be set to 10. When the numerical range handled by the game control microcomputer 560 is 631 (0 to 630: random 1), for example, data input from the random number generation circuit 501 in which the number of stages of the shift register 502 is 10 Is divided every 10 bits, and when the data represented by 10 bits (any one of 0 to 1023 in decimal number) exceeds 630, it may be replaced with an arbitrary numerical value. If the numerical range of random 1 is, for example, 0 to 511, the output of the random number generation circuit can be used as it is by using a random number generation circuit having nine stages of shift registers.

  Further, when the numerical range handled by the game control microcomputer 560 is 14 in the case of 1 to 13 (in the case of random 5), for example, data input from the random number generation circuit 501 in which the number of stages of the shift register 502 is 4 Is divided every 4 bits, and when the data represented by 4 bits (0 to 15 in decimal number) is a numerical value exceeding 0 or 13, it may be replaced with an arbitrary numerical value. If the numerical range of random 5 is, for example, 0 to 15, the output of the random number generation circuit can be used as it is by using a random number generation circuit having four stages of shift registers. However, since the circuit for generating the M-sequence code illustrated in FIG. 10 outputs 0 and 1 at random, for example, by using a random number generation circuit 501 in which the number of stages of the shift register 502 is four, The microcomputer 560 may input data having an arbitrary number of consecutive bits (may be other than 4), and use a numerical value indicated by the input data as a random value (in this example, an initial value set in a counter).

  In this embodiment, the game control microcomputer 560 is configured such that serial signal data is input from the random number generation circuit 501. For example, the random number generation circuit 501 and the game control microcomputer 560 A serial-parallel converter may be provided between the two, and the game control microcomputer 560 may be configured such that data by a parallel signal is input as data indicating a random value. Further, a serial-parallel converter may be provided in front of the output terminal 505 inside the random number generation circuit 501.

  In this embodiment, in the initialization process, the data read from the random number generation circuit 501 is set as an initial value in a counter for generating a big hit determination random number (see step S14B in FIG. 5). Data read from the random number generation circuit 501 is set as an initial value in a counter for generating a random number for normal symbol determination (see step S14C in FIG. 5), but after step S14B is executed, step S14C is executed. Since the processing time (for example, on the order of microseconds) by the CPU 56 elapses until the above processing is executed, if the frequency of the clock signal input to the clock input terminal 504 is high (for example, on the order of MHz), the processing time Since the output of the random number generation circuit 501 changes, the big hit determination random number is generated. The same value in the counter for generating a counter and normal symbol per determining random number are not biased setting. When one random number generation circuit 501 is used, as an example, when an initial value is set in a counter for generating a big hit determination random number, the data is sequentially serially output from the random number generation circuit 501. It is only necessary to input 10 bits (decimal number is 0 to 1023). In order to generate a random number for determination per normal symbol, 4 bits (4 bits continuous from the serial output data from the random number generation circuit 501) What is necessary is to input 0 to 15 in decimal). Note that, as described above, a plurality of random number generation circuits 501 corresponding to each of the counters for generating random numbers (random hit determination random numbers, normal symbol determination random numbers) may be provided.

  The random number generation circuit 501 operates asynchronously with the game control microcomputer 560 (for example, the operation clock signal of the game control microcomputer 560 and the clock signal input to the clock input terminal 504 have a frequency). Therefore, when power supply to the gaming machine is started or when a reset signal is given to the gaming control microcomputer 560 (when gaming control is started), the gaming control is started. The time until the microcomputer 560 starts the process of step S14B is not constant. This is because a reset circuit that generates a reset signal is generally a circuit including a capacitor, and outputs a reset signal when the voltage of the capacitor reaches a predetermined value by charging the capacitor (specifically, the reset signal is set to a high level). This is because the charging speed of the capacitor changes according to environmental conditions such as temperature. Even when power supply to the gaming machine is started, the reset signal is given to the gaming control microcomputer 560 from the reset circuit that generates the reset signal. Since the time from when the game control microcomputer 560 starts the game control to when the process of step S14B is started is not constant, for example, a reset signal is continuously given to the game control microcomputer 560. However, the initial value set in the counter is not constant.

  In this embodiment, a random number generation circuit 501 that generates an M-sequence code as a random number based on white noise is illustrated. However, as a random number generation circuit based on white noise, fluctuation of current flowing in a resistor, a semiconductor element, or the like A circuit that generates random numbers based on noise (corresponding to analog white noise) (see, for example, JP-A-2001-344094), a circuit that generates random numbers based on other thermal noise, and an oscillation circuit are used. An oscillating circuit type random number circuit or the like can also be used. These circuits are configured to obtain random numbers by, for example, digitizing a level (current value, etc.) of analog white noise that changes at random.

  FIG. 11 is a flowchart showing the determination random number update process (step S23) executed in the game control process shown in FIG. In the determination random number update process, the CPU 56 increments the value of the counter for generating random 1 (big hit determination random number) (step S201). If the value of the counter for generating random 1 exceeds the maximum value (630 in this example), the count value is returned to 0 (steps S202 and S203). Hereinafter, a counter for generating random n (n: 1, 2,...) May be referred to as a random n counter.

  Next, the CPU 56 checks whether or not the count value of the random 1 counter matches the value stored in the random 1 initial value buffer as an initial value (step S204). If they do not match, the count value remains unchanged. If they match, random 6 (random 1 initial value determination random number) is extracted (step S205). That is, the count value of the counter for generating random 6 is input. Then, the extracted value is stored as an initial value in the random 1 initial value buffer (step S206), and the extracted value is set in the random 1 counter (step S207). Therefore, at this time, the initial value of the random 1 counter is changed.

  Next, +1 is added to the value of the counter (random 5 counter) for generating random 5 (normal random number for symbol determination) (step S211). If the value of the random 5 counter exceeds the maximum value (13 in this example), the count value is returned to 1 (steps S212 and S213).

  Next, the CPU 56 checks whether or not the count value of the random 5 counter matches the value stored in the random 5 initial value buffer as an initial value (step S214). If they do not match, the count value remains unchanged. If they match, random 7 (random 1 initial value determination random number) is extracted (step S215). That is, the count value of the counter for generating random 7 is input. The extracted value is stored as an initial value in the random 5 initial value buffer (step S216), and the extracted value is set in the random 5 counter (step S217). Therefore, at this time, the initial value of the random 5 counter is changed.

  Further, the CPU 56 increments the value of the counter for generating random 9 (game field team determination random number) (step S218). If the value of the counter for generating random 9 exceeds the maximum value (599 in this example), the count value is returned to 0 (steps S219 and S220).

  FIG. 12 is executed once in the game control process shown in FIG. 6 (step S24), and the interrupt surplus time in the main process shown in FIG. It is a flowchart which shows the random number update process for initial values (step S18) repeatedly performed by the time until an error occurs.

  In the initial value random number update process, the CPU 56 increments the value of the counter for generating random 6 (random 1 initial value determination random number) (step S231). If the value of the random 6 counter exceeds the maximum value, the count value is returned to 0 (steps S232 and S233). The maximum value is 630 as in the case of random 1.

  Further, the counter value for generating random 7 (random 5 initial value determining random number) is incremented by 1 (step S234). If the value of the random 7 counter exceeds the maximum value, the count value is returned to 1 (steps S235 and S236). The maximum value is 13 as in the case of random 5.

  FIG. 13 is an explanatory diagram illustrating an example of a counter value for generating random 1 (big hit determination random number) that changes by the determination random number update process illustrated in FIG. 11. In this example, the first value of random 1 is 451. That is, an example is shown in which the data read from the random number generation circuit 501 is “451” in the process of step S14B shown in FIG. In FIG. 13, the point in time when the process of step S14B is executed is indicated by A. Since “451” is initially stored in the initial value buffer for random 1 as the initial value, the count value advances to “450”. When the count value is incremented by 1 and becomes 451, the count value is processed in step S204. Is detected to match the initial value. Then, random 6 (random 1 initial value determination random number) is extracted in the process of step S205. This time point is indicated by B in FIG.

  Here, it is assumed that the count value of the counter for generating the random 6 at that time is “19”. Then, “19” is extracted as random 6, the value is stored (step S206), and the value is set in the counter for generating random 1. Therefore, from this time point, the counter for generating random 1 advances from the initial value “19”.

  When the value of the counter for generating random 1 advances to “19”, it is detected in step S204 that the count value matches the initial value. Then, random 6 is extracted by the process of step S205. This time point is indicated by C in FIG. It is assumed that the count value of the counter for generating random 6 at that time is “195”. Then, “195” is extracted as random 6, the value is stored (step S206), and the value is set in the counter for generating random 1. Therefore, from this point, the counter for generating random 1 advances from the initial value “195”.

  Then, when the value of the counter for generating random 1 advances to “195”, it is detected in step S204 that the count value matches the initial value. Then, random 6 is extracted by the process of step S205. This time point is indicated by D in FIG. Assume that the count value of the counter for generating random 6 at that time is “n”. Then, “n” is extracted as random 6 and the value is stored (step S206), and the value is set in the counter for generating random 1. Therefore, from this point, the counter for generating random 1 advances from the initial value “n”. In FIG. 13, an asterisk (☆) indicates a position where the count value is “3 (deemed as a big hit determination value)”. The position of the star is different for each lap.

  As described above, every time the value of the counter for generating random 1 makes one round (631 counts), a new initial value is set as the count value, and thereafter the counter advances from that value. A counter (counter for generating random 6) for determining an initial value of a counter for generating random 1 (a jackpot determining counter) is a surplus time of game control processing executed by the CPU 56 (game control processing is The time is counted up until the next 2 ms timer interrupt occurs). The extra time varies depending on the progress of the game, and is a random period. As a result, since the generated random 6 value is also a random value, the initial value of the jackpot determination counter also changes randomly.

  Further, the initial value of the counter for generating random 1 in the first round (in the uppermost case in FIG. 13) is determined based on the output of the random number generation circuit 501 that generates a random number based on white noise. As described above, the output of the random number generation circuit 501 becomes a different value when the game control microcomputer 560 executes the process of step S14B in the initialization process. That is, when the initialization process is executed a plurality of times, the initial value of the counter for generating random 1 is different in each execution. For example, even if a fraudulent act such as resetting the gaming control microcomputer 560 is performed, the fraudulent person cannot recognize the initial value of the counter for generating the random 1, and as a result, the random 1 This means that the timing matching the jackpot determination value cannot be grasped. In other words, every time the value of the jackpot determination counter makes one round after the second lap, the counter starts to increment from a random initial value, so that it is illegal to aim at the timing when random 1 matches the jackpot determination value. In addition to making it difficult to send a simple start winning signal to the main board 31, it is also possible to make it difficult to aim at the timing at which the random 1 matches the big hit determination value even in the first round.

  In this embodiment, the initial value of the normal symbol determining random number is further controlled to be random. FIG. 14 is an explanatory diagram showing an example of a counter value for generating random 5 (normal symbol determination random number) that changes by the determination random number update process shown in FIG. In this example, the first value of random 5 is 8. That is, an example is shown in which the data read from the random number generation circuit 501 is “8” in the process of step S14C shown in FIG. In FIG. 14, the point in time when the process of step S14C is executed is indicated by A. Since “8” is initially stored in the initial value buffer for random 5 as the initial value, the count value advances to “7”, and when the value is incremented by 1 and becomes 8, the count value is processed in step S214. Is detected to match the initial value. Then, random 7 (random 5 initial value determination random number) is extracted in the process of step S215. This time point is indicated by B in FIG.

  Here, it is assumed that the count value of the counter for generating the random 7 at that time is “3”. Then, “3” is extracted as random 7 and the value is stored (step S 216), and the value is set in the counter for generating random 5. Therefore, from this point of time, the counter for generating the random number 5 advances from the initial value “3”.

  When the value of the counter for generating random 5 advances to “3”, it is detected in step S214 that the count value matches the initial value. Then, random 7 is extracted by the process of step S215. This time point is indicated by C in FIG. Assume that the count value of the counter for generating random 7 at that time is “6”. Then, “6” is extracted as the random number 7, the value is stored (step S216), and the value is set in the counter for generating the random number 5. Therefore, from this point, the counter for generating random 5 advances from the initial value “6”.

  When the value of the counter for generating random 5 advances to “6”, it is detected in step S214 that the count value matches the initial value. Then, random 7 is extracted by the process of step S215. This time point is indicated by D in FIG. Assume that the count value of the counter for generating random 7 at that time is “k”. Then, “k” is extracted as the random number 7, the value is stored (step S216), and the value is set in the counter for generating the random number 5. Therefore, from this time point, the counter for generating random 6 advances from the initial value “k”. In FIG. 14, an asterisk (☆) indicates a position where the count value is “11 (determined as a hit determination value)”. The position of the star is different for each lap.

  As described above, every time the value of the counter for generating random 5 makes one round (14 counts of 1 to 13), a new initial value is set as the count value. Thereafter, the counter increments from that value. I will do it. A counter (counter for generating random 7) for determining an initial value of a counter for generating random 5 (ordinary symbol determination counter) is a surplus time for game control processing executed by the CPU 56 (game control). The time is counted up after the processing is completed until the next 2 ms timer interrupt is generated). The extra time varies depending on the progress of the game, and is a random period. As a result, the generated random 7 value also becomes a random value, so that the initial value of the normal symbol per-determination counter also changes randomly.

  Furthermore, the initial value of the counter for generating random 5 in the first round (in the uppermost case in FIG. 14) is determined based on the output of the random number generation circuit 501 that generates a random number based on white noise. As described above, the output of the random number generation circuit 501 becomes a different value when the game control microcomputer 560 executes the process of step S14C in the initialization process. That is, when the initialization process is executed a plurality of times, the initial value of the counter for generating random 5 is different in each execution. For example, even if a fraudulent act such as resetting the game control microcomputer 560 is performed, the fraudulent person cannot recognize the initial value of the counter for generating the random 5, and as a result, the random 5 It means that the timing that matches the hit judgment value cannot be grasped. In other words, every time the value of the counter for normal symbol judgment after the second lap makes one round, the counter is started again from a random initial value, aiming at the timing when random 5 matches the hit judgment value. In addition to making it difficult to send an illegal winning signal to the main board 31, it is also possible to make it difficult to aim at the timing at which the random 5 matches the judgment value per ordinary symbol even in the first round.

  In this embodiment, as a counter whose initial value is set based on the output of the random number generation circuit 501 that generates a random number based on white noise, a counter for generating random 1 and a random 5 are generated. Although the counter is exemplified, the counter is not limited to the counter in which the initial value is set based on the output of the random number generation circuit 501. Counters for generating game state determination random numbers (random 9) for determining types of jackpots (probability variation jackpots / normal jackpots) for counters for generating random 1 and counters for generating random 5 You may perform control similar to said control. Further, in a gaming machine using a random number for determining whether or not to make a time reduction state (random number for time reduction determination: also commonly referred to as random number for symbol probability change determination), random 1 is set for the counter for generating those random numbers. You may perform control similar to the above control for the counter for generating and the counter for generating random 5.

  Further, in this embodiment, only the first round of the count value of the counter for generating the random number is determined based on the output of the random number generation circuit 501 that generates a random number based on white noise. Also when the initial value is updated, the initial value may be determined based on the output of the random number generation circuit 501 and the determined initial value may be set in the counter.

  Furthermore, in this embodiment, when power supply to the gaming machine is started, the count value of the counter for generating random 1 and the count value of the counter for generating random 5 are stored in the backup RAM. If the counter value is restored, the count value of those counters is restored to the count value when the power supply is stopped, but even if the counter value is stored in the backup RAM, the random number generation circuit The initial value may be determined based on the output of 501 and the determined initial value may be set in the counter. In other words, the initial value may be determined based on the output of the random number generation circuit 501 regardless of whether data is stored in the backup RAM, and the determined initial value may be set in the counter. The same applies to probability variation determination random numbers (game state determination random numbers), short time determination random numbers, and the like.

  In the technical field of the gaming machine according to the present invention, there is a conventional technique that uses a random number generation circuit that generates a random number based on white noise (see, for example, Japanese Patent Application Laid-Open No. 2000-42227). A technique for generating software random numbers by focusing on the first round of the counter for generating software random numbers as in the present invention, instead of using the random number generated by the random number generation circuit in place of random 1 etc. As for the initial value, a technique for setting the initial value based on the data read from the random number generation circuit is not disclosed in, for example, the above-mentioned publication.

  As described above, in this embodiment, in the gaming machine capable of performing a predetermined game using a game ball and shifting a gaming state to a specific gaming state when a predetermined transition condition is satisfied. A numerical value updating unit for determination that updates a numerical value for determination (for example, random 1) within a predetermined numerical value range, and a numerical value updating unit for determination according to satisfaction of a predetermined condition (for example, occurrence of a start prize) Based on the extracted numerical value and a predetermined determination value, a gaming state advantageous to the player (e.g., a big hit gaming state, a state where a variable winning ball apparatus that establishes a starting prize is open, Means for determining whether or not to make a transition to a probability variation state or a short-time state), a random number generation circuit for generating a hardware random number based on white noise, and a random number generation circuit when game control is started. First initial value setting means for setting the first initial value of the determination numerical value updating means based on the data read from the circuit (for example, the processing of steps S14A, S14B, and S14C is executed in the game control microcomputer 560). Part) is provided, so that fraud can be prevented more effectively.

  Furthermore, in this embodiment, after the first initial value setting means sets the first initial value, the numerical value of the determination numerical value update means becomes a predetermined value (for example, the set initial value). Second initial value setting means for setting a second initial value (for example, random 5 or random 7) of the numerical value updating means (for example, a part for executing the process of step S207 in the game control microcomputer 560) After the execution of the game control process (for example, the process of steps S21 to S33) started based on the occurrence of a predetermined interrupt (for example, 2 ms timer interrupt), the predetermined interrupt is again generated. Initial value numerical value updating means for repeatedly updating the second initial value in the remaining time until occurrence (for example, the game control microcomputer 560 executes the process of step S18). Since portions) are provided, not only at the start of the game control, it can be effectively prevented illegal act then also.

  FIG. 15 is an explanatory diagram showing an example of a variation pattern (variation time) of a special symbol, a decorative symbol, and an effect symbol used in this embodiment. In FIG. 15, “EXT” indicates EXT data of the second byte in the effect control command for designating a decorative pattern variation pattern having a 2-byte configuration. The “variation time” indicates the variation time (variable display period of identification information) of the special symbol, the decorative symbol, and the effect symbol. Note that the variation pattern indicates the variation time of the special symbol, decorative symbol, and production symbol, etc. May be expressed as a variation pattern, a decoration pattern variation pattern, and a production pattern variation pattern.

  As shown in FIG. 15, when the shortening variation is not performed, the variation patterns # 1 to # 4 are used, and when the shortening variation is performed, the variation patterns # 5 to # 8 are used. In this embodiment, variation patterns # 5 to # 8 of shortening variation are used when the value of the total number of pending storages is a predetermined value (for example, 4) or more. In this embodiment, variation patterns # 5 to # 8 of shortening variation are used in the probability variation state and the short time state.

  Note that the variation patterns # 2 to # 4 and the variation patterns # 6 to # 8 are a case where the stop symbol becomes a big hit symbol, and a case where the stop symbol is an off symbol but a reach effect is executed on the effect display device 9. The variation pattern used. The variation pattern # 1 and the variation pattern # 5 are variation patterns that are used when the stop symbol is an off symbol and the reach display is not executed in the effect display device 9. In this embodiment, the same variation pattern (any one of variation patterns # 1 to # 8) is displayed when the variable display of the first special symbol is performed and when the variable display of the second special symbol is performed. Although used, different variation patterns may be used when variable display of the first special symbol is performed and when variable display of the second special symbol is performed. For example, variation patterns # 1 ′ to # 8 ′ are defined, any one of variation patterns # 1 to # 8 is used for the first special symbol, and variation patterns # 1 ′ to # 8 ′ are used for the second special symbol. Use one of the following. In this case, for example, the fluctuation pattern table in which data indicating the fluctuation patterns # 1 to # 8 is set and the fluctuation pattern table in which data indicating the fluctuation patterns # 1 ′ to # 8 ′ are set are stored in the ROM 54 separately. Is done.

  When receiving the effect control command indicating the variation pattern, the effect control microcomputer 100 performs variable display of the decoration symbol on the ornament symbol display for a time corresponding to the variation pattern indicated by the received effect control command. The effect design is variably displayed, and the effect display device 9 performs a type of display effect corresponding to the variation pattern indicated by the received effect control command. At the same time, an effect using the effect parts such as the lamp, the LED, and the speaker 27 is performed. That is, the variation pattern indicates the variation time and the aspect of the effect.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. FIG. 16 is an explanatory diagram showing a signal line of an effect control command transmitted from the main board 31 to the effect control board 80. As shown in FIG. 16, in this embodiment, the effect control command is transmitted from the main board 31 to the effect control board 80 via the relay board 77 using eight signal lines of the effect control signals CD0 to CD7. Further, between the main board 31 and the effect control board 80, a signal line of the effect control INT signal for transmitting the capture signal (effect control INT signal) is also wired.

  In this embodiment, the effect control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  As shown in FIG. 17, the 8-bit effect control command data of the effect control command is output in synchronization with the effect control INT signal. The effect control microcomputer 100 mounted on the effect control board 80 detects that the effect control INT signal has risen, and starts a 1-byte data capturing process through an interrupt process. Therefore, when viewed from the effect control microcomputer 100, the effect control INT signal corresponds to a signal (capture instruction signal) that triggers the capture of the effect control command data.

  The effect control command is sent only once so that the effect control microcomputer 100 can recognize it. In this example, “recognizable” means that the level of the effect control INT signal changes, and that it is sent only once so as to be recognizable means that, for example, each of the first and second bytes of the effect control command data Accordingly, the production control INT signal is output in a pulse shape (rectangular wave shape) only once. The effect control INT signal may have a polarity opposite to that shown in FIG.

  FIG. 18 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 18, commands 8001 (H) to 8008 (H) are variable patterns of decorative symbols and effect symbols that are variably displayed on the decorative symbol display and effect display device 9 in response to variable display of special symbols. Is an effect control command (variation pattern command) for designating. “(H)” indicates a hexadecimal number. The effect control command for designating the variation pattern is also a command for designating the start of variation. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 8008 (H), the decoration design display and the production display device 9 start variable display of the decoration design and the production design. Control.

  Commands 8C01 (H) to 8C04 (H) are effect control commands indicating whether or not to make a big hit, and the type or small hit of the big hit game. The effect control microcomputer 100 determines the display results of the decorative symbols and the effect symbols in response to the reception of the commands 8C01 (H) to 8C04 (H), so that the commands 8C01 (H) to 8C04 (H) are specified as the display results. It is called a command.

  Command 8D01 (H) is an effect control command (first symbol variation designation command) indicating that variable display (variation) of the first special symbol is started. Command 8D02 (H) is an effect control command (second symbol variation designation command) indicating that variable display (variation) of the second special symbol is started. The first symbol variation designation command and the second symbol variation designation command may be collectively referred to as a special symbol identification command (or symbol variation designation command). Note that information indicating whether to start variable display of the first special symbol or to start variable display of the second special symbol may be included in the variation pattern command.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of decorative symbols and effect symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbol and the effect symbol and derives and displays the display result.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Commands 9500 (H) to 9502 (H) are effect control commands (state designation commands) for designating a gaming state (for example, normal state / short time state / probability change state). When receiving the state designation command, the effect control microcomputer 100 changes, for example, the background screen in the effect display device 9 to a screen corresponding to the gaming state. What is changed is, for example, the screen color.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration.

  The commands A001 to A003 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 3 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of a big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game, and also designates an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot has been a non-probable variation jackpot (usually a jackpot) 1 designation command). The command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a promising big hit (a jackpot end 2 designation command: an ending 2 designation command). is there.

  The command C000 (H) is an effect control command (first start winning designation command) for designating that the first starting prize has been won. The command C100 (H) is an effect control command (second start winning designation command) for designating that there has been a second start winning. The first start prize designation command and the second start prize designation command may be collectively referred to as a start prize designation command.

  The command C2XX (H) is an effect control command (total pending storage number designation command) that designates the total number (total pending storage number) that is the sum of the first reserved memory number and the second reserved memory number. “XX” in the command C2XX (H) indicates the total pending storage number. Command C300 (H) is an effect control command (total pending storage count subtraction designation command) that specifies that 1 is added to the total pending storage count. In this embodiment, the game control microcomputer 560 transmits a total pending storage number subtraction designation command when subtracting the total pending storage number, but does not use the total pending storage number subtraction designation command, and does not use the total pending storage number subtraction designation command. When the stored number is subtracted, the combined pending storage number after the subtraction may be designated by a combined pending storage number designation command.

  Command D001 (H) is an effect control command (abnormal winning designation command) for instructing notification of abnormal winning.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the effect display device 9 is changed according to the contents shown in FIG. 18, the display state of the lamp is changed, or the sound number data is output to the audio output board 70.

  In the example shown in FIG. 18, the variable pattern command and the display result specifying command are transmitted as the variable display of the identification information and the second variable display unit (second decorative symbol display) on the first variable display unit (first decorative symbol display unit 9a). Game control when the production control microcomputer 100 can control the first variable display unit and the second variable display unit in common with the variable display of the identification information in the device 9b). It is possible to prevent an increase in the types of commands transmitted from the production microcomputer 560 to the production control microcomputer 100. In addition, when controlling the effect parts such as the effect display device 9 that produces effects in accordance with the variable display of the first special symbol and the second special symbol, the game control microcomputer 560 transmits to the effect control microcomputer 100. It is possible to avoid increasing the types of commands that are executed.

  19 and 20 are explanatory diagrams illustrating examples of the transmission timing of the effect control command. FIG. 19A shows an example when a start prize (first start prize or second start prize) occurs. The game control microcomputer 560 transmits the first start prize designation command (or the second start prize designation command) and then continuously transmits the total pending storage number designation command. Specifically, a first start winning designation command (or a second start winning designation command) is transmitted in a game control process based on a timer interrupt, and then a combined pending storage number designation command is transmitted.

  Further, as shown in FIG. 19B, the game control microcomputer 560 receives a state designation command, a fluctuation pattern command, a special symbol identification command, a display result identification command, and a combined pending storage number subtraction designation command at the start of fluctuation. Send. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Note that an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 20A shows an example when power supply is started (when power is turned on). The game control microcomputer 560 transmits the customer waiting demonstration designation command after transmitting the power-on designation command. Furthermore, a state designation command may be transmitted.

  FIG. 20B shows an example when power supply is resumed (when power failure is restored). The game control microcomputer 560 continuously transmits a power failure recovery designation command, a display result specifying command, and a combined pending storage number designation command. Since the effect symbol type storage area formed in the RAM 55 is stored for a predetermined period even when the power supply to the gaming machine is stopped, the game control microcomputer 560 displays the effect symbol when the power supply is resumed. A display result specifying command is transmitted based on the data stored in the type storage area. Further, the value of the total pending storage number counter formed in the RAM 55 is stored for a predetermined period even when the power supply to the gaming machine is stopped. Therefore, when the power supply is resumed, the game control microcomputer 560 is restored. Transmits a total pending storage number designation command based on the stored total pending storage number counter value.

  FIG. 21 is an explanatory diagram showing an example of bit assignment of input ports related to a switch for detecting a game ball in the game control microcomputer. As shown in FIG. 21, the bits 0 to 7 of the input port 0 include the count switch 23, the gate switch 32a, the winning port switches 33a, 39a, 29a, and 30a, the second starting port switch 14a, and the first starting port, respectively. A detection signal of the switch 13a is input. The input port 0 is a part of the I / O port unit 57 shown in FIG.

  FIG. 22 and FIG. 23 are flowcharts showing an example of a special symbol process (step S27) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. In the special symbol process, a process for controlling the first special symbol display 8a, the second special symbol display 8b, and the special winning opening is executed.

  In this embodiment, the special symbol process is used for both the first special symbol and the second special symbol. That is, the special symbol process is also shared.

  In the special symbol process, the CPU 56 detects that the first starting port switch 13a for detecting that the game ball has won the first start winning port 13 or that the game ball has won the second start winning port 14. If the second start opening switch 14a is turned on, that is, if the first start winning or the second starting winning is generated, the start opening switch passing process is executed. Specifically, the data of the input port 0 (see FIG. 21) is read and loaded into a predetermined area of the register or RAM 55, for example (step S311). Then, the bitwise AND operation of the loaded contents (loaded data) and C0 (H) is performed, and if the operation result is not 0 (step S312), the start port switch passing process is executed (step S313). . More specifically, when the calculation result changes to a state of 0 (when it is 0 in the immediately preceding determination of 2 ms and 0 in the current determination), the start port switch passing process is executed. . Then, any one of steps S300 to S310 is performed. C0 (H) is a value corresponding to the input bit of the detection signal from the first start port switch 13a and the second start port switch 14a of the input port 0. In this embodiment, the contents of the input port 0 are directly loaded. However, when the contents of the input port 0 are set in a predetermined area of the RAM 55 in the switch process (step S21), the area The contents of may be loaded. Further, the process of step S312 may be replaced with an operation of performing exclusive OR with 00 (H) after masking bits 0 to 5 of the loaded contents (loaded data) (set to 0). .

  The processes in steps S300 to S310 are as follows.

  Special symbol normal processing (step S300): executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 enters a state where variable display of special symbols can be started, the game control microcomputer 560 confirms the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from the start of variable display until the display result is derived and displayed (stop display)) Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): This process is executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the first special symbol display 8a and the second special symbol display 8b is stopped, and the stopped symbols are derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. When the big hit flag is set and the small hit flag is not set, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. If the small hit flag is set, the internal state (special symbol process flag) is updated to a value (8 in this example) corresponding to step S308. If the big hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S300 (0 in this example). The effect control microcomputer 100 controls the effect display device 9 to stop the decorative symbols when the symbol confirmation designation command transmitted by the game control microcomputer 560 is received.

  Preliminary winning opening process (step S305): This process is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). Note that the pre-opening process for the big prize opening is executed every round, but when the first round is started, the pre-opening process for the big winning opening is also a process for starting the big hit game.

  Large winning opening opening process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the big prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S305 (5 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control for causing the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended is performed. Further, a process for setting a flag (for example, a probability variation flag) indicating a gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  Small hit release pre-processing (step S308): This process is executed when the value of the special symbol process flag is 8. In the pre-opening process for small hits, control is performed to open the big prize opening. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). It should be noted that although the pre-opening process for small hits is executed for each round, the pre-opening process for small hits is also a process for starting a small hit game when starting the first round.

  Small hit release processing (step S309): executed when the value of the special symbol process flag is 9. A control for transmitting an effect control command for a round display during the small hit gaming state to the effect control microcomputer 100, a process for confirming that the closing condition for the big prize opening is satisfied, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value corresponding to step S308 (8 in this example). When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S310 (in this example, 10 (decimal number)).

  Small hit end processing (step S310): executed when the value of the special symbol process flag is 10. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the small hit gaming state has ended. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 24 is a flowchart showing the start-port switch passing process in step S312. As shown in step S311, when the logical product of the content loaded from the input port 0 (loaded data) and C0 (H) is performed and the operation result is not 0, that is, the first start switch 13a and the first switch In the start port switch passing process that is executed when at least one of the two start port switches 14a is in the ON state, the CPU 56 checks whether or not the bit 7 of the loaded data is 1 (step S320). . As shown in FIG. 21, when the first start port switch 13a is in the ON state, the detection signal input to bit 7 of the loaded data is 1 (high level). That is, the fact that bit 7 of the loaded data is 1 means that bit 7 of input port 0 has changed from 0 to 1. That is, it means that the first start port switch 13a is turned on.

  Also, if bit 7 of the loaded data is not 1, it means that bit 6 of input port 0 has changed from 0 to 1. That is, it means that the second start port switch 14a is turned on. If bit 7 of the loaded data is not 1, the process proceeds to step S331 to execute the process for the second start port switch 14a.

  When the bit 7 of the input port 0 is 1, the CPU 56 determines whether or not the value of the first reserved number counter formed in the RAM 55 is 4 that is the upper limit value (the upper limit number of the first reserved memory). Confirmation (step S321). If it is 4, the process proceeds to step S328. If not 4, the value of the first reserved memory number counter is incremented by 1 (step S322). Further, the value of the total pending storage number counter formed in the RAM 55 is incremented by 1 (step S323).

  Further, the CPU 56 stores data indicating “first” (data indicating the first reserved storage) in an area corresponding to the value of the combined reserved storage number counter in the reserved storage specific information storage area (hold specific area). Is set (step S324).

  FIG. 25A is an explanatory diagram showing a configuration example of a reserved storage specifying information storage area (holding specified area). As shown in FIG. 25 (A), an area corresponding to the maximum value (8 in this example) of the value of the total reserved memory number counter is secured in the reserved specific area. FIG. 25A shows an example in which the value of the total pending storage number counter is 5.

  FIG. 25B is an explanatory diagram showing a configuration example of an area (hold buffer) for storing random numbers and the like corresponding to the hold memory. As shown in FIG. 25B, a storage area corresponding to the upper limit number (4 in this example) of the first reserved storage number is secured in the first reserved storage buffer. In the second reserved storage buffer, a storage area corresponding to the upper limit number (4 in this example) of the second reserved storage number is secured. The first reserved storage buffer and the second reserved storage buffer are formed in the RAM 55.

  The CPU 56 performs a process of extracting software random numbers (such as a counter value for generating a big hit determination random number) and storing them in the storage area in the first reserved storage buffer as the extracted random number values ( Step S325). Specifically, the CPU 56 stores the software random number in the storage area corresponding to the value indicated by the first reserved memory number counter of the first reserved memory buffer.

  In step S325, the CPU 56 extracts random values 1 to 4, 8, and 9 (see FIG. 7) as software random numbers. In addition, each of the first to eighth areas in the reserved specific area illustrated in FIG. 25A further includes two storage areas for storing the extracted random number values (a storage area corresponding to the first reserved memory and A storage area corresponding to the second reserved storage) may be formed. In the case of such a configuration, the CPU 56 specifies that there has been a prize in the area (any one of the first to eighth areas) in the reserved specific area corresponding to the combined reserved memory number in the process of step S325. A random number value is stored in a storage area corresponding to the start winning opening.

  Next, the CPU 56 performs control to transmit a first start winning designation command (step S326). Further, control is performed to transmit a total pending storage number designation command (step S327). The CPU 56 sets the value of the total pending storage number counter in the EXT data of the total pending storage number designation command. Note that the total pending storage number designation command may be transmitted before the first start winning designation command. Further, the value of the first reserved memory number counter may be set in the EXT data of the first start winning designation command.

  When transmitting an effect control command to the effect control microcomputer 100, the CPU 56 sets the address of a command transmission table (preliminarily set for each command in the ROM) corresponding to the effect control command as a pointer. And the address of the command transmission table according to an effect control command is set to a pointer, and an effect control command is transmitted in an effect control command control process (step S29).

  Next, the CPU 56 checks whether or not the bit 6 of the content loaded from the input port 0 is 1 (step S328). If bit 6 is 1, the process proceeds to step S331. When both the bit 6 and the bit 7 of the loaded data are 1 by the processing of step S328, that is, when both the first start port switch 13a and the second start port switch 14a are turned on. After the processing of steps S321 to S327 is executed for the first start port switch 13a corresponding to bit 7, the processing of steps S331 to S337 is executed for the second start port switch 14a corresponding to bit 6 immediately. become.

  In this embodiment, when both the first start port switch 13a and the second start port switch 14a are turned on, both switches are turned on by the process executed within 2 ms. A process based on this is executed. Therefore, for example, even if a situation occurs in which the period during which the switch that has detected the game ball has the detection signal turned on is extremely short, the processing based on the switch being turned on can be completed with certainty. In addition, since the processing of steps S321 to S327 and steps S331 to S337 based on both switches being turned on is completed within 2 ms (within one timer interrupt processing), the value of the software random number does not increase by one. A random number is extracted.

  In step S331, the CPU 56 checks whether or not the value of the second hold number counter formed in the RAM 55 is 4 which is the upper limit value (the upper limit number of the first hold memory) (step S321). If it is 4, the process ends. If not 4, the value of the second reserved memory number counter is incremented by 1 (step S332). Further, the value of the total pending storage number counter is incremented by 1 (step S333).

  In addition, the CPU 56 stores data indicating “second” (data indicating second reserved storage) in an area corresponding to the value of the total reserved storage number counter in the reserved storage specific information storage area (hold specific area). Is set (step S334).

  The CPU 56 performs a process of extracting software random numbers (such as a counter value for generating a big hit determination random number) and storing them in the storage area in the second reserved storage buffer as the extracted random number values ( Step S335). Specifically, the CPU 56 stores the software random number in the storage area corresponding to the value indicated by the second reserved memory number counter of the second reserved memory buffer. In step S335, the CPU 56 extracts random values 1 to 4, 8, and 9 (see FIG. 7) as software random numbers.

  Next, the CPU 56 performs control to transmit a second start winning designation command (step S336). Further, control is performed to transmit a total pending storage number designation command (step S337). The CPU 56 sets the value of the total pending storage number counter in the EXT data of the total pending storage number designation command. Note that the total pending storage number designation command may be transmitted before the second dynamic prize designation command. Further, the value of the first reserved memory number counter may be set in the EXT data of the second start winning designation command.

  In the start port switch passing process, the CPU 56 first processes the data indicating “first” indicating that the process is executed for the first start winning opening 13 or the second start winning opening 14 as a target. The data indicating “second” indicating that the control is executed is set in the start port pointer, and in the subsequent processing, processing corresponding to the data set in the start port pointer may be executed. Specifically, taking the processing of step S322 and step S332 as an example, the first reserved memory number counter and the second reserved memory number counter are formed at consecutive addresses in the RAM 55, and the first in the start port switch passing process is formed. As a process, the address of the first reserved memory number counter is set in a register, and the value set in the start port pointer in the register (for example, data indicating “first” is “0”, indicating “second”) The data is “1”), and the value of the register after the addition is used as the address of the RAM 55 to add 1 to the data at that address. According to such a process, the target of the addition process is the first reserved memory number counter when the data indicating “first” is set in the start port pointer, and indicates “second” in the start port pointer. When data is set, it is a second reserved memory number counter. That is, in one addition process, the value of the reserved memory number counter corresponding to the start winning opening that is turned on is automatically incremented by one. In other words, the processing for both start winning awards is made common.

  Here, the processing of step S322 and step S332 is taken as an example, but the processing can also be made common to the processing of step S325 and step S335 and the processing of step S326 and step S336. For example, data corresponding to the first start winning prize (address of the first reserved storage number buffer or command transmission table address of the first start winning designation command) is set in the register, and the start pointer is set in the register. A value is added as an offset, and data is set based on the register value after addition (in the case of step S325 and step S335) and the address of the command transmission table is designated (in the case of step S326 and step S336). Thus, it is possible to perform data setting processing and command transmission table address designation in a single processing.

  Moreover, the process of step S323 and the process of step S333 can also be made common to one process, and the process of step S327 and the process of step S337 can also be made common to one process.

  26 and 27 are flowcharts showing the special symbol normal process (step S300) in the special symbol process. In the special symbol normal process, the CPU 56 confirms the value of the total pending storage number (step S51). Specifically, the count value of the total pending storage number counter is confirmed. If the total pending storage number is 0, the process is terminated.

  If the total pending storage number is not 0, the CPU 56 checks whether or not the first data among the data set in the pending specific area (see FIG. 25A) is data indicating “first”. (Step S52). If it is data indicating “first”, a special symbol pointer (a flag indicating whether special symbol process processing is being performed for the first special symbol or special symbol process processing is being performed for the second special symbol) is set to “first 1 "is set (step S53). If it is not data indicating “first”, that is, if it is data indicating “second”, data indicating “second” is set in the special symbol pointer (step S54).

  The CPU 56 reads out each random value stored in the storage area corresponding to the reserved storage number = 1 indicated by the special symbol pointer in the RAM 55 and stores it in the random number buffer area of the RAM 55 (step S55). Specifically, when the special symbol pointer indicates “first”, the CPU 56 determines each disturbance stored in the storage area corresponding to the first reserved memory number = 1 in the first reserved memory number buffer. The numerical value is read and stored in the random number buffer area of the RAM 55. In addition, when the special symbol pointer indicates “second”, the CPU 56 reads each random number value stored in the storage area corresponding to the second reserved memory number = 1 in the second reserved memory number buffer. And stored in the random number buffer area of the RAM 55.

  Then, the CPU 56 decrements the count value of the reserved storage number counter indicated by the special symbol pointer and shifts the contents of each storage area (step S56). Specifically, when the special symbol pointer indicates “first”, the CPU 56 decrements the count value of the first reserved storage number counter by 1 and shifts the contents of each storage area. When the special symbol pointer indicates “second”, the count value of the second reserved memory number counter is decremented by 1, and the contents of each storage area are shifted.

  That is, when the special symbol pointer indicates “first”, the CPU 56 saves the first reserved memory number = n (n = 2, 3, 4) in the first reserved memory number buffer of the RAM 55. Are stored in a storage area corresponding to the first reserved memory number = n−1. Further, when the special symbol pointer indicates “second”, it is stored in the storage area corresponding to the second reserved memory number = n (n = 2, 3, 4) in the second reserved memory number buffer of the RAM 55. Each random number value is stored in a storage area corresponding to the second reserved memory number = n−1.

  Therefore, the order in which each random value stored in each storage area corresponding to each first reserved memory number (or each second reserved memory number) is extracted is always the first reserved memory number (or (Second reserved storage number) = 1, 2, 3 and 4 in order.

  Then, the CPU 56 stores the count value of the total pending storage number counter in a predetermined area of the RAM 55 (step S57), and then decreases the value of the total pending storage number by one. That is, 1 is subtracted from the count value of the total pending storage number counter (step S58). The CPU 56 stores the value of the total pending storage number counter before the count value is decremented by 1 in a predetermined area of the RAM 55.

  In the special symbol normal process, first, data indicating “first” indicating that the process is executed for the first start winning opening 13, that is, “first” indicating that the process is executed for the first special symbol. ”Or“ second ”indicating that the process is performed on the second special symbol, that is,“ second ”indicating that the process is performed on the second start winning opening 14. Data is set in the special symbol pointer. In the subsequent processing in the special symbol process, processing corresponding to the data set in the special symbol pointer is executed. Therefore, the process of steps S300 to S310 can be made common between the case where the first special symbol is the target and the case where the second special symbol is the target.

  Next, the CPU 56 performs control to transmit a state designation command according to the gaming state (step S59). If the probability change flag is set in the process of step S59, a state 2 designation command is transmitted. If the time reduction flag is set, a state 3 designation command is transmitted. If neither the probability variation flag nor the time reduction flag is set, 1 Send a designated command.

  Further, the CPU 56 reads random 1 (a jackpot determination random number) from the random number buffer area (step S61), and executes the jackpot determination module (step S62). The big hit judgment module compares a big hit judgment value (see FIG. 8) determined in advance with a big hit judgment random number, and determines that the big hit (ordinary big hit or probability variation big hit) or small hit is made if they match. It is a program that executes

  Note that, when the gaming state is in the probability variation state, the CPU 56 uses the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 8B is set, and the gaming state is in the normal state (non-probability variation state). Is, the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 8A is set is used. When it is determined to be a big hit (step S63), the process proceeds to step S71. Note that deciding whether or not to make a big hit means deciding whether or not to shift to the big hit gaming state, but deciding whether or not to make the stop symbol in the first special symbol display 8a to be a big win symbol. It is also to do.

  If it is not a big hit, it is determined whether or not a small hit is made (step S76). If it is determined to be a small hit, a small hit flag is set (step S77). Then, the process proceeds to step S81. If not, the CPU 56 reads out the design determining random number from the random number buffer area (step S78), and determines the stop design based on the out-of-design determining random number (step S79). In this case, for example, it is determined to be one of even symbols. Then, the process proceeds to step S81.

  In step S71, the CPU 56 sets a big hit flag. Then, the game state determination random number is read from the random number buffer area (step S72), and it is determined whether or not to make a probable big hit based on the game state determination random number. If it is determined that the probability variation big hit is to be made, the probability variation big hit flag is set (step S74). Next, the big hit symbol determination random number is read from the random number buffer area (step S75), and the big hit symbol (for example, one of the odd symbols) is determined as the stop symbol based on the big hit symbol determination random number (step S76). In this embodiment, when it is determined that the probability variation is a big hit, the stop symbol is determined to be a probability variation symbol (for example, “3” or “7”). When it is determined that the probability variation jackpot is not set, the stop symbol is determined to be a jackpot symbol other than the probability variation symbol (for example, an odd symbol other than “3”, “5” or “7”). In this embodiment, it is assumed that the stop symbol for the small hit is “5”.

  Then, the value of the special symbol process flag is updated to a value corresponding to the variation pattern setting process (step S301) (step S81). When the probability change big hit flag is set, the game state is shifted to the probability change state when the big hit game ends.

  In this embodiment, whether or not to make a promiscuous big hit based on the gaming state determination random number is determined, but whether to make the big hit based on the big hit determination random number and the type of jackpot (probable big hit or normal big hit) ) May be determined. Also, it is determined whether or not to make a big hit based on a big hit determination random number, and when it is decided to make a big hit, a predetermined big hit symbol (predetermined probabilistic big hit symbol is determined based on the random number for big hit symbol determination) ) May be controlled to the probability variation state.

  FIG. 28 is a flowchart showing the variation pattern setting process (step S301) in the special symbol process. In the variation pattern setting process, the CPU 56 checks whether or not the big hit flag or the small hit flag is set (step S90). When the big hit flag and the small hit flag are not set, the process proceeds to step S91. If the big hit flag or the small hit flag is set, the random number for determining the variation pattern is read from the random number buffer area (step S101).

  Then, the variation pattern is determined. Specifically, when the probability variation flag or the time reduction flag is set, the variation pattern corresponding to the determination value that matches the variation pattern determination random number value is selected from the shortened variation pattern table (see FIG. 15). (Steps S102 and S103). The shortened variation pattern table is a table stored in the ROM 54, and data indicating the variation patterns # 6 to # 8 is set corresponding to the determination value. When the big hit flag is set, the variation pattern # 5 is not selected. When the probability variation flag and the time reduction flag are not set, the variation pattern corresponding to the determination value that matches the variation pattern determination random number value is selected from the non-shortened variation pattern table (see FIG. 15) (step S102, S104). The non-shortening variation pattern table is a table stored in the ROM 54, and data indicating the variation patterns # 2 to # 4 is set corresponding to the determination value. When the big hit flag is set, the variation pattern # 1 is not selected.

  Then, the CPU 56 performs control to transmit a variation pattern command (see FIG. 18) corresponding to the variation pattern selected in step S103 or S104 to the effect control microcomputer 100 (step S105). Note that the special symbol variation time (variable display time) is determined by the processing of steps S101 to S104. Also, when using a different variation pattern between when the variable display of the first special symbol is performed and when the variable display of the second special symbol is performed, for example, in the processing of steps S103 and S104, the special symbol pointer is changed. A variation pattern is selected from the variation pattern table shown.

  Also, control is performed to transmit a symbol variation designation command indicating the variation of the special symbol (step S106). Specifically, when data indicating “first” is set in the special symbol pointer, the CPU 56 transmits a first symbol variation designation command indicating the variation of the first special symbol, and the special symbol pointer is transmitted to the special symbol pointer. When the data indicating “second” is set, a second symbol variation designation command indicating the variation of the second special symbol is transmitted. Then, according to the setting of the special symbol pointer, the first special symbol or the second special symbol starts to change (step S107). For example, a start flag referred to in the special symbol display control process in step S33 is set. Further, a value corresponding to the variation time (see FIG. 15) corresponding to the selected variation pattern is set in the variation time timer formed in the RAM 55 (step S108). Then, the value of the special symbol process flag is updated to a value corresponding to the display result specifying command transmission process (step S302) (step S109). In addition, you may comprise so that the process of step S106 may be performed before the process of step S105. That is, a symbol variation designation command (special symbol specifying command) may be transmitted before transmitting the variation pattern command (see FIG. 19B).

  In step S91, the CPU 56 checks whether or not a time reduction flag indicating that the time reduction state is set. If the time reduction flag is set, the value of the time reduction counter indicating the number of times the special symbol can be changed in the time reduction state is decremented by 1 (step S92). When the value of the time reduction counter becomes 0, a time reduction end flag is set in order to shift the gaming state to the non-time reduction state when the variable display ends (steps S93 and S94).

  Next, the reach determination random number is read from the random number buffer area (step S95). Then, it is confirmed whether or not the value of the total pending storage number counter stored in a predetermined area of the RAM 55 (the value before being subtracted in the process of step S58) is equal to or greater than a predetermined value (4 in this example) ( In step S96), if it is equal to or greater than the predetermined value, it is determined whether or not to reach based on the reach determination table used when the value of the special symbol pointer and the value of the total pending storage number counter are equal to or greater than the predetermined value (step S97). . If it is less than the predetermined value, it is determined whether or not to reach based on the reach determination table used when the value of the special symbol pointer and the value of the total pending storage number counter are less than the predetermined value (step S98).

  In the process of step S97, the CPU 56 uses the reach determination table shown in FIG. 9B if the value of the special symbol pointer is a value indicating “first”, and the value of the special symbol pointer is “second”. Is used, the reach determination table shown in FIG. 9D is used. In the process of step S98, if the value of the special symbol pointer is a value indicating “first”, the CPU 56 uses the reach determination table shown in FIG. If the value indicates “2”, the reach determination table shown in FIG. 9C is used.

  If it is decided to reach in step S97 or step S98, the process proceeds to step S105. If it is decided not to reach, the CPU 56 changes the fluctuation pattern to the fluctuation pattern # 1 (when the probability variation flag and the time reduction flag are not set) or the variation pattern # 5 (probability variation flag or time reduction) as the deviation variation pattern. If the flag is set) (step S100). Then, the process proceeds to step S105.

  In this embodiment, the special symbol process is used for both the first special symbol and the second special symbol. That is, the special symbol process is also shared. Therefore, an area for storing the special symbol process processing program in the ROM 54 is also saved. Further, for example, the variable time timer (formed in the RAM 55) set in step S108 is shared by the first special symbol and the second special symbol, which leads to a capacity saving of the RAM 55.

  FIG. 29 is a flowchart showing the display result specifying command transmission process (step S302). In the display result specifying command transmission process, the CPU 56 performs any one of the display control 1 designation to the display result 4 designation according to the determined type of jackpot (including the jackpot) (see FIG. 18). Control to send. Specifically, the CPU 56 first checks whether or not the big hit flag (which is also set when the small hit is determined) is set (step S110). If not set, control is performed to transmit a display result 1 designation command (step S111). When the big hit flag is set, when the probability variation big hit flag is set, control is performed to transmit the display result 4 designation command (steps S112 and S113). When the small hit flag is set, control for transmitting a display result 3 designation command is performed (steps S114 and S115). When neither the probability variation big hit flag nor the small hit flag is set, control is performed to transmit a display result 2 designation command (step S116). The CPU 56 stores the transmitted display result specifying command in the effect symbol type storage area in the RAM 55. Next, a total pending storage number subtraction designation command designating that 1 is subtracted from the total pending storage number is transmitted (step S117). Instead of transmitting the total pending storage number subtraction designation command, a total pending storage number designation command for designating the total pending storage number after subtraction may be transmitted.

  Then, the CPU 56 updates the value of the special symbol process flag to a value corresponding to the special symbol changing process (step S303) (step S118).

  FIG. 30 is a flowchart showing the special symbol changing process (step S303) in the special symbol process. In the special symbol changing process, the CPU 56 subtracts 1 from the variable time timer (step S121), and when the variable time timer times out (step S122), the value of the special symbol process flag corresponds to the special symbol stop process (step S304). The updated value is updated (step S123). If the variable time timer has not timed out, the process ends.

  FIG. 31 is a flowchart showing the special symbol stop process (step S304) in the special symbol process. In the special symbol stop process, the CPU 56 sets an end flag referred to in the special symbol display control process in step S33 to end the variation of the special symbol, and the first special symbol display unit 8a and the second special symbol display unit 8b. Then, a control for deriving and displaying the stop symbol is performed (step S131). When data indicating “first” is set in the special symbol pointer, the variation of the first special symbol is terminated, and when data indicating “second” is set in the special symbol pointer. The variation of the second special symbol is terminated. Moreover, control which transmits the symbol determination designation | designated command to the microcomputer 100 for production control is performed (step S132). When the big hit flag and the small hit flag are not set, the process proceeds to step S140 (step S133).

  When the big hit flag is set, the CPU 56 resets the probability variation flag and the hourly flag (step S134), and performs control to transmit the big hit start designation command (step S135). Specifically, a big hit start 3 designation command is transmitted when the probability variation big hit flag is set, a big hit start 2 designation command is transmitted when the small hit flag is set, otherwise Send a jackpot start 1 designation command.

  Also, a value corresponding to the big hit display time (time for notifying the fact that the big hit or the small hit has occurred, for example, in the effect display device 9) is set in the big hit display time timer (step S136). If the small hit flag is set, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308) (steps S137 and S138). If the small hit flag is not set, the value of the special symbol process flag is updated to a value corresponding to the pre-opening process for the big prize opening (step S305) (step S139). The case where the small hit flag is not set is a case where a normal big hit or a probable big hit is determined.

  In step S140, the CPU 56 updates the value of the special symbol process flag to a value corresponding to the special symbol normal process (step S300) (step S140).

  In the big winning opening opening pre-processing, when the big hit display time timer is set, the CPU 56 controls to open the big winning opening when the big hit display time timer times out, and sets the big winning opening opening time timer. A value corresponding to the opening time (for example, 29 seconds in the case of a normal big hit and a probable big hit) is set, and the value of the special symbol process flag is updated to a value corresponding to the big winning opening opening process (step S306). . The case where the big hit display time timer is set is the case before the start of the first round. When an interval timer (timer for determining the interval time between rounds) is set, when the interval timer times out, control is performed to open the big prize opening, and the opening time ( For example, a value corresponding to 29 seconds in the case of a normal big hit and a probable big hit is set), and the value of the special symbol process flag is updated to a value corresponding to the big winning opening opening process (step S306).

  In the process during opening of the big prize opening, the CPU 56 does not finish the final round when the big prize opening time timer times out or the number of winning balls to the big prize opening reaches a predetermined number (for example, 10). In this case, control for closing the special winning opening is performed, a value corresponding to the interval time is set in the interval timer, and the value of the special symbol process flag is set to a value corresponding to the pre-opening process for the special winning opening (step S305). Update. When the final round is completed, the value of the special symbol process flag is updated to a value corresponding to the jackpot end process (step S307).

  FIG. 32 is a flowchart showing the jackpot end process (step S307) in the special symbol process. In the jackpot end process, the CPU 56 checks whether or not the jackpot end display timer is set (step S150). If the jackpot end display timer is set, the process proceeds to step S154. If the jackpot end display timer is not set, the jackpot flag is reset (step S151), and control for transmitting a jackpot end designation command is performed (step S152). If the probability variation jackpot flag is set, a jackpot end 2 designation command is transmitted. If the probability variation jackpot flag is not set, a jackpot termination 1 designation command is transmitted. Then, a value corresponding to the display time corresponding to the time during which the big hit end display is performed on the effect display device 9 (big hit end display time) is set in the big hit end display timer (step S153), and the processing is ended. Note that the count switch detection time shown in FIG. 32 is a time sufficient for the game ball to be detected by the count switch 23 after winning the winning prize opening. For example, if it takes a maximum of 1.0 seconds for a game ball to enter the grand prize opening and be detected by the count switch 23, the count switch detection time is longer than 1.0 seconds.

  In step S154, 1 is subtracted from the value of the big hit end display timer. Then, the CPU 56 checks whether or not the value of the jackpot end display timer is 0, that is, whether or not the jackpot end display time has elapsed (step S155). If not, the process ends. If it has elapsed, it is confirmed whether or not the probability variation big hit flag is set (step S158).

  If the probability variation jackpot flag is set, the set flag (probability variation jackpot flag) is reset (step S159), the probability variation flag is set, and the gaming state is shifted to the probability variation state (step S161). Then, the time reduction flag is set (step S162), and the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S163).

  In the pre-opening process for small hits in step S308, the same process as the pre-opening process for the big prize opening (step S305) is performed. However, instead of updating the value of the special symbol process flag to a value corresponding to the large winning opening opening process, the special symbol process flag is updated to a value corresponding to the small hit opening process. Further, in the small hit opening process in step S309, the same process as the big prize opening opening process (step S306) is performed. However, if it is not the final round, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308). If it is the final round (second round), the value of the special symbol process flag Is updated to a value corresponding to the small hit end processing (step S310).

  FIG. 33 is a flowchart showing the small hit end process (step S310) in the special symbol process. In the small hit end process, the CPU 56 checks whether or not the small hit end display timer is set (step S170). If the small hit end display timer is set, the process proceeds to step S174. When the big hit end display timer is not set, the big hit flag and the small hit flag are reset (step S171), and control for transmitting a big hit end 1 designation command is performed (step S172). Then, the small hit end display timer sets a value corresponding to the display time corresponding to the time during which the small hit end display is performed in the effect display device 9 (small hit end display time) in the small hit end display timer ( Step S173), the process is terminated. Note that the count switch detection time shown in FIG. 33 is sufficient time for the game ball to be detected by the count switch 23 after winning the winning ball.

  In step S174, 1 is subtracted from the value of the small hit end display timer. Then, the CPU 56 checks whether or not the value of the small hit end display timer is 0, that is, whether or not the small hit end display time has elapsed (step S175). If not, the process ends. If it has elapsed, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S176). In this embodiment, the big hit end 1 designation command is transmitted even when the small hit game ends. However, when the big hit end game ends, an effect control command (for example, a small hit end 1 designation command different from the big hit end 1 designation command) is transmitted. (Hit end designation command) may be transmitted.

  FIG. 34 is a flowchart showing the abnormal winning notification process in step S23. In the abnormal winning notification process, the CPU 56 checks whether or not the abnormal notification prohibition flag is set (step S581). The abnormality notification prohibition flag is set in the main process that is executed when power supply to the gaming machine is started (see step S45 in FIG. 5). When the abnormality notification prohibition flag is not set, the process proceeds to step S585. When the abnormality notification prohibition flag is set, the value of the prohibition period timer set in step S46 is decremented by 1 (step S582). When the value of the prohibition period timer becomes 0, that is, when the prohibition period timer times out, the abnormality notification prohibition flag is reset (steps S583 and S584).

  Next, it is confirmed whether or not the value of the special symbol process flag is 5 or more (step S585). The state where the value of the special symbol process flag is 5 or more is a state where a big hit game or a small hit game is being played. In such a state, there is a possibility that a game ball will win the big winning opening, so it is not confirmed that an abnormal winning has occurred in the big winning opening. That is, if the value of the special symbol process flag is 5 or more, the abnormal winning notification process is terminated.

  If the value of the special symbol process flag is less than 5 (the state where neither big hit game nor small hit game is played), the CPU 56 determines the value of bit 0 of the input port 0 (input bit of the detection signal from the counter switch 23). Whether or not has changed from 0 to 1 is checked (step S586). When the bit 7 or the bit 6 of the input port 0 changes from 0 to 1 (that is, when the counter switch 23 is turned on), the CPU 56 determines that an abnormal winning to the big winning opening has occurred, and the effect control board 80 Then, control for transmitting an abnormal winning notification designation command is performed (steps S586 and S587). In the big hit end process and the small hit end process shown in FIGS. 32 and 33, the count switch detection time (the time from when the game ball is won to the big winning opening until it is detected by the count switch 23) has elapsed. After that, the value of the special symbol process flag is returned to zero. Therefore, the processing of steps S586 and S587 will not be executed before the game ball has won the big winning opening but is not detected by the count switch 23. In other words, the abnormal winning notification designation command is not transmitted even though the count switch 23 normally detects the game ball.

  When the counter switch 23 is turned on in the state where neither big hit game nor small hit game is performed by the above processing, an abnormal winning notification designation command is transmitted. In addition, the process of steps S581 to S583 prohibits the start of abnormality notification when the effect control microcomputer 100 is performing initialization notification. The production control microcomputer 100 continuously executes the initialization notification until the period corresponding to the prohibition period elapses after the initialization notification is started.

  In this embodiment, the control for detecting and notifying the abnormal winning a prize winning opening is performed, but the abnormal winning to the variable winning ball apparatus 15 having the second start winning opening 14 is detected and notified. Control may also be performed. In this case, since the control state of the variable winning ball device 15 can be determined by the value of the normal symbol process flag, the CPU 56 does not indicate that the value of the normal symbol process flag indicates that the variable winning ball device 15 is open. The abnormal winning notification designation command is also transmitted when it is detected that the detection signal of the second start port switch 14a is turned on. The abnormal winning notification designation command is preferably distinguishable from the abnormal winning notification designation command transmitted when an abnormal winning to the big winning opening is detected.

  Next, the operation of the effect control means will be described. FIG. 35 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 2 ms) (step S701). . Thereafter, the effect control CPU 101 proceeds to a loop process for monitoring a timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the following effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and performs a process of setting a flag according to the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 performs effect control process processing (step S705). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the effect display device 9 is executed.

  Next, a first decorative symbol display control process is performed (step S706). In the first decorative symbol display control process, display control of the first decorative symbol display 9a is executed. Further, a second decorative symbol display control process is performed (step S707). In the second decorative symbol display control process, display control of the second decorative symbol display 9b is executed. Further, a hold storage display control process for controlling the display state of the combined hold storage display unit 18c is executed (step S708). Further, a notification control process for performing notification using an effect device such as the effect display device 9 is executed (step S709). Thereafter, the process proceeds to step S702. As in the special symbol process executed by the game control microcomputer 560, the first ornament symbol display control process and the second ornament symbol display control process are made common, that is, realized by one program module. Thus, the capacity of the program executed by the production control microcomputer 100 may be reduced.

  FIG. 36 is an explanatory diagram showing a configuration example of a command reception buffer for storing the effect control command received from the game control microcomputer 560 of the main board 31. In this example, a command reception buffer in the form of a ring buffer capable of storing six 2-byte effect control commands is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. The ring buffer format is not necessarily required.

  The effect control command transmitted from the game control microcomputer 560 is received by an interrupt process based on the effect control INT signal, and is stored in a buffer area formed in the RAM. In the command analysis process, it is analyzed which command (see FIG. 18) the effect control command stored in the buffer area is.

  37 to 39 are flowcharts showing specific examples of the command analysis process (step S704). The effect control command received from the main board 31 is stored in the reception command buffer, but in the command analysis process, the effect control CPU 101 confirms the contents of the command stored in the command reception buffer.

  In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S611). Whether it is stored or not is determined by comparing the value of the command reception number counter with the read pointer. The case where both match is the case where the received command is not stored. When the received command is stored in the command receiving buffer, the effect control CPU 101 reads the received command from the command receiving buffer (step S612). When read, the value of the read pointer is incremented by +2 (step S613). The reason for +2 is that 2 bytes (1 command) are read at a time.

  If the received effect control command is a variation pattern command (step S614), the effect control CPU 101 stores the variation pattern command in a variation pattern command storage area formed in the RAM (step S615). Then, a variation pattern command reception flag is set (step S616).

  If the received effect control command is a display result specifying command (step S617), the effect control CPU 101 stores the display result specifying command in a display result specifying command storage area formed in the RAM (step S618). .

  If the received effect control command is a symbol confirmation designation command (step S621), the effect control CPU 101 sets a confirmed command reception flag (step S622).

  If the received effect control command is one of the jackpot start 1 to 3 designation commands (step S623), the effect control CPU 101 sets the jackpot start 1 to 3 designation command reception flag (step S624).

  If the received effect control command is the first symbol variation designation command (step S625), the first symbol variation designation command reception flag is set (step S626). If the received effect control command is the second symbol variation designation command (step S627), the second symbol variation designation command reception flag is set (step S628).

  If the received effect control command is a power-on specification command (initialization specification command) (step S631), the effect control CPU 101 displays an initial screen on the effect display device 9 indicating that the initialization process has been executed. Control is performed (step S632A). The initial screen includes an initial display of predetermined production symbols. Also, an initial notification flag is set (step S632B), and a value corresponding to the initial notification period value is set in the period timer (step S632C). The initial notification period is a period in which initialization notification is performed in response to reception of an initialization designation command. The effect control CPU 101 ends the initialization notification when the initial notification period elapses. The initial notification period is the same as the prohibition period set by the game control microcomputer 560 in step S46. Therefore, the abnormality notification designation command is not received when the initialization notification is performed.

  If the received effect control command is a power failure recovery designation command (step S633), a predetermined power failure recovery screen (screen for displaying information notifying the player that the gaming state is continuing) is displayed. Display control is performed (step S634), and a power failure recovery flag is set (step S635).

  If the received effect control command is a state designation command (step S6363), the received state designation command is stored in the state designation command storage area in the RAM (step S637).

  If the received effect control command is a jackpot end 1 designation command (step S641), the effect control CPU 101 sets a jackpot end 1 designation command reception flag (step S642). If the received effect control command is a jackpot end 2 designation command (step S643), the effect control CPU 101 sets a jackpot end 2 designation command reception flag (step S644).

  If the received effect control command is an abnormal prize notification designation command (step S645), the effect control CPU 101 sets an abnormal prize notification designation command reception flag (step S646).

  If the received production control command is a combined pending storage number designation command (step S651), the presentation control CPU 101 uses the second byte data (EXT data) of the combined pending storage number designation command as a combined pending storage number storage area. (Step S652).

  If the received effect control command is the first start winning designation command (step S653), the effect control CPU 101 sets the first start winning flag (step S654). If the received effect control command is the second start winning designation command (step S655), the effect control CPU 101 sets the second start winning flag (step S656). If the received effect control command is a total pending storage number subtraction designation command (step S657), the effect control CPU 101 sets a total pending storage number subtraction designation command reception flag (step S658).

  If the received effect control command is another command, the effect control CPU 101 sets a flag corresponding to the received effect control command (step S659). Then, control goes to a step S611.

  FIG. 40 is an explanatory diagram showing an example of a variable display mode of decorative symbols (first decorative symbol and second decorative symbol). In this embodiment, the first decorative symbol display 9a and the second decorative symbol display 9b are composed of two LEDs. And as shown in FIG. 40, it lights alternately every predetermined time (for example, 0.5 second). When the display result of the special symbol is a jackpot symbol, the upper LED is turned on as a display result of a decorative symbol reminiscent of the jackpot (see FIG. 40A). Further, when the display result of the special symbol is changed to the off symbol, the lower LED is turned on as the display result of the decorative symbol reminiscent of the off symbol (see FIG. 40B).

  FIGS. 41-44 is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part 18c. As shown in FIGS. 41 to 44, the number of circles (up to 8) corresponding to the total number of pending storages is displayed on the total pending storage display unit 18c. The effect control microcomputer 100 causes the VDP 109 to display a circle so that the first reserved memory and the second reserved memory can be distinguished. For example, a circle corresponding to the first reserved memory is displayed in red, and a circle corresponding to the second reserved memory is displayed in green. In addition, (8-total number of pending storage) round frames are displayed. The production control microcomputer 100 does not display all the (8-total number of reserved storage) round frames, but displays only the round frames in which numerals are displayed in the frames described later. Good.

  FIGS. 41 and 42 show display examples when displaying the first reserved memory and the second reserved memory and performing a display capable of specifying the difference between the first reserved memory number and the upper limit number of the first reserved memory. It is shown.

  41 (A) to 41 (D) show examples in which the second reserved memory number is 0 and the first reserved memory number is 0, 1, 2, and 4. As shown in FIG. 41, assuming that the first reserved storage number is n (n = 1, 2, 3, 4), (4 (upper limit number) −n) round frames (upper right corner of the upper right red circle) In the circle frame), the numbers from n to the next 4 are displayed in ascending order. Note that FIG. 41 does not illustrate the case where n = 3. Further, in this embodiment, when the total reserved memory number is 0 (in this case, the first reserved memory number is also 0), no numerical display is made, but the total reserved memory number is 0. In some cases, numbers 1, 2, 3, and 4 may be sequentially displayed in the four round frames.

  42A to 42D show an example in which the second reserved storage number is not zero. As shown in FIG. 42, if the first reserved storage number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) -n) round frames (the upper right red circle mark) Or, a number is displayed in ascending order from the number of (total number of reserved storages + 1) in a round frame displayed at the upper right of the green circle.

  Even if the second reserved memory number is 0, if the first reserved memory number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) −n). It can be said that numbers are displayed in ascending order from the number of (total number of reserved storage + 1) in the circle. However, the case where the total pending storage number is 0 is excluded.

  In the example shown in FIG. 41 and FIG. 42, when the number with the largest value among the displayed numbers increases only the first reserved memory, and the combined reserved memory number becomes the value of the number, This means that the first reserved storage number reaches the upper limit number.

  FIGS. 43 and 44 show display examples when displaying the first reserved memory and the second reserved memory and performing a display capable of specifying the difference between the second reserved memory number and the upper limit number of the second reserved memory. It is shown.

  43A to 43D show examples in which the first reserved memory number is 0 and the second reserved memory number is 0, 1, 2, and 4. As shown in FIG. 43, assuming that the second reserved storage number is n (n = 1, 2, 3, 4), (4 (upper limit number) −n) round frames (upper right of the upper right green circle) In the circled frame), the numbers from n to the next 4 are displayed in ascending order. FIG. 43 does not illustrate the case where n = 3. Further, in this embodiment, when the total reserved memory number is 0 (in this case, the second reserved memory number is also 0), no numerical display is made, but the total reserved memory number is 0. In some cases, numbers 1, 2, 3, and 4 may be displayed in sequence in four round frames. Further, the production control microcomputer 100 does not display all (8-total number of reserved storage) round frames, but displays only the round frames in which numbers are displayed in the frames described later. Good.

  44A to 44D show an example in which the first reserved storage number is not zero. As shown in FIG. 44, if the second reserved storage number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) -n) round frames (the upper right red circle) Or, a number is displayed in ascending order from the number of (total number of reserved storages + 1) in a round frame displayed at the upper right of the green circle.

  In the example shown in FIG. 43 and FIG. 44, the number with the largest value among the displayed numbers increases when only the second reserved memory increases and the total reserved memory number becomes the value of the number. It means that the number of reserved storage reaches the upper limit.

  FIG. 45 (A) shows an example of the display state of the total suspension storage display unit 18c at the time of power failure recovery. As shown in FIG. 45 (A), when the power failure is restored, the number of gray circles corresponding to the total number of pending storage is displayed on the total pending storage display unit 18c. FIG. 45B shows an example of the display state of the total pending storage display unit 18c when the total pending storage number designation command is received from the gaming control microcomputer 560 but the start winning designation command cannot be received. ing. As shown in FIG. 45 (B), when the start winning designation command cannot be received, a blue circle is displayed on the total pending storage display unit 18c.

  As shown in FIG. 45A, at the time of power failure recovery, the production control microcomputer 100 displays a display corresponding to the original first reserved memory (first start winning memory) (in this example, a red circle is displayed). ) And the display corresponding to the second reserved memory (second start-up winning memory) (in this example, the display of the green circle) is a display of the number specified by the total reserved memory number designation command (this In the example, gray circles) are displayed on the summed hold storage display unit 18c. Therefore, it becomes possible to easily grasp that the gaming state has been restored by using the display of the total suspension storage display unit 18c. In addition, if the display mode of the summed hold storage display unit 18c at the time of power failure recovery is different from the display mode corresponding to the original first hold memory and the display mode corresponding to the second hold memory, this embodiment. It is not restricted to changing the color of the image displayed like this. For example, the shape may be changed without changing the color, or the size may be changed.

  As shown in FIG. 45B, when the start winning designation command cannot be received, the effect control microcomputer 100 displays the display corresponding to the original first reserved memory (in this example, a red circle). The image corresponding to the increased reserved memory is displayed in a different manner from the display corresponding to the second reserved memory (in this example, the display of the green circle). Therefore, it is possible to easily grasp that an abnormality has occurred with respect to transmission / reception of the effect control command (in this example, the start winning designation command). In addition, if the display mode of the summed hold storage display unit 18c at the time of power failure recovery is different from the display mode corresponding to the original first hold memory and the display mode corresponding to the second hold memory, this embodiment. It is not restricted to changing the color of the image displayed like this. For example, the shape may be changed without changing the color, or the size may be changed.

  FIG. 46 is an explanatory diagram illustrating an example of a display state of the effect display device 9 when a power failure recovery designation command is received. As shown in FIG. 46, when the effect control microcomputer 100 receives the power failure recovery designation command, the game state is restored in the effect symbol display area 91 of the effect display device 9, and the game is played from the game state before the power failure. Display to inform you that you can continue. In this embodiment, the display mode in the total pending storage display unit 18c is changed to a predetermined mode (in this example, a gray circle) at the time of power failure recovery, but a notification that the gaming state is restored (before power failure) (Notification that the game can be continued from the gaming state) is performed at the same time, so that it is possible to prevent a player who appears suspicious about the change in the display mode of the total suspension storage display unit 18c.

  FIG. 47 is a flowchart showing the effect control process (step S705) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S806 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command has been received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the change pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the effect symbol change start process (step S801).

  Production symbol variation start processing (step S801): Control is performed so that the variation of the ornament symbol (first ornament symbol or second ornament symbol) and the effect symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the effect symbol changing process (step S802).

  Production symbol variation processing (step S802): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the effect symbol variation stop process (step S803).

  Production symbol variation stop processing (step S803): Based on the reception of the production control command (design determination designation command) for instructing all symbols to be stopped, the decorative symbol (first decorative symbol or second decorative symbol) and the production symbol Control is performed to stop the fluctuation and derive and display the display result (stop symbol). Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S804) or the variation pattern command reception waiting process (step S800).

  Big hit display process (step S804): After the end of the variation time, control is performed to display a screen for notifying the effect display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805).

  Big hit game processing (step S805): Control during big hit game is performed. For example, when a special winning opening opening designation command or a special winning opening open designation command is received, display control of the number of rounds in the effect display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the big hit end process (step S806).

  Big hit end processing (step S806): In the effect display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 48 is a flowchart showing a variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812).

  Further, the effect control CPU 101 receives the state 1 designation command (specifically, when the state 1 designation command is stored in the state designation command storage area), the display screen of the effect display device 9 is displayed. Control is performed to change the color of the background image to a color predetermined as the color in the normal state (steps S813 and S814). When the state 2 designation command is received (specifically, when the state 2 designation command is stored in the state designation command storage area), the color of the background image on the display screen of the effect display device 9 is changed. Then, control is performed to change to a predetermined color as the color in the probability variation state (steps S815, S816).

  Then, the value of the effect control process flag is updated to a value corresponding to the effect symbol variation start process (step S801) (step S817).

  49 and 50 are flowcharts showing the effect symbol variation start process (step S801) in the effect control process shown in FIG. In the effect symbol variation start process, the effect control CPU 101 reads the variation pattern command from the variation pattern command storage area (step S820). Next, it is confirmed whether or not the first symbol variation designation command reception flag is set (step S821). When the first symbol variation designation command reception flag is set, the first symbol variation designation command reception flag is reset (step S822), and the first ornament symbol variation indicating that the variation of the first ornament symbol is started. A request flag is set (step S823). Then, for example, a value corresponding to 0.5 seconds is set in the decorative symbol switching timer for determining the switching timing of the lighting LED (step S825). Thereafter, the process proceeds to step S828.

  If the first symbol variation designation command reception flag is not set, the second symbol variation designation command reception flag should be set. Therefore, the effect control CPU 101 resets the second symbol variation designation command reception flag (step S825), and sets a second symbol variation request flag indicating that the variation of the second symbol variation is started (step S826). . Then, for example, a value corresponding to 0.5 seconds is set in the decorative symbol switching timer for determining the switching timing of the lighting LED (step S827). Thereafter, the process proceeds to step S828.

  In step S828, the effect control CPU 101 reads data indicating the variation pattern command from the variation pattern command storage area. Further, the display result (stop symbol) of the decorative symbol and the effect symbol is determined according to the data stored in the display result specifying command storage area (that is, the received display result specifying command) (step S829). The effect control CPU 101 stores data indicating the display result of the determined decorative symbol in the decorative symbol display result storage area, and stores data indicating the stop symbol of the determined decorative symbol in the effect symbol display result storage area.

  FIG. 51 is an explanatory diagram showing an example of the stop symbol of the effect symbol in the effect display device 9. In the example shown in FIG. 51, when the received display result specifying command indicates a normal jackpot (when the received display result specifying command is a display result 2 designation command), the effect control CPU 101 uses the stop design as a stop symbol. A combination of effect symbols in which three symbols on one line are even-numbered symbols (a stop symbol reminiscent of occurrence of a big jackpot) is determined. When the received display result specifying command indicates a probable big hit (when the received display result specifying command is a display result 4 designation command), the effect control CPU 101 uses three symbols on one line as a stop symbol. A combination of effect symbols arranged with odd symbols (stop symbols reminiscent of occurrence of probable big hits) is determined. When the received display result specifying command indicates a small hit (when the received display result specifying command is a display result 3 designation command), the effect control CPU 101 uses three symbols on one line as a stop symbol. The combination of “135” (a stop symbol reminiscent of occurrence of a small hit) is determined. And in the case of detachment (when the received display result specifying command is a display result 1 designation command), a combination of effect symbols other than the above is determined. However, when a reach effect is involved, a combination of effect symbols in which two symbols on one line are aligned is determined. A combination of 3 symbols on one line derived and displayed on the effect display device 9 is a “stop symbol” of the effect symbol.

  Also, “upper line” means that, for example, when 9 symbols are displayed on the effect display device 9, there are diagonal lines from the upper left to the lower right (there are a total of three effect symbols on the line), and from the upper right to the lower left. A diagonal line, a vertical line, or a horizontal line. Hereinafter, three symbols on one line are referred to as left middle right symbols. For example, in the case of a big hit, the left, middle and right symbols are all stopped and displayed on at least one line. In the case of a small hit, “135” is stopped and displayed on at least one line.

  The effect control CPU 101 extracts, for example, a random number for determining the stop symbol, and uses the stop symbol determination table in which the data indicating the combination of effect symbols and numerical values are associated with each other to generate the stop symbol of the effect symbol. decide. That is, the stop symbol is determined by selecting data indicating the combination of effect symbols corresponding to the numerical value matching the extracted random number.

  As for the effect symbols, a stop symbol that recalls a big hit is called a big hit symbol. In addition, a stop symbol reminiscent of a probable big hit is called a probable big hit symbol, and a stop symbol reminiscent of a normal big hit is called a normal big hit symbol. A stop symbol that recalls a small hit is called a small hit symbol. And a stop symbol that reminds of a loss is called a loss symbol.

  Further, when the big hit symbol is stopped and displayed on the first special symbol display 8a, the LED on the side that recalls the big hit on the first decorative symbol display 9a remains lit at the end of the change. When the big hit symbol is stopped and displayed on the second special symbol display 8b, the LED on the side that recalls the big hit on the second decorative symbol display 9b remains lit at the end of the change.

  The effect control CPU 101 executes the process of step S829 and then selects a process table corresponding to the variation pattern (step S833). Then, the process timer in the process data 1 of the selected process table is started (step S834).

  FIG. 52 is an explanatory diagram of a configuration example of the process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the effect display device 9 in accordance with the data set in the process table. The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. In the display control execution data, data indicating each variation aspect constituting the variation aspect during the variable display time (variation time) of the variable display of the effect symbols is described. Specifically, data relating to the change of the display screen of the effect display device 9 is described. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table and performs control to display the effect design in the variation mode set in the display control execution data for the time set in the process timer set value.

  The process table shown in FIG. 52 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern.

  The production control CPU 101 has the contents of the process data 1 (display control execution data 1, lamp control execution data 1, sound, on condition that the abnormality notification flag indicating that an abnormal winning notification is being performed is not set. Control of the effect device (the effect display device 9 as the effect part, the various lamps as the effect part, and the speaker 27 as the effect part) is executed according to the number data 1) (steps S835A and S835B). For example, a command is output to the VDP 109 in order to display an image according to the variation pattern on the effect display device 9. In addition, a control signal (lamp control execution data) is output to the lamp driver board 35 in order to perform on / off control of various lamps. In addition, a control signal (sound number data) is output to the sound output board 70 in order to output sound from the speaker 27.

  In this embodiment, the effect control CPU 101 performs control so that the effect symbol is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  When the abnormality notification flag is set, the rendering device is controlled according to the contents of the process data 1 excluding the sound number data 1 (steps S835A and S835C). In other words, when the abnormality notification flag is set, when a new variable display of the production symbol is started, a sound production according to the variable display is not executed, but an abnormal prize is notified. The corresponding sound output is continued.

  In addition, when performing the process of step S835C, the effect control CPU 101 does not simply output a command based on the display control execution data 1 to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. That is, control is performed so that the display at that time (notification of abnormal winning is made) on the effect display device 9 and the display effect image of the variable display of the effect symbol are displayed on the effect display device 9 at the same time. . That is, when the abnormality notification flag is set, when a new variable display of the effect symbol is started, not only the display effect corresponding to the variable display is executed, but an abnormal winning notification is made. The notification according to is continued.

  Then, a value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S836), and the value of the effect control process flag is set to a value corresponding to the effect symbol changing process (step S802). (Step S837).

  FIG. 53 is a flowchart showing the processing during effect design variation (step S802) in the effect control process. In the effect symbol variation process, the effect control CPU 101 subtracts 1 from the value of the process timer (step S841) and subtracts 1 from the value of the variation time timer (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844). Further, on the condition that the abnormality informing flag is not set, the control state for the rendering device is changed based on the display control execution data, lamp control execution data, and sound number data set next (step S845A). , S845B).

  When the abnormality notification flag is set, control of the effect device is executed according to the contents of process data i (i is any one of 2 to n) (however, excluding sound number data i) (step S845A). , S845C). Therefore, when the abnormality notification flag is set, a sound effect according to the variable display of the effect symbol is not executed, but the sound output according to the notification of the abnormal winning is continued.

  In addition, when the process of step S845C is performed, the CPU 101 for effect control does not simply output a command based on the display control execution data i to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. . Therefore, when the abnormality notification flag is set, not only the display effect according to the variable display of the effect symbol is executed, but also the notification according to the notification of the abnormal winning is continued.

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the effect symbol variation stop process (step S803) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the variation time timer has not timed out, if the symbol confirmation designation command is received, the process shifts to control to stop variation.For example, a variation pattern command indicating a long variation time due to noise between substrates is received. Even in such a case, it is possible to end the variation of the effect symbol when the regular variation time has elapsed (when the variation of the special symbol ends).

  FIG. 54 is a flowchart showing the effect symbol variation stop process (step S803) in the effect control process. In the effect symbol variation stop process, the effect control CPU 101 confirms whether or not the confirmed command reception flag is set (step S851). If the confirmed command reception flag is set, the confirmed command reception flag is reset. In step S852, control is performed to derive and display the stop symbol in accordance with the data (data indicating the stop symbol) stored in the effect symbol display result storage area (step S853). Also, a decorative symbol variation end flag is set (step S854). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S855). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  If it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S804) (step S856).

  If it is determined not to win, the effect control CPU 101 updates the value of the effect control process flag to a value corresponding to the variation pattern command reception waiting process (step S800) (step S857).

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbol and the effect symbol on the condition that the symbol confirmation designation command is received (see steps S851 and S853). However, when the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol and the effect symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  FIG. 55 is a flowchart showing the jackpot display process (step S804) in the effect control process. In the jackpot display process, the effect control CPU 101 checks whether or not the jackpot start 1-3 designation command reception flag indicating that any of the jackpot start 1-3 designation commands has been received is set (step S871). If any one of the big hit start 1 to 3 designation command reception flags is set, the game start screen corresponding to the set flag is displayed on the effect display device 9 (step S872). Further, the set flag (any one of the big hit start 1 to 3 designation command reception flags) is reset (step S873). Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805) (step S874).

  In step S872, if the big hit start 2 designation command is received, the production control CPU 101 performs a control to display a screen for informing the start of the small hit game on the production display device 9. When the jackpot start 1 designation command or jackpot start 3 designation command is received, the effect display device 9 displays a screen for notifying the start of the jackpot game (different from the screen for notifying the start of the jackpot game). Control to display on the screen.

  FIG. 56 is a flowchart showing the big hit end process (step S806) in the effect control process. In the jackpot end process, the effect control CPU 101 checks whether or not the jackpot end effect timer is set (step S880). If the big hit end effect timer is set, the process proceeds to step S885. If the jackpot end effect timer is not set, a jackpot end designation command reception flag (a jackpot end 1 designation command reception flag or a jackpot end 2 designation command reception flag) indicating that the jackpot termination designation command has been received is set. It is confirmed whether or not there is (step S881). When the jackpot end designation command reception flag is set, the jackpot end designation command reception flag is reset (step S882), and a value corresponding to the jackpot end display time is set in the jackpot end presentation timer (step S883). Then, the effect display device 9 is controlled to display a jackpot end screen (screen for notifying the end of the jackpot game) (step S884). Specifically, an instruction to display the big hit end screen is given to the VDP 109.

  In this embodiment, even if the type of jackpot is different, the same jackpot end screen is displayed on the effect display device 9. For example, the big hit end display and the small hit end display are the same. However, the small hit end display (including the small hit end display) may be divided according to the type of the big hit.

  In step S885, 1 is subtracted from the value of the big hit end effect timer. Then, the effect control CPU 101 checks whether or not the value of the jackpot end effect timer is 0, that is, whether or not the jackpot end effect time has elapsed (step S886). If not, the process ends. If the jackpot end effect time has elapsed and the jackpot end 1 designation command has been received, the probability variation state flag is reset (steps S886, S889, S891). When the jackpot end 1 designation command has not been received (when the jackpot end 2 designation command has been received), the probability variation state flag is set (steps S889, S890). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S892).

  The probability change state flag and the time-short state flag are used, for example, when the effect control CPU 101 notifies the probability change state and the time-short state by a background or a decorative light emitter (lamp / LED) in the effect display device 9.

  FIG. 57 is a flowchart showing the first decorative symbol display control process of step S706 in the effect control main process shown in FIG. In the first decorative symbol display control process, the effect control CPU 101 checks whether or not the first decorative symbol changing flag is set (step S781). If the first decorative symbol variation flag is set, the process proceeds to step S785. If the first decorative symbol variation flag is not set, it is confirmed whether or not the first decorative symbol variation request flag is set (step S782). If the first decorative symbol variation request flag is set, the first decorative symbol variation request flag is reset (step S783), and the first decorative symbol variation flag is set (step S784).

  In step S785, it is confirmed whether or not the decorative symbol variation end flag is set. If the decorative symbol variation end flag is set, the decorative symbol variation end flag is reset (step S786), and the display result is displayed on the first decorative symbol display unit 9a according to the data stored in the decorative symbol display result storage area. Is displayed (step S791), and the first decorative symbol variation flag is reset (step S792).

  If the decorative symbol change end flag is not set, the value of the decorative symbol switching timer is decremented by 1 (step S787). If the value of the decorative symbol switching timer is 0 (step S788), that is, if it is the lighting LED switching timing, the LED to be lit on the first decorative symbol display 9a is switched (step S789), and the decorative symbol is switched. For example, a value corresponding to 0.5 seconds is reset in the switching timer (step S790).

  By the control as described above, the LEDs that are turned on in the first decorative symbol display 9a are switched every 0.5 seconds, for example, and variable display of the first decorative symbol is realized.

  Note that the program of the second decorative symbol display control process (step S707) is configured in the same manner as the first decorative symbol display control process. That is, in the above description of the first decorative symbol display control process, if “first” is read as “second”, the second decorative symbol display control process will be described.

  FIG. 58 is an explanatory diagram showing an example of a notification screen displayed on the effect display device 9. FIG. 58 (A) shows an example of an initial screen that the effect control CPU 101 displays on the effect display device 9 in response to reception of the initialization designation command. FIG. 58 (B) shows an example of a power failure recovery screen that the effect control CPU 101 displays on the effect display device 9 in response to reception of the power failure recovery designation command. FIG. 58 (C) shows an example of an abnormality notification screen displayed on the effect display device 9 in response to the reception of the abnormal winning notification designation command by the effect control CPU 101, and the change of the effect symbol is started. Also, it is shown that the display of the abnormality notification screen is continued (see the right side of FIG. 58C).

  FIG. 59 is a flowchart showing the notification control process in step S709. In the notification control process, the effect control CPU 101 checks whether or not the initial notification flag is set (step S971). The initial notification flag is set when an initialization designation command is received from the game control microcomputer 560 (see step S632B in FIG. 38). If the initial notification flag is not set, the process proceeds to step S976. If the initial notification flag is set, the value of the period timer set in step S632C is decremented by 1 (step S972). When the value of the period timer becomes 0, that is, when the initial notification period has elapsed, the initial notification flag is reset (steps S973 and S974).

  Further, the effect control CPU 101 outputs to the VDP 109 a command for deleting the initial screen or the power failure recovery screen in the effect display device 9 (step S975). The VDP 109 erases the initial screen or the power failure recovery screen from the effect display device 9 according to the command.

  In step S976, the effect control CPU 101 checks whether or not an abnormal winning notification designation command reception flag indicating that an abnormal winning notification designation command has been received is set. If not set, the process is terminated. When the abnormal winning notification designation command reception flag is set, the abnormal winning notification designation command reception flag is reset (step S977), and the effect display device 9 has an abnormality with respect to the screen displayed at that time. A command to superimpose and display the notification screen is output to the VDP 109 (step S978). In response to the command, the VDP 109 superimposes and displays an abnormality notification screen on the effect display device 9 (see FIG. 58C).

  Furthermore, the production control CPU 101 outputs sound data indicating sound output in response to the abnormal winning notification to the sound output board 70 (step S979). The voice synthesis IC 703 mounted on the voice output board 70 reads data corresponding to the input sound data from the voice data ROM 704 and outputs a voice signal to the speaker 27 side according to the read data. Therefore, sound output (output of abnormal notification sound) corresponding to the notification of abnormal winning is performed thereafter. Then, the effect control CPU 101 sets an abnormality notification flag indicating that abnormality notification is being performed (step S980).

  FIG. 60 is an explanatory diagram showing an example of the situation of the display effect in the effect display device 9 and the sound effect by the speaker 27. FIG. 60A shows an example in which the effect display device 9 is performing variable display of effect symbols. FIG. 60 (B) shows an example in which initialization notification is performed in the effect display device 9.

  FIG. 60C shows an example in which an abnormality notification is performed in the effect display device 9 and an abnormality notification sound is output by the speaker 27. When receiving the abnormal prize notification designation command from the game control microcomputer 560, the effect control microcomputer 100 performs control to display an abnormality notification screen on the effect display device 9 and outputs the abnormality notification sound from the speaker 27. I do. Further, even when the variable display of the effect symbol is started in response to the reception of the variation pattern command, the display of the abnormality notification screen on the effect display device 9 and the output of the abnormality notification sound from the speaker 27 are continued. Moreover, even if the variable display of the effect symbol is finished, the display of the abnormality notification screen on the effect display device 9 and the output of the abnormality notification sound from the speaker 27 are continued.

  The production control microcomputer 100 does not execute the control for deleting the abnormality notification screen and the control for stopping the output of the abnormality notification sound, so that the display of the abnormality notification screen on the production display device 9 and the output of the abnormality notification sound from the speaker 27 are performed. Continues until the power supply to the gaming machine is stopped. However, the production control microcomputer 100 stops displaying the abnormality notification screen and outputting the abnormality notification sound when a predetermined time has elapsed after the display of the abnormality notification screen and the output of the abnormality notification sound have started. You may control. In this embodiment, the abnormality notification is performed by the effect display device 9 and the speaker 27. However, the abnormality notification may be performed using a lamp / LED. In that case, when receiving the abnormal winning notification designation command, the production control microcomputer 100 controls the lamp / LED to blink in a manner different from that in the normal state (when no abnormal winning has occurred). . In addition, even when the abnormality notification is performed using the lamp / LED, the abnormality notification using the lamp / LED is continued even if the variable display of the effect symbol is started in response to the reception of the variation pattern command. .

  In this embodiment, the game control microcomputer 560 does not detect abnormal winnings for a predetermined period (a period during which the initialization notification is executed) after the power supply to the game machine is started, and does not perform game control. The abnormal winning notification designating command is not transmitted from the microcomputer 560. However, the game control microcomputer 560 always detects an abnormal winning when the value of the special symbol process flag is less than a predetermined value (5 in this embodiment), so that the effect control microcomputer 100 performs the game control. If an abnormal winning notification designation command is received during a predetermined period after the power supply to the machine is started, the abnormal winning notification may not be performed. That is, the game control microcomputer 560 transmits an abnormal winning notification designation command when detecting that an abnormal winning has occurred, regardless of whether or not the initialization notification is being executed, so that the effect control microcomputer Even if the computer 100 receives the abnormal prize notification designation command during the period in which the initialization notification is being executed, the initialization notification is given priority over the abnormality notification by continuing the initialization notification without performing the abnormality notification process. You may make it make it. In that case, if an abnormal winning notification designation command is received during the period in which the initialization notification is being executed, the abnormality notification may be performed when the period in which the initialization notification is being executed ends.

  61 to 63 are flowcharts showing the hold storage display control process (step S708) in the effect control main process. In the hold memory display control process, the effect control CPU 101 stores the data in the sum hold memory number storage area in which the second byte data (EXT data) of the sum hold memory number designation command is stored in the sum hold memory number counter. It is confirmed whether it is larger than the value (step S901). If the data in the total pending storage number storage area is not larger than the value of the total pending storage number counter, the process proceeds to step S951.

  The fact that the data in the total pending storage count storage area is larger than the value of the total pending storage count counter means that a new total pending storage count designation command has been received. When the power is turned on, the value of the total pending storage number counter is 0 by the initialization process in step S701.

  When the data in the total reserved memory number storage area is larger than the value of the total reserved memory number counter, whether or not the production control CPU 101 has a power failure recovery flag indicating that a power failure recovery designation command has been received is set. Confirmation is made (step S902). If the power failure recovery flag is set, the power failure recovery flag is reset (step S903), and the number of gray circles corresponding to the data (value) in the total pending storage number storage area is displayed as the total pending storage display portion 18c. (Step S904). That is, the number of gray circle images stored in the total reserved storage number storage area is displayed (see FIG. 45A).

  In addition, the production control CPU 101 sets the data in the total reserved memory number storage area in the unknown start winning memory number counter (step S905). The unknown start winning memory number counter is a counter formed in the RAM, and is a counter for counting the number of reserved memories that are unknown whether the reserved memory corresponding to the first starting prize or the reserved memory corresponding to the second starting prize is unknown. It is. Hereinafter, the reserved memory in which the reserved memory corresponding to the first start prize or the reserved memory corresponding to the second start prize is unknown is referred to as unknown reserved memory.

  Further, in the total pending storage table, the number of data corresponding to the data (value) in the total pending storage number storage area is changed to data indicating “unknown” (step S906). The total hold storage table is a table formed in the RAM, and whether each hold storage is a hold storage corresponding to the first start prize, a hold memory corresponding to the second start prize, or whether it is unknown. This is a table in which data indicating is set.

  Then, the data in the total pending storage number storage area is set in the total pending storage number counter (step S907).

  When the power failure recovery flag is not set, the effect control CPU 101 checks whether or not the first start winning flag indicating that the first start winning designation command has been received is set (step S909). If the first start winning flag is set, the first starting winning flag is reset (step S910), the number of circles displayed in the total pending storage display unit 18c is increased by 1, and the increased circle is displayed in red. Control is performed (step S911). Further, the value of the first start winning counter is incremented by 1 (step S912), and the data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “first” in the total pending storage table (step S912). S913). For example, if the data in the total pending storage number storage area is “5”, the fifth data in the total pending storage table is set to data indicating “first”. That is, the data corresponding to the increased reserved storage is set to data indicating “first”.

  If the state 1 designation command has been received (specifically, if the state 1 designation command is stored in the state designation command storage area), (4 (upper limit number) −n (first pending storage number)) ) Control is performed to display numbers in ascending order from the number of (total reserved storage number + 1) (see FIG. 41 and FIG. 42) in the number of round frames (steps S914, S915). When performing control to display numbers, the CPU 101 for effect control outputs a command signal that instructs the VDP 109 to display numbers.

  The effect control CPU 101 may execute the process of step S915 on the condition that the value of the first start winning counter is equal to or greater than a predetermined value (for example, 2).

  In addition, the effect control CPU 101 checks whether or not the value of the first start winning counter has reached the upper limit “4” (step S921). If it is not “4”, the process proceeds to step S907. If it is “4”, it is checked whether or not the value of the unknown start winning counter is 0 (step S922). If the value of the unknown start winning counter is 0, the process proceeds to step S907. If the value of the unknown start winning counter is not 0 at this stage, it means that the number of unknown reserved memories indicated by the value of the unknown start winning counter is actually a reserved memory based on the second start winning prize. Because the upper limit number of the first reserved memory number is 4 and the value of the first start winning counter is 4, other reserved memories (the number of reserved memories exceeding 4) are the first start winning prizes. This is because it is not based on the reserved memory. That is, the other reserved memory is a reserved memory based on the second start winning prize.

  Therefore, when the value of the unknown start winning counter is not 0, the effect control CPU 101 changes the gray circle displayed on the total pending storage display unit 18c to a green circle corresponding to the second start winning prize. (Step S923). Further, the data indicating “unknown” in the total pending storage table is changed to data indicating “second” (step S924). Further, the value of the unknown start winning counter is set to 0 (step S925), and the value of the second starting winning counter is updated (step S926). In step S926, the value of the unknown start winning counter before being set to 0 is added to the value of the second starting winning counter. Then, control goes to a step S907.

  By performing such control, an abnormality occurs in the transmission / reception of the production control command, an unknown hold memory is generated, and when the display corresponding to the unknown hold memory is displayed on the total hold memory display unit 18c, the display is normal. Display can be restored.

  If the first start winning flag is not set (step S909), it is confirmed whether the second starting winning flag is set (step S931). If the second start winning flag is not set, the process proceeds to step S941. If the second start winning flag is set, the second starting winning flag is reset (step S932), the number of circles displayed in the total pending storage display unit 18c is increased by 1, and the increased circle is displayed. Control is performed to display green (step S933). Further, the value of the second start winning counter is incremented by 1 (step S934), and the data corresponding to the data (value) in the total reserved storage number storage area in the total pending storage table is set to data indicating “second” (step S934). S935).

  If the state 2 designation command or the state 3 designation command has been received (specifically, if the state 2 designation command or the state 3 designation command is stored in the state designation command storage area), 4 (the upper limit number ) -N (second reserved storage number)) In the circles, the numbers are displayed in ascending order from the number of (total reserved storage number + 1) (see FIGS. 43 and 44) (steps S936 and S937). ).

  The effect control CPU 101 may execute the process of step S937 on the condition that the value of the second start winning counter is equal to or greater than a predetermined value (for example, 2).

  Further, it is confirmed whether or not the value of the second start winning counter has reached the upper limit “4” (step S938). If it is not “4”, the process proceeds to step S948. If it is “4”, it is confirmed whether or not the value of the unknown start winning counter is 0 (step S939). When the value of the unknown start winning counter is 0, the process proceeds to step S948. If the value of the unknown start winning counter is not 0, the effect control CPU 101 changes the gray circle displayed on the summation pending storage display unit 18c to a red circle corresponding to the first start winning ( Step S944). Further, the data indicating “unknown” in the total pending storage table is changed to data indicating “first” (step S945). Further, the value of the unknown start winning counter is set to 0 (step S946), and the value of the first starting winning counter is updated (step S947). In step S947, the value of the unknown start winning counter before being set to 0 is added to the value of the first starting winning counter. Then, control goes to a step S948.

  In step S948, the data in the total pending storage number storage area is set in the total pending storage number counter.

  In step S941, control is performed so that the number of displays in the summed pending storage display unit 18c is increased by 1 and the increased display is displayed in blue. Further, the value of the unknown start winning counter is incremented by 1 (step S942), and the data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “unknown” in the total pending storage table (step S943). . Then, control goes to a step S948.

  In step S951, the effect control CPU 101 confirms whether or not the total pending storage number subtraction designation command reception flag is set. If the total pending storage count subtraction designation command reception flag is set, the total pending storage count subtraction designation command reception flag is reset (step S952), and the circle displayed most recently on the total pending storage display section 18c is displayed. Alternatively, the gray circle mark is erased, and each circle mark or gray circle mark is controlled to be shifted to the erased circle mark or gray circle mark side for display (step S953). Then, it is confirmed whether or not the oldest data in the summation pending storage table is data indicating “first” (step S954), and if it is data indicating “first”, the value of the first start winning counter is − 1 (step S955). Further, in order to erase the oldest data in the total pending storage table, the data in the total pending storage table is shifted (step S961). Also, the value of the total pending storage number counter is decremented by -1 (step S962), and the value of the total pending storage number counter is set in the total pending storage number storage area (step S963).

  If the oldest data in the summation pending storage table is not data indicating “first”, it is confirmed whether or not it is data indicating “second” (step S956). If it is data indicating “second”, the value of the second start winning counter is decremented by 1 (step S957). Then, control goes to a step S961. When the oldest data in the summation pending storage table is not data indicating “second”, the value of the unknown start winning counter is decremented by 1 (step S958). Then, control goes to a step S961.

  By the control as described above, the red circle is incremented by 1 when the first start winning designation command and the total pending storage designation command are received in the total pending storage display unit 18c, and the second start winning designation command and the total are displayed. Control is executed to increase the green circle by 1 when a pending storage number designation command is received. Then, in the combined hold storage display unit 18c, a display mode corresponding to the first hold memory (in this example, a red circle) and a display mode corresponding to the second hold memory (in this example, the green circle) are mixed. Is displayed. Even if they are mixed, the display mode corresponding to the first hold memory is different from the display mode corresponding to the second hold memory, so that the player can identify the first hold memory and the second hold memory. is there. In addition, when the gaming state is the normal state, a display (in this example, the difference between the first reserved memory number (the number of establishment of the first execution condition for the variation of the symbol) and the upper limit number of the first reserved memory can be specified (in this example, (Numerical display illustrated in FIGS. 41 and 42) is performed.

  When the gaming state is a probabilistic state or a short-time state, a display (in this example) that can identify the difference between the second reserved memory number (the number of establishment of the second execution condition of the symbol variation) and the upper limit number of the second reserved memory , Numerical display illustrated in FIGS. 43 and 44).

  Since the opening time and the number of times of opening of the variable winning ball apparatus 15 are increased in the probability changing state and the short time state, the possibility of winning the game ball to the second starting winning port 14 per predetermined time is to the first starting winning port 13. It is higher than the possibility of winning a game ball. Therefore, the second start winning based on the winning of the game ball to the second start winning opening 14 is likely to occur. Therefore, in the probability changing state and the short time state, priority is given to the display that can identify the difference between the second reserved memory number and the upper limit number of the second reserved memory. In other words, with respect to the reserved memory corresponding to the start winning opening that is more likely to cause a start winning, a display that can specify the difference between the number of reserved memories and the upper limit number of reserved memories is preferentially executed.

  Further, in the normal state, since the opening time and the number of opening times of the variable winning ball device 15 are not increased, the possibility of winning the game ball to the first starting winning hole 13 per predetermined time is the second starting winning hole 14. It can be said that it is higher than the possibility of winning a game ball to. Therefore, in the probability change state and the short time state, priority is given to the display that can identify the difference between the first reserved memory number and the upper limit number of the first reserved memory. In other words, with respect to the reserved memory corresponding to the start winning opening that is more likely to cause a start winning, a display that can specify the difference between the number of reserved memories and the upper limit number of reserved memories is preferentially executed.

  Further, when the total pending storage number designation command is received but neither the first start prize designation command nor the second start prize designation command is received, the blue circle is incremented by 1 in the total pending storage display section 18c. Control is realized. That is, the display is performed in a mode different from the display mode corresponding to the first reserved memory and the display mode corresponding to the second reserved memory. When the total pending storage number subtraction designation command is received, the circle (red circle or green circle) or gray circle displayed on the total pending storage display unit 18c is decreased by one.

  FIGS. 64 to 66 are explanatory diagrams showing examples of data set in the total suspension storage table and display examples of the total suspension storage display unit 18c. In FIGS. 64 to 66, “red circle” means a red circle (red circle), and “green circle” means a green circle (green circle). “Gray circle” means a gray circle (gray circle).

  FIG. 64A shows an example when the process of step S913 is executed. That is, an example is shown in which the reserved memory based on the first start winning memory is increased. FIG. 64B shows an example when the process of step S943 is executed. That is, an example is shown in which it is unclear whether the first start winning memory or the second starting winning memory is based, but the reserved memory increases. FIG. 64C shows an example when the processing of steps S913 and S923 is executed. That is, an example is shown in which the hold memory based on the first start winning memory is increased and the value of the first start winning counter is “4”.

  FIG. 65D shows an example when the process of step S961 is executed. That is, an example in which the data in the total pending storage table is shifted to delete the oldest data in the total pending storage table based on the reception of the total pending storage number subtraction designation command. FIG. 65 (E) shows an example of the case where the processes of steps S904 and S906 are executed. That is, based on the receipt of the total pending storage number designation command together with the power failure recovery designation command, the number of gray circles corresponding to the data (value) in the total pending storage number storage area is displayed on the total pending storage display unit 18c. An example in which the number of pieces of data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “unknown” in the total pending storage table.

  FIG. 65 (F) shows an example of a case where a combined pending storage number designation command is received after receiving a combined pending storage count designation command together with a power failure recovery designation command. In the example shown in FIG. 65 (F), after the total pending storage number designation command is received together with the power failure recovery designation command, the total pending storage number designation command is received together with the second start winning designation command, and the processes of steps S933 and S935 are performed. It is an example when it is executed.

  When the total pending storage number designation command is received together with the power failure recovery designation command, data as shown on the left side of FIG. 65 (F) is set in the total pending storage table, and the total pending storage display unit 18c displays The display as shown on the left side of 65 (F) is made. Thereafter, when the total pending storage number designation command is received together with the second startup winning designation command, the regular second startup is performed in the total pending storage display portion 18c. Display about winning (display of NO5) is made.

  FIG. 66G shows an example of a case where a combined pending storage number designation command is received after receiving a combined pending storage count designation command together with a power failure recovery designation command. In the example shown in FIG. 66 (G), after the total pending storage number designation command is received together with the power failure recovery designation command, the total pending storage number designation command is received together with the first start prize designation command, and the processes of steps S911 and S913 are performed. It is an example when it is executed.

  When the total pending storage number designation command is received together with the power failure recovery designation command, data as shown on the left side of FIG. 66 (G) is set in the total pending storage table, and the total pending storage display unit 18c displays the data shown in FIG. The display shown on the left side of 66 (G) is made. Thereafter, when the total pending storage number designation command is received together with the first start winning designation command, the regular first startup is performed in the total pending storage display portion 18c. Display about winning (display of NO5) is made.

  FIG. 66 (H) received the total pending storage number designation command together with the second start winning designation command in the state shown on the left side of FIG. 66 (H) (same as the state shown on the right side of FIG. 66 (G)). An example of the case is shown. In that case, as shown on the right side of FIG. 66 (H), a display about the regular second start winning (NO6 display) is made.

  As described above, the first pending memory number and the second pending memory number are obtained for the amount of the received pending memory number designation command together with the start winning designation command after receiving the total pending memory number designation command together with the power failure recovery designation command. An identifiable display can be performed normally. It should be noted that when the display corresponding to the first start prize or the second start prize is unknown (gray circle), it is determined which of the start prizes corresponds to the regular display (red circle). Or you may change to green circle). For example, you may make it change according to reception of a symbol fluctuation designation | designated command (special symbol specific command).

  In addition, referring to the example shown in FIG. 66 (G), the pending storage increases from the state shown on the right side of FIG. 66 (G) (the state where “first” is set only for NO5), When “first” is set in the data of NO 6, 7, 8, the production control microcomputer 100 changes the “gray circle” display to “green circle” corresponding to the second start winning prize. To do. The upper limit number of the first start winning prize and the upper limit number of the second starting winning prize are 4, respectively. When the total number of pending storage is 8 and the number of the “first” data is 4, the “ash circle” is displayed. This is because all the corresponding items should be the second starting prize.

  Also, for example, the number of pending storage increases from the state in which the total number of pending storage is 2 and “unknown” data is set in NO1 and NO2, and the number of “first” data or “second” data becomes four. At that time, the production control microcomputer 100 converts the two “unknown” data into the data other than the four data (if the four data is “first”, the “first” 2 ”, the data is changed to“ first ”if the data becomes“ second ”. The display is also changed from “gray circle” to “red circle” or “green circle”. As described above, after receiving the total pending storage number designation command together with the power failure recovery designation command, the production control microcomputer 100 receives “unknown” data as “first” data or “second” based on the upper limit number. When it is determined that the data is “unknown” data, the “unknown” data is changed to “first” data or “second” data, and the display mode of the summation pending storage display unit 18c is returned to the normal display mode.

  In addition, the game control microcomputer 560 transmits an effect control command that can specify the first reserved memory number and the second reserved memory number together with the combined reserved memory number designation command or instead of the combined reserved memory number designation command. If configured in such a manner, the first control transmitted after the transmission of the production control command that can specify the first reserved memory number and the second reserved memory number transmitted together with the power failure recovery designation command or the power failure recovery designation command is transmitted. An effect control command that can specify the number of reserved memories and the number of second reserved memories (in the case where an effect control command that can specify the number of first reserved memories and the number of second reserved memories is not transmitted when power supply is restored). The microcomputer 100 recognizes that the first reserved memory number or the second reserved memory number is 4 which is the upper limit number. , It is possible to return the data of the "unknown" to the data or while the data of the "second", summed hold storage display unit normal display mode the display mode of 18c of the "first".

  FIGS. 67 to 70 are explanatory diagrams illustrating examples of display states of the total suspension storage display unit 18c according to the second embodiment. FIGS. 67 and 68 show display examples when displaying the first reserved memory and the second reserved memory and performing a display capable of specifying the difference between the first reserved memory number and the upper limit number of the first reserved memory. It is shown.

  67 (A) to 67 (D) show examples in which the second reserved memory number is 0 and the first reserved memory number is 0, 1, 2, and 4. As shown in FIG. 67, assuming that the first reserved storage number is n (n = 1, 2, 3, 4), (4 (upper limit number) −n) round frames (upper right corner of the upper right red circle) In the circled frame), the numbers from n to the next 4 are displayed in ascending order. FIG. 67 does not illustrate the case where n = 3. Further, in this embodiment, when the total reserved memory number is 0 (in this case, the first reserved memory number is also 0), no numerical display is made, but the total reserved memory number is 0. In some cases, numbers 1, 2, 3, and 4 may be displayed in sequence in four round frames.

  68 (A) to 68 (D) show an example in which the second reserved storage number is not zero. As shown in FIG. 68, when the first reserved storage number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) -n) round frames (the uppermost red circle mark). Or, the number from (n + 1) to the number indicating the upper limit number is displayed in ascending order within a circle frame displayed at the upper right of the green circle.

  Even if the second reserved memory number is 0, if the first reserved memory number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) −n). It can be said that from the (n + 1) number to the number indicating the upper limit number are displayed in ascending order within the circle frame. However, the case where the total pending storage number is 0 is excluded. The effect control microcomputer 100 may display all (8-total number of reserved storage) round frames, but displays only (4 (upper limit) -n) round frames. May be.

  In the example shown in FIGS. 67 and 68, the number with the largest value among the displayed numbers indicates the upper limit number of the first reserved storage number.

  FIG. 69 and FIG. 70 display examples when displaying the first reserved memory and the second reserved memory and performing a display capable of specifying the difference between the second reserved memory number and the upper limit number of the second reserved memory. It is shown.

  FIGS. 69A to 69D show examples in which the first reserved memory number is 0 and the second reserved memory number is 0, 1, 2, and 4. As shown in FIG. 69, when the second reserved memory number is n (n = 1, 2, 3, 4), (4 (upper limit number) −n) round frames (the upper right green circle mark on the upper right) In the circled frame), the numbers from n to the next 4 are displayed in ascending order. Note that FIG. 69 does not illustrate the case where n = 3. Further, in this embodiment, when the total reserved memory number is 0 (in this case, the first reserved memory number is also 0), no numerical display is made, but the total reserved memory number is 0. In some cases, numbers 1, 2, 3, and 4 may be displayed in sequence in four round frames.

  FIGS. 70A to 70D show an example in which the first reserved storage number is not zero. As shown in FIG. 70, when the second reserved storage number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) -n) round frames (the upper right red circle mark) Or, the number from (n + 1) to the number indicating the upper limit number is displayed in ascending order within a circle frame displayed at the upper right of the green circle.

  Even when the first reserved memory number is 0, if the second reserved memory number is n (n = 0, 1, 2, 3, 4), (4 (upper limit number) −n). It can be said that from the (n + 1) number to the number indicating the upper limit number are displayed in ascending order within the circle frame. However, the case where the total pending storage number is 0 is excluded. The effect control microcomputer 100 may display all (8-total number of reserved storage) round frames, but displays only (4 (upper limit) -n) round frames. May be.

  In the example shown in FIGS. 69 and 70, the number with the largest value among the displayed numbers indicates the upper limit number of the second reserved storage number.

  FIGS. 71 and 72 are flowcharts showing a part of the hold storage display control process (step S708) in the second embodiment. In the second embodiment, the production control CPU 101 receives the state 1 designation command (specifically, if the state 1 designation command is stored in the state designation command storage area), (4 ( (Upper limit number) -n (first reserved storage number)) In the circles, the numbers from (n + 1) to 4 are displayed in ascending order (see FIGS. 67 and 68) (step S914). S915A).

  The effect control CPU 101 may execute the process of step S915A on condition that the value of the first start winning counter is equal to or greater than a predetermined value (for example, 2).

  Further, if a state 2 designation command or a state 3 designation command has been received (specifically, if a state 2 designation command or a state 3 designation command is stored in the state designation command storage area), 4 (the upper limit number ) -N (second reserved storage number)) The numbers from (n + 1) to 4 are displayed in ascending order (see FIGS. 69 and 70) in the round frames (steps S936 and S937A). . Other processes in the hold storage display control process are the same as those in the first embodiment (see FIGS. 61 to 63).

  The effect control CPU 101 may execute the process of step S937A on condition that the value of the second start winning counter is equal to or greater than a predetermined value (for example, 2).

  Also in the second embodiment, when the gaming state is the normal state, it is possible to specify the difference between the first reserved memory number (the number of establishment of the first execution condition of the symbol variation) and the upper limit number of the first reserved memory The display (in this example, the numerical display illustrated in FIGS. 67 and 68) is performed. In addition, when the gaming state is in a probabilistic state or a short-time state, a display (this can be specified) that can specify the difference between the second reserved memory number (the number of established second execution conditions for symbol variation) and the upper limit number of the second reserved memory In the example, the numerical display illustrated in FIGS. 69 and 70 is performed.

  FIG. 73 is an explanatory diagram showing another example of the display state of the summation pending storage display unit 18c. As shown in FIG. 73, the number of circles (up to 8) corresponding to the total number of pending storages is displayed on the total pending storage display unit 18c. In addition, (8-total number of pending storage) round frames are displayed. The effect control microcomputer 100 causes the VDP 109 to display a circle so that the first reserved memory and the second reserved memory can be distinguished. For example, a circle corresponding to the first reserved memory is displayed in red, and a circle corresponding to the second reserved memory is displayed in green.

  In FIGS. 73A and 73B, the first reserved memory and the second reserved memory are displayed, and a display capable of specifying the difference between the first reserved memory number and the upper limit number of the first reserved memory is displayed. A display example of the case is shown.

  When the first reserved storage number is n (n = 0, 1, 2, 3, 4), the production control microcomputer 100 is in a position indicating (4 (upper limit number) −n) round frames. Control is performed to display an image whose position can be specified (an arrow image in the example shown in FIG. 73).

  In the example shown in FIG. 73, in the image whose position can be specified, only the first reserved memory is increased, and the display indicating the first reserved memory (red circle) is the position indicated by the image whose position can be specified. Is displayed, it corresponds to an image which means that the first reserved storage number reaches the upper limit number.

  Note that, in the case of performing a display capable of specifying the difference between the second reserved memory number and the upper limit number of the second reserved memory, similarly to the example shown in FIG. 73, the second reserved memory number is set to n (n = 0, 1, 2, 3, 4), control is performed to display an image (for example, an arrow image) whose position can be specified at positions indicating (4 (upper limit number) −n) round frames.

  Further, the production control microcomputer 100 does not display all the (8-total number of reserved storage) round frames and an image (for example, an arrow image) whose position can be specified, but (4 (upper limit number)). -N) Only the number of round frames may be displayed to notify that the first reserved memory number reaches the upper limit number or the second reserved memory number reaches the upper limit number.

  Also in the example shown in FIG. 73, when the gaming state is the normal state, the production control microcomputer 100 has the first reserved memory number (the number of established first execution conditions for the variation of symbols) and the upper limit number of the first reserved memory. The VDP 109 is caused to perform a display (an arrow display illustrated in FIG. 73) that can identify a difference from the VDP 109. In addition, when the gaming state is in the probabilistic state or in the short-time state, a display that can specify the difference between the second reserved memory number (the number of establishment of the second execution condition of the symbol variation) and the upper limit number of the second reserved memory (eg (Displayed by an arrow) is executed by the VDP 109.

  The processing of the game control microcomputer 560 and the processing of the effect control microcomputer 100 are the same as the processing in the first embodiment, but the effect control microcomputer 100 performs the processing of steps S915 and S937 (FIG. 61 and 62), a process of outputting a command signal to the VDP 109 for causing the VDP 109 to perform the arrow display illustrated in FIG. 73 is performed.

  In order to realize the display example shown in FIG. 73, the production control microcomputer 100 is similar to the first embodiment and the second embodiment, and the summation pending storage display section as the number-of-establishment display means. In 18c, a display capable of specifying the number of established first execution conditions and the number of established second execution conditions in a predetermined display mode is displayed, and the number of established first execution conditions counted by the first counting means and the first A number-of-establishment-number display control means for performing display capable of specifying the difference between the upper limit number of execution conditions and the number of established execution conditions counted by the second counting means and the upper limit number of second execution conditions. In addition, the number-of-established display control means displays a display indicating the display unit (for example, a round frame) corresponding to the upper limit number in the total pending storage display unit 18c as a display that can specify the difference from the upper limit number. Control to make it happen.

  FIG. 74 is an explanatory diagram showing still another example of the display state of the summation pending storage display unit 18c. As shown in FIG. 74, a total number of round marks (up to 8) corresponding to the total number of pending storages are displayed on the total pending storage display unit 18c. In addition, (8-total number of pending storage) round frames are displayed. The effect control microcomputer 100 causes the VDP 109 to display a circle so that the first reserved memory and the second reserved memory can be distinguished. For example, a circle corresponding to the first reserved memory is displayed in red, and a circle corresponding to the second reserved memory is displayed in green. Further, in this example, a display area 18 d indicating the number of possible holdings indicating the value of (upper limit value−number of reserved storages) is provided on the display screen of the effect display device 9.

  74A and 74B display the first reserved memory and the second reserved memory, and display capable of specifying the difference between the first reserved memory number and the upper limit number of the first reserved memory. A display example of the case is shown.

  The production control microcomputer 100 displays an image indicating the number of possible reservations of (4 (upper limit number) −n), where n (n = 0, 1, 2, 3, 4) is the first reserved storage number. Control to display in the area 18d is performed.

  In the example shown in FIG. 74, when the image indicating the number of possible hold in the display area 18d increases only by the number of the first reserved storage, and the number indicated by the image indicating the number of possible hold, the first reserved storage number becomes the upper limit number. It corresponds to an image that means reaching.

  Note that, in the case of performing display that can specify the difference between the second reserved memory number and the upper limit number of the second reserved memory, similarly to the example shown in FIG. 74, the second reserved memory number is set to n (n = 0, 1, 2, 3, 4), the display area 18d is controlled to display an image indicating the number (4 (upper limit number) −n) that can be reserved.

  Also in the example shown in FIG. 74, when the gaming state is the normal state, the production control microcomputer 100 has the first reserved memory number (the number of established first execution conditions for the variation of symbols) and the upper limit number of the first reserved memory. Display (display in the display area 18d illustrated in FIG. 74) that can identify the difference between the VDP 109 and the VDP 109. In addition, when the gaming state is a probabilistic change state or a short-time state, a display that can specify a difference between the second reserved memory number (the number of establishment of the second execution condition of the symbol variation) and the upper limit number of the second reserved memory (see FIG. The display in the display area 18d illustrated in 74 is performed by the VDP 109.

  The processing of the game control microcomputer 560 and the processing of the effect control microcomputer 100 are the same as the processing in the first embodiment, but the effect control microcomputer 100 performs the processing of steps S915 and S937 (FIG. 61 and 62), a process of outputting a command signal to the VDP 109 for causing the VDP 109 to display the display area 18d illustrated in FIG. 74 is performed.

  In order to realize the display example shown in FIG. 74, the production control microcomputer 100 is similar to the case of the first embodiment and the second embodiment, and the summation pending storage display unit as the number-of-establishment display means. In 18c, a display capable of specifying the number of established first execution conditions and the number of established second execution conditions in a predetermined display mode is displayed, and the number of established first execution conditions counted by the first counting means and the first A number-of-establishment-number display control means for performing display capable of specifying the difference between the upper limit number of execution conditions and the number of established execution conditions counted by the second counting means and the upper limit number of second execution conditions. In addition, the number-of-establishment display control means displays the upper limit number as a display that can specify the difference from the upper limit number (for example, (4 (upper limit number) −n) the number of round frames. ) Is performed on the total storage storage display unit 18c. To control such.

  FIG. 75 is an explanatory diagram illustrating an example of a display state of the summation pending storage display unit 18c in the third embodiment. FIG. 75 shows a display example in the case of displaying the first reserved memory and the second reserved memory and performing a display capable of specifying the difference between the first reserved memory number and the upper limit number of the first reserved memory. ing.

  FIG. 75A shows an example in which the first reserved memory number is 2, the second reserved memory number is 2, and the combined reserved memory number is 4. FIG. 75 (B) shows an example in which the first reserved memory number is 1, the second reserved memory number is 2, and the combined reserved memory number is 3.

  The effect control microcomputer 100 displays an image indicating the first reserved memory (in this example, a bottle displayed as if the contents are present) and the second reserved memory on the total reserved memory display unit 18c. (In this example, a sword) is displayed in the order of occurrence of the start winning prize. Furthermore, when the first reserved memory number is n (n = 1, 2, 3, 4), the total reserved memory display unit 18c is reminded of (4 (upper limit number) −n) first reserved memories. Control is performed to display a simple image (in this example, a bottle displayed as if the content does not exist).

  It should be noted that the presentation control microcomputer 100 also displays the second reserved memory in the same manner as in the example shown in FIG. 75, even in the case of performing a display that can specify the difference between the second reserved memory number and the upper limit number of the second reserved memory. If the number is n (n = 0, 1, 2, 3, 4), the image indicating the first reserved memory (in this example, the bottle displayed as if the contents are present) and the second reserved memory Images (in this example, swords) are displayed in the order of occurrence of the start winning prizes, and (4 (upper limit number) -n) images that recall the second reserved memory (for example, actual Control is performed to display an image similar to a sword as an image indicating the second reserved storage (swords having different colors as an example).

  FIGS. 76 and 77 are flowcharts showing a part of the hold storage display control process (step S708) in the third embodiment. In the third embodiment, the production control CPU 101 has received the state 1 designation command (specifically, if the state 1 designation command is stored in the state designation command storage area), (4 ( Upper limit number) -n (first reserved memory number)) number of characters that can be held in the first reserved memory, that is, the display of the image of the bottle displayed as if the contents do not exist is added to the reserved memory A command signal to be displayed on the display unit 18c is output to the VDP 109 (steps S914, S915B).

  The production control CPU 101 may execute the process of step S915B on the condition that the value of the first start winning counter is equal to or greater than a predetermined value (for example, 2).

  Further, if a state 2 designation command or a state 3 designation command has been received (specifically, if a state 2 designation command or a state 3 designation command is stored in the state designation command storage area), 4 (the upper limit number ) -N (second reserved memory number)) remaining number of characters that can be reserved in the second reserved memory, that is, the display of the image of the bottle displayed as if the contents do not exist A command signal for display in 18c is output to the VDP 109 (steps S936 and S937B). Other processes of the effect control microcomputer 100 and the process of the game control microcomputer 560 are the same as the processes in the first embodiment.

  The effect control CPU 101 may execute the process of step S937B on the condition that the value of the second start winning counter is equal to or greater than a predetermined value (for example, 2).

  Also in the third embodiment, when the gaming state is the normal state, the production control microcomputer 100 determines the first reserved memory number (the number of establishment of the first execution condition of the symbol variation) and the upper limit of the first reserved memory. The VDP 109 is displayed so that the difference from the number can be specified. In addition, when the gaming state is in the probabilistic state or the short-time state, a display that can specify the difference between the second reserved memory number (the number of established second execution conditions for symbol variation) and the upper limit number of the second reserved memory is displayed. Let me do it.

  In order to realize the display example shown in FIG. 75, the production control microcomputer 100, like the case of the first embodiment and the second embodiment, adds up the storage storage display unit as the number-of-establishment display means. In 18c, a display capable of specifying the number of established first execution conditions and the number of established second execution conditions in a predetermined display mode is displayed, and the number of established first execution conditions counted by the first counting means and the first A number-of-establishment-number display control means for performing display capable of specifying the difference between the upper limit number of execution conditions and the number of established execution conditions counted by the second counting means and the upper limit number of second execution conditions. In addition, the number-of-established-number display control means displays the number of images corresponding to the difference from the upper limit number as the display capable of specifying the difference from the upper limit number, and is an image corresponding to the first execution condition or An image similar to the image corresponding to the second execution condition (E.g., the frame portion of the image corresponding to the image or the second execution condition corresponding to the first execution condition) is controlled so as to perform display of the combined holding storage display unit 18c.

  In each of the above embodiments, the effect control board 80, the audio output board 70, and the lamp driver board 35 are provided as the boards on which the circuit for controlling the effect device is mounted. May be mounted on one substrate. Further, a first effect control board (display control board) on which a circuit for controlling the effect display device 9 and the like is mounted and a circuit for controlling other effect devices (lamps, LEDs, speakers 27, etc.) are mounted. You may make it provide two board | substrates with two production | presentation control boards.

  In the above-described embodiment, the game control microcomputer 560 directly transmits a command to the effect control microcomputer 100. However, the game control microcomputer 560 transmits another command (for example, FIG. 3). The sound output board 70 and the lamp driver board 35 shown in FIG. 5 or the sound / lamp board having the function of the circuit mounted on the sound output board 70 and the function of the circuit mounted on the lamp driver board 35). A control command may be transmitted and transmitted to the effect control microcomputer 100 on the effect control board 80 via another board. In that case, the command may simply pass through another board, or the sound output board 70, the lamp driver board 35, and the sound / lamp board are equipped with control means such as a microcomputer, and the control means receives the command. In response to this, control related to sound control and lamp control is executed, and the received command is changed as it is or, for example, to a simplified command to control the effect display device 9. You may make it transmit to. Even in that case, the effect control microcomputer 100 performs the display control in accordance with the effect control command directly received from the game control microcomputer 560 in the above-described embodiment. Display control can be performed in accordance with commands received from the board 35 or the sound / lamp board.

  The present invention can be applied to a gaming machine such as a pachinko gaming machine, and is particularly preferably applied to a gaming machine having a plurality of start ports.

It is the front view which looked at the pachinko game machine from the front. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram showing an example of circuit configuration of an effect control board, a lamp driver board and an audio output board. It is a block diagram which shows the circuit structural example of a power supply board. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows a reach determination table. It is a block diagram which shows one structural example of a random number generation circuit. It is a flowchart which shows the random number update process for determination. It is a flowchart which shows the random number update process for initial values. It is explanatory drawing which shows an example of the value of the counter for producing | generating random 1 (random number for jackpot determination). It is explanatory drawing which shows an example of the value of the counter for producing | generating random 5 (random number for normal symbol determination). It is explanatory drawing which shows an example of a fluctuation pattern. FIG. 38E illustrates an effect control command signal line. It is a timing diagram showing the relationship between an 8-bit control signal and an INT signal constituting a control command. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is explanatory drawing which shows the bit allocation example of the input port in the microcomputer for game control. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is explanatory drawing which shows the structural example of a holding | maintenance specific area | region and a preservation | save area | region. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a fluctuation pattern setting process. It is a flowchart which shows a display result specific command transmission process. It is a flowchart which shows the special symbol change process. It is a flowchart which shows a special symbol stop process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a small hit end process. It is a flowchart which shows an abnormal winning notification process. It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is explanatory drawing which shows the structural example of a command reception buffer. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is explanatory drawing which shows an example of the aspect of the variable display of a decoration design. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is a flowchart which shows an effect design fluctuation start process. It is a flowchart which shows an effect design fluctuation start process. It is explanatory drawing which shows an example of the stop symbol of an effect symbol. It is explanatory drawing which shows the structural example of process data. It is a flowchart which shows the process during effect design change. It is a flowchart which shows an effect design fluctuation stop process. It is a flowchart which shows a big hit display process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a 1st decoration symbol display control process. It is explanatory drawing which shows the example of the alerting | reporting screen displayed on an effect display apparatus. It is a flowchart which shows alerting | reporting control processing. It is explanatory drawing which shows the example of the condition of the display effect in a variable display apparatus, and the sound effect by a speaker. It is a flowchart which shows a pending | holding memory | storage display control process. It is a flowchart which shows a pending | holding memory | storage display control process. It is a flowchart which shows a pending | holding memory | storage display control process. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part in 2nd Embodiment. It is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part in 2nd Embodiment. It is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part in 2nd Embodiment. It is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part in 2nd Embodiment. It is a flowchart which shows the pending storage display control processing in 2nd Embodiment. It is a flowchart which shows the pending storage display control processing in 2nd Embodiment. It is explanatory drawing which shows the other example of the display state of a total pending storage display part. It is explanatory drawing which shows the further another example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of the total pending | holding memory | storage display part in 3rd Embodiment. It is a flowchart which shows the pending | holding memory | storage display control processing in 3rd Embodiment. It is a flowchart which shows the pending | holding memory | storage display control processing in 3rd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8a 1st special symbol display device 8b 1st special symbol display device 9 Production display device 13 1st starting winning port 14 2nd starting winning port 15 Variable winning ball device 9a 1st decorative symbol display device 9b 2nd decorative device Symbol display 18c Total hold memory display unit 20 Variable winning ball apparatus 31 Game control board (main board)
56 CPU
560 Game control microcomputer 80 Production control board 100 Production control microcomputer 101 Production control CPU
109 VDP

Claims (1)

First variable display means for starting the variable display of the first identification information and deriving and displaying the display result based on the fact that the first execution condition of the variable display based on the winning of the first start opening has been established; Second variable display means for starting the variable display of the second identification information and deriving and displaying the display result based on the fact that the second execution condition of the variable display based on the winning of the second start opening is established; The first effect identification information display means for variably displaying the first effect identification information corresponding to the variable display of the first identification information in the first variable display means, and the variable display of the second identification information in the second variable display means. Second effect identification information display means for variably displaying the second effect identification information corresponding to, and effects for performing display effects corresponding to variable display in the first effect identification information display means and the second effect identification information display means And a indicates means, a gaming machine to shift to an advantageous specific game state for the player when a particular display result was derived displayed on either the first variable display means and the second variable display means,
A command for controlling the variable display of the first variable display means and the second variable display means, and specifying which of the first variable display means and the second variable display means the variable display of the identification information is performed on. Game control means for transmitting
An effect control means for controlling the first effect identification information display means, the second effect identification information display means, and the effect display means based on a command transmitted by the game control means;
The game control means includes
First counting means for counting the number of established first execution conditions;
Second counting means for counting the number of established second execution conditions;
Based on the increase in the number of establishments counted by the first counting means or the number of establishments counted by the second counting means, after transmitting an establishment number identification command indicating which of the establishment numbers has increased A total number specifying command transmitting means for transmitting a total number specifying command capable of specifying a total number corresponding to the sum of the number of formations counted by the first counting means and the number of establishments counted by the second counting means; ,
When the variable display start condition is satisfied after the first execution condition is satisfied, variable display of the first identification information is started by the first variable display means, the display result is derived and displayed, and the second execution condition is satisfied. And variable display control means for starting the variable display of the second identification information by the second variable display means and deriving and displaying the display result when the variable display start condition is satisfied,
Comprising establishment number display means for displaying a mixture of information capable of specifying the establishment of the first execution condition and information capable of specifying the establishment of the second execution condition;
The production control means includes
The established number display means performs a display capable of specifying the established number of the first execution condition and the established number of the second execution condition in a predetermined display mode, and the first counting means counts the first A gaming machine comprising: a number-of-establishment display control means for performing display capable of specifying a difference between the number of established execution conditions and the upper limit of the first execution condition.

Images