JP4624023B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a thin film transistor having a crystalline semiconductor film with high crystallinity, a semiconductor device having the thin film transistor, and a crystallization method for manufacturing them.

    Recently, research on high-performance semiconductor devices using thin film transistors has been advanced. In particular, in a semiconductor device that requires high speed and high functionality, it is necessary to realize a thin film transistor (hereinafter also referred to as TFT) having high mobility.

    As a method for increasing the crystallinity of the semiconductor film, a metal element typified by nickel element (Ni) is added to the semiconductor film, and the film is formed or applied, and then subjected to heat treatment to form a crystalline semiconductor film. A crystallization method is performed (see, for example, Patent Document 1).

    In such a crystallization process, by using a metal element that promotes crystallization represented by Ni, a crystalline semiconductor film having a large grain size is obtained, and the probability that the grain boundary and the grain boundary are connected is high. A crystalline semiconductor film with few intragranular defects was obtained.

  Further, as a crystallization method different from the heat treatment, a method of performing crystallization by laser irradiation has been studied. There is a conventional crystallization method by laser irradiation in which an amorphous or polycrystalline silicon layer is irradiated with a pulsed ultraviolet beam to form a silicon thin film composed of silicon single crystal particles (for example, (See Patent Document 2). In this laser crystallization, the movement amount of the ultraviolet beam irradiation position from the completion of the irradiation of the rectangular ultraviolet beam to the next beam irradiation is set to 40 μm or less and the width of the ultraviolet beam measured along the moving direction is reduced. The rate of movement is set to 0.1 to 5%. The obtained silicon single crystal particles are disclosed to have a substantially <100> orientation with respect to the surface of the substrate.

  In addition, when crystallization is performed with a laser beam having a polarization direction, it is reported that a so-called ridge is generated in a direction perpendicular to the polarization direction by optimizing the laser irradiation conditions (see Non-Patent Document 1). . Non-Patent Document 1 describes that the interval between ridges depends on the wavelength and irradiation angle of laser light and can be expressed by λ / (1 ± sin θ) in laser light polarized into p-waves.

  In particular, FIG. 2A of Non-Patent Document 1 discloses that a ridge is formed in a linear shape when a linear pulse laser is irradiated once. In FIG. 2B of Non-Patent Document 1, when the second linear pulse laser is irradiated so as to form 90 degrees with the first laser irradiation direction, the ridge may be formed in a lattice shape. It is disclosed.

In Non-Patent Document 1, the substrate temperature is set to 350 ° with respect to the amorphous silicon film formed on the glass substrate, and an Nd: YAG of Nd: YAG is formed in the ultra-vacuum and the same temperature as the substrate. Experiments with pulsed laser irradiation have been reported.
Japanese Patent Laid-Open No. 7-161634 Japanese Patent Laid-Open No. 10-41234 Y. Nakata, A. Shimoyama and S. Horita, “AM-LCD 2000”, p. 265-268

  According to the crystallization method according to Patent Document 1, a large number of columnar crystal aggregates (also referred to as domains) having a size of about 200 μm to 300 μm are formed, and crystals in one domain have the same crystal orientation. Moreover, the orientation is different from the adjacent domains, and there is a boundary between the domains. High electrical characteristics can be obtained by forming a TFT by arranging the channel formation region so as to be within this one domain.

  However, it is difficult to fabricate the domains so that the domains are formed at random, and the channel formation region of the TFT is arranged in one formed domain. Therefore, it becomes difficult to form the channel formation regions of all TFTs arranged in the pixel portion and the drive circuit portion in one domain.

  As a result, when such a crystalline semiconductor film is used for an active layer (channel formation region, island-shaped semiconductor film including an impurity region) of a TFT, it has an advantage of high electrical characteristics, but adjacent domains (with different orientations). There is a possibility that a slight difference, that is, variation, occurs in each TFT characteristic due to the presence or absence of a boundary with the domain having a domain) or a difference in the size of a domain to be formed.

  If the TFTs arranged in the pixel portion and the drive circuit portion have variations in electrical characteristics, variations in voltage and current applied to each pixel electrode occur, which becomes uneven display and is seen by the observer.

  At present, this variation is within an acceptable range and is not a problem. However, if the pixel size is further miniaturized and higher definition images are required in the future, this variation will be very serious. It seems to be a problem. In the future, the gate wiring width will be further reduced and the size of the channel formation region (channel width) will be further reduced, so that a TFT having a domain-domain boundary in the channel formation region may be formed. (Mobility, S value, on-current value, off-current value, etc.) are different from those of a TFT having a channel formation region without a boundary, and this is considered to cause display unevenness.

  Therefore, great expectations are placed on a thin film transistor formed so that a channel formation region has only one crystal grain and a manufacturing method thereof.

  In addition, the crystallization method according to Patent Document 2 uses an ultraviolet beam measured along the moving direction with the movement amount of the ultraviolet beam irradiation position from the completion of irradiation of the rectangular ultraviolet beam to the next beam irradiation being 40 μm or less. The ratio of the amount of movement to the width of 0.1 to 5% was set to 0.1 to 5%. In Example 1, the amorphous silicon layer at a certain position was exposed to the pulsed ultraviolet laser 100 times.

  In such a crystallization method, since the silicon layer is irradiated many times such as 100 times, a processing time is required.

  In particular, when a crystalline semiconductor film formed by controlling orientation using a metal with Ni is irradiated with a laser many times, it is impossible to maintain the orientation. That is, as shown in Patent Document 1, after forming a crystalline semiconductor film in which orientation is controlled using a metal element, the alignment is performed when laser is irradiated many times as in the condition shown in Patent Document 2. However, it is not possible to maintain a crystalline semiconductor film in which is controlled.

  Further, as shown in Non-Patent Document 1, the second laser irradiation is performed for the first laser under the condition of irradiating the Nd: YAG laser with the substrate temperature held after 350 in the film forming chamber kept in vacuum. If the ridge is not formed in a lattice shape unless it is irradiated at 90 degrees to the irradiation, it takes time for the laser processing. As a result, it takes time to manufacture the thin film transistor and the semiconductor device, which is not suitable for mass production.

  Thus, an object of the present invention is to provide a thin film transistor having a crystalline semiconductor film, in particular, a thin film transistor in which a channel formation region has only one crystal grain, and a manufacturing method thereof. The present invention also relates to a crystallization method capable of controlling the orientation using a metal element that promotes crystallization, wherein the crystals are small in crystal grain size and arranged in a lattice at equal intervals by a single laser irradiation. It is an object to provide a crystalline semiconductor film having grains and a method for manufacturing the crystalline semiconductor film. Another object is to provide a semiconductor device including the thin film transistor and a manufacturing method thereof.

  In view of the above problems, the present invention forms a crystalline semiconductor film in which crystal grains are aligned by irradiating an amorphous semiconductor film with a pulsed laser (hereinafter referred to as a pulsed laser). A thin film transistor including a semiconductor film is formed. In particular, in the present invention, it is preferable to irradiate a pulsed laser after forming a crystalline semiconductor film by adding a metal element for promoting crystallization (hereinafter also simply referred to as a metal element) to the amorphous semiconductor film.

  In the present invention, the metal elements are nickel (Ni), iron (Fe), cobalt (Co), palladium (Pd), platinum (Pt), copper (Cu), gold (Au), silver (Ag) indium (In ), Tin (Sn), etc., and one or more selected from these may be used.

  Note that a crystalline semiconductor film in which crystal grains are aligned refers to a crystalline semiconductor film in which ridges are aligned in a lattice shape by irradiating an amorphous semiconductor film with a pulse laser, and crystal grains are formed between the ridges. Point to. Note that a ridge is an irregular raised point or convex portion of a film formed at a point where crystal grains collide, and is formed at a point where crystal grains collide, for example, as shown in the SEM photograph of FIG. The ridges should be aligned in a lattice pattern, particularly in the region where the thin film transistor is formed, as long as the ridges are generally aligned in a lattice pattern. The ridges need to be aligned in a lattice pattern over the entire crystalline semiconductor film. Absent.

  In particular, the present invention is characterized in that the size of the crystal grains, that is, the interval between the ridges, is formed at an interval comparable to the oscillation wavelength of a pulse laser (hereinafter also simply referred to as a wavelength) irradiated to the crystalline semiconductor film. To do. The size of the crystal grains is controlled by the wavelength of the pulse laser. Further, the size of the crystal grains may be controlled by the incident angle θ of the pulse laser that irradiates the crystalline semiconductor film. The incident angle is 0 <θ <90 °, preferably 20 ° ≦ θ ≦ 45 °.

In the present invention, ridges arranged in a lattice shape can be formed by a single pulse laser irradiation. Note that one-time pulse laser irradiation refers to a case where an amorphous semiconductor film or a crystalline semiconductor film which is an object to be irradiated is scanned once. However, a certain surface (irradiation surface) irradiated with the laser of the crystalline semiconductor film is irradiated with a plurality of shot pulse lasers. For example, when the film thickness of the semiconductor film is around 50 nm, irradiation is performed using a pulsed excimer laser at 350 to 450 mJ / cm ² and 20 to 40 shots.

  In the present invention, the pulse laser is preferably processed into a linear shape using an optical system. “Linear” does not mean “line” in a strict sense, but means a rectangle (or oval) having a large aspect ratio. For example, an aspect ratio of 2 or more (preferably 10 to 10000) is called a linear shape, but the linear shape is still included in a rectangular shape. As a result, a large area can be irradiated and mass productivity can be improved.

In the present invention, Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandride laser, Ti: sapphire laser are used as pulse lasers. One or more of copper vapor laser and gold vapor laser can be used.

  When crystallization is performed using a metal element that promotes crystallization as in the present invention, when the metal element adversely affects the electrical characteristics of the TFT, it is necessary to remove or reduce the metal element. This is called gettering.

  In the present invention, when irradiated with a laser, a metal element typified by Ni segregates into the ridge. Therefore, when performing gettering, the metal element can be efficiently captured in the gettering sink. In particular, after the laser irradiation, a gettering method in which a semiconductor film to which a rare gas is added is formed as a gettering sink over the crystalline semiconductor film in which the ridge is formed may be used. In other words, since all metal elements, such as Ni, are segregated in the ridge that becomes the tip of the crystalline semiconductor film, gettering efficiency can be improved by forming a gettering sink at a position closest to the ridge. . Alternatively, a predetermined region of the crystalline semiconductor film may be used as a gettering sink. For example, the metal element may be reduced or removed using an impurity region serving as a source / drain region as a gettering sink. These gettering sinks need to be removed by etching or the like.

  Further, when a crystalline semiconductor film is formed as in the present invention, metal elements are segregated in ridges arranged in a lattice pattern. Further, the gettering step can be performed by removing the ridge with hydrofluoric acid or the like. In this case, it is not necessary to form a gettering sink.

  More preferably, the crystalline semiconductor film may be planarized.

  By using the crystalline semiconductor film formed as described above, a so-called submicron TFT in which the width in the channel length direction of the channel formation region of the thin film transistor is 0.2 to 0.8 μm can be provided. As a result, a thin film transistor having one crystal grain in the channel formation region, that is, no crystal grain boundary can be formed. A gate electrode can be formed between adjacent ridges.

  In a semiconductor device having such a thin film transistor, pulse lasers may be separately used for the pixel portion and the driver circuit portion.

  In the present invention, a crystalline semiconductor film formed by controlling the size of crystal grains, that is, the interval between ridges, can be obtained by irradiation with a pulse laser. Furthermore, the orientation of crystal grains can be controlled by using a metal element that promotes crystallization.

In particular, by forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated.
As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment, a specific method for manufacturing a crystalline semiconductor film is described.

    First, as illustrated in FIG. 1A, a base film 101 is formed over a substrate 100 having an insulating surface. As the substrate 100, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a stainless steel (SUS) substrate, or the like can be used. In addition, plastics typified by PET, PES, and PEN, and substrates made of a synthetic resin having flexibility such as acrylic generally tend to have a lower heat resistant temperature than other substrates. Any material can be used as long as it can withstand the processing temperature.

    The base film 101 is provided to prevent alkali metal such as Na or alkaline earth metal contained in the substrate 100 from diffusing into the semiconductor film and adversely affecting the characteristics of the semiconductor element. Therefore, the insulating film is formed using an insulating film such as silicon oxide, silicon nitride, or silicon nitride oxide that can suppress diffusion of alkali metal or alkaline earth metal into the semiconductor film. In this embodiment, a silicon nitride oxide film is formed to a thickness of 10 to 400 nm (preferably 50 to 300 nm) by a plasma CVD method. Note that the base film 101 may have a stacked structure. For example, a silicon oxynitride film is stacked in the order of 10 to 200 nm (preferably 50 to 100 nm) and a silicon oxynitride film is stacked in the order of 50 to 200 nm (preferably 100 to 150 nm). May be. In the first silicon oxynitride film, the oxygen component and the nitrogen component are approximately the same. For example, Si = 32%, O = 27%, N = 24%, and H = 17% in terms of the composition ratio. . On the other hand, the second silicon nitride oxide film is a film having a much larger amount of oxygen than that of nitrogen. In terms of composition ratio, for example, Si = 32%, O = 59%, N = 7%, H = 2 %.

    When using a substrate that contains alkali metal or alkaline earth metal, such as a glass substrate, a SUS substrate, or a plastic substrate, it is effective to provide a base film from the viewpoint of preventing diffusion of impurities. In the case where diffusion of impurities does not cause any problem, such as a quartz substrate, it is not necessarily provided.

    An amorphous semiconductor film 102 is formed over the base film 101. The thickness of the amorphous semiconductor film 102 is 25 to 100 nm (preferably 30 to 60 nm). As the amorphous semiconductor, not only silicon but also silicon germanium can be used. When silicon germanium is used, the concentration of germanium is preferably about 0.01 to 4.5 atomic%. In this embodiment mode, a semiconductor film containing 40 nm silicon as a main component (also referred to as an amorphous silicon film) is used.

    Next, as shown in FIG. 1B, a metal element is preferably added to the amorphous semiconductor film 102. Here, the addition means that a metal element is formed on the surface of the amorphous semiconductor film 102 so that crystallization is promoted at least. The addition of a metal element is preferable because it can be crystallized at a low temperature. However, it is not necessary to add a metal element when forming on a substrate that can withstand high temperature crystallization.

    For example, a Ni solution (including an aqueous solution and an acetic acid solution) is applied on the amorphous semiconductor film 102 by a coating method such as a spin coating method or a dip method, and a substance 103 containing Ni (however, it is extremely thin and cannot be observed as a film There is also. At this time, in order to improve the wettability of the surface of the amorphous semiconductor film 102 and to spread the aqueous solution over the entire surface of the amorphous semiconductor film, UV light irradiation in an oxygen atmosphere, a thermal oxidation method, and a hydroxy radical are included. It is desirable to form an oxide film (not shown) in a thickness of 10 to 50 mm by treatment with ozone water or hydrogen peroxide. Alternatively, Ni ions may be implanted into the amorphous semiconductor film by an ion implantation method, heated in a water vapor atmosphere containing Ni, or sputtered with Ar plasma using a target as a Ni material. In this embodiment, an aqueous solution containing 10 ppm of Ni acetate is applied by a spin coating method.

    Thereafter, the amorphous semiconductor film 102 is heat-treated at 500 to 550 ° C. for 2 to 20 hours to crystallize the amorphous semiconductor film and form a crystalline semiconductor film. At this time, it is preferable to gradually change the heating temperature. In the first low-temperature heating step, hydrogen or the like of the amorphous semiconductor film is generated, so that film roughness during crystallization can be reduced. Alternatively, a magnetic field may be applied to crystallize the magnetic energy and high-power microwaves may be used. In this embodiment, heat treatment is performed at 550 ° C. for 4 hours after heat treatment at 500 ° C. for 1 hour using a vertical furnace.

    Next, after the oxide film formed on the surface of the crystalline semiconductor film is removed by etching with hydrofluoric acid, as shown in FIG. 1C, pulsed laser light 104 is applied to the crystallized amorphous semiconductor film 102. Irradiate. Note that in this embodiment mode, a case where a pulsed laser is irradiated to a crystallized amorphous semiconductor film is described; however, a pulsed laser may be irradiated to an amorphous semiconductor film. That is, the semiconductor film is irradiated with a pulse laser.

At this time, the pulse laser beam 104 can scan the entire surface of the crystalline semiconductor film only once, thereby forming ridges arranged in a lattice pattern. In this embodiment mode, a pulsed excimer laser (XeCl, oscillation wavelength 308 nm) is irradiated under an energy density of 420 mJ / cm ² and 25 shots. At this time, the shape of the linear laser is 400 μm × 120 mm.

    Then, as shown in FIG. 1D, convex portions 105 called ridges are formed in alignment on the surface of the crystalline semiconductor film. The size of this ridge depends on the laser irradiation conditions and tends to increase as the energy density and the number of shots increase. Note that the ridge is an irregular raised point or convex portion of a film formed at a point where crystal grains collide, and the fact that the ridges are aligned means that the crystal grains 106 are aligned. FIG. 1D is a cross-sectional view schematically showing the shape of the ridge.

    Specifically, as shown in Example 1, as shown in the SEM photograph of FIG. 6A, it can be seen that the ridges are formed in alignment and the crystal grains are formed in the same manner. In the SEM photograph, the point that appears white is a ridge.

    The alignment interval of the ridges depends on the wavelength of the pulse laser beam 104. That is, in this embodiment, since the excimer laser with an oscillation wavelength of 308 nm is irradiated, the interval between the ridges, that is, the size of the crystal grains is approximately 308 nm and aligned.

    Therefore, when YLF having an oscillation wavelength of 527 nm is used, the size of crystal grains is approximately 527 nm, and an aligned crystalline semiconductor film can be obtained.

    For example, when the second harmonic (oscillation wavelength: 532 nm) of an Nd: YAG laser is used, the crystal grain size is approximately 532 nm, and an aligned crystalline semiconductor film can be obtained.

The ridge 105 is segregated with a metal element that promotes crystallization. For example, when a crystalline silicon film is formed using Ni as a metal element as in this embodiment, nickel silicide (NiSi ₂ , Ni ₃ Si ₂ , Ni ₂ Si, etc.) segregates on the ridge. When nickel silicide segregates on the ridge of the crystalline silicon film in this manner, Ni does not exist outside the ridge, and a metal element typified by Ni can be effectively removed.

    In FIG. 1E, an amorphous semiconductor film 107 to which an inert element such as Ar is added is formed in a state where a metal element is segregated on the ridge 105, and a gettering step in which heat treatment is performed is performed. Note that the gettering step may be performed with the ridge 105 removed.

  The amorphous semiconductor film 107 can be formed by a sputtering method using a target containing Si or a CVD method. For example, in a sputtering apparatus, a high frequency power source may be operated to apply a high frequency to the target, and a magnetic field may be applied using a permanent magnet. The power applied to the target (12 inch size) is 0.5 to 3 Kw. At this time, the substrate 100 is preferably heated to room temperature (25 ° C.) to 300 ° C. Then, an amorphous semiconductor film 107 serving as a gettering sink is formed. More preferably, heated argon gas is supplied from above the substrate 100 and sprayed onto the surface opposite to the film formation surface of the amorphous semiconductor film 107 (non-film formation surface). The flow rate of the heated argon gas may be about 10 to 50 sccm. In addition, although it is necessary to consider the film forming conditions and throughput, the processing time is 1 to 20 minutes, preferably about 5 minutes.

  Note that in the case where the amorphous semiconductor film 107 is formed over the semiconductor film, it is preferable to form an oxide film so as to improve wettability and prevent film peeling. As the oxide film, a thin film (chemical oxide) formed by treatment with ozone water or an aqueous solution mixed with hydrogen peroxide such as sulfuric acid, hydrochloric acid, or nitric acid can be used. As another method, the plasma treatment in an oxygen atmosphere or the oxidation treatment may be performed by generating ozone by irradiating ultraviolet rays in an oxygen-containing atmosphere.

    In this embodiment, as illustrated in FIG. 1D, when a crystalline semiconductor film is irradiated with laser light, an oxide film is formed on the surface of the semiconductor film. Therefore, the amorphous semiconductor film 107 can be formed using the oxide film without removing the oxide film.

    Further, a gettering step in which an impurity element is implanted into part of the impurity region to form a gettering sink and heating may be performed.

  Note that in this embodiment mode, a gettering process is performed after pulse laser crystallization; therefore, the gettering process can be performed after the number of amorphous semiconductor films in the crystalline semiconductor film is reduced. Therefore, the metal element that promotes crystallization can be efficiently captured in the gettering sink. Note that pulse laser crystallization may be performed after the gettering step.

After that, as shown in FIG. 1F, the amorphous semiconductor film 107 is removed by wet etching, dry etching, polishing by a CMP method (Chemical Mechanical Polishing), or the like. For example, the amorphous semiconductor film 107 can be removed by wet etching using an alkaline solution typified by hydrazine or tetraethylammonium hydroxide (TMAH, chemical formula: (CH ₃ ) ₄ NOH).

  Thereafter, the oxide film is removed by wet etching using a hydrofluoric acid-based etching solution. The hydrofluoric acid-based etching solution preferably contains a surfactant.

    Note that if nickel silicide or the like is present in a channel formation region, a drain region, or a source region of a thin film transistor, a current path is formed, which causes an increase in off current. Therefore, efficient gettering of a metal element as in this embodiment is important in a process of forming a crystalline semiconductor film.

  When only the amorphous semiconductor film 107 and the oxide film are removed without removing the ridge, the ridge 105 remains, so that the planarization treatment may be performed on the surface of the crystalline semiconductor film at this point. For the planarization method, Embodiment Mode 2 may be referred to.

    The crystalline semiconductor film thus formed is patterned into a predetermined shape as shown in FIG. 2A to form island-shaped crystalline semiconductor films 111 and 112. Note that FIG. 2 illustrates a structure in which the planarization process is not performed on the crystalline semiconductor film. Then, the surfaces of the island-shaped crystalline semiconductor films 111 and 112 are washed with an etchant containing hydrofluoric acid, so that a gate insulating film 113 covering the crystalline semiconductor films 111 and 112 is formed. The gate insulating film 113 is formed of an insulating film containing silicon with a thickness of 10 to 150 nm, preferably 10 to 50 nm in the case of a submicron TFT, using plasma CVD or sputtering. In this embodiment mode, a silicon oxynitride film (for example, a film having a composition ratio of Si = 32%, O = 59%, N = 7%, and H = 2%) is formed with a thickness of 30 nm by a plasma CVD method. Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

    When the gate insulating film is formed, if the ridge 105 remains, the gate insulating film may be cut. In particular, when the size of the thin film transistor is reduced, the gate insulating film becomes thinner accordingly. Also in this embodiment, since the gate insulating film is formed with a thickness of 50 nm, the above problem cannot be ignored. Therefore, it is preferable to perform a planarization process. For the planarization method, Embodiment Mode 2 may be referred to.

    In particular, there is a problem that the gate insulating film under the gate electrode is disconnected. Therefore, the present embodiment is characterized in that the gate electrode is designed to be formed between adjacent ridges as described below.

    After that, as shown in FIG. 2B, a conductive film 114 to be a gate electrode is formed. The conductive film may be formed of an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component. Also good. In this embodiment, a conductive film 114 is formed by sequentially stacking a tantalum nitride film with a thickness of 50 nm and a tungsten film with a thickness of 370 nm so as to cover the gate insulating film 113.

    Then, a resin having a photosensitive agent is applied by a spin coating method, and exposed using a stepper to transfer a mask pattern. Then, masks 115 and 116 having a width (in this embodiment mode, the width in the channel length direction of the channel formation region) of 0.3 to 1 μm are formed.

As shown in FIG. 2C, the conductive film 114 is etched using masks 115 and 116. As the etching, dry etching or wet etching can be used. In this embodiment mode, dry etching is performed using a mixed gas of CF ₄ and O ₂ . Then, isotropic etching may be performed, and the conductive film is etched to be narrower than the width of the masks 115 and 116 to form the gate electrodes 117 and 118. Of course, the conductive film 114 may be etched to the same width as the masks 115 and 116. The gate electrodes 117 and 118 are formed between adjacent ridges. At this time, the width of the gate electrode is 0.2 to 0.8 μm. That is, the width of the channel formation region is 0.2 to 0.8 μm.

    Thereafter, an impurity element is added using the gate electrodes 117 and 118 as a mask. As the impurity element, P (phosphorus) or B (boron) can be used.

    That is, when the gate electrode is formed in this way, the channel formation region can have one crystal grain formed in the same size as the oscillation wavelength of the pulse laser. In this embodiment, since crystallization is performed using an excimer laser having an oscillation wavelength of 308 nm, the size (width) of crystal grains is approximately 308 nm, and a gate having a width of 0.3 μm thereon. By forming an electrode, a TFT in which a channel formation region has one crystal grain, a so-called submicron TFT can be formed.

    Thereafter, a passivation film made of an insulating film such as a silicon oxynitride film or silicon oxide is preferably formed on the gate electrodes 117 and 118. Then, using a clean oven, the semiconductor film is hydrogenated by heating at 300 to 550 ° C. for 1 to 12 hours.

    Then, as shown in FIG. 2D, an interlayer insulating film 119 is formed over the gate electrodes 117 and 118. The interlayer insulating film 119 can be formed using an insulating film containing an inorganic material or an organic material. In this embodiment mode, the insulating film containing silicon oxide is used to form 1.05 μm.

    Next, as shown in FIG. 2E, wirings 120 to 123 (also referred to as source wiring or drain wiring) connected to the source region and the drain region are formed, and an n-channel TFT 124 and a p-channel TFT 125 are formed. Is done.

    Note that although a TFT structure having a source / drain region is illustrated in this embodiment mode, a TFT having an LDD structure and a TFT having a GOLD structure can be formed.

    Then, a semiconductor device having the thin film transistor formed as described above can be manufactured. A semiconductor device is an integrated circuit or a semiconductor display device. In particular, a liquid crystal display device, a light emitting device including a light emitting element typified by an organic light emitting element in each pixel, DMD (Digital Micromirror Device), PDP (Plasma Display Panel). A thin film transistor can be used for a pixel portion and a driver circuit portion of a semiconductor display device such as FED (Field Emission Display).

    In particular, since crystal grains can be reduced, the thin film transistor is suitable for a thin film transistor having a small channel size, such as a thin film transistor of a CPU having an integrated circuit.

    In the semiconductor display device, a crystalline semiconductor film may be separately formed in the pixel portion and the driver circuit portion. Refer to Embodiment Mode 5 for details.

    As described above, a thin film transistor including a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a thin film transistor in which a channel formation region has only one crystal grain, and a manufacturing method thereof can be provided. By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured.

(Embodiment 2)
In this embodiment, planarization treatment of a semiconductor film is described.

    As shown in FIG. 1D, when a pulse laser is irradiated, a ridge 105 is formed on the surface of the semiconductor film. In the case where this ridge causes adverse effects such as TFT characteristics, a planarization process may be performed.

    For example, after the pulse laser is performed in the air, nitrogen is introduced into the laser irradiation chamber, and the pulse laser is irradiated in a state where nitrogen is mixed, whereby the height of the ridge can be reduced and the flatness can be improved. (See FIG. 8A). At this time, if the nitrogen concentration in the laser irradiation chamber is too high, the ridge disappears, specifically, the alignment of crystal grains arranged in a lattice shape may change, so pay attention to the ratio between the nitrogen concentration and the oxygen concentration. is necessary. Such a planarization process for controlling the atmosphere of the laser irradiation chamber has a short processing time without movement of the processing chamber.

Further, the planarity can be improved by polishing by CMP (Chemical Mechanical Polishing) (see FIG. 8B). Further, etch back by dry etching using a fluoride gas such as CF ₄ or NF ₃ may be performed. Further, the oxide film formed at the time of pulse laser irradiation may be removed by HF treatment. By removing the oxide film, the flatness is improved, and in addition, the oxide film may be removed with some ridges.

    In these cases, although it depends on the thickness removed from the surface of the crystalline semiconductor film, a crystalline semiconductor film having the highest flatness can be obtained.

In particular, in order to remove the ridge, wet etching may be performed using a hydrofluoric acid-based etching solution. The hydrofluoric acid-based etching solution preferably contains a surfactant. When the ridge is removed, a recessed hole (recess) 130 is formed when the ridge is removed (see FIG. 8C). Therefore, planarization treatment may be performed on the surface of the crystalline semiconductor film from which the ridge has been removed. For example, the laser light may be irradiated in a gas atmosphere in which oxygen is not present, that is, an inert gas atmosphere. Specifically, planarization is performed by irradiating a pulsed excimer laser (XeCl, oscillation wavelength 308 nm) under an energy density of 480 mJ / cm ² and 12 shots in a nitrogen gas atmosphere.

    In particular, when a thin film transistor is formed, electric field concentration may occur at the tip of the ridge when a gate voltage is applied. Therefore, it is preferable to remove the ridge 105 and further flatten it.

    Although there is a possibility that the flattening process may have some influence, the alignment state of the crystal grains is maintained.

    After performing the planarization process in this way, a gettering process can be performed. Further, the ridge may be planarized after the gettering step.

    As described above, roughness of the semiconductor surface can be suppressed, and variation in threshold value caused by variation in interface state density can be suppressed.

  Of course, when the flatness of the surface of the semiconductor film is not a problem, it is not necessary to perform the flattening process.

  This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 3)
In this embodiment, a method for manufacturing a crystalline semiconductor film by a method different from that in Embodiment 1 will be described.

    FIG. 3A shows a state in which an aqueous solution containing 10 ppm of Ni acetate is applied to the amorphous semiconductor film 102 by a spin coating method, as in the first embodiment. Thereafter, the amorphous semiconductor film 102 is heat-treated at 500 to 550 ° C. for 2 to 20 hours to crystallize the amorphous semiconductor film and form a crystalline semiconductor film.

Then, as shown in FIG. 3B, the pulse laser beam 104 is irradiated obliquely so as to have an irradiation angle θ (0 <θ <90 °). The laser conditions are the same as in Embodiment Mode 1, and a pulse oscillation type excimer laser (XeCl, oscillation wavelength 308 nm) is irradiated under the conditions of an energy density of 420 mJ / cm ² and 25 shots.

    Then, as shown in FIG. 3C, the interval between the ridges 105 is formed to be longer than the oscillation wavelength of the pulse laser. That is, the crystal grain 106 is formed to be larger than the oscillation wavelength of the pulse laser. In the present embodiment, since the incident light is θ = 30 °, the size of the crystal grain 106 is doubled to approximately 616 nm. At this time, the size of the crystal grains in the direction perpendicular to the oblique direction is approximately 308 nm, which is about the same as the wavelength of the pulse laser. That is, the crystal grains are 308 nm × 616 nm.

    As described above, the size of the crystal grain 106 can be changed by controlling the incident angle of the pulse laser beam 104. In particular, the crystal grains can be enlarged.

    After that, it is preferable to perform a flattening process as shown in the second embodiment. As shown in FIG. 3D, a thin film transistor having gate electrodes 117 and 118, a passivation film 126 covering the gate electrode, an interlayer insulating film 119, and wirings 120 to 123 by a process similar to that of Embodiment Mode 1. Can be formed.

    Also in this embodiment, the gate electrodes 117 and 118 can be formed so that the channel formation region has one crystal grain. In particular, by irradiating the pulsed laser light 104 obliquely as in this embodiment mode, the crystal grains 106 can be formed larger, and accordingly the widths of the gate electrodes 117 and 118 can be increased. Therefore, when a thin film transistor having one crystal grain is formed in a channel formation region, a margin can be increased and the thin film transistor can be formed with high accuracy.

    As described above, a thin film transistor including a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a thin film transistor in which a channel formation region has only one crystal grain, and a manufacturing method thereof can be provided. By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured.

  This embodiment mode can be freely combined with the above embodiment mode, and in particular, a thin film transistor can be manufactured in a manner similar to that in Embodiment Mode 1 except for a step of irradiating a pulse laser obliquely. The planarization treatment of the crystalline semiconductor film can be combined with Embodiment Mode 2.

(Embodiment 4)
In this embodiment, a method for manufacturing a crystalline semiconductor film by a method different from those in Embodiments 1 and 3 will be described.

    FIG. 4A shows a state in which the amorphous semiconductor film 102 is formed as in Embodiment Mode 1. After that, as shown in FIG. 4B, the amorphous semiconductor film 102 is exposed to an atmosphere in which a gas mainly containing one or more kinds selected from a rare gas element, nitrogen, and ammonia is made into a plasma. Plasma conversion of these elements can be performed using a plasma generator (plasma CVD apparatus, dry etching apparatus, etc.) for 30 seconds to 20 minutes (preferably 3 to 15 minutes). Furthermore, it is preferable to process the gas at a flow rate of 50 to 300 sccm, a substrate temperature of 200 to 500 degrees, and RF of 100 to 400 W.

    Then, as shown in FIG. 4C, an aqueous solution 103 containing 10 ppm of Ni acetate is applied to the amorphous semiconductor film 102 by a spin coating method. Thereafter, the amorphous semiconductor film 102 is heat-treated at 500 to 550 ° C. for 2 to 20 hours to crystallize the amorphous semiconductor film and form a crystalline semiconductor film.

     Needless to say, after a metal element is added to the amorphous semiconductor film 102, a treatment may be performed in which the element is exposed to an atmosphere containing one or more kinds selected from a rare gas element, nitrogen, and ammonia that are converted into plasma.

Then, as shown in FIG. 4D, pulsed laser light 104 is irradiated. The laser conditions are the same as in Embodiment Mode 1, and a pulse oscillation type excimer laser (XeCl, oscillation wavelength 308 nm) is irradiated under the conditions of an energy density of 420 mJ / cm ² and 25 shots.

    Then, as shown in FIG. 4E, the interval between the ridges 105 is formed to be approximately the same as the oscillation wavelength of the pulse laser. That is, in this embodiment, since the excimer laser with an oscillation wavelength of 308 nm is irradiated, the interval between the ridges, that is, the size of the crystal grains is approximately 308 nm and aligned.

    After that, it is preferable to perform a flattening process as shown in the second embodiment. Then, as shown in FIG. 4F, a thin film transistor having gate electrodes 117 and 118, a passivation film 126, an interlayer insulating film 119, and wirings 120 to 123 covering the gate electrode by a process similar to that of Embodiment Mode 1. Can be formed.

    By performing plasma treatment as in this embodiment mode, crystal grains of a crystalline semiconductor film obtained using a metal element can be reduced without increasing the amount of the metal element used. As a result, a submicron TFT can be formed.

    As described above, a thin film transistor including a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a thin film transistor in which a channel formation region has only one crystal grain, and a manufacturing method thereof can be provided. By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured.

  This embodiment mode can be freely combined with the above embodiment mode. In particular, a thin film transistor can be manufactured in a manner similar to that of Embodiment Mode 1 except for the plasma treatment step. Further, this embodiment can be combined with Embodiment Mode 2 which includes a step of irradiating a pulse laser obliquely. The planarization treatment of the crystalline semiconductor film can be combined with Embodiment Mode 2.

(Embodiment 5)
In this embodiment, a method for manufacturing an active matrix substrate having a crystalline semiconductor film is described. Note that an active matrix substrate refers to a substrate over which the thin film transistor described in any of Embodiments 1 to 4 is formed. Specifically, the substrate has a pixel portion in which thin film transistors are formed in a matrix and a driver circuit portion in which a plurality of thin film transistors are formed.

  FIG. 5A shows a top view of the active matrix substrate. A pixel portion 402, a signal line driver circuit 403, a first scan line driver circuit 404, and a second scan line driver circuit 405 are formed over a substrate 401.

  In such an active matrix substrate, crystallization may be performed by irradiating the entire surface with a pulse laser, but it is preferable to divide the pulse laser according to the required electrical characteristics of the TFT. For example, in a driver circuit portion including a signal line driver circuit and a scanning line driver circuit, a TFT having high mobility is preferably provided. On the other hand, it is preferable that a TFT with little variation is provided in the pixel portion.

  Therefore, it is divided into an irradiation region where the pulse laser is irradiated and a non-irradiation region where the irradiation is not performed. For example, as shown in the AA ′ cross-sectional view in FIG. 5B, the first scan line driver circuit 404 and the second scan line driver circuit 405 are used as irradiation regions, and the pixel portion 402 is used as a non-irradiation region. can do. In this case, in order to prevent the pulse laser beam 104 from hitting the non-irradiated region, laser irradiation can be performed with the metal mask 132 provided.

  Further, a region where the metal element is added to the amorphous semiconductor film and a region where the metal element is not added may be provided.

  Further, a crystalline semiconductor film can be separately formed in the pixel portion. For example, a TFT included in a pixel portion, in particular, a driving TFT connected to a light emitting element, and a capacitor element can be distinguished. When the driving TFT varies, the display by the light emitting element or liquid crystal element driven by the driving TFT varies. On the other hand, if a ridge is formed in the capacitive element, there is a risk of leakage current. For this reason, laser crystallization may be performed only on the TFTs in the pixel portion, particularly on the driving TFTs, and laser crystallization may not be performed on the capacitor elements.

  For example, a mask may be provided in the capacitor element formation region so that the pulse laser is not irradiated. Specifically, a film having a higher refractive index and a film having a lower refractive index are sequentially stacked as a mask on at least the capacitor element to form a stacked film. At this time, when the wavelength of the irradiation laser is λ and each refractive index is n, the layers may be stacked so that the film thickness satisfies (λ / 4) · n. At this time, the film thickness of the entire laminated film is formed to be several hundred nm to several μm. When a pulsed excimer laser (oscillation wavelength: 308 nm) is irradiated on the entire surface of the pixel portion, a laminated film in which a SiON film having a thickness of 42 nm and an ITO film having a thickness of 36 nm are sequentially formed can be formed.

  Since the excimer laser is refracted by the laminated film, the capacitor is not irradiated with the laser or is irradiated with reduced energy. Therefore, a ridge is not formed in the capacitor element in which the laminated film is formed, or the height of the ridge is reduced. As a result, leakage current can be reduced. Note that a laminated film may be formed in a region other than the capacitor element where it is not desired to form a ridge.

  Alternatively, the entire surface may be irradiated with a pulse laser, and in particular, a continuous wave laser (CW laser) may be irradiated to a capacitance formation region where formation of a ridge is to be prevented, and the ridge may be flattened. Furthermore, in this case, crystallization is performed using Ni which is a metal element, and the region in which the orientation is controlled is melted, so that the orientation is random.

  As described above, in the pixel portion, it is possible to reduce variation in TFTs by irradiating a pulsed laser to a predetermined location, and to prevent leakage current from the capacitor element by not irradiating a pulsed laser to other locations. .

  In this embodiment mode, the active matrix substrate has a structure in which a pixel portion and a driving circuit portion such as a signal line driving circuit portion and a scanning line driving circuit portion are integrally formed. However, the pixel portion, the driving circuit portion, Are not necessarily formed integrally. The signal line driver circuit portion and the scanning line driver circuit portion may be formed using an IC chip and connected by bumps or the like. In particular, a signal line driver circuit is formed by an IC chip, and the signal is transmitted through an anisotropic conductive film (ACF) or a flexible printed circuit (FPC), or by using a COF method or a TAB method. It can be connected to a wiring represented by a line or a scanning line.

  This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 6)
In this embodiment, a light-emitting device that is an example of a semiconductor device including a crystalline semiconductor film will be described.

  FIG. 9A illustrates a light-emitting device in which a signal line driver circuit 1200, a scan line driver circuit 1201, and a pixel portion 1202 are formed over a first substrate 1210.

  9B is a cross-sectional view taken along line AA ′ of the display device. A signal line driver circuit 1200 including a CMOS circuit having an n-channel TFT 1223 and a p-channel TFT 1224 over a first substrate 1210 is shown. Show. The n-channel TFT 1223 and the p-channel TFT 1224 are formed to have a crystalline semiconductor film in which crystal grains are arranged in a lattice shape by laser annealing using a pulse laser. Particularly preferred is a TFT formed so that the channel formation region has only one crystal grain. The TFTs forming the signal line driver circuit 1200 and the scanning line driver circuit 1201 may be formed of a CMOS circuit, a PMOS circuit, or an NMOS circuit.

  The pixel portion 1202 includes a switching TFT 1221 and a driving TFT 1212. The switching TFT 1221 and the driving TFT 1212 are formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. Particularly preferred is a TFT formed so that the channel formation region has only one crystal grain. Note that the TFT of the pixel portion 1202 does not need to have high crystallinity as compared with the signal line driver circuit 1200 and the scan line driver circuit 1201. The pixel portion 1202 covers the first electrode 1213 of the light emitting element connected to one electrode of the driving TFT 1212, the switching TFT 1221, and the driving TFT 1212, and is located at a position corresponding to the first electrode 1213 of the light emitting element. An insulator 1214 having an opening, an electroluminescent layer 1215 provided over the first electrode 1213, and a light-emitting element 1218 including a second electrode 1216 of the light-emitting element provided to face each other. Note that the electroluminescent layer includes an organic material or an inorganic material, and includes an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, and the like as appropriate.

  The insulator 1214 may be formed of an organic resin film such as a resist, polyimide, or acrylic, or an inorganic insulating film containing silicon such as silicon nitride or silicon oxide. Here, the insulator 1214 is formed using a positive photosensitive acrylic resin film. Note that in the case of using an organic resin film or the like, an insulating film containing silicon nitride or silicon nitride oxide as a main component or a DLC film containing hydrogen (Diamond Like Carbon) may be formed in order to prevent intrusion of moisture or oxygen.

  Note that a curved surface having a curvature is preferably formed on the upper end portion or the lower end portion of the insulator 1214 in order to improve the step coverage of an electrode or an electroluminescent layer to be formed later. For example, in the case where positive photosensitive acrylic is used as a material for the insulator 1214, only the upper end portion of the insulator 1214 may have a curved surface having a curvature radius (0.2 μm to 3 μm). As the insulator 1214, either a negative type that becomes insoluble in an etchant by photosensitive light or a positive type that becomes soluble in an etchant by light can be used.

  Since the first electrode 1213 of the light-emitting element is in contact with the first electrode of the driving transistor 1212, at least the lower surface of the first electrode 1213 of the light-emitting element is a first electrode region of the semiconductor film. It is desirable to form a material having a large work function on the surface in contact with the electroluminescent layer. For example, the first electrode 1213 of the light-emitting element may be a single layer of a titanium nitride film or a stack of three or more layers.

  When a light-transmitting conductive film is used for the first electrode 1213 and the second electrode 1216 of the light-emitting element, a double-sided light-emitting device can be manufactured.

  The first electrode 1213 can be a light-transmitting conductive film, preferably a highly reflective conductive film, and the second electrode 1216 can be a light-transmitting conductive film. Then, a top emission light-emitting device in which light is emitted only to the sealing substrate side can be manufactured.

  The first electrode 1213 can be a light-transmitting conductive film, and the second electrode 1216 can be a light-transmitting conductive film, preferably a highly reflective conductive film. Then, a bottom emission type light emitting device in which light is emitted only to the substrate side can be manufactured.

  Note that light can be effectively used by using a highly reflective conductive film for an electrode of a light-emitting element provided on the side not corresponding to the light emission direction.

  Note that depending on the pixel structure, both the first electrode and the second electrode can be an anode or a cathode. For example, specific electrode materials will be described in the case where the first electrode is an anode and the second electrode is a cathode.

  As the anode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a high work function (work function of 4.0 eV or more). Specific examples of the anode material include ITO (indium tin oxide), indium oxide mixed with 2 to 20% zinc oxide (ZnO), IZO (indium zinc oxide), gold (Au), platinum (Pt), Nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), or metal nitride (TiN), etc. Can be used.

On the other hand, as the cathode material, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific examples of the cathode material include elements belonging to Group 1 or Group 2 of the element periodic rule, that is, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg : Ag, Al: Li) and compounds (LiF, CsF, CaF ₂ ), as well as transition metals including rare earth metals. However, since the cathode needs to have translucency, these metals or an alloy containing these metals are formed very thinly, and are formed by lamination with a metal (including an alloy) such as ITO. These anode and cathode can be formed by vapor deposition, sputtering, or the like.

Further, in the case of full-color display as the electroluminescent layer 1215, materials that emit red (R), green (G), and blue (B) light are selected by an evaporation method using an evaporation mask or an inkjet method, respectively. It may be formed automatically. Specifically, CuPc or PEDOT is used as HIL, α-NPD is used as HTL, BCP or Alq _{3 is used} as ETL, and BCP: Li or CaF ₂ is used as EIL. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G).

More specifically, in the case of forming an electroluminescent layer that emits red light, for example, after forming 30 nm of CuPc and 60 nm of α-NPD, the same mask is used when forming an electroluminescent layer that emits red light. Alq ₃ to which DCM ₂ and rubrene are added is formed to 40 nm as a red light emitting layer, BCP is formed to 40 nm as an electron transport layer, and BCP to which Li is added is formed 1 nm as an electron injection layer. In the case of forming an electroluminescent layer that emits green light, for example, CuPc is formed to 30 nm and α-NPD is formed to 60 nm, and then coumarin 545T is added as a green light emitting layer using the same vapor deposition mask. 40 nm of Alq ₃ is formed, 40 nm of BCP is formed as an electron transport layer, and 1 nm of BCP added with Li is formed as an electron injection layer. In the case of forming an electroluminescent layer that emits blue light, for example, CuPc is formed to 30 nm and α-NPD is formed to 60 nm, and then bis [2- (2-hydroxyphenyl) is formed as the light emitting layer using the same mask. ) Benzoxazolate] Zinc: Zn (PBO) ₂ is formed to 10 nm, BCP is formed to 40 nm as an electron transport layer, and BCP to which Li is added is formed to be 1 nm as an electron injection layer. Note that the present invention is not limited to the stacked structure of the electroluminescent layer.

  As described above, among the electroluminescent layers of the respective colors, common CuPc and α-NPD can be formed on the entire surface of the pixel portion. The mask can also be shared by each color. For example, after forming a red electroluminescent layer, the mask can be shifted to form a green electroluminescent layer, and the mask can be shifted again to form a blue electroluminescent layer. . What is necessary is just to set suitably the order of the electroluminescent layer of each color to form.

  In the case of white light emission, full color display may be performed by separately providing a color filter or a color filter and a color conversion layer. The color filter and the color conversion layer may be attached after being provided over the second substrate.

  Further, in order to prevent deterioration of the light-emitting element due to moisture, oxygen, or the like, a protective film 1217 is provided to cover the second electrode of the light-emitting element. In this embodiment, an insulating film mainly containing silicon nitride or silicon nitride oxide obtained by a sputtering method (DC method or RF method) or a DLC film containing hydrogen is used for the protective film 1217.

  As shown in FIG. 9, the second electrode 1216 of the light-emitting element is connected to the connection wiring 1208 through a lead-out wiring from an opening (contact) provided in the insulator 1214 in the connection region. The connection wiring 1208 is connected to a flexible printed circuit board (FPC) 1209 by an anisotropic conductive resin (ACF). Then, a video signal and a clock signal which are external input signals are received via the FPC 1209. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC.

  In this embodiment mode, a driver-integrated light emitting device in which a signal line driver circuit 1200 and a scan line driver circuit 1201 are formed over a substrate 1210 is shown; however, the signal line driver circuit and the scan line driver circuit are formed using an IC, and the SOG May be connected to a signal line, a scanning line, or the like by a method or a TAB method.

  Also, when the ACF is bonded by pressurization or heating, care should be taken not to cause cracks due to the flexibility of the substrate and softening due to heating. For example, a highly rigid substrate may be disposed as an auxiliary in the adhesion region.

  In addition, a sealant 1205 is provided on a peripheral portion of the first substrate, and is bonded to the second substrate 1204 and sealed. The sealing material 1205 is preferably an epoxy resin.

  When sealed with the second substrate 1204, a space is formed between the protective film 1217 and the second substrate 1204. The space is filled with an inert gas, for example, nitrogen gas, or a material with high water absorption is formed to prevent moisture and oxygen from entering. In this embodiment, a resin 1230 having a light-transmitting property and high water absorption is formed. Since the resin 1230 has a light-transmitting property, the resin 1230 can be formed without reducing transmittance even when light from the light-emitting element is emitted to the second substrate side.

As described above, a light-emitting device including a thin film transistor having a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a thin film transistor in which a channel formation region has only one crystal grain can be manufactured.
By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and high mobility can be manufactured, and a high-quality light-emitting device can be provided.

(Embodiment 7)
In this embodiment, a liquid crystal display device which is an example of a semiconductor device including a crystalline semiconductor film is described.

  FIG. 10A illustrates a liquid crystal display device in which a signal line driver circuit 1200, a scan line driver circuit 1201, and a pixel portion 1202 are formed over a first substrate 1210.

  FIG. 10B is a cross-sectional view taken along line AA ′ of the display device. A signal line driver circuit 1200 including a CMOS circuit having an n-channel TFT 1223 and a p-channel TFT 1224 over a first substrate 1210 is shown. Show. The n-channel TFT 1223 and the p-channel TFT 1224 are formed to have a crystalline semiconductor film in which crystal grains are arranged in a lattice shape by laser annealing using a pulse laser. Particularly preferred is a TFT formed so that the channel formation region has only one crystal grain. The TFTs forming the signal line driver circuit 1200 and the scanning line driver circuit 1201 may be formed of a CMOS circuit, a PMOS circuit, or an NMOS circuit.

  The pixel portion 1202 includes a switching TFT 1221 and a capacitor element 1245. The switching TFT 1221 is formed so as to have a crystalline semiconductor film in which crystal grains are arranged in a lattice by laser annealing using a pulse laser. Particularly preferred is a TFT formed so that the channel formation region has only one crystal grain. The capacitor 1245 includes a gate insulating film sandwiched between a semiconductor film to which an impurity is added and a gate electrode. Note that the TFT of the pixel portion 1202 does not need to have high crystallinity as compared with the signal line driver circuit 1200 and the scan line driver circuit 1201. The pixel electrode 1250 connected to one electrode of the switching TFT 1211 is provided, and an insulator 1214 is provided so as to cover the n-channel TFT 1223, the p-channel TFT 1224, the pixel electrode 1250, and the switching TFT 1211.

  A second substrate 1204 which is a counter substrate is provided with a black matrix 1253 at a position corresponding to the signal line driver circuit 1200 and a color filter 1252 at least at a position corresponding to a pixel portion. Then, the second substrate 1204 over which the counter electrode 1251 is formed is subjected to rubbing treatment, and is bonded to the first substrate 1210 with a spacer 1255 interposed therebetween.

  A liquid crystal layer is injected between the first substrate 1210 and the second substrate 1204. In the case of injecting the liquid crystal layer, it may be performed in a vacuum. Alternatively, a liquid crystal layer may be dropped on the first substrate 1210 and attached to the second substrate 1204. In particular, for a large substrate, it is preferable to drop the liquid crystal layer rather than injecting it.

  The first substrate 1210 and the second substrate 1204 are bonded using a sealant 1205. The first substrate 1210 and the second substrate 1204 may be provided with polarizing plates as appropriate to increase contrast.

  As described above, a thin film transistor including a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a liquid crystal display device including a thin film transistor in which a channel formation region has only one crystal grain can be manufactured. . By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured, and a high-quality liquid crystal display device can be provided.

(Embodiment 8)
As an example of an electronic device manufactured by applying the present invention, a digital camera, a sound reproduction device such as a car audio, a notebook personal computer, a game device, a portable information terminal (a mobile phone, a portable game machine, etc.), a home use An image reproducing device including a recording medium such as a game machine may be used. Specific examples of these electronic devices are shown in FIGS.

  FIG. 11A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The display portion 2003 includes a light-emitting element or a liquid crystal element, and is formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2003 includes a pixel portion and a driver circuit portion. FIG. 11B illustrates a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The display portion 2102 includes a light-emitting element or a liquid crystal element, and is formed so as to include a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2102 includes a pixel portion and a driver circuit portion. FIG. 11C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The display portion 2203 includes a light-emitting element or a liquid crystal element, and is formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser nebulization using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2203 includes a pixel portion and a driver circuit portion.

  FIG. 11D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The display portion 2302 includes a light-emitting element or a liquid crystal element, and is formed so as to include a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2302 includes a pixel portion and a driver circuit portion. FIG. 11E illustrates a portable image reproducing device provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, a recording medium reading portion 2405, operation keys 2406, a speaker portion 2407, and the like. Including. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. The display portion A 2403 and the display portion B 2404 each include a light-emitting element or a liquid crystal element, and are formed to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. Preferably, the TFT has a channel formation region formed so as to have only one crystal grain. Note that the display portions 2403 and 2404 each include a pixel portion and a driver circuit portion. FIG. 11F shows a goggle type display including a main body 2501, a display portion 2502, and an arm portion 2503. The display portion 2502 includes a light-emitting element or a liquid crystal element, and is formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2502 includes a pixel portion and a driver circuit portion.

  FIG. 11G shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and the like. . The display portion 2602 includes a light-emitting element or a liquid crystal element, and is formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2602 includes a pixel portion and a driver circuit portion. FIG. 11H illustrates a mobile phone among mobile terminals, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. Including. The display portion 2703 includes a light-emitting element or a liquid crystal element, and is formed so as to have a crystalline semiconductor film in which crystal grains are aligned in a lattice shape by laser annealing using a pulse laser. The TFT has a TFT formed so that the formation region has only one crystal grain. Note that the display portion 2703 includes a pixel portion and a driver circuit portion.

    The above electronic device can include a thin film transistor having a crystalline semiconductor film having crystal grains arranged in a lattice pattern, particularly a thin film transistor in which a channel formation region has only one crystal grain. By forming the thin film transistor so that one crystal grain exists in the channel formation region, adverse effects at the crystal grain boundary can be reduced or eliminated. As a result, a thin film transistor with uniform electrical characteristics and higher mobility can be manufactured.

  This embodiment mode can be freely combined with the above embodiment modes.

Example 1
In this embodiment, crystal grains included in a crystalline semiconductor film formed according to the present invention will be described.

FIG. 6A shows an SEM photograph of a crystalline silicon film in which ridges are aligned. The laser used was an excimer laser with an energy density of 400 mJ / cm ² and 25 shots. Note that in FIG. 6A, the pulsed laser beam processed into a linear shape was irradiated to the semiconductor film without being moved.

Further, the surface of the crystalline semiconductor film was prepared by using a seco liquid (HF: H ₂ O = 2: 1, commonly known as K ₂ Cr ₂ O ₇ as an additive, in order to reveal the grain boundary. Etching (seco-etching) with chemicals.

  In this example, 2.2 g of potassium dichromate was dissolved in 50 cc of water to prepare a 0.15 mol / l solution, and 100 cc of an aqueous hydrofluoric acid solution was added to the solution, which was further diluted 5 times with water. The thing was used as a seco liquid. Further, the conditions for the secco etching were 25 seconds at room temperature (10 to 30 ° C.).

  From FIG. 6A, it can be seen that the ridges (white spots) are generally arranged in a lattice pattern. Furthermore, it can be seen that the ridges are generally aligned at 300 nm intervals that are approximately equal to the wavelength of the excimer laser.

  FIG. 6B schematically shows the ridge 200 and the crystal grains 201 in the circled region of the SEM photograph. In the case of forming a thin film transistor from a crystalline silicon film, an island-shaped crystalline semiconductor film 202 is formed so that a channel formation region is provided in one crystal grain as illustrated in FIG. That is, the gate electrode 204 is preferably formed so that the channel formation region 203 includes one crystal grain 201. Then, it is preferable to form the island-shaped crystalline semiconductor film 202 so that the direction in which the current flows and the alignment direction of the ridges are aligned, that is, in parallel.

(Example 2)
In this embodiment, the principle of forming the ridges in alignment will be described with reference to FIG.

  FIG. 7A shows a silicon film before irradiation with pulsed laser light.

  As shown in FIG. 7B, a ridge is formed when one shot of the pulse laser is irradiated. At this time, in the case of a silicon film heated by forming a metal element that promotes crystallization, a ridge is formed at a position where crystal grains grown from nuclei formed at the time of the heat treatment finally hit. In addition, when heat treatment using a metal element is not performed, ridges are formed at random positions.

  As shown in FIG. 7C, in the second shot of the pulse laser, the surface of the silicon film has irregularities due to ridges, which increases the scattered light or reflected light (diffuse reflected light together) during laser irradiation. The incident light and the irregularly reflected light interfere with each other.

  Then, as shown in FIG. 7D, when the third and subsequent shots of the pulse laser are viewed, the place where the laser is strengthened by interference is finally crystallized because the temperature is high. Therefore, a new ridge is formed in the strengthened place. Thereafter, when the laser is irradiated, the ridge becomes a new scattering source, and interference occurs in another place.

  Such interference is considered to occur in all ridges, and the number of ridges increases. However, since the scattering intensity of the ridge with a higher height is larger, if there are two ridges within the distance of the pulse laser wavelength (for example, about 300 nm for an excimer laser), the number of shots is higher with the ridge. The ridge that grows with the low height is lost when it melts.

  Therefore, even if the ridges are randomly arranged at the beginning, the high ridges remain regularly aligned as the number of shots of the pulse laser increases. Furthermore, when the ridges are aligned to a certain extent, the temperature distribution becomes more prominent and the alignment of the ridges is promoted.

  As described above, it is considered that ridges arranged in a lattice shape are formed. That is, crystal grains arranged in a lattice form are formed.

FIG. 10 is a cross-sectional view illustrating a method for manufacturing a thin film transistor of the present invention. FIG. 10 is a cross-sectional view illustrating a method for manufacturing a thin film transistor of the present invention. FIG. 10 is a cross-sectional view illustrating a method for manufacturing a thin film transistor of the present invention. FIG. 10 is a cross-sectional view illustrating a method for manufacturing a thin film transistor of the present invention. It is a figure which shows the active matrix substrate of this invention. It is a SEM photograph which shows the crystalline semiconductor film of this invention. It is a figure which showed the preparation principles of the crystalline semiconductor film of this invention. FIG. 10 is a cross-sectional view illustrating a method for manufacturing a thin film transistor of the present invention. It is a figure which shows the light-emitting device of this invention. It is a figure which shows the liquid crystal display device of this invention. It is a figure which shows the electronic device of this invention.

Claims (15)

A first crystalline semiconductor film and a second crystalline semiconductor film;
Since the first crystalline semiconductor film is irradiated with the pulse oscillation type laser beam, the first crystalline semiconductor film has a plurality of ridges arranged in a lattice shape, and crystal grains formed between the plurality of ridges,
The second crystalline semiconductor film does not have the ridge because it is not irradiated with the pulsed laser beam,
A semiconductor device characterized in that the first crystalline semiconductor film is used for a thin film transistor and the second crystalline semiconductor film is used for a capacitor element. A first crystalline semiconductor film and a second crystalline semiconductor film;
Wherein the first crystalline semiconductor film has a laser beam of pulse oscillation type is irradiated, a plurality of ridges aligned in a lattice shape, and the crystal grain formed between said plurality of ridges,
The second crystalline semiconductor film is not irradiated with the pulsed laser beam, does not have a ridge,
A semiconductor device in which the first crystalline semiconductor film is used for a thin film transistor and the second crystalline semiconductor film is used for a capacitor element,
Chi Yaneru formation region before Symbol thin film transistor, wherein a provided between the ridges adjacent. A first crystalline semiconductor film and a second crystalline semiconductor film;
Wherein the first crystalline semiconductor film has a laser beam of pulse oscillation type is irradiated, a plurality of ridges aligned in a lattice shape, and the crystal grain formed between said plurality of ridges,
The second crystalline semiconductor film is not irradiated with the pulsed laser beam, does not have a ridge,
A semiconductor device in which the first crystalline semiconductor film is used for a thin film transistor and the second crystalline semiconductor film is used for a capacitor element,
Chi Yaneru formation region before Symbol thin film transistor, wherein a no crystalline grain boundaries. A first crystalline semiconductor film and a second crystalline semiconductor film;
Wherein the first crystalline semiconductor film has a laser beam of pulse oscillation type is irradiated, a plurality of ridges aligned in a lattice shape, and the crystal grain formed between said plurality of ridges,
The second crystalline semiconductor film is not irradiated with the pulsed laser beam, does not have a ridge,
A semiconductor device in which the first crystalline semiconductor film is used for a thin film transistor and the second crystalline semiconductor film is used for a capacitor element,
Chi Yaneru formation region before Symbol thin film transistor, a semiconductor device characterized by having one of the crystalline grains only. In any one of Claims 1 thru | or 4 ,
The semiconductor device is characterized in that the size of the crystal grains of the first crystalline semiconductor film is approximately the same as the oscillation wavelength of the pulsed laser beam . Irradiating a pulsed laser beam to form a first crystalline semiconductor film, and forming a second crystalline semiconductor film without irradiating the pulsed laser beam;
A method for manufacturing a semiconductor device, wherein the first crystalline semiconductor film is patterned to form a thin film transistor, and the second crystalline semiconductor film is patterned to form a capacitor element,
By irradiating the pulsed laser beam, the first crystalline semiconductor film is formed with a plurality of ridges arranged in a lattice and crystal grains formed between the plurality of ridges,
A ridge is not formed in the second crystalline semiconductor film because the pulsed laser beam was not irradiated.
A method for manufacturing a semiconductor device. Adding a metal element that promotes crystallization to the amorphous semiconductor film,
Crystallizing the semiconductor film by heating the amorphous semiconductor film,
A first crystalline semiconductor film is formed by irradiating the crystallized semiconductor film with a pulsed laser beam, and a second crystalline semiconductor film is formed without irradiating the pulsed laser beam. And
A method for manufacturing a semiconductor device, wherein the first crystalline semiconductor film is patterned to form a thin film transistor, and the second crystalline semiconductor film is patterned to form a capacitor element,
By irradiating the pulsed laser beam, the first crystalline semiconductor film is formed with a plurality of ridges arranged in a lattice and crystal grains formed between the plurality of ridges,
A ridge is not formed in the second crystalline semiconductor film because the pulsed laser beam was not irradiated.
A method for manufacturing a semiconductor device. Applying plasma treatment to the amorphous semiconductor film,
Adding a metal element that promotes crystallization to the amorphous semiconductor film;
The semi-conductor film is crystallized by heating the amorphous semiconductor film,
A first crystalline semiconductor film is formed by irradiating the crystallized semiconductor film with a pulsed laser beam, and a second crystalline semiconductor film is formed without irradiating the pulsed laser beam. And
A method for manufacturing a semiconductor device, wherein the first crystalline semiconductor film is patterned to form a thin film transistor, and the second crystalline semiconductor film is patterned to form a capacitor element,
By irradiating the pulsed laser beam, the first crystalline semiconductor film is formed with a plurality of ridges arranged in a lattice and crystal grains formed between the plurality of ridges,
A ridge is not formed in the second crystalline semiconductor film because the pulsed laser beam was not irradiated.
A method for manufacturing a semiconductor device. In claim 8 ,
A semiconductor characterized in that the plasma treatment is performed by exposing the amorphous semiconductor film to an atmosphere in which a gas mainly composed of one or more kinds selected from a rare gas element, nitrogen and ammonia is made into plasma. Device fabrication method. In any one of Claims 6 thru | or 9,
The first crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor has one crystal grain.
A method for manufacturing a semiconductor device. In any one of Claims 6 thru | or 9,
The first crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor does not have a grain boundary of the crystal grains.
A method for manufacturing a semiconductor device. In any one of Claims 6 thru | or 9,
Patterning the first crystalline semiconductor film so that a channel formation region of the thin film transistor is provided between the adjacent ridges;
A method for manufacturing a semiconductor device. In any one of Claims 6 thru | or 12 ,
Forming a conductive film on a channel formation region of the thin film transistor ;
An organic material is applied on the conductive film,
Forming a mask by exposing the organic material;
A method for manufacturing a semiconductor device , wherein a gate electrode is formed between adjacent ridges by etching the conductive film using the mask. In any one of claims 7 to 13, the metal element for promoting the crystallization, a method for manufacturing a semiconductor device which is a Ni. In any one of claims 7 to 14, a semiconductor, wherein a spin coating method, a dipping method, an ion implantation method, or a metal element which promotes crystallization on the amorphous semiconductor film by a sputtering method to added pressure Device fabrication method.