JP2005064486A5 - - Google Patents
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- JP2005064486A5 JP2005064486A5 JP2004215678A JP2004215678A JP2005064486A5 JP 2005064486 A5 JP2005064486 A5 JP 2005064486A5 JP 2004215678 A JP2004215678 A JP 2004215678A JP 2004215678 A JP2004215678 A JP 2004215678A JP 2005064486 A5 JP2005064486 A5 JP 2005064486A5
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- Prior art keywords
- semiconductor film
- thin film
- film transistor
- crystalline semiconductor
- ridges
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Claims (15)
前記薄膜トランジスタのチャネル形成領域は、隣接する前記リッジ間に設けられる
ことを特徴とする薄膜トランジスタ。 A thin film transistor having a plurality of ridges arranged in a lattice by irradiating a semiconductor film with pulsed laser light and a crystalline semiconductor film having crystal grains formed between the plurality of ridges ,
A thin film transistor, wherein a channel formation region of the thin film transistor is provided between adjacent ridges.
前記薄膜トランジスタのチャネル形成領域は、結晶粒界を有さない
ことを特徴とする薄膜トランジスタ。 A thin film transistor having a plurality of ridges arranged in a lattice by irradiating a semiconductor film with pulsed laser light and a crystalline semiconductor film having crystal grains formed between the plurality of ridges ,
The channel formation region of the thin film transistor does not have a crystal grain boundary.
前記薄膜トランジスタのチャネル形成領域は、一つの前記結晶粒のみ有する
ことを特徴とする薄膜トランジスタ。 A thin film transistor having a plurality of ridges arranged in a lattice by irradiating a semiconductor film with pulsed laser light and a crystalline semiconductor film having crystal grains formed between the plurality of ridges ,
The channel formation region of the thin film transistor includes only one of the crystal grains.
前記ゲート電極は隣接する前記リッジ間に設けられている
ことを特徴とする薄膜トランジスタ。 By irradiating the semiconductor film with a pulsed laser beam , a crystalline semiconductor film having a plurality of ridges arranged in a lattice and crystal grains formed between the plurality of ridges , and the crystalline semiconductor film a thin film transistor having a gate electrode provided,
The thin film transistor, wherein the gate electrode is provided between the adjacent ridges.
前記ゲート電極は一つの前記結晶粒上に設けられている
ことを特徴とする薄膜トランジスタ。 By irradiating the semiconductor film with a pulsed laser beam , a crystalline semiconductor film having a plurality of ridges arranged in a lattice and crystal grains formed between the plurality of ridges , and the crystalline semiconductor film a thin film transistor having a gate electrode provided,
The thin film transistor, wherein the gate electrode is provided on one of the crystal grains.
前記レーザの発振波長と同程度の間隔である
ことを特徴とする薄膜トランジスタ。 The crystal grain size of the crystalline semiconductor film according to any one of claims 1 to 5 ,
Thin film transistor, wherein <br/> said is comparable intervals and the oscillation wavelength of the record over THE.
前記結晶性半導体膜をパターニングする薄膜トランジスタの作製方法であって、
前記薄膜トランジスタのチャネル形成領域が前記結晶粒を一つ有するように、前記結晶性半導体膜をパターニングする
ことを特徴とする薄膜トランジスタの作製方法。 By irradiating the semiconductor film with a pulsed laser beam, a plurality of ridges arranged in a lattice pattern and crystal grains formed between the plurality of ridges are spaced at intervals similar to the oscillation wavelength of the laser beam. Forming an aligned crystalline semiconductor film;
A method of manufacturing a thin film transistor for patterning the crystalline semiconductor film,
A method for manufacturing a thin film transistor, wherein the crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor has one crystal grain.
前記結晶性半導体膜をパターニングする薄膜トランジスタの作製方法であって、
前記薄膜トランジスタのチャネル形成領域が前記結晶粒の粒界を有さないように、前記結晶性半導体膜をパターニングする
ことを特徴とする薄膜トランジスタの作製方法。 By irradiating the semiconductor film with a pulsed laser beam, a plurality of ridges arranged in a lattice pattern and crystal grains formed between the plurality of ridges are spaced at intervals similar to the oscillation wavelength of the laser beam. Forming an aligned crystalline semiconductor film;
A method of manufacturing a thin film transistor for patterning the crystalline semiconductor film,
A method for manufacturing a thin film transistor, wherein the crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor does not have a grain boundary of the crystal grains.
前記非晶質半導体膜に結晶化を促進する金属元素を添加し、
前記非晶質半導体膜を加熱することにより結晶性半導体膜を形成し、
前記結晶性半導体膜にパルス発振型のレーザ光を照射することにより、格子状に整列した複数のリッジ、及び前記複数のリッジ間に形成された結晶粒を、前記レーザ光の発振波長と同程度の間隔で整列するように形成し、
前記結晶性半導体膜をパターニングする薄膜トランジスタの作製方法であって、
前記薄膜トランジスタのチャネル形成領域が前記結晶粒を一つ有するように、前記結晶性半導体膜をパターニングする
ことを特徴とする薄膜トランジスタの作製方法。 Applying plasma treatment to the amorphous semiconductor film,
Adding a metal element that promotes crystallization to the amorphous semiconductor film;
A crystalline semiconductor film is formed by heating the amorphous semiconductor film,
By irradiating the crystalline semiconductor film with a pulse oscillation type laser beam, a plurality of ridges arranged in a lattice pattern and crystal grains formed between the plurality of ridges are approximately the same as the oscillation wavelength of the laser beam. Formed to align at intervals of
A method of manufacturing a thin film transistor for patterning the crystalline semiconductor film,
A method for manufacturing a thin film transistor, wherein the crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor has one crystal grain.
前記非晶質半導体膜に結晶化を促進する金属元素を添加し、
前記非晶質半導体膜を加熱することにより結晶性半導体膜を形成し、
前記結晶性半導体膜にパルス発振型のレーザ光を照射することにより、格子状に整列した複数のリッジ、及び前記複数のリッジ間に形成された結晶粒を、前記レーザ光の発振波長と同程度の間隔で整列するように形成し、
前記結晶性半導体膜をパターニングする薄膜トランジスタの作製方法であって、
前記薄膜トランジスタのチャネル形成領域が前記結晶粒の粒界を有さないように、前記結晶性半導体膜をパターニングする
ことを特徴とする薄膜トランジスタの作製方法。 Applying plasma treatment to the amorphous semiconductor film,
Adding a metal element that promotes crystallization to the amorphous semiconductor film;
A crystalline semiconductor film is formed by heating the amorphous semiconductor film,
By irradiating the crystalline semiconductor film with a pulse oscillation type laser beam, a plurality of ridges arranged in a lattice pattern and crystal grains formed between the plurality of ridges are approximately the same as the oscillation wavelength of the laser beam. Formed to align at intervals of
A method of manufacturing a thin film transistor for patterning the crystalline semiconductor film,
A method for manufacturing a thin film transistor, wherein the crystalline semiconductor film is patterned so that a channel formation region of the thin film transistor does not have a grain boundary of the crystal grains.
希ガス元素、窒素およびアンモニアから選ばれた一種または複数種を主成分とする気体をプラズマ化した雰囲気中に、半導体膜を曝すことにより前記プラズマ処理を施す
ことを特徴とする薄膜トランジスタの作製方法。 In claim 9 or 10 ,
A method for manufacturing a thin film transistor, wherein the plasma treatment is performed by exposing a semiconductor film to an atmosphere in which a gas mainly containing one or more kinds selected from a rare gas element, nitrogen, and ammonia is made into plasma.
前記パターニングされた結晶性半導体膜上に導電膜を形成し、
前記導電膜上に有機材料を塗布し、
前記有機材料を露光することによりマスクを形成し、
前記マスクを用いて前記導電膜をエッチングすることによりゲート電極を隣接する前記リッジ間に形成する
ことを特徴とする薄膜トランジスタの作製方法。 In any one of Claims 7 thru | or 11 ,
Forming a conductive film on the patterned crystalline semiconductor film;
An organic material is applied on the conductive film,
Forming a mask by exposing the organic material;
The method for manufacturing a thin film transistor according to claim <br/> be formed between the ridge contacting adjacent the gate electrode by etching the conductive layer using the mask.
前記導電膜をエッチングすることにより形成されたゲート電極の幅は、前記マスクの幅より細い
ことを特徴とする薄膜トランジスタの作製方法。 In claim 12 ,
A method for manufacturing a thin film transistor, wherein a width of a gate electrode formed by etching the conductive film is narrower than a width of the mask.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004215678A JP4624023B2 (en) | 2003-07-31 | 2004-07-23 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003284536 | 2003-07-31 | ||
| JP2004215678A JP4624023B2 (en) | 2003-07-31 | 2004-07-23 | Semiconductor device and manufacturing method thereof |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005064486A JP2005064486A (en) | 2005-03-10 |
| JP2005064486A5 true JP2005064486A5 (en) | 2007-07-12 |
| JP4624023B2 JP4624023B2 (en) | 2011-02-02 |
Family
ID=34380273
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004215678A Expired - Fee Related JP4624023B2 (en) | 2003-07-31 | 2004-07-23 | Semiconductor device and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4624023B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5090690B2 (en) * | 2006-08-28 | 2012-12-05 | 三菱電機株式会社 | Semiconductor thin film manufacturing method, thin film transistor manufacturing method, and semiconductor thin film manufacturing apparatus |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09260285A (en) * | 1996-03-25 | 1997-10-03 | Sharp Corp | Manufacture of semiconductor device |
| JP4038309B2 (en) * | 1999-09-10 | 2008-01-23 | セイコーエプソン株式会社 | Manufacturing method of semiconductor device and manufacturing method of active matrix substrate |
| JP2001127302A (en) * | 1999-10-28 | 2001-05-11 | Hitachi Ltd | Semiconductor thin-film substrate, semiconductor device as well as manufacturing method therefor, and electronic device |
| JP2002151410A (en) * | 2000-08-22 | 2002-05-24 | Sony Corp | Method of manufacturing crystalline semiconductor material and semiconductor device |
| JP4316149B2 (en) * | 2001-02-20 | 2009-08-19 | シャープ株式会社 | Thin film transistor manufacturing method |
| JP2002353141A (en) * | 2001-03-09 | 2002-12-06 | Semiconductor Energy Lab Co Ltd | Method for fabricating semiconductor device |
-
2004
- 2004-07-23 JP JP2004215678A patent/JP4624023B2/en not_active Expired - Fee Related
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