JP4609277B2 - How to charge the boot capacitor - Google Patents

Description

  The present invention relates to a method for charging a boot capacitor, in particular, a high arm control circuit for controlling the operation of a high arm side switching element connected in series to the low arm side switching element, and a boot capacitor for supplying an operating power to the high arm control circuit. In addition, the present invention relates to a boot capacitor charging method in which an inverter provided with a plurality of phases each having a plurality of phases is charged by a power supply circuit.

  In general, an inverter includes a plurality of phases each having a low arm side switching element and a high arm side switching element connected in series to each other via an output line. As a technique for controlling the inverter, there has been a technique using a boot capacitor. The boot capacitor, one end of which is connected to the output line, is charged to obtain a power source for a circuit that generates a high potential with respect to the output line and controls the high arm side switching element (hereinafter referred to as “high arm control circuit”). Is done. This high arm control circuit operates normally with the boot capacitor fully charged.

  However, in the initial stage of inverter control, a large current flows in order to charge the boot capacitor for each phase, so the DC voltage may decrease. In that case, it takes a long time to make all the boot capacitors of each phase fully charged. For this reason, in the initial stage of inverter control, the period during which the high arm control circuit cannot be operated normally is prolonged.

On the other hand, in the method for charging the boot capacitor described in Patent Document 1 below, an idea has been proposed in which charging of each phase is performed exclusively by shifting the timing. According to this, it is possible to charge the boot capacitor while suppressing a decrease in DC voltage during charging.
Japanese Patent Laid-Open No. 2003-61363

  However, the boot capacitor charging method described in Patent Document 1 is a method of sequentially charging the boot capacitors of each phase one by one. For this reason, the boot capacitor that has been charged first is gradually discharged until the boot capacitor of each phase is charged sequentially until the last boot capacitor is charged, It differs from the charging voltage of the boot capacitor. For this reason, the drive voltage of the boot capacitor of each phase varies.

  The present invention has been made in view of the above-described points, and an object of the present invention is to be able to perform charging so as to reduce variations in the driving voltage of the boot capacitor of each phase while suppressing a decrease in DC voltage. The object is to provide a method for charging a boot capacitor.

  A boot capacitor charging method according to a first aspect of the present invention includes a high arm control circuit that controls the operation of a high arm side switching element connected in series to the low arm side switching element, and a boot capacitor that supplies an operating power to the high arm control circuit. And a boot capacitor charging method for charging each boot capacitor of each phase by a power supply circuit, and includes the following three steps. In the first step, in the inverter, the low arm side switching element and the high arm side switching element are repeatedly turned on and off while the high arm side switching element remains off during the pre-charging period. Are charged with a pulse at a predetermined time interval. Here, the precharge period refers to a period before a normal operation period in which normal switching is performed. In the second step, the charging in the first step is performed for each phase of the boot capacitor by switching each time a predetermined number of pulses are supplied. In the third step, the second step is repeated. Note that the charge switching in the first step may be between 1 and 20 pulses, and includes, for example, every 1 to 10 pulses. In addition, naturally the case where charge is switched for every pulse is also included.

  In the conventional charging method in which a plurality of boot capacitors are sequentially charged, the boot capacitor charged in the initial stage is discharged little by little, resulting in variations in the drive voltage of the boot capacitor in each phase.

  On the other hand, in the boot capacitor charging method according to the first aspect of the invention, in the second step, the first step is performed while switching by taking 1 to 20 pulses for one boot capacitor among the plurality of boot capacitors. Charging. Thereby, the fall of DC voltage can be suppressed. The charging in the second step is repeatedly performed in the third step. Thereby, each boot capacitor is charged at an equivalent speed.

  As a result, it is possible to perform charging so as to reduce variations in the drive voltage of the boot capacitor of each phase while suppressing a decrease in the DC voltage.

  Further, when variation in drive voltage between a plurality of boot capacitors can be reduced by the above charging method, driving of a motor or the like can be stabilized by using the charged boot capacitor.

  Note that the boot capacitor is charged in the pre-charging period prior to the normal operation period, as in the conventional charging in the pre-charging period. For this reason, it is possible to easily realize normal operation of the inverter control circuit from the beginning of the normal operation period. Further, during the precharge period, the high arm side switching element is maintained in an off state. For this reason, it becomes possible to charge a boot capacitor, without operating the load of an inverter.

  The boot capacitor charging method according to the second invention is the boot capacitor charging method according to the first invention. In the second step, the time per pulse, the applied voltage, the charge / discharge speed characteristics in the boot capacitor, the required charge voltage Switching is performed according to the number of pulses determined based on at least one of the above. Here, one pulse may be one on time, one on / off combination, or one on / off ratio. .

  Here, the number of pulses to be switched in the second step is determined based on at least one of the time per pulse, the applied voltage, the charge / discharge speed characteristics in the boot capacitor, and the required charge voltage. Therefore, even when the performance of the boot capacitor provided in each phase of the inverter is different, charging corresponding to this can be performed.

  As a result, even if the inverter design is different, charging can be performed so as to reduce the variation in the drive voltage of the boot capacitor of each phase.

  A boot capacitor charging method according to a third invention is the boot capacitor charging method according to the first invention or the second invention, and in the second step, the time per pulse is determined by the applied voltage, the charging current, and the boot capacitor. It is determined based on at least one of charge / discharge speed characteristics, required charging voltage, and the number of pulses required for switching charging in the first step. Here, one pulse may be one on time, one on / off combination, or one on / off ratio. .

  Here, the time per pulse is determined based on at least one of the applied voltage, the charging current, the charge / discharge speed characteristics of the boot capacitor, the required charging voltage, and the number of pulses required for switching the charge in the first step. Yes. Therefore, even when the performance of the boot capacitor provided in each phase of the inverter is different, charging corresponding to this can be performed.

  As a result, even if the inverter design is different, charging can be performed so as to reduce the variation in the drive voltage of the boot capacitor of each phase.

  A boot capacitor charging method according to a fourth invention is the boot capacitor charging method according to any one of the first to third inventions, and in the second step, the boot of each phase is within a range of 1 to 20 pulses. The number of pulses to be assigned differs depending on the capacitor.

  Here, even if the voltage required for the boot capacitor is different, the capacity of each boot capacitor is different, or the characteristics such as the charging speed of each boot capacitor are different, the boot capacitor of each phase It is possible to charge the battery so as to reduce variations in driving voltage.

  A boot capacitor charging method according to a fifth invention is the boot capacitor charging method according to any of the first to fourth inventions, wherein in the charge in the second step, a part of the charge stored in the capacity of the boot capacitor is obtained. Charge.

  Here, in the charge in the second step, 1 to 20 pulses are assigned to one boot capacitor, so that a part of the capacity of the boot capacitor is charged. For this reason, the charging of the other boot capacitor is started at the stage before the charging of one boot capacitor is completed, instead of starting the charging of the other boot capacitor after the charging of one boot capacitor.

  Thereby, the variation in the charging condition of each boot capacitor can be further reduced by charging each boot capacitor little by little.

  A boot capacitor charging method according to a sixth aspect of the present invention is the boot capacitor charging method of any of the first to fifth aspects, wherein the frequency of repeating the second step in the third step is per unit time from the boot capacitor. Determined based on the amount of discharge.

  Here, by determining the frequency of repeating the second step based on the amount of charge discharged from the boot capacitor per unit time, in a stage before the amount of discharge from the previously charged boot capacitor exceeds a predetermined amount, etc. The frequency can be set such that repeated charging in the third step is performed.

  As a result, it is possible not only to reduce the variation in charging of the boot capacitors of a plurality of phases, but also to shorten the time required for charging.

  A boot capacitor charging method according to a seventh aspect of the present invention is the boot capacitor charging method according to any one of the first to sixth aspects, wherein the boot capacitor of each phase has a frequency of repeating the second step during one cycle. The capacitor has a capacity sufficient to hold a voltage obtained by adding the amount of decrease in the voltage across the boot capacitor that is reduced by discharging from the boot capacitor and a predetermined voltage required in the boot capacitor.

  Here, in consideration of the amount discharged at the interval of charging based on the frequency of repeated charging in the third step, the capacity of the sum of the predetermined required voltage and the voltage to be discharged is A secured boot capacitor is sufficient.

  As a result, an increase in the capacity of the boot capacitor can be suppressed.

  In the boot capacitor charging method according to the first aspect of the invention, it is possible to perform charging so as to reduce variations in the drive voltage of the boot capacitor of each phase while suppressing a decrease in the DC voltage.

  In the boot capacitor charging method according to the second aspect of the present invention, even when the inverter design is different, charging can be performed so as to reduce variations in the drive voltage of the boot capacitor of each phase.

  In the boot capacitor charging method according to the third aspect of the present invention, even when the inverter design is different, charging can be performed so as to reduce variations in the drive voltage of the boot capacitor of each phase.

  In the boot capacitor charging method according to the fourth aspect of the invention, the voltage required for the boot capacitor is different, the capacity of each boot capacitor is different, or the characteristics such as the charging speed of each boot capacitor are different. However, it is possible to perform charging so as to reduce the variation in the driving voltage of the boot capacitor of each phase.

  In the boot capacitor charging method according to the fifth aspect of the present invention, variation in the charging status of each boot capacitor can be further reduced by charging each boot capacitor little by little while switching.

  In the boot capacitor charging method according to the sixth aspect of the invention, it is possible not only to reduce the variation in charging of the boot capacitors of a plurality of phases, but also to shorten the time required for charging.

  In the boot capacitor charging method according to the seventh aspect of the present invention, it is possible to suppress an increase in the capacity of the boot capacitor.

<Circuit configuration>
FIG. 1 is a circuit diagram illustrating the configuration of an apparatus that drives a load using inverter control. Hereinafter, a circuit diagram in which an embodiment of the present invention is adopted and a method for charging a boot capacitor will be described using the configuration as an example.

  The diode bridge 2 full-wave rectifies the AC power supply 1 and outputs a DC voltage between its high potential end (indicated by “+” in FIG. 1) and low potential end (indicated by “−” in FIG. 1). To do. Intelligent power circuits 5U, 5V, and 5W are connected in parallel between the high potential end and the low potential end of the diode bridge 2.

  The intelligent power circuits 5U, 5V, 5W have output lines 7U, 7V, 7W, respectively, which are connected to a three-phase load 6. Here, the intelligent power circuits 5U, 5V, and 5W operate corresponding to the U phase, the V phase, and the W phase, respectively. In addition, as the load 6 here, the fan motor for air conditioning apparatuses is mentioned as an example, and is demonstrated.

  The boot capacitor charging method according to the present embodiment is applied to each of the intelligent power circuit 5U, the intelligent power circuit 5V, and the intelligent power circuit 5W. Here, the boot capacitor 32 of the intelligent power circuit 5U will be mainly described, but the same applies to the intelligent power circuit 5V and the intelligent power circuit 5W, each having a boot capacitor. The intelligent power circuits 5U, 5V, and 5W here may be modularized as intelligent power devices, for example.

  In FIG. 1, the inside of the intelligent power circuit 5U is disclosed.

  The intelligent power circuit 5U mainly includes an inverter 4U and an inverter control circuit 3U that controls the operation of the inverter 4U.

  The inverter 4U includes an insulated gate bipolar transistor (hereinafter simply referred to as “transistor”) 41 as a low arm side switching element, an NPN transistor 42 as a high arm side switching element, free wheel diodes 43 and 44, have. Here, the collector of the transistor 41 is connected to the cathode of the freewheel diode 43. The emitter of the transistor 41 is connected to the anode of the freewheel diode 43. The collector of the transistor 42 and the cathode of the freewheel diode 44 are connected. Further, the emitter of the transistor 42 and the anode of the freewheel diode 44 are connected. The transistors 41 and 42 are connected in series between the high potential end and the low potential end of the diode bridge 2 via the output line 7U. More specifically, the collector of the transistor 41 and the emitter of the transistor 42 are commonly connected to the output line 7U. In the transistors 41 and 42, a current flows from the collector side to the emitter side.

  The inverter control circuit 3U is supplied with a DC voltage V1 and a DC current I1 from a control power supply circuit 30 and a smoothing capacitor 31 connected in parallel thereto. The control power supply circuit 30 has a high potential end (indicated by “+” in FIG. 1) and a low potential end (indicated by “−” in FIG. 1). Although not shown, the high potential end and the low potential end of the control power supply circuit 30 are similarly connected to the inverter control circuit provided corresponding to the inverter control circuit 3U in the intelligent power circuits 5V and 5W. ing.

  The inverter control circuit 3U includes a high arm control circuit 33, a boot capacitor 32 that supplies an operating power for the high arm control circuit 33, and a low arm control circuit 34. The high arm control circuit 33 gives a control signal to the gate of the transistor 42. Note that the low arm control circuit 34 gives a control signal to the gate of the transistor 41, but the operation power supply is omitted in the present invention because it is not related in the present invention.

  One end of the boot capacitor 32 is connected to the output line 7U, and the other end is connected to the high potential end of the control power supply circuit 30 through a series connection of the boot resistor 36 and the diode 35. The anode and cathode of the diode 35 are connected to the high potential end side and the boot capacitor 32 side of the control power supply circuit 30, respectively.

  The above configuration is the same for the boot capacitor of the intelligent power circuit 5V and the boot capacitor of the intelligent power circuit 5W.

  In the circuit described above, a current detection circuit of an overcurrent protection circuit (not shown) is provided between the control power supply circuit 30 and the transistor 41, for example. The overcurrent protection circuit protects the switching element so that the switching element of the inverter is not destroyed even if the motor load current of the inverter becomes excessive.

<Charging the boot capacitor>
In the configuration described above, the emitter of the transistor 42 is connected to the output line 7U, and the voltage at the high potential end of the diode bridge 2 is transmitted to the output line 7U by the transistor 42. For this reason, as a control signal to be given to the base of the transistor 42, it is necessary to give a voltage higher than the voltage at the high potential end of the diode bridge 2. Therefore, the boot capacitor 32 is charged using the control power supply circuit 30 in order to supply the high arm control circuit 33 with a high potential relative to the potential of the output line 7U.

  Here, in the inverter 4U, the precharge period is provided before the normal operation period in which the transistors 41 and 42 drive the load 6. As the load 6 here, for example, when the load is a motor as described above, switching for rotation (referred to as “normal switching” in the present invention) and the like are mentioned. During this pre-charging period, the transistor 42 is maintained in the off state, and the boot capacitor 32 is charged by the control power supply circuit 30 via the transistor 41. The same applies to the charging of the boot capacitor of the intelligent power circuit 5V and the boot capacitor of the intelligent power circuit 5W. As will be described later, the boot capacitor 32 of the intelligent power circuit 5U and the boot capacitor of the intelligent power circuit 5V. And the boot capacitor of the intelligent power circuit 5W is charged little by little by switching one pulse at a time. Here, the boot capacitor 32 of the intelligent power circuit 5U has at least a capacity obtained by adding the discharge amount of the boot capacitor 32 during one pulse (pulse interval) and a predetermined voltage required in the boot capacitor 32. Have. The same applies to the boot capacitor of the intelligent power circuit 5V and the boot capacitor of the intelligent power circuit 5W.

  The transistor 42 remains off unless the high arm control circuit 33 operates normally. On the other hand, since the emitter of the transistor 41 is connected to the low potential end of the diode bridge 2, it is not necessary to use a boot capacitor in order to operate the low arm control circuit 34. Therefore, in the precharge period, switching of the transistor 41 can be arbitrarily controlled from the initial stage. That is, in the precharge period, the above-described charging can be performed in a state where the high arm control circuit 33 does not operate normally.

(About charging one boot capacitor)
FIG. 2 is a graph illustrating the switching timing of the transistors 41 and 42 in the charging method focusing only on the boot capacitor 32 of the intelligent power circuit 5U. The relationship between the boot capacitor of the other intelligent power circuit 5V and the boot capacitor of the intelligent power circuit 5W will be described later. Here, charging is performed by repeating the pre-charging period, the pause period, and the normal operation period.

In the precharge period, the transistor 42 remains off, while the transistor 41 repeats on / off. Here, charging is performed as “P ₁ , P ₂ ... P _n ” (described later) by a pulse signal having a predetermined time interval. The control power supply circuit 30 supplies current to the boot capacitor 32 during the _ON period T _ON in which the transistor 41 is in the ON state. As a result, the boot capacitor 32 can be charged while keeping the current flowing from the control power supply circuit 30 low, and it is difficult to place a burden on the control power supply circuit 30. In addition, the transistor 41 is hardly destroyed.

  In the normal operation period, normal switching for driving the load 6 is performed. Here, as shown in FIG. 2, a pause period is provided between the precharge period and the normal operation period. This is because when the precharge period ends and the transistor 41 is turned on and the transistor 42 is turned on at the beginning of the normal operation period, a margin (rest period) is not taken between both periods. This is because a large current flows through the inverter 4U and may be destroyed.

(Specific mode of charging one boot capacitor)
Further, in order to prevent a large amount of current from flowing through the inverter 4U and being destroyed, a technique for protecting the inverter 4U when the load 6 is short-circuited may be employed. Here, the ON period T _ON is set longer than the minimum time Twmin necessary for detecting a short circuit of the load 6. As a result, even if the boot capacitor 32 may be charged while the load 6 is short-circuited, the inverter 4U can be protected.

Further, when the boot capacitor 32 is charged while the load 6 is being driven, it is necessary to protect the inverter 4U from an overcurrent that may be caused by the line induced electromotive voltage of the load 6. This line induced electromotive voltage can be generated between the output lines 7U and 7W, for example. When the transistor 41 of the inverter 4U is in the on state, an overcurrent is generated in the transistor 41 via the free wheel diode corresponding to the free wheel diode 43 and included in the intelligent power circuit 5W. There is. In order to cope with such a situation, here, the inductance L of the load 6, the output allowable current value I _{L of} the transistor 41, and the line induced electromotive voltage V2 are introduced to satisfy the following expression. ing.

  When the transistor 41 is turned on, the boot capacitor 32 and the boot resistor 36 are connected in series between the high potential end and the low potential end of the control power supply circuit 30. Thereby, the boot capacitor 32 is charged with the product R1 · C2 of the capacitance value C2 and the resistance value R1 of the boot resistor 36 as a time constant τ ′.

  When the discharge of the boot capacitor 32 when the transistor 41 is in the off state during the precharge period output from the control power supply circuit 30 is ignored, the voltage Vb across the boot capacitor 32 is calculated by the following equation.

However, T 'is the integration time from the start of the precharge period of the _ON period T _ON , and e is the base of the natural logarithm.

  The minimum time Vbm of the voltage to be charged in the boot capacitor 32 is introduced, and the integration time T ′ is calculated by the following equation. Here, ln (x) represents the natural logarithm of x.

When charging the boot capacitor 32, the maximum value of the current that can flow through the boot capacitor 32 is V1 / R1. On the other hand, the magnitude of the direct current I1 output from the control power supply circuit 30 has a maximum value I1M which is an upper limit. If the maximum value I1M is smaller than V1 / R1, it is necessary to determine a period during which the transistor 42 is turned off in the precharge period. In other words, it is necessary to determine the duty D of the _ON period T _ON of the transistor 42.

This is because a large current load is applied to the control power supply circuit 30 and a sufficient current cannot be obtained from the control power supply circuit 30 in the _ON period T _ON , or the output voltage V1 may decrease. Here, the duty D is calculated by the following equation.

  Therefore, the length T of the precharge period is calculated by the following formula.

  It can also be expressed as in the following equation from equations (2) to (5).

  That is, the product τ ′ · (V1 / R1) of the value obtained by dividing the output voltage V1 of the control power supply circuit 30 by the resistance value R1 of the boot resistor 36, the resistance value R1 of the boot resistor, and the capacitance value C2 of the boot capacitor 32 ) Is divided by the maximum output possible current I1M of the control power circuit 30 as an effective charging time constant τ.

The ratio (Vbm / V1) of the minimum value Vbm of the voltage Vb to be charged to the boot capacitor 32 to the output voltage V1 of the control power supply circuit 30 is subtracted from 1 to obtain a value (1-Vbm / V1). The natural logarithm of the reciprocal (1-Vbm / V1) ⁻¹ is multiplied by an effective charging time constant τ to obtain the length T of the precharging period.

(Switching charging of each boot capacitor)
The above-described operation of the transistors 41 and 42 in the intelligent power circuit 5U is the same in the other intelligent power circuits 5V and 5W.

  However, with respect to the boot capacitor 32 of the intelligent power circuit 5U, the boot capacitor of the intelligent power circuit 5V, and the boot capacitor of the intelligent power circuit 5W, the charging timing during the pre-charging period is exclusively switched. This is based on the following two reasons. First, as described above, the control power supply circuit 30 is connected not only to the intelligent power circuit 5U but also to the intelligent power circuits 5V and 5W, and supplies charging current to the boot capacitors provided therein. This is because it is necessary to suppress the direct current I1 output from the control power supply circuit 30 and avoid the decrease in the output direct current voltage V1. Second, the transistor 41 is turned on again in a short period before the charging voltage is greatly reduced by the discharge from the boot capacitor of each intelligent power circuit, and the charging current is supplied from the control power supply circuit 30 to the boot capacitor 32. This is because it is necessary to suppress the amount of discharge by supplying.

Specifically, the charging of the boot capacitor of each intelligent power circuit during the pre-charging period is performed as shown in FIG. 3 in the boot capacitor 32 of the intelligent power circuit 5U, the boot capacitor of the intelligent power circuit 5V, and the intelligent power circuit 5W. The current supply is switched one pulse at a time to the boot capacitor. FIG. 3 is a graph illustrating the switching timing of the low arm side switching element and the high arm side switching element in the intelligent power circuits 5U, 5V, and 5W. Here, as described above, the method of charging the boot capacitors in the intelligent power circuits 5U, 5V, 5W little by little while switching the charging voltage of each boot capacitor while maintaining the equal state. Adopted. Here, “P ₁ , P ₂ , P ₃ ... P _n ” shown in FIG. 3 corresponds to “P ₁ , P ₂ ... P _n ” shown in FIG. Here, the low arm side switching element and the high arm side switching element of the intelligent power circuit 5U correspond to the transistors 41 and 42, respectively.

  With such a charging method, it is possible to complete the charging of the boot capacitor provided for each of the boot capacitors of the intelligent power circuits 5U, 5V, and 5W before the normal operation period while avoiding a decrease in the DC voltage V1. it can. It is to be noted that the normal operation period is set for a while after the boot capacitors of the intelligent power circuits 5U, 5V, and 5W are charged for a while.

<Characteristics of Boot Capacitor Charging Method in Present Embodiment>
(1)
In the conventional boot capacitor charging method, as shown in FIG. 5, the boot capacitors of the intelligent power circuits 5U, 5V, and 5W are charged in synchronization with each other. In the charging method with such synchronization, the direct current voltage may decrease due to a large current flowing. For this reason, in order to fully charge all the boot capacitors, the time required becomes long, and the period during which the high arm control circuit cannot be normally operated is prolonged in the initial stage of inverter control.

  Here, in order not to decrease the DC voltage V1 output from the control power supply circuit 30 when charging the boot capacitor 32, it is conceivable to increase the resistance value R1 of the boot resistor 36 shown in FIG. However, in that case, the time constant for charging the boot capacitor 32 becomes large, and the time required to finish charging the boot capacitor 32 with the voltage necessary for normal operation becomes long. Further, when the capacitance value C1 of the smoothing capacitor 31 is increased, there is a problem that the fluctuation of the DC voltage V1 is increased and the dimension of the smoothing capacitor 31 is increased.

  Therefore, as shown in FIG. 6, a charging method has been proposed in which charging of each boot capacitor of the intelligent power circuits 5U, 5V, and 5W is sequentially completed one by one. According to this charging method, it is possible to suppress a decrease in DC voltage. However, as shown in FIG. 7 which is a graph of the change in the charging voltage of each boot capacitor, when the boot capacitor of the intelligent power circuit 5W charged last is completed, the intelligent power that has been charged first is completed. Since the charging voltage of the boot capacitor of the circuit 5U is lowered due to the discharge in the meantime, the driving voltage of each boot capacitor varies in the final state. For this reason, it becomes difficult to stabilize the supply of power to the load, as shown in FIG.

  On the other hand, in the method for charging the boot capacitor according to the present embodiment, charging is performed while switching the boot capacitors of the intelligent power circuits 5U, 5V, and 5W by supplying charging current for each pulse. Thereby, the fall of DC voltage can be suppressed. A voltage is stored little by little by supplying a charging current during one pulse, and charging is performed by repeatedly performing this. Thereby, each boot capacitor is charged at an equivalent speed. As a result, it is possible to perform charging so as to reduce variations in the drive voltage of each boot capacitor of the intelligent power circuits 5U, 5V, and 5W while suppressing a decrease in DC voltage.

  Specifically, according to the charging method for switching the charging phase for each pulse, as shown in FIG. 4 which is a graph of the change in the charging voltage of each boot capacitor of the intelligent power circuits 5U, 5V, and 5W, The respective charging voltages of the boot capacitor 32 of the power circuit 5U, the boot capacitor of the intelligent power circuit 5V, and the boot capacitor of the intelligent power circuit 5W can be raised while maintaining an equal state. Moreover, in order to switch the boot capacitor to charge for every pulse, each boot capacitor is again supplied with a charging current only by waiting for two pulses. For this reason, each boot capacitor has a short interval at which the charging current is supplied and can suppress a decrease in the charging voltage due to the discharging during that time, so that the previous charging is not wasted. For this reason, the charging voltage of each boot capacitor of the intelligent power circuits 5U, 5V, and 5W can be efficiently increased. As a result, charging can be completed quickly while suppressing variations in the charging voltage of each boot capacitor. This facilitates normal operation of the inverter control circuit 3U and the like from the beginning of the normal operation period.

(2)
In the boot capacitor charging method according to the present embodiment, as the boot capacitor 32 of the intelligent power circuit 5U, a charge voltage discharged from the boot capacitor 32 and displaced in a pulse interval (between two pulses) supplied with the charging current, and the boot A boot capacitor having a capacity obtained by adding a predetermined voltage required for the capacitor 32 is employed. The same applies to the boot capacitor of the intelligent power circuit 5V and the boot capacitor of the intelligent power circuit 5W.

  As a result, in consideration of the amount discharged in one cycle, it is possible to employ a boot capacitor having a minimum capacity that can store more charge than a predetermined required voltage, and increase the capacity of the boot capacitor. It can be set as an inexpensive configuration with suppressed downsizing.

(3)
Since the current supplied to the boot capacitor is small in the method for charging the boot capacitor in the present embodiment, the motor load current is a relatively small value and the difference from the charge current is small for the reasons described below. In particular, this is an effective charging method.

  This is because the inverter is provided with an overcurrent protection circuit. The current detection circuit of the overcurrent protection circuit is provided between the power supply circuit and the low arm side switching element in order to avoid destroying the inverter switching element in a state where the motor load current is excessive. Is provided. Since this overcurrent protection circuit functions effectively with respect to the charging current when the boot capacitor is charged, if the boot capacitor charging current is excessive, the overcurrent protection circuit operates even during charging. It will end up. This is because normal operation may not be possible.

<Other embodiments>
As mentioned above, although one Embodiment of this invention was described, this invention is not limited to the said embodiment, A various change is possible in the range which does not deviate from the summary of invention.

(A)
The method for charging the boot capacitor in the above embodiment has been described by taking as an example a case in which only the point of performing charging by switching for each pulse is clearly shown.

  However, the present invention is not limited to this, and the number of pulses to be switched is not limited to one pulse. For example, the number of pulses to be switched may be determined based on the time per pulse, the applied voltage, the charge / discharge speed characteristics in the boot capacitor, the required charge voltage, and the like. Thereby, even if the performance, capacity, etc. of each boot capacitor of the intelligent power circuits 5U, 5V, 5W of the inverter are different, charging corresponding to this can be performed.

  The time per pulse may be determined based on at least one of the applied voltage, the charging current, the charge / discharge speed characteristics in the boot capacitor, the required charging voltage, and the number of pulses required for switching the charge.

  Note that the number of pulses for switching is a value determined based on one on state time, one on state / off state combination time, or one on state / off state ratio. Also good.

(B)
In the boot capacitor charging method in the above embodiment, the case where charging of each boot capacitor of the intelligent power circuits 5U, 5V, and 5W is switched for each pulse has been described as an example.

  However, the present invention is not limited to this, and the number of pulses to be assigned may be adjusted according to the characteristics of the boot capacitor, for example, every two pulses or every three pulses. Moreover, when the capacity | capacitance of each boot capacitor of intelligent power circuit 5U, 5V, and 5W differs, you may make it make proportional allocation time allocation of charge.

  As a result, even when the required voltage of each boot capacitor is different, the capacity of each boot capacitor is different, or the characteristics such as the charging speed of each boot capacitor are different, the drive voltage of each boot capacitor is different. It is possible to charge the battery so as to reduce the variation.

  Even if it is difficult to switch with one pulse due to the configuration of the device, for example, the effect described above can be obtained when the number of pulses is small, such as switching with one of 1 to 20 pulses. Cheap.

(C)
In the above embodiment, the case where the current supply to the boot capacitor of each intelligent power circuit is switched for each pulse has been described as an example.

  However, the switching in the present invention is not necessarily limited to one pulse. For example, the number of pulses for supplying current may be adjusted based on the discharge amount per unit time of the boot capacitor of each intelligent power circuit. Thereby, when there is much discharge amount, it can respond by charging with more pulses.

  In addition, even when the discharge amount per unit time is different for each boot capacitor of each intelligent power circuit, charging can be performed with less variation by switching by distributing the number of pulses so as to correspond.

(D)
In the above embodiment, a specific circuit as shown in FIG. 1 has been described as an example.

  However, the present invention is not limited to this. For example, the AC power supply 1 may be single-phase or multi-phase.

  Further, the number of intelligent power circuits here may be appropriately increased or decreased according to the number of phases of the load 6.

  In addition, as shown in FIG. 1, the anode of the diode 35 is not connected to the high potential end of the control power supply circuit 30 via the boot resistor 36. For example, the boot resistor 36 and the diode 35 are connected in series. The order of connection may be changed.

(E)
In the above embodiment, the case where the current detection circuit of the overcurrent protection circuit (not shown) is provided between the control power supply circuit 30 and the transistor 41 has been described as an example.

  However, the arrangement of the current detection circuit of the overcurrent protection circuit is not limited to this, and may be provided between the load 6 and the intelligent power circuits 5U, 5V, 5W, for example.

  Here, as in the above embodiment, when the current detection circuit of the overcurrent protection circuit is provided between the control power supply circuit 30 and the transistor 41, the charging current can be detected effectively.

  On the other hand, when the current detection circuit of the overcurrent protection circuit is arranged between the load 6 and the intelligent power circuits 5U, 5V, and 5W, the charging current cannot be protected, but the motor load current can be protected. become.

  According to the present invention, since it becomes possible to charge so as to reduce the variation in the drive voltage of the boot capacitor of each phase, in the inverter provided with a plurality of phases having the boot capacitor serving as the supply source of the operation power supply, Application to a boot capacitor charging method in which each boot capacitor of each phase is charged by a power supply circuit is particularly useful.

1 is a circuit diagram including a boot capacitor in which an embodiment according to the present invention is employed. The graph which shows the charge pulse waveform of only the intelligent power circuit 5U. The graph which shows the charge pulse waveform which switches charging of each boot capacitor of intelligent power circuits 5U, 5V, and 5W for every pulse. The graph which shows the change of the charging voltage of each boot capacitor by this embodiment. The graph which shows the charge pulse waveform which performs charging of each boot capacitor of intelligent power circuits 5U, 5V, and 5W synchronizing mutually. The graph which shows the charge pulse waveform which completes charge of each boot capacitor of intelligent power circuits 5U, 5V, and 5W one by one sequentially. The graph which shows the change of the charging voltage of each boot capacitor of the conventional intelligent power circuit 5U, 5V, 5W. The graph which shows the characteristic difference of the switching element by a drive voltage.

6 Load 30 Control power circuit (power circuit)
32 Boot capacitor 33 Boot resistor 41 Insulated gate type transistor (low arm side switching element)
42 Insulated gate type transistor (high arm side switching element)
3U inverter control circuit 4U inverter

Claims (7)

A high arm control circuit (33) for controlling the operation of the high arm side switching element (42) connected in series to the low arm side switching element (41), and a boot for supplying an operating power to the high arm control circuit (33) In an inverter provided with a plurality of phases (5U, 5V, 5W) having a capacitor (32), charging of the boot capacitor (32) for charging each boot capacitor (32) of each phase by a power supply circuit (30) A method,
In the inverter, the high arm side switching element (42) is turned off in a precharge period before a normal operation period in which the low arm side switching element (41) and the high arm side switching element (42) perform normal switching. First, the low arm side switching element (41) is repeatedly turned on and off, so that a pulse with a predetermined time interval is supplied from the power supply circuit (30) to the boot capacitor (32) to be charged. When,
A second step in which the charging in the first step is performed for each of the boot capacitors (32) of each phase by being switched every time a predetermined number of pulses are supplied;
A third step in which the second step is repeated;
A method for charging a boot capacitor (32) comprising: In the second step, switching is performed according to the number of pulses determined based on at least one of time per pulse, applied voltage, charge / discharge speed characteristics in the boot capacitor (32), and required charge voltage.
The method for charging the boot capacitor (32) according to claim 1. In the second step, the time per pulse is at least one of applied voltage, charging current, charge / discharge speed characteristics in the boot capacitor (32), required charging voltage, and the number of pulses required for switching charging in the first step. Or based on one,
The method for charging the boot capacitor (32) according to claim 1 or 2. In the second step, the number of pulses assigned in accordance with the boot capacitor (32) of each phase is changed within the range of 1 to 20 pulses.
The method for charging the boot capacitor (32) according to any one of claims 1 to 3. In charging by the number of pulses in the second step, a part of the electric charge stored in the capacity of the boot capacitor (32) is charged.
The method for charging the boot capacitor (32) according to any one of claims 1 to 4. The frequency of repeating the second step in the third step is determined based on the discharge amount per unit time from the boot capacitor (32).
The method for charging the boot capacitor (32) according to any one of claims 1 to 5. The boot capacitor (32) of each phase is
A decrease amount of the voltage across the boot capacitor (32) that is discharged from the boot capacitor (32) and decreases during one cycle of the frequency of repeating the second step;
A predetermined voltage required in the boot capacitor (32);
Have enough capacity to hold the combined voltage,
The method for charging the boot capacitor (32) according to any one of claims 1 to 6.

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