JP4594554B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a structure of a tunnel insulating film of a nonvolatile semiconductor device and a manufacturing method thereof.
[0002]
[Prior art]
In a nonvolatile semiconductor device such as a flash memory or an EPROM, electrons are injected / released between a substrate and a floating gate through a tunnel insulating film when information is written / erased. At this time, since the tunnel insulating film is stressed by a high electric field, there is a problem in that deterioration of the tunnel insulating film progresses due to repeated writing / erasing of information, and information retention characteristics are lowered.
[0003]
In recent years, there has been an increasing demand for faster device operation as well as improved device reliability and longer life. However, writing and erasing at a high speed accelerates the deterioration of the tunnel insulating film. In addition, it is preferable that the tunnel insulating film is thin in order to increase the speed, but if it is made thin, reliability is lowered. As described above, since there is a trade-off relationship between high speed and reliability, the problem of deterioration of the tunnel insulating film is a major problem not only in terms of device reliability and life but also in improving operating characteristics. It has become.
[0004]
A basic structure of a conventional floating gate type (MIS) transistor used in the flash memory and the EPROM will be described with reference to FIG. Hereinafter, such a technique is referred to as a first conventional technique. As shown in FIG. 9, a tunnel insulating film 103 is formed in the element active region defined by the element isolation insulating film 102 on the surface of the silicon substrate 101. Here, the tunnel insulating film is a silicon oxide film having a thickness of about 10 nm. A floating gate electrode 104 is formed so as to cover part of the tunnel insulating film 103 and the element isolation insulating film 102. Here, the floating gate electrode 104 is formed of a polycrystalline silicon film containing an N-type impurity.
[0005]
Then, an interelectrode insulating film 105 having a silicon oxide film / silicon nitride film / silicon oxide film (ONO) structure is formed on the floating gate electrode 104. Here, the film thickness of the interelectrode insulating film 105 having the ONO structure is set in a range of 10 to 30 nm as a converted film thickness of the silicon oxide film. A control gate electrode 106 is provided on the interelectrode insulating film 105.
[0006]
In the above-described conventional technique, a silicon oxide film is used as the tunnel insulating film 103. However, a structure using an oxynitride film (SiOxNy film) as the tunnel insulating film of the floating gate type transistor described above is disclosed in Japanese Patent Application Laid-Open No. Hei 5- This is proposed in Japanese Patent Laid-Open No. 6-125089. Hereinafter, the technology related to this technology is referred to as a second conventional technology. In the formation of the oxynitride film in this case, nitrous oxide (N₂ O) The surface of the Si-Ge film is oxynitrided in a diffusion furnace using an atmosphere gas.
[0007]
Furthermore, various techniques have been proposed as a method of forming the tunnel insulating film with an oxynitride film. For example, in Japanese Patent Laid-Open No. 7-193059, after a silicon oxide film is formed by pyrogenic oxidation using oxygen gas on a silicon substrate, N 2 is sealed in a sealed resistance heating furnace.₂ And N₂ It is disclosed that a tunnel insulating film having a thickness of about 7.5 nm is formed by flowing O at atmospheric pressure and heating at 1000 ° C. As nitriding gas, N₂ NO, NO besides O₂ It is described that the pressure of the nitriding gas may be reduced below atmospheric pressure. Moreover, about heat processing temperature, performing at 950 degreeC-1050 degreeC is described.
[0008]
Japanese Unexamined Patent Publication No. 9-139437 discloses that a tunnel oxide film is formed as follows. First, after forming a first silicon dioxide layer (thickness 3.5 nm) on a silicon substrate, annealing is performed in an argon atmosphere. Next, a second silicon dioxide layer (thickness 3 nm) is formed under the first silicon dioxide layer, followed by annealing in an argon atmosphere. Then N₂ Nitriding is performed at 800 to 1200 ° C. in an O atmosphere. For example, nitriding is performed at about 950 ° C. for 28 minutes. As a result, a nitrided oxide dielectric layer (tunnel insulating film) having a thickness of 9.5 nm is obtained. Where N₂ It is also described that NO may be used instead of O.
[0009]
[Problems to be solved by the invention]
There is a strong demand for higher performance of nonvolatile semiconductor devices such as flash memory and EPROM. In particular, the number of information write / erase operations described above is 10 times.⁶ It is necessary to do more. The inventor examined in detail the above-described write / erase of the floating gate type transistor and the subsequent characteristic deterioration of the floating gate type transistor.
[0010]
As a result, an electron site (described later) is generated in the tunnel insulating film 103 by writing / erasing to the floating gate transistor, and the forbidden band region and the surface of the floating gate electrode in the band structure on the silicon substrate surface are formed. It was found that interface states are generated in the forbidden band region. This will be described in detail with reference to FIG. FIG. 10A is a band diagram corresponding to the case of erasing information. As shown in the figure, when a negative voltage is applied to the floating gate electrode 104a and an electric field of about 10 MV / cm is formed in the tunnel insulating film 103a, electrons e flow through the tunnel insulating film 103a to the silicon substrate 101a side. This is an FN (Fowler Nordheim) current.
[0011]
The electrons e become hot electrons in the silicon substrate 101a and generate holes h in the silicon substrate 101a. The holes h are trapped near the interface of the tunnel insulating film 103a by the electric field. Then, as shown in FIG. 10A, this hole forms an electron site 107 and an interface state 108. Here, the electron site is a level at which electrons can exist in the tunnel insulating film. The electron site 107 is generated in the tunnel insulating film 103 within a distance of 3 nm from the interface of the silicon substrate 101.
[0012]
FIG. 10B is a band diagram corresponding to the case of writing information. As shown in the figure, when a negative voltage is applied to the silicon substrate 101a side to form an electric field of about 10 MV / cm on the tunnel insulating film 103a, electrons e flow through the tunnel insulating film 103a as FN current to the floating gate electrode 104a side. To do.
[0013]
In this case, the electrons e become hot electrons at the floating gate electrode 104a, and holes h are generated in the floating gate electrode 104a. The holes h are captured in the vicinity of the interface of the tunnel insulating film 103a by the electric field, and form an electron site 109 and an interface state 110 as shown in FIG. Here, the electron site 109 is generated in the tunnel insulating film 103 having a distance of 3 nm from the floating gate electrode 103.
[0014]
In this manner, in the first conventional technique, as the number of write / erase operations described above increases, a large amount of the electronic sites and interface states are generated.
[0015]
For this reason, when information is held in the floating gate electrode 104 of the floating gate type transistor, the holding characteristics are extremely deteriorated. This mechanism will be described with reference to FIG. FIG. 11 is a band diagram corresponding to the case of information retention. As shown in FIG. 11, the electrons e accumulated in the floating gate electrode 104a move to the electron site 109 generated in the tunnel insulating film 103a by the tunnel mechanism, and further move from the electron site 109 to the electron site 107 through the tunnel. To do. Then, it finally flows out to the silicon substrate 101a. Then, the (direct) tunnel of electrons through the electron site becomes a direct tunnel current, which deteriorates the electron retention characteristics. Further, the electron tunnel is also generated through the interface state 108 or 110 described above.
[0016]
In the second prior art, the tunnel insulating film is formed of an oxynitride film. In this case, the above-described generation of electronic sites or increase in interface states is small. However, in this case, the quality of the tunnel insulating film is deteriorated and the insulating property is deteriorated. This is because the silicon oxide film constituting the tunnel insulating film contains nitrogen atoms without control over the entire region. This nitrogen atom becomes a positive fixed charge in the silicon oxide film, and also becomes an electron trap and lowers the insulating property of the silicon oxide film.
[0017]
Accordingly, an object of the present invention is to solve the above-described problems and to easily manufacture a nonvolatile semiconductor device having a high-quality tunnel insulating film having high resistance to writing / erasing.
[0018]
[Means for Solving the Problems]
Therefore, in the semiconductor device of the present invention, a floating gate type transistor having a floating gate provided on a silicon substrate via a tunnel insulating film and a control gate provided on the floating gate via an inter-gate insulating film. InA first oxynitride film is formed on the silicon substrate, a silicon oxide film is formed on the first oxynitride film, a second oxynitride film is formed on the silicon oxide film, and the tunnel insulating film is It is composed of the first oxynitride film, the silicon oxide film, and the second oxynitride film, and the film thickness of the first or second oxynitride film is defined as the film thickness being the half-value width of the maximum nitrogen atom concentration In this case, it is set in the range of 0.5 nm to 3 nm.
[0022]
Alternatively, the method of manufacturing a semiconductor device according to the present invention includes a floating gate having a floating gate provided on a silicon substrate via a tunnel insulating film and a control gate provided on the floating gate via an inter-gate insulating film. A silicon oxide film is formed on the surface of a silicon substrate, followed by a heat treatment in a nitrogen gas atmosphere containing nitrogen oxide to form an oxynitride film between the silicon substrate and the silicon oxide film. FormationFurther, the oxynitride film, the silicon oxide film, and the oxynitride film are stacked in this order by forming a oxynitride film on the surface of the silicon oxide film by performing a heat treatment in a nitrogen radical atmosphere.The tunnel insulating film is formed. Here, the nitriding gas containing nitrogen oxide is NO gas, NO + N₂ Gas, N₂ O gas or N₂ O + N₂ Gas.
[0024]
Here, the heat treatment in a nitrogen gas atmosphere containing nitrogen oxide is preferably performed by lamp heating.
[0025]
According to the present invention, resistance to writing / erasing of a floating gate type transistor constituting a nonvolatile semiconductor device is greatly improved. Then, a nonvolatile semiconductor device having a tunnel insulating film that can exhibit desired element characteristics with high quality can be easily manufactured with a high yield.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Next, a first embodiment of the present invention will be described with reference to FIGS. Here, FIG. 1 and FIG. 2 are sectional views of the basic structure of the floating gate type transistor of the present invention. 3 to 5 are band diagrams and electric characteristic graphs for explaining the effects of the present invention. The present invention is characterized by an oxynitride film (SiOxNy) and a tunnel oxide film (SiO₂ ).
[0027]
As shown in FIG. 1, for example, an element isolation insulating film 2 is formed on the surface of a silicon substrate 1 having a P conductivity type, and a tunnel oxide film 3 is formed in an element active region defined by the element isolation insulating film 2. . Here, the tunnel oxide film 3 is a silicon oxide film (SiO 2 having a film thickness of about 7 nm to 10 nm.₂ ).
[0028]
A first oxynitride film 4 is formed between the tunnel oxide film 3 and the silicon substrate 1. Here, the film thickness of the first oxynitride film 4 is in the range of 0.5 nm to 3 nm. The nitrogen concentration in the first oxynitride film 4 is 5 at. % To 20 at. %. These reasons will be described later.
[0029]
A floating gate electrode 5 is formed so as to cover the tunnel oxide film 3 and a part of the element isolation insulating film 2. Here, the floating gate electrode 5 is formed of a polycrystalline silicon film having a thickness of about 150 nm containing an N-type impurity. An interelectrode insulating film 6 having a silicon oxide film / silicon nitride film / silicon oxide film (ONO) structure is formed on the floating gate electrode 5. Here, the film thickness of the interelectrode insulating film 6 having the ONO structure is set in the range of 10 to 20 nm as the equivalent film thickness of the silicon oxide film. A control gate electrode 7 is provided on the interelectrode insulating film 6.
[0030]
Next, the basic structure of another floating gate type transistor of the present invention will be described with reference to FIG. In this case, an oxynitride film is also formed on the tunnel oxide film 3 in the structure described with reference to FIG. Here, the same components as those in FIG. 1 are denoted by the same reference numerals.
[0031]
As shown in FIG. 2, an element isolation insulating film 2 is formed on the surface of the silicon substrate 1, and a tunnel oxide film 3 is formed in the element active region. Here, the tunnel oxide film 3 is a silicon oxide film (SiO 2 having a film thickness of about 7 nm to 10 nm.₂ ). A first oxynitride film 4 is formed between the tunnel oxide film 3 and the silicon substrate 1. Further, a second oxynitride film 8 is formed on the tunnel oxide film 3. Thereafter, the floating gate electrode 5 is formed on the second oxynitride film 8 in the same manner as described with reference to FIG.
[0032]
Here, the film thicknesses of the first oxynitride film 4 and the second oxynitride film 8 are preferably in the range of 0.5 nm to 3 nm. The nitrogen concentration in the first oxynitride film 4 and the second oxynitride film 8 is 5 at. % To 20 at. %.
[0033]
Next, the effect which arises with the said structure of this invention is demonstrated. FIG. 3A is a band diagram corresponding to the case of erasing information of the floating gate transistor corresponding to FIG. As described with reference to FIG. 10A, when an electric field of about 10 MV / cm is formed in the tunnel oxide film 3a, the electrons e pass through the second oxynitride film 8a, the tunnel oxide film 3a, and the first oxynitride film 4a. And flows into the silicon substrate 1a side. This is the FN current. The electrons e become hot electrons in the silicon substrate 1a and generate holes h in the silicon substrate 1a. However, in the present invention, the hole h hardly forms an electron site in the first oxynitride film. In addition, the generation of interface states of the silicon substrate 1a due to the holes is very small as compared with the prior art.
[0034]
FIG. 3B is a band diagram corresponding to the case of writing information. As shown in the figure, when a negative voltage is applied to the silicon substrate 1a side to form an electric field of about 10 MV / cm on the tunnel oxide film 3a, electrons e are converted into the first oxynitride film, the tunnel oxide film 3a, and the second oxynitride film. It flows as FN current through the floating gate electrode 5a through 8a. Also in this case, the electrons e become hot electrons in the floating gate electrode 5a, and holes h are generated in the floating gate electrode 5a. However, in the present invention, this hole h hardly forms an electron site in the second oxynitride film 8a. Compared to the prior art, the generation of interface states at the interface of the floating gate electrode 5a due to the holes is very small.
[0035]
The first or second oxynitride film of the present invention hardly traps the generated holes. Further, Si—N bonds exist in the oxynitride film. The Si—N bond has a higher bond strength than the Si—O bond. For this reason, the generation of the above-mentioned electronic sites is greatly reduced in the first or second oxynitride film. On the other hand, the tunnel insulating film formed of the silicon oxide film as in the first prior art easily traps holes and easily breaks the Si—O bond. This trapped hole forms an electronic site.
[0036]
As described above, the Si—N bond in the oxynitride film has a higher bond strength than the Si—O bond, and the length of the bond is close to the length of the Si—Si bond. For this reason, structural stress is reduced at the interface with the silicon substrate. The probability that the Si—N bond is broken by the holes is greatly reduced, and the generation amount of the interface state described above is reduced.
[0037]
Here, as described above, the electron site due to the holes h is generated in the tunnel insulating film having a distance of 3 nm from the interface with the silicon substrate or the floating gate electrode. For this reason, when the oxynitride film is formed in this region, the effect of the present invention is produced. In the case of the floating gate type transistor structure corresponding to FIG. 1, the same effect is produced for the above reason.
[0038]
Next, specific effects of the present invention will be described with reference to FIGS. In FIG. 4, 10 is applied to the gate electrode of the MOS transistor structure.⁶ After flowing a stress current corresponding to one writing / erasing, the leakage current between the silicon substrate and the gate electrode of the MOS transistor was measured. Here, as the gate insulating film of the MOS transistor, a silicon oxide film is used in the first conventional technique, and an oxynitride film (SiOxNy film) is used in the second conventional technique. In the present invention, a silicon oxide film (SiO₂ ) / Oxynitride film (SiOxNy (1)) or oxynitride film (SiOxNy (2)) / silicon oxide film (SiO2)₂ ) / Oxynitride film (SiOxNy (1)).
[0039]
The horizontal axis of FIG. 4 represents the thickness of the gate insulating film, and the horizontal axis represents the leakage current in logarithmic form. Here, the electric field applied to the gate insulating film is measured to be constant at 5 MV / cm.
[0040]
As shown in FIG. 4, in the present invention, the leakage current is reduced as compared with the case of the first prior art. The gate insulating film corresponding to the structure shown in FIG.₂ In the / SiOxNy (1) structure, the leakage current value is reduced to about 1/3 of the first prior art and to about 2/3 of the second prior art. The gate insulating film corresponding to the structure shown in FIG. 2 is made of SiOxNy (2) / SiO2.₂ In the / SiOxNy (1) structure, the leakage current value is reduced to 1/5 or less of the prior art. The effect of the present invention is that the concentration of nitrogen atoms in the SiOxNy is 5 at. Appears prominently at%
[0041]
FIG. 5 shows the case where the gate electrode of the MOS transistor structure is 10.⁶ This is an evaluation of the amount of increase in the interface state of the gate insulating film by the charge pumping method after applying a stress current corresponding to one writing / erasing. Here, as the gate insulating film of the MOS transistor, a silicon oxide film is taken in the first prior art, and in the present invention, the above-described SiO 2 film is used.₂ / SiOxNy (1) or SiOxNy (2) / SiO₂ / SiOxNy (1) was used.
[0042]
In this case as well, the horizontal axis of FIG. 5 represents the thickness of the gate insulating film, and the vertical axis represents the amount of increase in the interface state in logarithmic display. As shown in FIG. 5, in the present invention, the amount of increase in the interface state is smaller than in the case of the first prior art. This is SiO₂ / SiOxNy (1) structure and SiOxNy (2) / SiO₂ It does not depend on the / SiOxNy (1) structure. The amount of increase in the interface state is about 1/10 that of the first prior art. That is, 10¹²/ EV · cm^-210¹¹/ EV · cm^-2become. Thus, when the amount of generated interface states is reduced, the threshold value of the floating gate transistor is prevented from being lowered, and the operation characteristics of the nonvolatile semiconductor device are stabilized.
[0043]
Thus, in the present invention, it can be seen that the resistance to writing / erasing of the floating gate type transistor is improved as compared with the prior art. Further, when compared with the second prior art, a high quality tunnel insulating film is obtained.
[0044]
Next, a manufacturing method of the tunnel insulating film of the floating gate type transistor described above as the second embodiment of the present invention will be described. FIG. 6 is a schematic cross-sectional view in the order of the manufacturing process.
[0045]
As shown in FIG. 6A, an element isolation insulating film 2 is formed in a predetermined region on the surface of the silicon substrate 1. Here, the element isolation insulating film 2 is composed of a silicon oxide film. Next, the surface of the silicon substrate 1 in the element active region surrounded by the element isolation insulating film 2 is exposed. Then, a tunnel oxide film 3 having a thickness of about 8 nm is formed by known thermal oxidation.
[0046]
Next, the silicon substrate 1 having the tunnel oxide film 3 is subjected to an oxynitriding process by lamp heating. This lamp heating is excellent in the controllability of forming the nitride region of the tunnel oxide film, and can raise and lower the temperature in a very short time, so that the thermal diffusion change of the impurity profile can be suppressed. By lamp heating, sufficient oxynitridation can be performed in about 30 seconds to 5 minutes.
[0047]
Here, the atmospheric gas in the oxynitriding process is NO, NO + N₂ , N₂ O, N₂ O + N₂ Should be used. The temperature of oxynitridation in these nitriding gas atmospheres is appropriately set according to the type of heat treatment apparatus, the pressure in the system, the partial pressure of nitrogen oxide, and the thickness of the tunnel oxide film to be formed. In order to perform sufficient nitriding within a desired time, the temperature is preferably 850 ° C. or higher, more preferably 900 ° C. or higher, and further preferably 950 ° C. or higher. Further, the upper limit of the heat treatment temperature is preferably 1200 ° C. or less, more preferably 1150 ° C. or less, and further preferably 1100 ° C. or less from the viewpoint of the heat resistance limit of the apparatus and the suppression of thermal diffusion change of the impurity profile. In FIG.6 (b), it carries out at 1050 degreeC. In this case, NO gas is used and the gas pressure is about 2 × 10.^Four Pa.
[0048]
By this oxynitriding process, the surface of the silicon substrate 1 under the tunnel oxide film 3 is oxynitrided, and a first oxynitride film 4 is formed in this region. Here, the film thickness of the first oxynitride film 4 is about 2 nm.
[0049]
Next, the surface of the tunnel oxide film 3 in the state shown in FIG. 6B is exposed to a nitrogen radical atmosphere. Here, the temperature (processing temperature) of the silicon substrate 1 is set to be 200 ° C. to 700 ° C. By this nitrogen radical, the surface of the tunnel oxide film 3 is modified and a second oxynitride film 8 is formed. Here, the processing time is several seconds to 300 seconds. For example, as shown in FIG. 6C, when the processing temperature is 400 ° C., the second oxynitride film 8 having a thickness of less than 2 nm can be formed in a processing time of 180 seconds.
[0050]
Next, control of the first oxynitride film 4 and the second oxynitride film 8 will be described with reference to FIGS. FIG. 7 shows the results of SIMS (secondary ion mass spectrometry) of each tunnel insulating film after the step of FIG. 6 (b) and FIG. 8 shows the steps of FIG. 6 (c).
[0051]
As shown in FIG. 7, the SiOxNy (1) layer is made of SiO.₂ It is formed at the interface between the film and the Si substrate. The maximum nitrogen (N) atom concentration of the SiOxNy (1) layer is 12 at. It can be seen that the full width at half maximum is controlled to 1.42 nm. Also, SIMS measurement revealed that the nitridation reaction progressed around the interface between the silicon substrate and the silicon oxide film, and the degree of nitridation was distributed. In the oxynitriding treatment of the present invention, the tunnel oxide film 3 contains almost no nitrogen (N) (less than at.%).
[0052]
As shown in FIG. 8, the SiO described in FIG.₂ / SiOxNy (1) / SiO of Si substrate structure₂ SiOxNy (2) is formed on the surface. The maximum nitrogen (N) atom concentration of the SiOxNy (2) layer is 8 at. %, And its half-value width is controlled to 1.20 nm. According to this SIMS measurement, a nitriding reaction occurs on the surface of the silicon oxide film, and the N atoms are SiO.₂ It was found that it was distributed only on a part of the surface. Then, nitrogen (N) is hardly contained in the tunnel oxide film 3 (less than at.%).
[0053]
Thus, in the tunnel insulating film manufacturing method of the present invention, the film thickness control of the first oxynitride film 3 and the second oxynitride film 8 becomes very easy. Furthermore, it becomes easy to control the nitrogen concentration in the oxynitride film. By using the insulating film including the oxynitride film formed with high accuracy in this way as the tunnel insulating film of the floating gate type transistor, writing in a nonvolatile semiconductor device such as a flash memory or an EEPROM can be performed. It becomes easy to greatly improve the resistance against erasure. Here, the nitrogen concentration in the oxynitride film is 20 at. If it exceeds 50%, nitrogen (N) also spreads in the silicon oxide film, leading to a decrease in the quality of the tunnel insulating film as in the second prior art. Therefore, in the present invention, the nitrogen concentration in the oxynitride film is 20 at. % Or less.
[0054]
In the above embodiment, the silicon oxide film is mainly shown as the tunnel insulating film. The present invention is not limited to this. In place of the silicon oxide film, a silicate glass serving as a high dielectric constant insulating film may be used. Examples of the silicate glass include metals such as tantalum, titanium, zirconium, hafnium, and the like. There is a silicon oxide film containing in% order. It is also noted that a silicon oxide film containing a small amount (less than at.%) Of nitrogen atoms may be used as the main body of the tunnel insulating film.
[0055]
The present invention is not limited to the above-described embodiment, and the embodiment can be appropriately changed within the scope of the technical idea of the present invention.
[0056]
【The invention's effect】
As described above, in the present invention, a floating gate type transistor having a floating gate provided on a silicon substrate via a tunnel insulating film and a control gate provided on the floating gate via an inter-gate insulating film. Then, an oxynitride film controlled with high accuracy is formed between the silicon substrate and the tunnel insulating film or between the floating gate and the tunnel insulating film. Here, the tunnel insulating film is mainly composed of a silicon oxide film. The nitrogen concentration in the oxynitride film is 5 at. % To 20 at. % Range is set. The film thickness of the oxynitride film is measured in the half-value width of the maximum nitrogen atom concentration and is set in the range of 0.5 nm to 3 nm.
[0057]
In this manner, the resistance to writing / erasing of the floating gate type transistor constituting the nonvolatile semiconductor device is greatly improved. Then, a nonvolatile semiconductor device having a tunnel insulating film that can exhibit desired element characteristics with high quality can be easily manufactured with a high yield. In addition, ultrahigh integration and high density of semiconductor devices are greatly promoted.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a floating gate type transistor for explaining a first embodiment of the present invention.
FIG. 2 is a cross-sectional view of another floating gate type transistor for explaining the first embodiment of the present invention.
FIG. 3 shows a writing for explaining the effect of the present invention. It is a band diagram of the tunnel insulating film region at the time of erasing.
FIG. 4 shows a writing for explaining the effect of the present invention. It is a graph which shows the insulation of the tunnel insulating film after erasing.
FIG. 5 shows a writing for explaining the effect of the present invention. It is a graph which shows the increase in the interface state density after erasing.
FIG. 6 is a schematic cross-sectional view in order of the manufacturing process of a floating gate type transistor for explaining a second embodiment of the present invention;
FIG. 7 is a diagram showing the results of SIMS analysis for explaining the effect of the second embodiment.
FIG. 8 is a diagram showing the results of SIMS analysis for explaining the effect of the second embodiment.
FIG. 9 is a cross-sectional view of a floating gate type transistor for explaining a conventional technique.
FIG. 10 shows a writing for explaining the conventional technique. It is a band diagram of the tunnel insulating film region at the time of erasing.
FIG. 11 is a band diagram of a tunnel insulating film region at the time of holding information for explaining a conventional technique.
[Explanation of symbols]
1, 1a, 101, 101a Silicon substrate
2,102 Element isolation insulating film
3,3a Tunnel oxide film
4,4a First oxynitride film
5, 104, 104a Floating gate electrode
6,105 Interelectrode insulating film
7,106 Control gate electrode
8,8a Second oxynitride film
103, 103a Tunnel insulating film
107,109 Electronic site
108,110 interface states

Claims (5)

In a floating gate type transistor having a floating gate provided on a silicon substrate via a tunnel insulating film and a control gate provided on the floating gate via an inter-gate insulating film, a first gate is formed on the silicon substrate. An oxynitride film is formed, a silicon oxide film is formed on the first oxynitride film, a second oxynitride film is formed on the silicon oxide film, and the tunnel insulating film is the first oxynitride film, The silicon oxide film is composed of a second oxynitride film, and the film thickness of the first or second oxynitride film is 0.5 nm to 0.5 nm when the half-value width of the maximum nitrogen atom concentration is defined as the film thickness A semiconductor device characterized by being set in a range of 3 nm .  The semiconductor device according to claim 1, wherein the second oxynitride film is formed by performing a heat treatment in a nitrogen radical atmosphere. A method for manufacturing a floating gate type transistor having a floating gate provided on a silicon substrate via a tunnel insulating film and a control gate provided on the floating gate via an inter-gate insulating film, the method comprising: A silicon oxide film is formed on the silicon substrate, followed by heat treatment in a nitrogen gas atmosphere containing nitrogen oxide to form an oxynitride film between the silicon substrate and the silicon oxide film, and further, heat treatment is performed in a nitrogen radical atmosphere. Forming the tunnel insulating film formed by stacking the oxynitride film, the silicon oxide film, and the oxynitride film in this order by forming an oxynitride film on the surface of the silicon oxide film. A method for manufacturing a semiconductor device. 4. The method of manufacturing a semiconductor device according to claim 3 , wherein the nitriding gas containing nitrogen oxide is NO gas, NO + N ₂ gas, N ₂ O gas, or N ₂ O + N ₂ gas. 5. The method of manufacturing a semiconductor device according to claim 3 , wherein the heat treatment in a nitrogen gas atmosphere containing nitrogen oxide is lamp heating.

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