JP4588671B2 - Programmable controller - Google Patents

Description

  The present invention relates to a programmable controller that allocates and uses a plurality of device areas on a memory space. In particular, the invention relates to a mechanism for detecting a memory access made to an area that is not intended by a user by index modification in a program. The present invention relates to a programmable controller.

  The programmable controller operates according to a program written by the user. In the program written by the user, the user describes the processing using the device type and device number such as X1, Y10, and D100. Here, X, Y, and D are device types, and the subsequent numbers are device numbers. The program created by the user is converted into a format that can be executed by the programmable controller and stored in the program storage area of the programmable controller. At that time, information such as the device type and device number is replaced with an absolute address in the memory space accessible from the programmable controller. Thereafter, the programmable controller sequentially executes the programs in the program storage area.

  X, Y, and D described as different device types in the user program are assigned to different areas in the same memory space by conversion to the absolute address. For this reason, an area of a different device type that cannot be originally accessed may be accessed due to incorrect index modification by the user program. For example, when X1000Z0 is described using the index register Z0, there is a possibility that an area other than the X area may be accessed beyond the X device area depending on the value of Z0. In this case, since the value of Z0 changes during program execution, it is often unknown at the time of program description. When such a phenomenon occurs, not only the data of the same kind of device that is not intended to be destroyed due to a program mistake, but also a phenomenon that is difficult to imagine from the viewpoint of a user who breaks different types of device data.

  In order to prevent access to an inaccessible area, there is a function generally called memory protection. However, the area protected by memory protection is determined for each series of programs called processes and threads, and is not a function for detecting that the area to be accessed has changed due to index modification as described above.

  As a countermeasure to such a problem, there is a method of providing a restriction on the index register as shown in the prior example of Patent Document 1. In this preceding case, the case where an index register is used for accessing an array variable is taken up as a main application example. In order to detect that the address obtained as a result of index modification on the first element of an array variable has deviated from the area reserved as an array variable, upper and lower limit values are set in advance for the value of the index register. ing. During the execution of the program, a write to the index register is detected, and the process is stopped when the write data deviates from the upper and lower limit values.

  The preceding example is characterized in that the upper and lower limit values of the index register can be set so as not to deviate from the previously secured array area, and therefore strict area management is possible for the secured array area. The array region described here is considered as a device region, and the method described in the previous example can be applied to device region deviation detection of the programmable controller.

  However, in such a programmable controller, the number of index registers is usually limited, so when using the same index register for modifying different areas in the program executed by the programmable controller, the upper and lower limit values of the index register are set. Must be changed. In addition, the device area of the programmable controller can be index-modified for an arbitrary address in the area, and when applying the preceding case, even in the same device area, such as X0Z0 and X100Z0 In addition, since the upper and lower limit values allowed for the index register change every time the address to be modified changes, it is necessary to reset the upper and lower limit values. Since these processes are generally described in a program executed by the programmable controller, the processing speed as the programmable controller decreases.

  In the preceding example, the upper and lower limit values are checked when writing to the index register. Therefore, when the index register is used as a simple register for normal calculation, it is necessary to cancel the upper and lower limit value settings. Therefore, it is necessary to set or cancel the upper and lower limit values for most of the instructions that perform index modification, and it takes time to process the instructions for setting the upper and lower limit values, or the upper and lower limit values are combined with the instruction code. An area for holding information about values is required. For these reasons, it is not suitable to apply the preceding case to the deviation detection of the device area because additional information and additional processing required during program execution are large.

JP-A-5-241650 (paragraph 0004)

  Since the conventional programmable controller is configured as described above, if the area deviation detection process after index modification is performed in the program executed by the programmable controller, the index-modified address changes as the program is executed This requires processing such as setting and canceling the upper and lower limit values of the index register, and the processing speed as a programmable controller is reduced.

  The present invention has been made to solve the above-described problems, and it is not necessary to perform a region deviation detection process after index modification in a program executed by the programmable controller, and to obtain a programmable controller that does not reduce the processing speed. With the goal.

The programmable controller according to the present invention acquires an index register holding a value used for index modification and a value held in the index register based on a register number included in the instruction code. When the requested access width exceeds the unit access width, the actual access start address after index modification is calculated based on the address included in the instruction code and the value acquired from the index register , and the calculated start address and An index modifier that outputs the address width included in the instruction code , and a device on the memory map in which the address that is actually accessed after the index modification calculated by the index modifier corresponds to the address included in the instruction code Depart from the area A whether determining regions deviation determining unit, the region deviation determining unit, based on the start address and the address width for accessing actually the first output by the index modification unit, calculating a final address to access the last A final address calculator to
A device area setting register that stores the lower limit value or the upper limit value of a plurality of device areas continuously secured on the memory map as a boundary address in the order of the device areas secured continuously; A device area determination unit that checks which address between successive boundary addresses in the device area setting register the address included in the instruction code is in which device area on the memory map; Referring to the device area setting register, upper and lower limit value selection sections for selecting continuous boundary addresses of the device area determined by the device area determination section, and the start address and the last address output by the index modification section The final address calculated by the calculation unit is selected by the upper / lower limit value selection unit. And it is whether it is within the bounds consecutive addresses that a range determination unit determines.

  According to the present invention, it is not necessary to perform the area deviation detection process after index modification in a program executed by the programmable controller, and the effect of not reducing the processing speed as the programmable controller can be obtained.

Embodiment 1 FIG.
FIG. 1 is a diagram showing a memory map 10 and a device area setting register 101 assumed in the first embodiment of the present invention. A plurality of device areas are secured on the memory map 10, and the lower limit value and the upper limit value of each device area are stored in the device area lower limit register 101a and the device area upper limit register 101b. The register 101 is assumed. In the example of FIG. 1, four device areas are allocated on one memory space, and the upper limit value and the lower limit value of each device area are stored in the device area setting register 101. The device area lower limit register 101a and the device area upper limit register 101b are set as parameters different from the program before the execution of the program. In FIG. 1, the maximum number of device areas on the memory map 10 is described as four, but the number of device areas can be changed.

  There is an instruction code for accessing the device area in the program described by the user. This instruction code includes the address of the device area to be accessed and the register number used for index modification. The address included in the instruction code and the value of the register specified for index modification are added for actual access. Calculate the address. This address addition process is called index modification, and the address included in the instruction code for performing this process may be different from the address actually accessed.

  FIG. 2 is a block diagram showing the configuration of the programmable controller according to the first embodiment of the present invention. The programmable controller includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, an access execution unit 15, and a region departure determination unit 100, and the region departure determination unit 100 is a device region setting register 101. , A device region determination unit 102, an upper and lower limit value selection unit 103, and an in-range determination unit 104.

  In FIG. 2, a program storage unit 11 stores a program including an instruction code, and an instruction code acquisition unit 12 acquires an instruction code of a program stored in the program storage unit 11. The index register 13 holds a value used for index modification, and the index modification unit 14 acquires the value held in the index register 13 based on the register number included in the instruction code acquired by the instruction code acquisition unit 12. Then, the address included in the instruction code and the value acquired from the index register 13 are added to calculate the address to be actually accessed after the index modification.

  The area deviation determination unit 100 inputs an address included in the instruction code acquired by the instruction code acquisition unit 12, and an actually accessed address after index modification calculated by the index modification unit 14 is included in the instruction code. It is determined whether or not the device area on the memory map 10 corresponding to the address deviates. That is, the area deviation determination unit 100 determines a device area on the memory map 10 from an address included in the instruction code acquired by the instruction code acquisition unit 12, selects a lower limit value and an upper limit value of the determined device area, It is determined whether the actually accessed address calculated by the index modifier 14 is within the selected lower limit and upper limit range, and the actually accessed address is within the lower limit and upper limit range of the device area. If it is, the access permission is output, and if the address to be actually accessed is not within the range between the lower limit value and the upper limit value of the device area, a stop request is output.

  Based on the access permission output from the area deviation determination unit 100, the access execution unit 15 accesses the device area using the actual access address output from the index modification unit 14.

  In the area deviation determination unit 100, the device area setting register 101 stores the lower limit value and upper limit value of a plurality of device areas on the memory map 10 in each device area lower limit register 101a and device area upper limit register 101b. The device area determination unit 102 determines which device area lower limit register 101a and device area upper limit register 101b in the device area setting register 101 the address included in the instruction code acquired by the instruction code acquisition unit 12 is. A check is made to determine which device area on the memory map 10 is present. The upper / lower limit selection unit 103 refers to the device area setting register 101 and selects the lower limit value and upper limit value of the device area determined by the device area determination unit 102.

The in-range determination unit 104 determines whether the actually accessed address calculated by the index modification unit 14 is within the range between the lower limit value and the upper limit value of the device area selected by the upper / lower limit value selection unit 103. If the address to be actually accessed is within the range between the lower limit and upper limit of the device area, that is, if the following expression (1) is satisfied, the address after index modification deviates from the device area. It is determined that the access is not to be performed, and the access permission is output to the access execution unit 15.
Lower limit value ≤ address ≤ upper limit value (1)

  On the other hand, if the address to be actually accessed is not within the range between the lower limit value and the upper limit value of the device area, that is, if the above formula (1) is not satisfied, the in-range determination unit 104 determines the address after index modification. Is determined to depart from the device area, a stop request for processing as a programmable controller is output to a control unit (not shown) that controls the entire programmable controller and the user is notified.

  With such a configuration, index modification is performed on the address included in the instruction code, and after determining that the address included in the instruction code and the address after index modification belong to the same device area, the device area is accessed. Can be done.

  As described above, according to the first embodiment, the area deviation determination unit 100 determines whether or not the address included in the instruction code and the address after index modification belong to the same device area. It is not necessary to perform the area deviation detection process in the program executed by the programmable controller, and the effect of not reducing the processing speed as the programmable controller can be obtained.

Embodiment 2. FIG.
FIG. 3 is a block diagram showing a configuration of a programmable controller according to the second embodiment of the present invention. This programmable controller is similar to the programmable controller shown in FIG. 2 of the first embodiment, and includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, an access execution unit 15, and an area departure determination unit. 100, but the configuration of the area departure determination unit 100 is different from that shown in FIG.

In FIG. 3, the area deviation determination unit 100 includes a device area setting register 101, a device area determination unit 102, an upper / lower limit value selection unit 103, an in-range determination unit 104, and a final address calculation unit 105. , A lower limit determination unit 104a, an upper limit determination unit 104b, and a result determination unit 104c.
The diagram showing the memory map 10 and the device area setting register 101 assumed in the second embodiment of the present invention is the same as FIG. 1 in the first embodiment.

  In the first embodiment, it is assumed that the access width requested by the instruction code does not exceed the unit access width. However, in this second embodiment, the access width requested by the instruction code is 16 bits (2 bytes). A case where the unit access width is exceeded, such as access and 32-bit (4-byte) access, will be described. When the access width requested by the instruction code exceeds the unit access width, the actually accessed address calculated by the index modifier 14 indicates the start address to be accessed first, and the last address to be accessed last is the start It will be different from the address. That is, even if the start address accessed first does not deviate from the device area, the last address accessed last may deviate from the device area.

  The index modification unit 14 acquires the value held in the index register 13 based on the register number included in the instruction code acquired by the instruction code acquisition unit 12, and acquires the address included in the instruction code and the index register 13. The value is added to calculate the actual access start address after the index modification, and the calculated start address and the address width included in the instruction code are output.

The final address calculation unit 105 calculates the final address to be accessed last using the following equation (2) based on the start address and address width that are actually accessed first and output from the index modification unit 14.
Final address = start address + access width -1 (2)

  The in-range determination unit 104 uses the lower limit value and the upper limit value of the device area selected by the upper / lower limit value selection unit 103 based on the start address output from the index modification unit 14 and the final address calculated by the final address calculation unit 105. Determine if it is within range.

  The lower limit determination unit 104 a in the in-range determination unit 104 determines whether the actual first access address calculated by the index modification unit 14 is greater than or equal to the lower limit value of the device region selected by the upper and lower limit selection unit 103. Determine whether or not. Further, the upper limit determination unit 104 b in the in-range determination unit 104 is configured such that the final address actually accessed last calculated by the final address calculation unit 105 is less than or equal to the upper limit of the device region selected by the upper / lower limit selection unit 103. It is determined whether or not.

  The result determination unit 104c in the in-range determination unit 104 determines that the first access address actually accessed first by the lower limit determination unit 104a is greater than or equal to the lower limit of the device area, and the upper limit determination unit 104b actually When it is determined that the last address to access the device area is less than or equal to the upper limit value of the device area, it is determined that the address after index modification does not depart from the device area, and the access permission is output to the access execution unit 15 In other cases, it is determined that the address after the index modification deviates from the device area, and a control unit (not shown) that controls the entire programmable controller is requested to stop processing as a programmable controller. Output and notify the user.

  Based on the access permission output from the area deviation determination unit 100, the access execution unit 15 accesses the device area using the actual access address and address width output from the index modification unit 14.

  Other processes of the program storage unit 11, the instruction code acquisition unit 12, the index register 13, the device area setting register 101, the device area determination unit 102, and the upper / lower limit value selection unit 103 are the same as those in the first embodiment.

  With such a configuration, even when the access width requested by the instruction code exceeds the unit access width, index modification is performed on the address included in the instruction code, and the address included in the instruction code and the address after index modification are performed. Can be accessed after determining that they belong to the same device area.

  As described above, according to the second embodiment, even when the access width requested by the instruction code exceeds the unit access width, the area deviation determining unit 100 determines the address included in the instruction code and the address after index modification. By determining whether or not they belong to the same device area, there is no need to perform the area deviation detection process after index modification in the program executed by the programmable controller, and the effect of not reducing the processing speed as the programmable controller can be obtained. .

Embodiment 3 FIG.
The block diagram showing the configuration of the programmable controller according to the third embodiment of the present invention is the same as FIG. 3 of the second embodiment, and the access width required by the instruction code is the unit access as in the second embodiment. A case where the width is exceeded will be described.

  FIG. 4 is a diagram showing the memory map 10 and the device area setting register 101 assumed in the third embodiment of the present invention. As shown in FIG. 4, a plurality of device areas 0 to 6 are continuously secured on the memory map 10, and the upper limit value or lower limit value of each device area 0 to 6 is continuously secured as a boundary register. Are stored in the device boundary register 101c in the order of the device areas 0 to 6, and these are collectively referred to as a device area setting register 101. In this way, a plurality of device areas are continuously secured on the memory map 10, and the upper limit value or lower limit value of each device area is used as a boundary address in the order of the continuously secured device areas 0-6. By storing in the device area setting register 101, the number of registers in the device area setting register 101 can be reduced.

When securing device areas in contiguous areas in the memory space, the upper limit value and lower limit value of the adjacent device area are consecutive values, and the upper limit check can be performed using the lower limit value of the next adjacent device area. It becomes. That is, the upper limit value of the device region n-1 is continuous with the lower limit value of the device region n, and the following expression (3) is established.
(Upper limit value of device area n-1) + 1 = (Lower limit value of device area n) (3)

  Therefore, when the lower limit value of each device area is stored in the device boundary register 101c of the device area setting register 101, the device area determination unit 102 is included in the instruction code acquired by the instruction code acquisition unit 12. The boundary between the boundary registers in the device area setting register 101 is checked to determine which device area on the memory map 10 is located. The upper / lower limit value selection unit 103 refers to the device area setting register 101 and refers to the continuous boundary address of the device area determined by the device area determination unit 102 (the lower limit value of the device area determined by the device area determination unit 102 and The lower limit value of the next device area secured on the memory map 10 is selected.

The in-range determination unit 104 is a device in which the first access start address calculated by the index modification unit 14 and the last access last address calculated by the final address calculation unit 105 are selected by the upper / lower limit value selection unit 103. It is determined whether or not the area is within a range of boundary addresses (the lower limit value of the device area selected by the upper / lower limit value selection unit 103 and the lower limit value of the next device area secured on the memory map 10). To do. In other words, the in-range determination unit 104 performs the determination based on the following equation (4) when determining the departure from the region for the device region n.
(Lower limit value of device area n) ≦ Address <(Lower limit value of device area n + 1) (4)
In the above formula (4), the address represents a start address and a final address.

  At this time, the upper limit determination unit 104 b in the in-range determination unit 104 determines the lower limit of the device region n + 1 in which the last address actually accessed last calculated by the final address calculation unit 105 is selected by the upper / lower limit value selection unit 103. It is determined whether it is less than the value. In addition, the lower limit determination unit 104 a in the in-range determination unit 104 has a start address that is actually accessed first calculated by the index modification unit 14 greater than or equal to the lower limit value of the device region n selected by the upper and lower limit selection unit 103. It is determined whether or not.

  On the other hand, when the upper limit value of each device area is stored in the device boundary register 101c of the device area setting register 101, the device area determination unit 102 is included in the instruction code acquired by the instruction code acquisition unit 12. The boundary between the boundary registers in the device area setting register 101 is checked, and the upper / lower limit value selection unit 103 is determined by the device area determination unit 102 with reference to the device area setting register 101. Continuous boundary addresses of the device area (the upper limit value of the previous device area secured on the memory map 10 of the device area determined by the device area determination unit 102 and the device area determined by the device area determination unit 102) Select (upper limit).

The in-range determination unit 104 is a device in which the first access start address calculated by the index modification unit 14 and the last access last address calculated by the final address calculation unit 105 are selected by the upper / lower limit value selection unit 103. Consecutive boundary addresses of the areas (the upper limit value of the previous device area secured on the memory map 10 of the device area selected by the upper / lower limit value selection unit 103 and the upper limit of the device area determined by the device area determination unit 102 Value).
In other words, the in-range determination unit 104 performs determination based on the following equation (5) when determining the departure from the region for the device region n.
(Upper limit value of device area n−1) <Address ≦ (Upper limit value of device area n) (5)
In the above formula (5), the address represents a start address and a final address.

  At this time, the upper limit determination unit 104 b in the in-range determination unit 104 determines the upper limit of the device area n in which the last address actually accessed last calculated by the final address calculation unit 105 is selected by the upper / lower limit selection unit 103. It is determined whether or not it is less than or equal to the value. In addition, the lower limit determination unit 104 a in the in-range determination unit 104 has an upper limit of the device region n−1 in which the first access address calculated by the index modification unit 14 is selected by the upper and lower limit selection unit 103. Determine whether the value is exceeded.

  The result determination unit 104c in the in-range determination unit 104, after the determination result by the lower limit determination unit 104a and the upper limit determination unit 104b satisfies the above formula (4) or formula (5), It is determined that the address does not deviate from the device area, access permission is output to the access execution unit 15, and the determination result by the lower limit determination unit 104a and the upper limit determination unit 104b is the above formula (4) or formula (5). ) Is not satisfied, it is determined that the address after index modification deviates from the device area, and the control unit (not shown) that controls the entire programmable controller stops processing as a programmable controller. Output the request and notify the user.

  The other processes of the program storage unit 11, instruction code acquisition unit 12, index register 13, index modification unit 14, access execution unit 15, device area setting register 101, and final address calculation unit 105 are the same as those in the second embodiment. is there.

  As described above, according to the third embodiment, a plurality of device areas are continuously secured on the memory map 10, and the upper limit value or lower limit value of each device area is used as a boundary address in the device area setting register 101. By storing in order, the area deviation determination unit 100 determines whether the address included in the instruction code and the address after index modification belong to the same device area, thereby reducing the device area setting register 101 as compared with the second embodiment. With the number of registers, the same effect as in the second embodiment can be obtained.

Embodiment 4 FIG.
FIG. 5 is a diagram showing the memory map 10 and the device area setting register 101 assumed in the fourth embodiment of the present invention. In the memory map 10 shown in FIG. 5, a plurality of device areas 0 to 6 are continuously secured as in FIG. 4 of the third embodiment, but the boundary address of each device area is a device boundary register. 101c is stored in random order, and these are collectively used as the device area setting register 101, which is different from FIG. Thus, the boundary address can be arbitrarily set in the device boundary register 101c. It is assumed that the upper limit value or the lower limit value of the device areas 0 to 6 is stored as the boundary address of each device area.

FIG. 6 is a block diagram showing a configuration of a programmable controller according to the fourth embodiment of the present invention. This programmable controller is similar to the programmable controller shown in FIG. 2 of the first embodiment, and includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, an access execution unit 15, and an area departure determination unit. 100, but the configuration of the area departure determination unit 100 is different from that shown in FIG.
In FIG. 6, the region deviation determination unit 100 includes a device region setting register 101, a device boundary comparison unit (first device boundary comparison unit) 106, a device boundary comparison unit (second device boundary comparison unit) 107, and a comparison result determination. Part 109 is provided.

  The device boundary comparison unit 106 compares the addresses included in the instruction code acquired by the instruction code acquisition unit 12 with the boundary addresses stored in all the device boundary registers 101c of the device area setting register 101, and compares the result. Is output. For example, the device boundary comparison unit 106 checks whether the address included in the instruction code is larger than the boundary address of the device boundary register 0 in the device area setting register 101, and sets “1”. If it is established by checking whether the address included in the device area setting register 101 is greater than the boundary address of the device boundary register 1 in the device area setting register 101, the address is set to “1”. A comparison is made with the boundary addresses of the device boundary registers 2 to 7 in 101, and an 8-bit comparison result is obtained and output.

  Similar to the device boundary comparison unit 106, the device boundary comparison unit 107 and the boundary address stored in all the device boundary registers 101 c of the device area setting register 101 and the actual access address calculated by the index modification unit 14. And a comparison result of, for example, 8 bits is output.

  The comparison result determination unit 109 is included in the instruction code when, for example, the 8-bit comparison result output from the device boundary comparison unit 106 matches the 8-bit comparison result output from the device boundary comparison unit 107, for example. It is determined that the address and the address after index modification belong to the same device area, it is determined that the address after index modification does not depart from the device area, and access permission is output to the access execution unit 15.

  On the other hand, if the comparison result determination unit 109 does not match the 8-bit comparison result output from the device boundary comparison unit 106 with the 8-bit comparison result output from the device boundary comparison unit 107, for example, A control unit (not shown) that determines that the included address and the address after index modification belong to different device areas, determines that the address after index modification deviates from the device area, and controls the entire programmable controller. A request to stop the process as a programmable controller and notify the user.

  Other processes of the program storage unit 11, the instruction code acquisition unit 12, the index register 13, the index modification unit 14, and the access execution unit 15 are the same as those in the first embodiment.

  As described above, according to the fourth embodiment, a plurality of device areas are continuously secured on the memory map 10, and boundary addresses of the respective device areas are stored in the device area setting register 101 in any order. The deviation determination unit 100 compares the address included in the instruction code with all the boundary addresses stored in the device area setting register 101, and the index-modified address and all the boundaries stored in the device area setting register 101 By comparing the addresses and determining whether the address included in the instruction code and the address after index modification belong to the same device area, the boundary address of each device area is stored in the device area setting register 101 in any order. Even so, there are fewer device area setting registers than in the first embodiment. Register number of 101, the same effect as the first embodiment can be obtained.

Embodiment 5 FIG.
FIG. 7 is a block diagram showing a configuration of a programmable controller according to the fifth embodiment of the present invention. This programmable controller is similar to the programmable controller shown in FIG. 2 of the first embodiment, and includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, an access execution unit 15, and an area departure determination unit. 100, but the configuration of the area departure determination unit 100 is different from that shown in FIG.

In FIG. 7, the area deviation determination unit 100 includes a device area setting register 101, a final address calculation unit 105, a device boundary comparison unit (first device boundary comparison unit) 106, a device boundary comparison unit (second device boundary comparison unit). ) 107, a device boundary comparison unit (third device boundary comparison unit) 108, and a comparison result determination unit 109. The region deviation determination unit 100 shown in FIG. In the fifth embodiment, a case where the access width required by the instruction code exceeds the unit access width will be described in the fifth embodiment.
The diagram showing the memory map 10 and the device area setting register 101 assumed in the fifth embodiment of the present invention is the same as FIG. 5 in the fourth embodiment.

  The final address calculation unit 105 is the same as the final address calculation unit 105 of the second embodiment described above, based on the start address and the address width that are actually accessed first and output by the index modification unit 14. Calculate the address.

  The device boundary comparison unit 108 is the same as the device boundary comparison unit 106 of the fourth embodiment, and the last address actually accessed last calculated by the final address calculation unit 105 and all devices in the device area setting register 101. A size comparison with the boundary address stored in the boundary register 101c is performed and, for example, an 8-bit comparison result is output.

  For example, the comparison result determination unit 109 outputs an 8-bit comparison result output from the device boundary comparison unit 106, an 8-bit comparison result output from the device boundary comparison unit 107, and an output from the device boundary comparison unit 108, for example, 8 If all bit comparison results match, it is determined that the address included in the instruction code and the address after index modification belong to the same device area, and the address after index modification does not deviate from the device area. And the access permission is output to the access execution unit 15.

  On the other hand, the comparison result determination unit 109 outputs, for example, the 8-bit comparison result output from the device boundary comparison unit 106, the 8-bit comparison result output from the device boundary comparison unit 107, and the device boundary comparison unit 108. For example, when the 8-bit comparison result does not match, it is determined that the address included in the instruction code and the address after index modification belong to different device areas, and the address after index modification deviates from the device area. It judges that there exists and outputs the stop request | requirement of the process as a programmable controller to the control part (not shown) which controls the whole programmable controller, and notifies a user.

  As in the second embodiment, the access execution unit 15 uses the address and address width actually accessed output from the index modification unit 14 based on the access permission output from the region departure determination unit 100. Access to.

  Other processes of the program storage unit 11, the instruction code acquisition unit 12, the index register 13, the index modification unit 14, the device area setting register 101, the device boundary comparison unit 106, and the device boundary comparison unit 107 are the same as those in the fourth embodiment. It is.

  As described above, according to the fifth embodiment, a plurality of device areas are continuously secured on the memory map 10, and boundary addresses of the respective device areas are stored in the device area setting register 101 in any order. The deviation determination unit 100 compares the address included in the instruction code with all the boundary addresses stored in the device area setting register 101, and stores the first access start address after the index modification and the device area setting register 101. All boundary addresses are compared, the last address of the last access after index modification is compared with all boundary addresses stored in the device area setting register 101, and the address included in the instruction code is after index modification. To determine whether the addresses belong to the same device area Even if the boundary addresses of the respective device areas are stored in the device area setting register 101 in random order, even if the access width requested by the instruction code exceeds the unit access width, the device area setting register is smaller than that in the first embodiment. With the number of registers of 101, the same effect as in the first embodiment can be obtained.

Embodiment 6 FIG.
FIG. 8 is a block diagram showing a configuration of a programmable controller according to the sixth embodiment of the present invention. This programmable controller is similar to the programmable controller shown in FIG. 2 of the first embodiment, and includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, an access execution unit 15, and an area deviation. Although the determination unit 100 is provided, the configuration of the region departure determination unit 100 is as shown in FIG. 2 of the first embodiment, FIG. 3 of the second embodiment, FIG. 6 of the fourth embodiment, and the fifth embodiment. Any of the configurations shown in FIG.

  In each of the above-described embodiments, after the region departure determination unit 100 performs region departure determination and outputs access permission to the access execution unit 15, the access execution unit 15 actually performs the index modification output from the index modification unit 14. The device area is accessed using the address to be accessed. In the sixth embodiment, when the access execution unit 15 performs write access to the device area, the same processing as in each of the above embodiments is performed, but the access execution unit 15 performs read access to the device area. In this case, read access to the device area is performed without waiting for the result of the area departure determination by the area departure determination unit 100, and the area departure determination unit 100 performs the area departure determination during the read access to the device area. When the device area is deviated, an access invalidity is output to the access execution unit 15 to stop the read access, and a control unit (not shown) that controls the entire programmable controller requests a process stop as a programmable controller. And notify the user.

  In the case of read access to the device area, even if read access is performed outside the device area that should be accessed, there is no actual damage such as data destruction in the device area. The region departure determination unit 100 performs the region departure determination during the read access to the device region by the access execution unit 15 without following the procedure of read access to the device region by the access execution unit 15 after the region departure determination by the unit 100. . By this processing, the processing as a programmable controller by the instruction code can be made faster than in the case of write access.

  As described above, according to the sixth embodiment, the same effects as those of the first to fifth embodiments can be obtained, and in the case of read access to the device area, read access to the device area. In particular, by executing the region departure determination by the region departure determining unit 100, the effect as a programmable controller can be speeded up as compared with the case of write access.

Embodiment 7 FIG.
FIG. 9 is a diagram showing the memory map 10 and the device area setting register 101 assumed in the seventh embodiment of the present invention. In FIG. 9, a plurality of device areas are continuously secured on the memory map 10, and the upper limit value or lower limit value of each of the device areas 0 to 6 is stored in the device boundary register 101c of the device area setting register 101 as a boundary address. The points are stored in order as in FIG. 4 of the third embodiment. In FIG. 9, a device area attribute register 101d is further added, and the device boundary register 101c and the device area attribute register 101d are combined. The device area setting register 101 is used. With respect to the device area delimited by the device boundary register 101c, attribute information of the device area can be set by the device area attribute register 101d.

  The device area attribute information is attribute information describing the requested processing content, for example, a program stop request, an unauthorized notification request to the user, an access prohibition request for the device area, the presence or absence of an unauthorized notification, or an error There is the presence or absence of program stop at the time.

  FIG. 10 is a block diagram showing a configuration of a programmable controller according to the seventh embodiment of the present invention. This programmable controller is similar to the programmable controller shown in FIG. 3 of the second embodiment and the third embodiment, and includes a program storage unit 11, an instruction code acquisition unit 12, an index register 13, an index modification unit 14, and an access execution unit. 15 and the region departure determination unit 100, the configuration of the region departure determination unit 100 is different from that of FIG.

  In FIG. 10, the area departure determination unit 100 includes a device area setting register 101, a device area determination unit 102, an upper / lower limit value selection unit 103, an in-range determination unit 104, a final address calculation unit 105, and a device area attribute selection unit 110. The device area setting register 101 includes a device boundary register 101c and a device area attribute register 101d, and the in-range determination unit 104 includes a lower limit determination unit 104a, an upper limit determination unit 104b, and a result determination unit 104c. Compared with the configuration of FIG. 8, a device area attribute register 101d and a device area attribute selection unit 110 are added.

  The device area determination unit 102 checks which boundary register in the device boundary register of the device area setting register 101 the address included in the instruction code acquired by the instruction code acquisition unit 12 is memory map 10 to determine which device region is present. The upper / lower limit value selection unit 103 refers to the device boundary register 101c of the device area setting register 101, and selects the boundary address (lower limit value or upper limit value) of the device area determined by the device area determination unit 102.

  The device area attribute selection unit 110 refers to the device attribute register 101 d of the device area setting register 101 and selects the attribute information of the device area determined by the device area determination unit 102. When the result determination unit 104c in the in-range determination unit 104 determines that the address after index modification deviates from the device region by the lower limit determination unit 104a and the upper limit determination unit 104b, the device region attribute selection unit The processing content requested based on the attribute information of the device area selected in 110 is output.

  If the attribute information of the selected device area is a program stop request when an abnormality occurs, the result determination unit 104c outputs a request to stop processing as a programmable controller to a control unit (not shown) that controls the entire programmable controller. If the attribute information is a request for fraud notification to the user, the fraud notification request to the user is output. In addition, if the attribute information is a device area access prohibition request, the result determination unit 104c realizes access prohibition by stopping the access execution unit 15 from outputting access permission. At this time, as shown in the fifth embodiment, the result determination unit 104c can always perform read access and prohibit only write access.

  The processing of the other program storage unit 11, instruction code acquisition unit 12, index register 13, index modification unit 14, access execution unit 15, final address calculation unit 105, lower limit determination unit 104a, and upper limit determination unit 104b is performed as described above. This is the same as the third embodiment.

  As described above, according to the seventh embodiment, the same effect as in the third embodiment can be obtained, and an effect that the requested process can be output based on the set attribute information can be obtained.

Embodiment 8 FIG.
FIG. 11 is a diagram showing a memory map 10 assumed in the eighth embodiment of the present invention. It is possible to change the memory map 10 for each program by storing device area information regarding the device area for the program together with the program in the program storage unit 11 and changing the device area setting register 101 when switching the execution program. is there. In FIG. 11, device area information 51 for program 1 is stored in an area for storing program 1 in program storage unit 11, and device area information 52 for program 2 is stored in an area for storing program 2. For example, the device area information 51 includes information to be set in the device boundary register 101c and the device area attribute register 101d, and the information is set in the device boundary register 101c and the device area attribute register 101d before the program 1 is executed. Then, program 1 is executed.

  12 is a block diagram showing a configuration of a programmable controller according to an eighth embodiment of the present invention. This programmable controller is obtained by adding an execution program instruction unit 16 and a device area setting unit 17 to the programmable controller shown in FIG. 10 of the seventh embodiment, and the other configurations are the same as those in FIG.

  In FIG. 12, a program storage unit 11 stores device area information relating to a program and a device area for the program. The execution program instruction unit 16 notifies the instruction code acquisition unit 12 and the device area setting unit 17 of the program to be executed based on an instruction from the user or an instruction when an event occurs due to an interrupt. The instruction code acquisition unit 12 acquires the instruction code of the program notified from the execution program instruction unit 16 from the program storage unit 11.

The device area setting unit 17 acquires device area information for the program notified from the execution program instruction unit 16 from the program storage unit 11 and corresponds to the instructed program based on the acquired device area information. The device boundary register 101c and the device attribute register 101d are set.
The other processes of the index register 13, the index modification unit 14, the access execution unit 15, and the area departure determination unit 100 are the same as those in the seventh embodiment.

  In the eighth embodiment, the configuration of the region departure determining unit 100 is the same as that of the seventh embodiment, but the configuration of the region departure determining unit 100 of the first to fifth embodiments is the same. May be used.

  As described above, according to the eighth embodiment, the same effect as in the seventh embodiment can be obtained, and the device area setting unit 17 is instructed based on the device area information acquired from the program storage unit 11. By setting the device area setting register 101 corresponding to a program, an effect is obtained that a local device area accessible for each program can be realized.

  In the eighth embodiment, the device area is continuously allocated. However, when the device area is not continuously allocated, an access prohibition request is allocated as attribute information to an inaccessible area. The eighth embodiment can be realized.

Embodiment 9 FIG.
FIG. 13 shows a memory map 10 assumed in the eighth embodiment of the present invention. In the ninth embodiment, a device boundary register 101c and a device area attribute register 101d in the device area setting register 101 have a mechanism that can be changed by a program, and these device area setting registers 101 are changed according to the execution state of the program. In addition, the number of device areas is virtually increased by realizing necessary checks at each time point. This method can be realized if there is at least one set of device area setting register 101, but here, using the existence of a plurality of device area setting registers 101, a method with as few changes as possible is adopted. Is possible.

The block diagram showing the configuration of the programmable controller according to the ninth embodiment of the present invention is the same as FIG. 12 of the eighth embodiment.
In FIG. 12, the device area setting unit 17 acquires the device area information 51 for the program 1 from the program storage unit 11 for the program 1 notified from the execution program instruction unit 16 as in the eighth embodiment. Based on the acquired device area information 51, the device boundary register 101c and the device attribute register 101d in the device area setting register 101 corresponding to the designated program 1 are set.

  The device area setting unit 17 changes the settings of the device boundary register 101c and the device attribute register 101d in the device area setting register 101 based on the device area change instructions 1-4 and 1-5 included in the program 1. To do.

  That is, in FIG. 13, the program 1 is virtually divided into three programs 1-1, 1-2, and 1-3, and a device area change instruction is executed before the execution of the programs 1-2 and 1-3. 1-4 and 1-5 are provided. For example, the device area setting unit 17 does not change the settings related to the areas used in all programs such as the device areas 1 and 2, and a part of the program such as the device areas 3-1, 3-2 and 3-3. In the example shown in FIG. 13, five device areas 1, 2, 3-1, 3-2, and 3-3 are grouped into three sets of device area setting registers. 101 can be realized.

  As a method of embedding the device area change instructions 1-4 and 1-5 in the program 1, automatic insertion by a compiler or a development environment is possible. However, the device area change instruction is disclosed to the user, and the user program By describing the device area change instructions 1-4 and 1-5 in 1, deviation from the device area can be detected at any location designated by the user in the device area.

  As described above, according to the ninth embodiment, the same effect as in the eighth embodiment can be obtained, and the setting of the device area setting register 101 can be changed by the program 1, and the device area setting register 101 Even when the number is small, it is possible to dynamically set many device areas.

It is a figure which shows the memory map and device area | region setting register which are assumed in Embodiment 1 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 1 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 2 of this invention. It is a figure which shows the memory map and device area | region setting register which are assumed in Embodiment 3 of this invention. It is a figure which shows the memory map and device area | region setting register which are assumed in Embodiment 4 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 4 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 5 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 6 of this invention. It is a figure which shows the memory map and device area | region setting register which are assumed in Embodiment 7 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 7 of this invention. It is a figure which shows the memory map assumed in Embodiment 8 of this invention. It is a block diagram which shows the structure of the programmable controller by Embodiment 8 of this invention. It is a figure which shows the memory map assumed in Embodiment 9 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 Memory map, 11 Program storage part, 12 Instruction code acquisition part, 13 Index register, 14 Index modification part, 15 Access execution part, 16 Execution program instruction part, 17 Device area setting part, 51 Device area information for program 1 52 Device area information for program 2, 100 area deviation determination section, 101 device area setting register, 101a device area lower limit register, 101b device area upper limit register, 101c device boundary register, 101d device area attribute register, 102 device area determination section, 103 Lower limit selection unit, 104 In-range determination unit, 104a Lower limit determination unit, 104b Upper limit determination unit, 104c Result determination unit, 105 Final address calculation unit, 106 Device boundary comparison unit, 107d Chair boundary comparator unit, 108 device boundary comparator unit, 109 comparison result determination unit, 110 device region attribute selecting unit.

Claims (7)

An index register holding values used for index modification;
The value stored in the index register is acquired based on the register number included in the instruction code, and when the access width requested by the instruction code exceeds the unit access width, the address included in the instruction code and the index register Based on the value obtained from the above, the index modification unit that calculates the actual access start address after index modification, and outputs the calculated start address and the address width included in the instruction code ,
An area departure determining unit that determines whether an address that is actually accessed after index modification calculated by the index modification unit deviates from a device area on a memory map corresponding to an address included in the instruction code; Prepared ,
The region departure determination unit
A final address calculation unit that calculates a final address to be accessed last based on a start address and an address width that are actually accessed first and output by the index modification unit;
A device area setting register that stores the lower limit value or the upper limit value of a plurality of device areas continuously secured on the memory map as a boundary address in the order of the device areas secured continuously;
A device area determination unit that checks which address between successive boundary addresses in the device area setting register the address included in the instruction code is in which device area on the memory map;
With reference to the device area setting register, an upper and lower limit value selection unit that selects continuous boundary addresses of the device area determined by the device area determination unit;
A range for determining whether the start address output by the index modifier and the final address calculated by the final address calculator are within the range of consecutive boundary addresses selected by the upper / lower limit value selector. A programmable controller comprising an internal determination unit . In the area deviation determination unit,
The device area setting register stores the attribute information of each device area describing the requested processing contents.
A device area attribute selection unit that refers to the device area setting register and selects attribute information of the device area determined by the device area determination unit,
When it is determined that the start address and the final address are not within the range of the continuous boundary address, the in-range determination unit outputs the processing content requested based on the device area attribute information selected by the device area attribute selection unit. The programmable controller according to claim 1 . A program storage unit that stores a program including an instruction code, and stores device area information for the program including boundary addresses of a plurality of device areas and attribute information of each device area;
A device that acquires device area information for an instructed program from the program storage unit, and sets boundary addresses of the plurality of device areas and attribute information of each device area in a device area setting register based on the acquired device area information The programmable controller according to claim 2, further comprising an area setting unit. The device area setting unit is configured to change a boundary address of a plurality of device areas set in a device area setting register and attribute information of each device area based on a device area change instruction included in the program. The programmable controller according to claim 3 . The area deviation determination unit
A device area setting register that stores a lower limit value or an upper limit value of a plurality of device areas continuously secured on the memory map as boundary addresses in random order; and
A first device boundary comparison unit that compares the address included in the instruction code with all boundary addresses stored in the device area setting register and outputs a comparison result;
A second device boundary comparison unit that compares the actual access address calculated by the index modification unit with all boundary addresses stored in the device area setting register and outputs a comparison result;
A comparison result determination unit for determining whether or not the comparison result output from the first device boundary comparison unit and the comparison result output from the second device boundary comparison unit match; The programmable controller according to claim 1. When the access width required by the instruction code exceeds the unit access width, the index modification unit calculates the actual access start address after index modification based on the address included in the instruction code and the value obtained from the index register. Output the calculated start address and the address width included in the instruction code,
In the area deviation determination unit,
A final address calculation unit that calculates a final address to be accessed last based on a start address and an address width that are actually accessed first and output by the index modification unit;
A third device boundary comparison unit that compares the final address actually accessed last calculated by the final address calculation unit with all boundary addresses stored in the device area setting register and outputs the comparison result And
The comparison result output from the first device boundary comparison unit is compared with the comparison result output from the second device boundary comparison unit and the comparison result output from the third device boundary comparison unit. 6. The programmable controller according to claim 5, wherein it is determined whether or not to perform. It has an access execution unit that accesses the device area using the actual access address output from the index modification unit,
When the access execution unit performs read access to the device area, the area departure determination unit performs the area departure determination, and when the access execution unit is out of the device area, the access execution unit outputs an invalid access to read access. The programmable controller according to claim 1, wherein the programmable controller is stopped.

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