JP4568646B2 - Manufacturing method of electric double layer capacitor module - Google Patents

Manufacturing method of electric double layer capacitor module Download PDF

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JP4568646B2
JP4568646B2 JP2005196250A JP2005196250A JP4568646B2 JP 4568646 B2 JP4568646 B2 JP 4568646B2 JP 2005196250 A JP2005196250 A JP 2005196250A JP 2005196250 A JP2005196250 A JP 2005196250A JP 4568646 B2 JP4568646 B2 JP 4568646B2
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double layer
electric double
capacitor
layer capacitor
terminals
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JP2007019081A (en
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和修 野川
武治 斉藤
英雄 小野
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UD Trucks Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description

この発明は、電気二重層キャパシタを構成単位(キャパシタセル)として各種の電圧仕様に対応するべく複数のキャパシタセルから構成される電気二重層キャパシタモジュールの製造方法に関する。   The present invention relates to a method for manufacturing an electric double layer capacitor module including a plurality of capacitor cells in order to correspond to various voltage specifications using an electric double layer capacitor as a constituent unit (capacitor cell).

近年、各種の蓄電装置として、急速充電が可能で充放電サイクル寿命が長い電気二重層キャパシタの適用技術が注目される。   2. Description of the Related Art In recent years, as various types of power storage devices, attention has been focused on application technologies of electric double layer capacitors that can be rapidly charged and have long charge / discharge cycle life.

電気二重層キャパシタは、正極体と負極体とこれらの間に介装するセパレータとから組成される積層体と、積層体を電解液と共に密封する容器と、容器の外部に配置される1対の端子と、からなり、1対の端子の一方が正極体、他方が負極体に接続される。積層体については、筒型に巻回するタイプ、平板型に積み重ねるタイプ、等がある。   An electric double layer capacitor includes a laminate composed of a positive electrode body, a negative electrode body, and a separator interposed therebetween, a container that seals the laminate together with an electrolyte, and a pair of electrodes disposed outside the container. And one of the pair of terminals is connected to the positive electrode body and the other is connected to the negative electrode body. About a laminated body, there exist a type wound up to a cylinder type, a type stacked on a flat plate type, and the like.

このような、電気二重層キャパシタは、これを構成単位(キャパシタセル)として各種の電圧仕様に対応するべく複数のキャパシタセルを1個のモジュールに集積化した形でよく使用される(特許文献1,特許文献2)。図9に基づいて、その例を説明すると、1はキャパシタセルであり、10はモジュールボックスであり、複数のキャパシタセル1は、ボックス10の内部において、1列の積層状態に収装される。複数のキャパシタセル1を直列に接続するため、図8の(1)のように各キャパシタセル1の1対の端子(セル端子)がそれぞれ2段に折り曲げられ、隣接するキャパシタセル1間において、異極同士の端子3a,3bが各先端側をフランジ60a,60bとして互いに接合される。ボックス10に1対の端子(ボックス端子)が配置され、複数を直列に接続の両端に位置するキャパシタセル1の残る端子3a,3bがボックス端子と異極同士に接続される。
特開2002−151365 特開2003−272966
Such an electric double layer capacitor is often used in a form in which a plurality of capacitor cells are integrated into one module in order to correspond to various voltage specifications using this as a structural unit (capacitor cell) (Patent Document 1). , Patent Document 2). An example thereof will be described with reference to FIG. 9. Reference numeral 1 denotes a capacitor cell, reference numeral 10 denotes a module box, and a plurality of capacitor cells 1 are accommodated in a stacked state in one row inside the box 10. In order to connect a plurality of capacitor cells 1 in series, a pair of terminals (cell terminals) of each capacitor cell 1 are bent in two stages as shown in FIG. 8 (1), and between adjacent capacitor cells 1, The terminals 3a and 3b having different polarities are joined to each other with the respective leading ends as flanges 60a and 60b. A pair of terminals (box terminals) are arranged in the box 10, and the remaining terminals 3 a and 3 b of the capacitor cell 1 positioned at both ends of the plurality connected in series are connected to the box terminal and different polarities.
JP 2002-151365 A JP 2003-272966 A

このような電気二重層キャパシタモジュールにおいて、隣接するキャパシタセル1間の異極同士の端子を接合するのに溶接が用いられる。特許文献1の場合、抵抗値の小さいTIG溶接に拠るが、TIG溶接は、熱対策等の準備に手間取り、作業性が良くない。また、異極同士の端子3a,3bのフランジ60a,60bを突き合わせてこれらの最上部(上端面)をTIG溶接することになり、TIG溶接の溶着部が盛り上がるため、図8の(1)に示すように異極同士の端子3の接合部を含む高さ寸法が大きくなってしまう。   In such an electric double layer capacitor module, welding is used to join terminals of different polarities between adjacent capacitor cells 1. In the case of Patent Document 1, although it depends on TIG welding with a small resistance value, TIG welding is troublesome in preparation for heat countermeasures and the workability is not good. Further, the flanges 60a and 60b of the terminals 3a and 3b having different polarities are brought into contact with each other and their uppermost portions (upper end surfaces) are TIG-welded, and the welded portion of TIG welding is raised, so that (1) in FIG. As shown, the height dimension including the joint portion of the terminals 3 of different polarities becomes large.

この発明は、このような課題に着目してなされたものであり、各キャパシタセル間の端子の接合部を含む高さ寸法が小さく抑えられ、これら端子間の接合も簡単かつ正確に処理しえる、電気二重層キャパシタモジュールの合理的な製造方法の提供を目的とする。   The present invention has been made paying attention to such a problem, and the height dimension including the junction of the terminals between the capacitor cells can be kept small, and the junction between these terminals can be processed easily and accurately. An object of the present invention is to provide a rational method for manufacturing an electric double layer capacitor module.

第1の発明は、複数の電気二重層キャパシタから構成されるキャパシタモジュールの製造方法において、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程、その複数を1組にアッシィ化した電気二重層キャパシタをモジュールボックスに収装する工程、を備えてなり、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程は、複数の電気二重層キャパシタの各個について、1対の端子の一方の先端側を正方向へ折り曲げてフランジを形成する一方、1対の端子の他方の先端側を逆方向へ折り曲げてフランジを形成する工程と、1番目の電気二重層キャパシタと2番目の電気二重層キャパシタとの2個について、電気二重層キャパシタの1対の端子の異極同士の一方のフランジを突き合わせて互いに接合し、1番目の電気二重層キャパシタに2番目の電気二重層キャパシタが積層状態に重なるよう2番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、積層状態の2番目の電気二重層キャパシタと3番目の電気二重層キャパシタとの2個について、2番目の電気二重層キャパシタの残る端子のフランジに対して3番目の電気二重層キャパシタの1対の端子の異極同士となる一方のフランジを重ね合わせて互いに接合し、2番目の電気二重層キャパシタに3番目の電気二重層キャパシタが積層状態に重なるよう3番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、これを繰り返すことにより、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態に組み立てる工程と、を備えることを特徴とする。   A first invention is a method of manufacturing a capacitor module composed of a plurality of electric double layer capacitors, the step of assembling a plurality of electric double layer capacitors one by one in series while connecting them one by one, A step of housing a plurality of electric double layer capacitors assembled into a set in a module box, and assembling the electric double layer capacitors into a single stacked state while connecting the electric double layer capacitors one by one in series. The process includes forming a flange by bending one tip side of a pair of terminals in the forward direction for each of the plurality of electric double layer capacitors, and bending the other tip side of the pair of terminals in a reverse direction to form a flange. Of the pair of terminals of the electric double layer capacitor with respect to two of the first electric double layer capacitor and the second electric double layer capacitor Two flanges are joined to each other by joining one flange, and two terminals on the joint side are connected to invert the second electric double layer capacitor so that the second electric double layer capacitor overlaps with the first electric double layer capacitor. The second electric double layer capacitor is folded against the flange of the remaining terminal of the second electric double layer capacitor with respect to the two of the second electric double layer capacitor and the third electric double layer capacitor in the stacked state. The third electric double layer capacitor is formed so that the third electric double layer capacitor overlaps the second electric double layer capacitor in a laminated state by superimposing and joining one flange of the pair of terminals opposite to each other. The terminal on the junction side is folded in two steps to reverse the current, and this is repeated to connect a plurality of electric double layer capacitors one by one in series. Characterized in that it comprises a step of assembling the stacked state of the first column, a while.

第2の発明は、複数の電気二重層キャパシタから構成されるキャパシタモジュールの製造方法において、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程、その複数を1組にアッシィ化した電気二重層キャパシタをモジュールボックスに収装する工程、を備えてなり、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程は、1番目の電気二重層キャパシタと2番目の電気二重層キャパシタとの2個について、1対の端子の異極同士を重ね合わせてこれらの一方を互いに接合し、1番目の電気二重層キャパシタに2番目の電気二重層キャパシタが積層状態に重なるよう2番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、積層状態の2番目の電気二重層キャパシタと3番目の電気二重層キャパシタとの2個について、2番目の電気二重層キャパシタの残る端子の先端側に対して3番目の電気二重層キャパシタの1対の端子の異極同士となる一方の先端側を重ね合わせて互いに接合し、2番目の電気二重層キャパシタに3番目の電気二重層キャパシタが積層状態に重なるよう3番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、これを繰り返すことにより、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態に組み立てる工程、を備えることを特徴とする。   According to a second aspect of the present invention, in the method of manufacturing a capacitor module including a plurality of electric double layer capacitors, a step of assembling a plurality of electric double layer capacitors one by one in series while connecting each one in series, A step of housing a plurality of electric double layer capacitors assembled into a set in a module box, and assembling the electric double layer capacitors into a single stacked state while connecting the electric double layer capacitors one by one in series. In the process, for two of the first electric double layer capacitor and the second electric double layer capacitor, the different polarities of a pair of terminals are overlapped with each other, and one of them is joined to each other. The terminal on the junction side is folded in two stages to invert the second electric double layer capacitor so that the second electric double layer capacitor overlaps the stacked state on the capacitor. For two of the second electric double layer capacitor and the third electric double layer capacitor in the state, a pair of the third electric double layer capacitor with respect to the tip side of the remaining terminal of the second electric double layer capacitor The tip ends of the terminals having different polarities are overlapped and joined together, and the third electric double layer capacitor is inverted so that the third electric double layer capacitor overlaps with the second electric double layer capacitor. Therefore, it is characterized in that it includes a step of assembling a plurality of electric double layer capacitors in series in one row while connecting each of the electric double layer capacitors in series by bending the terminal on the junction side in two stages.

第1の発明または第2の発明においては、複数の電気二重層キャパシタは、モジュールボックスへの収装に先立ち、1個ずつ直列に接続しつつ1列の積層状態にアッシィ化するので、各電気二重層キャパシタ間の接続についても、モジュールボックスに干渉されることなく、簡単かつ正確に処理できる。   In the first invention or the second invention, the plurality of electric double layer capacitors are assembled in one row in a stacked state while being connected in series one by one prior to the mounting in the module box. The connection between the double layer capacitors can be processed easily and accurately without being interfered by the module box.

第1の発明においては、各電気二重層キャパシタ間の接続は、異極同士の端子のフランジを突き合わせて互いに接合し、その後に積層位置へ電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げることにより、フランジが端子の内側にくるので、各キャパシタセル間の端子の接合部を含む高さ寸法を小さく抑えられる。また、端子の内側にくるフランジを接合するのでなく、フランジの接合後に端子を折り曲げるので、端子の内側にくるフランジの接合が簡単かつ正確に処理できる。また、積層する電気二重層キャパシタと積層される電気二重層キャパシタとの間において、異極同士のフランジが互いに鉛直な平面で接触する関係に設定すると、固定式の溶接機により、フランジの接合を安定した品質に維持しやすくなる。   In the first invention, the connection between the electric double layer capacitors is made by connecting the terminals on the junction side to invert the electric double layer capacitor to the stacking position after joining the flanges of the terminals of different polarities to each other. Since the flange comes to the inside of the terminal by bending in steps, the height dimension including the terminal joint between the capacitor cells can be kept small. Further, since the terminal is bent after joining the flanges, rather than joining the flanges inside the terminals, the joining of the flanges coming inside the terminals can be processed easily and accurately. Also, if the flanges of different polarities are set in contact with each other in a vertical plane between the laminated electric double layer capacitor and the laminated electric double layer capacitor, the flanges are joined by a fixed welding machine. It becomes easy to maintain stable quality.

第2の発明においては、第1の発明と同じく、従前のようにフランジが外側に突き出ないので、各キャパシタセル間の端子の接合部を含む高さ寸法を小さく抑えられる。この場合、接合後の端子を折り曲げることにより、端子の内側にくるフランジを持たないため、第1の発明に較べると、端子自体の長さを短く設定できる。また、積層する電気二重層キャパシタと積層される電気二重層キャパシタとの間においては、異極同士の端子の先端側が互いに水平な平面で接触する関係に設定すると、固定式の溶接機により、端子の接合を安定した品質に維持しやすくなる。   In the second invention, as in the first invention, since the flange does not protrude outward as in the prior art, the height dimension including the junction of the terminals between the capacitor cells can be kept small. In this case, by bending the terminal after joining, there is no flange on the inside of the terminal, so the length of the terminal itself can be set shorter than in the first invention. Moreover, between the electric double layer capacitor to be laminated and the electric double layer capacitor to be laminated, if the tip end sides of the terminals of different polarities are set to contact each other on a horizontal plane, the terminals are fixed by a fixed welding machine. This makes it easy to maintain a stable quality.

図に基づいて、この発明の実施形態に係る電気二重層キャパシタモジュールを説明する。   An electric double layer capacitor module according to an embodiment of the present invention will be described based on the drawings.

図1〜図3において、1は電気二重層キャパシタ(キャパシタセル)であり、10はモジュールボックスであり、ボックス10の内部に複数のキャパシタセルが収容される。複数のキャパシタセル1は、1列の積層状態に組み立てられ、前後の端板11,12との間に挟まれる。積層状態のキャパシタセル1の前側において、端板11の後面にバネ受13が固定され、中板15が最前部のキャパシタセル1に隣接して配置され、バネ受13と中板15との間にバネ14が介装される。前後の端板11,12間にバンド16,17が掛けられ、各バンド16,17の両端は、前側の端板11にネジ18を介して締め付けられる。これらにより、所定数のキャパシタセル1は、中板15と後側の端板12との間において、バネ14により所定の面圧に圧縮され、各個の内部抵抗性能を高められるのである。   1 to 3, 1 is an electric double layer capacitor (capacitor cell), 10 is a module box, and a plurality of capacitor cells are accommodated inside the box 10. The plurality of capacitor cells 1 are assembled in a single stacked state and sandwiched between the front and rear end plates 11 and 12. On the front side of the stacked capacitor cell 1, a spring receiver 13 is fixed to the rear surface of the end plate 11, and an intermediate plate 15 is disposed adjacent to the foremost capacitor cell 1, and between the spring receiver 13 and the intermediate plate 15. A spring 14 is interposed between the two. Bands 16 and 17 are hung between the front and rear end plates 11 and 12, and both ends of the bands 16 and 17 are fastened to the front end plate 11 via screws 18. As a result, the predetermined number of capacitor cells 1 are compressed to a predetermined surface pressure by the spring 14 between the middle plate 15 and the rear end plate 12, and the internal resistance performance of each piece is enhanced.

20はボックス10の底板であり、21はボックス10の側面カバーであり、1対の側面カバー21は、底板20を両側から囲むように立てられ、前後の端板11,12と共にネジ23を介して底板20に取り付けられる。1対の側面カバー21にパラレルモニタ基板30がボックス10の上部を塞ぐように取り付けられ、パラレルモニタ基板30から延びるケーブル31、32を挿通するためのグロメット34,35が側面カバー21に配置される。前後の端板11,12の各上部にブラケット36,37が取り付けられ、これらブラケット36,37にボックス10の上方へ突き出る端子38,39(ボックス端子)が取り付けられる。ボックス10において、各部品間の必要な箇所に絶縁材が配置される。   Reference numeral 20 denotes a bottom plate of the box 10, 21 denotes a side cover of the box 10, and the pair of side covers 21 are erected so as to surround the bottom plate 20 from both sides and are screwed together with the front and rear end plates 11 and 12 via screws 23. Are attached to the bottom plate 20. The parallel monitor board 30 is attached to the pair of side covers 21 so as to block the upper part of the box 10, and grommets 34 and 35 for inserting cables 31 and 32 extending from the parallel monitor board 30 are arranged on the side cover 21. . Brackets 36 and 37 are attached to the upper portions of the front and rear end plates 11 and 12, and terminals 38 and 39 (box terminals) protruding above the box 10 are attached to the brackets 36 and 37. In the box 10, an insulating material is disposed at a necessary position between the components.

パラレルモニタ基板30は、キャパシタセル1の電圧が所定値に達すると、そのキャパシタセル1について、それ以上に電圧が上昇するの抑えるように動作する電子部品を備える。図4は、パラレルモニタ基板30と各キャパシタセルとの配線を表すものであり、各端子3の頂面部(キャパシタセル1の積層方向と平行な部分)に円孔(差込穴)が形成され、パラレルモニタ基板30から延びるケーブル50が対応する端子3にその円孔への差込部を介して接続されるようになっている。   When the voltage of the capacitor cell 1 reaches a predetermined value, the parallel monitor substrate 30 includes an electronic component that operates so as to suppress a further increase in the voltage of the capacitor cell 1. FIG. 4 shows wiring between the parallel monitor substrate 30 and each capacitor cell. A circular hole (insertion hole) is formed in the top surface portion of each terminal 3 (portion parallel to the stacking direction of the capacitor cell 1). The cable 50 extending from the parallel monitor board 30 is connected to the corresponding terminal 3 through the insertion portion into the circular hole.

図5は、キャパシタセル1の構成を例示するものであり、1aは複数の正極体と負極体をこれらの間にセパレータを介装しながら交互に重ねることにより組成される積層体であり、2は積層体1aを電解液と共に密封する容器であり、3(3a,3b)は容器2の外部に配置される1対の端子(セル端子)である。正極体および負極体は、集電極とその両面に形成される分極性電極とから平板状に構成される。これら集電極は、矩形状の金属箔(例えば、アルミニウム箔)からなり、矩形の一辺に片側に寄せて帯状のリード4(4a,4b)が一体成形され、リード4の同極同士が結束される。1対の端子3は、金属板(例えば、アルミニウム板)から形成され、極性が対応するリード3の結束部に接合される。5は、端子3とリード4との接合部である。   FIG. 5 exemplifies the configuration of the capacitor cell 1, and reference numeral 1 a denotes a laminated body composed by alternately stacking a plurality of positive electrode bodies and negative electrode bodies with separators interposed therebetween. Is a container for sealing the laminated body 1a together with the electrolytic solution, and 3 (3a, 3b) is a pair of terminals (cell terminals) arranged outside the container 2. A positive electrode body and a negative electrode body are comprised in flat form from the collector electrode and the polarizable electrode formed in the both surfaces. These collector electrodes are made of a rectangular metal foil (for example, an aluminum foil), and a strip-like lead 4 (4a, 4b) is integrally formed on one side of the rectangle so that the same poles of the leads 4 are bound together. The The pair of terminals 3 is formed of a metal plate (for example, an aluminum plate) and is joined to a binding portion of the lead 3 having a corresponding polarity. Reference numeral 5 denotes a joint portion between the terminal 3 and the lead 4.

容器2は、複数の樹脂層に金属の中間層を含む柔軟な積層フィルムから成形される2つの容器部材(底側部材と蓋側部材)からなり、これらを組み合わせると互いに向き合う凹部により底側部材と蓋側部材との間に積層体1aの収容部が形成される。積層体1aは、蓋側部材の内側に収められ、その上に蓋側部材が被せられる。容器2の周縁2aにおいて、1対の端子(金属板)3a,3bの一部が引き出される一辺を除く三辺が密閉される。容器2は1対の端子3a,3bが突き出る一辺が開口可能となり、その開口部から内部へ電解液が注入され、所定の処理(電解賦活など)が終わると、残る一辺が密閉されるのである。   The container 2 is composed of two container members (a bottom member and a lid member) formed from a flexible laminated film including a metal intermediate layer in a plurality of resin layers. A housing portion for the laminated body 1a is formed between the cover member and the lid side member. The laminated body 1a is housed inside the lid-side member, and the lid-side member is placed thereon. At the peripheral edge 2a of the container 2, the three sides excluding the one side from which a part of the pair of terminals (metal plates) 3a, 3b is drawn are sealed. The container 2 can be opened on one side from which the pair of terminals 3a and 3b protrudes, and the electrolyte is injected into the inside from the opening, and after a predetermined treatment (electrolytic activation, etc.) is completed, the remaining one side is sealed. .

このような、複数のキャパシタセル1から構成されるキャパシタモジュールの製造方法においては、複数のキャパシタセルを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程、その複数を1組にアッシィ化したキャパシタセル1をモジュールボックス10に収装する工程、を備える。図6は、複数のキャパシタセルを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程を説明するものであり、(a)〜(e)の工程に入る前の段階において、キャパシセル1の各個について、1対の端子3の一方の先端側を正方向へ略直角に折り曲げてフランジ40aを形成する一方、1対の端子3の他方の先端側を逆方向へ略直角に折り曲げてフランジ40bを形成する工程が行われる。   In such a method of manufacturing a capacitor module composed of a plurality of capacitor cells 1, a process of assembling a plurality of capacitor cells one by one into a stacked state while connecting the capacitor cells one by one in series. A step of receiving the assembled capacitor cell 1 in the module box 10. FIG. 6 illustrates a process of associating a plurality of capacitor cells one by one in series while being connected in series, and in a stage before entering the processes (a) to (e). For each piece of the capacitor cell 1, one end side of the pair of terminals 3 is bent in a normal direction at a substantially right angle to form a flange 40 a, while the other end side of the pair of terminals 3 is bent in a reverse direction at a substantially right angle. The process of forming the flange 40b is performed.

1番目のキャパシタセル(1-1)と2番目のキャパシタセル(1-2)との2個について、(a)においては、異極同士の一方のフランジ40a,40bを突き合わせて互いに接合する。(b)においては、接合側の端子3の一方をフランジ40aから所定距離だけ離れる部位で略直角に折り曲げる。(c)においては、接合側の端子の他方をフランジ4bから所定距離だけ離れる部位で略直角に折り曲げる。これらの折り曲げ加工により、2番目のキャパシタセル(1-2)が反転しつつ、1番目のキャパシタセル(1-1)と積層状態に重なるようになる。   In (a), two flanges 40a and 40b of different polarities are brought into contact with each other and joined to each other for the first capacitor cell (1-1) and the second capacitor cell (1-2). In (b), one side of the terminal 3 on the joining side is bent at a substantially right angle at a part away from the flange 40a by a predetermined distance. In (c), the other of the terminals on the joining side is bent at a substantially right angle at a part away from the flange 4b by a predetermined distance. By these bending processes, the second capacitor cell (1-2) is inverted and overlapped with the first capacitor cell (1-1) in a stacked state.

(d)においては、積層状態の2番目のキャパシタセル(1-2)と3番目のキャパシタセル(1-3)との2個について、2番目のキャパシタセル(1-2)の残るフランジ40aに対して3番目のキャパシタセル(1-3)の異極同士となる一方のフランジ40bを突き合わせて互いに接合し、2番目のキャパシタセル(1-2)に3番目のキャパシタセル(1-3)が積層状態に重なるよう3番目の電気二重層キャパシタ(1-3)を反転させるべく、2番目のキャパシタセル(1-2)の端子をフランジ40aから所定距離だけ離れる部位で略直角に折り曲げる。次いで、3番目のキャパシタセル(1-3)の接合側の端子をフランジ4bから所定距離だけ離れる部位で略直角に折り曲げる。これを4番目以降のキャパシタセル(1-4)〜(1-n)についても繰り返すことにより、4個以上のキャパシタセル(1-4)〜(1-n)は、1個ずつ直列に接続しつつ、1列の積層状態に組み立てられる。(e)においては、仮止め用のバンド42を掛け回してこれらキャパシタセル1の集積体41を締め付けることにより、ボックス10への収装に備えるのである。   In (d), the flange 40a in which the second capacitor cell (1-2) remains for two of the stacked second capacitor cell (1-2) and third capacitor cell (1-3). The third capacitor cell (1-3) has one flange 40b opposite to each other but joined to each other and joined to the second capacitor cell (1-2). ) To invert the third electric double layer capacitor (1-3) so that it overlaps the stacked state, the terminal of the second capacitor cell (1-2) is bent at a substantially right angle at a position away from the flange 40a by a predetermined distance. . Next, the terminal on the joint side of the third capacitor cell (1-3) is bent at a substantially right angle at a portion away from the flange 4b by a predetermined distance. By repeating this for the fourth and subsequent capacitor cells (1-4) to (1-n), four or more capacitor cells (1-4) to (1-n) are connected in series one by one. However, it is assembled in a single-layered state. In (e), the band 42 for temporary fixing is wound around and the integrated body 41 of the capacitor cells 1 is tightened to prepare for the storage in the box 10.

集積体41において、両端のキャパシタセル(1-1),(1-n)は、一方に正極側の端子3a、他方に負極側の端子3b、が非接合状態に残される(図4、参照)。端子3a,3bは、フランジ40a,40bから所定距離だけ離れる部位で直角に折り曲げられ、ボックス端子38.39に先端側のフランジ40a,40bを介して接続される(図1〜図3、参照)。   In the integrated body 41, the capacitor cells (1-1) and (1-n) at both ends are left in a non-bonded state with the positive terminal 3a on the one hand and the negative terminal 3b on the other hand (see FIG. 4). ). The terminals 3a and 3b are bent at a right angle at a portion away from the flanges 40a and 40b by a predetermined distance, and connected to the box terminal 38.39 via the flanges 40a and 40b on the front end side (see FIGS. 1 to 3). .

このような製造方法により、複数のキャパシタセル1は、モジュールボックス10への収装に先立ち、1個ずつ直列に接続しつつ1列の積層状態にアッシィ化するので、各キャパシタセル1間の接続についても、ボックス10に干渉させることなく、簡単かつ正確に処理できる。   According to such a manufacturing method, the plurality of capacitor cells 1 are assembled in a single-layer stacked state while being connected one by one in series prior to mounting in the module box 10. Can be processed easily and accurately without interfering with the box 10.

図6の工程においては、各キャパシタセル1間の接続は、異極同士の端子のフランジ40a,40bを突き合わせて互いに接合し、その後に積層位置へキャパシタセル1を反転させるべく接合側の端子3a,3bを2段に折り曲げることにより、図8の(2)のようにフランジ40a,40bが端子3a,3bの内側にくるので、各キャパシタセル1間の端子3の接合部を含む高さ寸法を小さく抑えられる。この場合、端子3a,3bの内側のフランジ40a,40bを接合するのでなく、フランジ40a,40bの接合後に端子3a,3bを折り曲げるので、端子3a,3bの内側にくるフランジ40a,40bの接合が簡単かつ正確に処理できる。   In the process of FIG. 6, the connection between the capacitor cells 1 is made by joining the flanges 40a and 40b of the terminals of different polarities to join each other, and then joining the terminal 3a on the joining side to invert the capacitor cell 1 to the stacking position. , 3b is bent in two steps so that the flanges 40a, 40b come inside the terminals 3a, 3b as shown in FIG. 8 (2), so that the height dimension including the junction of the terminals 3 between the capacitor cells 1 is included. Can be kept small. In this case, since the terminals 3a and 3b are bent after the joining of the flanges 40a and 40b, rather than joining the flanges 40a and 40b inside the terminals 3a and 3b, the joining of the flanges 40a and 40b inside the terminals 3a and 3b is performed. It can be processed easily and accurately.

積層するキャパシタセル1と積層されるキャパシタセル1との間において、異極同士のフランジ40a,40bが互いに鉛直な平面で接触する関係に設定すると、固定式の溶接機(溶接アームがx軸方向に固定かつy軸方向のみ可動の溶接機であり、TIG溶接と異なり、熱対策の準備時間が要らない、スポット溶接または超音波溶接が望ましい)により、フランジ40a,40bの接合を安定した品質に維持しやすくなる。(d)において、51はキャパシタセル1と厚みが同一のダミーセルであり、積層状態のキャパシタセル1(図中の左側)の数が増えるに従ってダミーセル52の積み重ねる数を増やすことにより、フランジ40a,40bを互いに段差なく簡単に突き合わせることができる。ダミーセル51の数を増やすのでなく、1番目のキャパシタセル(1-1)を最上部に載せるダミーセル51の積み重なる数を積層状態のキャパシタセル1の数が増えるに従って1個ずつ減らすようにしても良い。   When the flanges 40a and 40b of different polarities are in contact with each other in a vertical plane between the capacitor cell 1 to be stacked and the capacitor cell 1 to be stacked, a fixed welding machine (the welding arm is in the x-axis direction) The welding of the flanges 40a and 40b is stable by using a welding machine that is fixed to the Y axis and movable only in the y-axis direction. Easy to maintain. In (d), reference numeral 51 denotes a dummy cell having the same thickness as the capacitor cell 1, and the number of stacked dummy cells 52 is increased as the number of capacitor cells 1 (left side in the figure) in the stacked state increases, whereby the flanges 40a, 40b. Can be easily matched without any step. Instead of increasing the number of dummy cells 51, the number of stacked dummy cells 51 on which the first capacitor cell (1-1) is placed on the top may be decreased one by one as the number of capacitor cells 1 in the stacked state increases. .

図7は、図6の工程に代わる別の工程(複数のキャパシタセルを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程)を説明するものであり、各キャパシタセル1は、図6の場合と異なり、1対の端子3の先端側にフランジ40a,40bの形成されないキャパシタセル(図5、参照)がそのまま用いられる。   FIG. 7 explains another step (step of associating a plurality of capacitor cells one by one in series while stacking them one by one) in place of the step of FIG. Unlike the case of FIG. 6, the capacitor cell (see FIG. 5) in which the flanges 40 a and 40 b are not formed on the tip end side of the pair of terminals 3 is used as it is.

1番目のキャパシタセル(1-1)と2番目のキャパシタセル(1-2)との2個について、(A)においては、異極同士の端子3a,3bの先端側を重ね合わせて互いに接合する。(B)においては、接合側の端子3の一方3aを接合部53から所定距離だけ離れる部位で略直角に折り曲げる。(C)においては、接合側の端子3の他方3bを接合部53から所定距離だけ離れる部位で略直角に折り曲げる。これらの折り曲げ加工により、2番目のキャパシタセル(1-2)が反転しつつ、1番目のキャパシタセル(1-1)と積層状態に重なるようになる。なお、(A)においては、1番目のキャパシタセル(1-1)の正極側(または負極側)の端子3aの上に2番目のキャパシタセル(1-2)の負極側(または正極側)の端子3bを重ね合わせる一方、1番目のキャパシタセル(1-2)の負極側(または正極側)の端子の下に2番目のキャパシタセル(1-2)の正極側(または負極側)の端子3aを重ね合せることにより、(B)の折り曲げ加工が非接合側の端子同士の干渉に妨げられないようになる。   In (A), the first capacitor cell (1-1) and the second capacitor cell (1-2) are joined to each other by overlapping the tips of the terminals 3a and 3b of different polarities. To do. In (B), one side 3a of the terminal 3 on the joining side is bent at a substantially right angle at a part away from the joining part 53 by a predetermined distance. In (C), the other side 3b of the terminal 3 on the joining side is bent at a substantially right angle at a portion away from the joining portion 53 by a predetermined distance. By these bending processes, the second capacitor cell (1-2) is inverted and overlapped with the first capacitor cell (1-1) in a stacked state. In (A), the negative electrode side (or positive electrode side) of the second capacitor cell (1-2) is placed on the positive electrode side (or negative electrode side) terminal 3a of the first capacitor cell (1-1). The terminal 3b of the second capacitor cell (1-2) is placed under the terminal on the negative electrode side (or positive electrode side) of the first capacitor cell (1-2), while the terminal 3b of the second capacitor cell (1-2) is overlapped. By overlapping the terminals 3a, the bending process (B) is not hindered by interference between terminals on the non-joining side.

(D)においては、積層状態の2番目のキャパシタセル(1-2)と3番目のキャパシタセル(1-3)との2個について、2番目のキャパシタセル(1-2)の残る端子3aの先端側に対して3番目のキャパシタセル(1-3)の異極同士となる一方の端子3bの先端側を重ね合わせて互いに接合し、2番目のキャパシタセル(1-2)に3番目のキャパシタセル(1-3)が積層状態に重なるよう3番目の電気二重層キャパシタ(1-3)を反転させるべく、接合側の端子3の一方3aを接合部51から所定距離だけ離れる部位で略直角に折り曲げる。次いで、接合側の端子3の他方3bを接合部51から所定距離だけ離れる部位で略直角に折り曲げる。これを4番目以降のキャパシタセルについても繰り返すことにより、4個以上のキャパシタセルは、1個ずつ直列に接続しつつ、1列の積層状態に組み立てられる。(e)においては、仮止め用のバンドを掛け回してこれらキャパシタセルの集積体を締め付けることにより、ボックスへの収装に備えるのである。   In (D), the remaining terminal 3a of the second capacitor cell (1-2) for two of the second capacitor cell (1-2) and the third capacitor cell (1-3) in the stacked state. The tip side of one terminal 3b, which is the opposite pole of the third capacitor cell (1-3), is overlapped and joined to the tip side of the third capacitor cell (1-3). In order to invert the third electric double layer capacitor (1-3) so that the capacitor cell (1-3) of the first layer overlaps the stacked state, one side 3a of the junction side terminal 3 is separated from the junction 51 by a predetermined distance. Bend it at a right angle. Next, the other side 3 b of the terminal 3 on the joining side is bent at a substantially right angle at a part away from the joining part 51 by a predetermined distance. By repeating this for the fourth and subsequent capacitor cells, four or more capacitor cells are assembled in a single-layer stacked state while being connected one by one in series. In (e), the band for temporary fixing is wound around and the integrated body of these capacitor cells is tightened to prepare for housing in the box.

集積体43において、両端のキャパシタセル(1-1),(1-n)は、一方に正極側の端子3a、他方に負極側の端子3b、が非接合状態に残される。端子3a,3bは、2段に折り曲げることにより、ボックス端子38.39に先端側のフランジ40a,40bを介して接続される。各端子3の接合部51を含む頂面部(キャパシタセル1の積層方向と平行な部分)に円孔(差込穴)が形成され、パラレルモニタ基板30から延びるケーブル50が対応する端子3a,3bにその円孔への差込部を介して接続されるのである。   In the integrated body 43, the capacitor cells (1-1) and (1-n) at both ends are left in a non-bonded state with the positive terminal 3a on the one hand and the negative terminal 3b on the other hand. The terminals 3a and 3b are connected to the box terminal 38.39 through the flanges 40a and 40b on the front end side by bending in two stages. A circular hole (insertion hole) is formed in a top surface portion (a portion parallel to the stacking direction of the capacitor cell 1) including the joint portion 51 of each terminal 3, and a cable 50 extending from the parallel monitor substrate 30 corresponds to the corresponding terminal 3a, 3b. It is connected via the insertion part to the circular hole.

図7のような工程により、各端子3は図8の(3)のように接続され、従前のようにフランジ60a,60bが外側に突き出ないので、図6の場合と同じく各キャパシタセル1間の端子3の接合部を含む高さ寸法を小さく抑えられる。この場合、接合後の端子3を折り曲げることにより、端子の内側にくるフランジ40a,40bを持たないため、図6の場合に較べると、端子3自体の長さを短く設定できる。また、積層するキャパシタセル1と積層されるキャパシタセル1との間においては、異極同士の端子3a,3bの先端側が互いに水平な平面で接触する関係に設定すると、固定式の溶接機(溶接アームがx軸方向に固定かつy軸方向のみ可動の溶接機であり、TIG溶接と異なり、熱対策の準備時間が要らない、スポット溶接または超音波溶接が望ましい)により、端子3の接合を安定した品質に維持しやすくなる。   7, the terminals 3 are connected as shown in FIG. 8 (3), and the flanges 60 a and 60 b do not protrude outward as in the conventional case. The height dimension including the joint portion of the terminal 3 can be kept small. In this case, by bending the terminal 3 after joining, there is no flange 40a, 40b that comes inside the terminal, so the length of the terminal 3 itself can be set shorter than in the case of FIG. Further, between the capacitor cell 1 to be stacked and the capacitor cell 1 to be stacked, if a relationship is established in which the tip sides of the terminals 3a and 3b having different polarities are in contact with each other on a horizontal plane, a fixed welding machine (welding) This is a welding machine with an arm fixed in the x-axis direction and movable only in the y-axis direction. Unlike TIG welding, it does not require heat preparation time, and spot welding or ultrasonic welding is desirable. It becomes easy to maintain the quality.

この発明の実施形態に係るキャパシタモジュールの断面図である。It is sectional drawing of the capacitor module which concerns on embodiment of this invention. 同じく図1の矢視図である。Similarly, it is an arrow view of FIG. 同じく分解斜視図である。It is an exploded perspective view similarly. 同じく配線図である。It is also a wiring diagram. 同じく電気二重層キャパシタの構成に係る説明図である。It is explanatory drawing which similarly concerns on the structure of an electrical double layer capacitor. 同じくキャパシタモジュールの製造方法を説明する工程図である。It is process drawing explaining the manufacturing method of a capacitor module similarly. キャパシタモジュールの製造方法を説明する別の工程図である。It is another process drawing explaining the manufacturing method of a capacitor module. この発明の実施形態に係るキャパシタモジュールを説明する比較図である。It is a comparison figure explaining the capacitor module concerning an embodiment of this invention. 従前のキャパシタモジュールに係る説明図である。It is explanatory drawing which concerns on the conventional capacitor module.

符号の説明Explanation of symbols

1 電気二重層キャパシタ(キャパシタセル)
3(3a,3b) 端子
10 モジュールボックス
14 加圧バネ
30 パラレルモニタ基板
40a,40b フランジ
51 端子の接合部
41,43 集積体
42 バンド
1 Electric double layer capacitor (capacitor cell)
3 (3a, 3b) Terminal 10 Module box 14 Pressure spring 30 Parallel monitor board 40a, 40b Flange 51 Terminal joint 41, 43 Integrated body 42 Band

Claims (2)

複数の電気二重層キャパシタから構成されるキャパシタモジュールの製造方法において、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程、その複数を1組にアッシィ化した電気二重層キャパシタをモジュールボックスに収装する工程、を備えてなり、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程は、複数の電気二重層キャパシタの各個について、1対の端子の一方の先端側を正方向へ折り曲げてフランジを形成する一方、1対の端子の他方の先端側を逆方向へ折り曲げてフランジを形成する工程と、1番目の電気二重層キャパシタと2番目の電気二重層キャパシタとの2個について、電気二重層キャパシタの1対の端子の異極同士の一方のフランジを突き合わせて互いに接合し、1番目の電気二重層キャパシタに2番目の電気二重層キャパシタが積層状態に重なるよう2番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、積層状態の2番目の電気二重層キャパシタと3番目の電気二重層キャパシタとの2個について、2番目の電気二重層キャパシタの残る端子のフランジに対して3番目の電気二重層キャパシタの1対の端子の異極同士となる一方のフランジを重ね合わせて互いに接合し、2番目の電気二重層キャパシタに3番目の電気二重層キャパシタが積層状態に重なるよう3番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、これを繰り返すことにより、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態に組み立てる工程と、を備えることを特徴とする電気二重層キャパシタモジュールの製造方法。   In a method of manufacturing a capacitor module composed of a plurality of electric double layer capacitors, a step of associating a plurality of electric double layer capacitors one by one in series while connecting them one by one in series, and assembling the plurality into one set The step of assembling the electric double layer capacitors into a module box, and connecting the plurality of electric double layer capacitors one by one in series to form a stacked state in a row. For each of the double-layer capacitors, forming a flange by bending one tip side of a pair of terminals in the forward direction while forming a flange by bending the other tip side of the pair of terminals in the reverse direction; For two of the first electric double layer capacitor and the second electric double layer capacitor, one pair of terminals of different polarity of the pair of terminals of the electric double layer capacitor is provided. The first electric double layer capacitor and the second electric double layer capacitor are overlapped with each other so that the second electric double layer capacitor is inverted so that the second electric double layer capacitor is inverted in two stages, For two of the second electric double layer capacitor and the third electric double layer capacitor in the stacked state, a pair of the third electric double layer capacitor is set against the flange of the remaining terminal of the second electric double layer capacitor. In order to invert the third electric double layer capacitor so that the third electric double layer capacitor overlaps with the second electric double layer capacitor in a laminated state by superimposing the flanges of the different polarities of the terminals and joining them together. By bending the terminal on the junction side in two stages and repeating this, a plurality of electric double layer capacitors are connected in series one by one, Method of manufacturing an electric double layer capacitor module comprising: the step of assembling the layer state, the. 複数の電気二重層キャパシタから構成されるキャパシタモジュールの製造方法において、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程、その複数を1組にアッシィ化した電気二重層キャパシタをモジュールボックスに収装する工程、を備えてなり、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態にアッシィ化する工程は、1番目の電気二重層キャパシタと2番目の電気二重層キャパシタとの2個について、1対の端子の異極同士を重ね合わせてこれらの一方を互いに接合し、1番目の電気二重層キャパシタに2番目の電気二重層キャパシタが積層状態に重なるよう2番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、積層状態の2番目の電気二重層キャパシタと3番目の電気二重層キャパシタとの2個について、2番目の電気二重層キャパシタの残る端子の先端側に対して3番目の電気二重層キャパシタの1対の端子の異極同士となる一方の先端側を重ね合わせて互いに接合し、2番目の電気二重層キャパシタに3番目の電気二重層キャパシタが積層状態に重なるよう3番目の電気二重層キャパシタを反転させるべく接合側の端子を2段に折り曲げ、これを繰り返すことにより、複数の電気二重層キャパシタを1個ずつ直列に接続しつつ1列の積層状態に組み立てる工程、を備えることを特徴とする電気二重層キャパシタモジュールの製造方法。   In a method of manufacturing a capacitor module composed of a plurality of electric double layer capacitors, a step of associating a plurality of electric double layer capacitors one by one in series while connecting them one by one in series, and assembling the plurality into one set The step of assembling the electric double layer capacitors into a module box, the step of assembling a plurality of electric double layer capacitors one by one in series while being connected in series is the first step. For two of the electric double layer capacitor and the second electric double layer capacitor, the different polarities of a pair of terminals are overlapped and one of them is joined to each other, and the second electric capacitor is connected to the first electric double layer capacitor. In order to invert the second electric double layer capacitor so that the double layer capacitor overlaps the laminated state, the terminal on the junction side is folded in two steps, and the second layer in the laminated state For two of the electric double layer capacitor and the third electric double layer capacitor, different polarities of the pair of terminals of the third electric double layer capacitor with respect to the front end side of the remaining terminal of the second electric double layer capacitor The terminals on the junction side are reversed so as to invert the third electric double layer capacitor so that the third electric double layer capacitor is stacked on the second electric double layer capacitor. The electric double layer capacitor module is characterized by comprising a step of assembling a plurality of electric double layer capacitors in series in one row while connecting each of the electric double layer capacitors in series by bending the capacitor in two stages. Method.
JP2005196250A 2005-07-05 2005-07-05 Manufacturing method of electric double layer capacitor module Expired - Fee Related JP4568646B2 (en)

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JPH11162443A (en) * 1997-12-02 1999-06-18 Toshiba Battery Co Ltd Assembled battery
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JP2000114121A (en) * 1998-10-06 2000-04-21 Fuji Electric Co Ltd Electric double layer capacitor battery
JP2002151365A (en) * 2000-11-10 2002-05-24 Ngk Insulators Ltd Capacitor module and method for manufacturing the same
JP2004119043A (en) * 2002-09-24 2004-04-15 Sony Corp Battery pack
JP2006185733A (en) * 2004-12-27 2006-07-13 Nissan Motor Co Ltd Manufacturing method of battery pack and battery pack manufactured by this method
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