JP4543505B2 - Microcomputer control method and abnormality monitoring device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a microcomputer control method and an abnormality monitoring apparatus provided with a zero register dedicated to reading zero value data.
[0002]
[Prior art]
Conventionally, in order to efficiently execute pipeline processing, a RISC type microcomputer has only a simple instruction set that can be processed in one cycle, and each instruction has the same instruction length. Has been. For this reason, for example, the use of immediate data that requires a large number of bits in the addressing mode used to describe the instruction is limited, or instructions that can be substituted with other instructions are omitted to simplify the hardware. To do.
[0003]
Specifically, in memory access instructions, when specifying an effective address, as an addressing mode, register indirect that specifies the register that stores the effective address itself, or the register and the number of bits that store the reference address Although it is possible to use the indirect register with a displacement that specifies the effective address by using the displacement that is the immediate data limited in this way, it is not possible to specify the effective address using only the immediate data, or to write to the memory. In the embedded instruction, when the operand is specified, the register directly specifying the register in which the operand is stored can be used directly, but the operand cannot be specified by the immediate data. Furthermore, data transfer between registers can be substituted by an operation that specifies the stored value of the transfer source register as the added value and stores the addition result in the transfer destination register and performs zero addition with the add instruction. Such a data transfer instruction between registers is also omitted.
[0004]
In this way, in a RISC type microcomputer, for example, when using a register indirect with displacement to a memory whose head address (reference address) is 0, clearing memory contents, or transferring data between registers, etc. Because the process of setting zero value data frequently appears in the system, a so-called zero register that is used exclusively for reading zero value data by fixing the stored value to zero is provided, and the process of setting zero value data in the register is omitted. Thus, the processing is speeded up.
[0005]
The zero register includes a case where one of the general-purpose registers is used as a zero register and a case where a special register whose stored value is fixed to zero by hardware is used. In the case of a zero register using a general-purpose register, the setting of zero value data in the zero register is performed at the time of initialization after starting up the apparatus.
[0006]
[Problems to be solved by the invention]
However, if a hardware failure occurs in the zero register, or if the zero register value is rewritten due to a software failure or external noise, especially with a general purpose register. If the value read from the zero register is changed to a value other than zero for some reason, the memory is subsequently accessed at an incorrect address, or the memory is cleared or data is transferred between registers. At this time, an error occurs in data set in the memory or the register, and as a result, there is a problem that the microcomputer performs an illegal process.
[0007]
In order to solve the above-described problems, the present invention provides a microcomputer control method and an abnormality monitoring apparatus that reliably prevent an unauthorized process from being performed in a microcomputer due to an abnormality in a read value of a zero register. With the goal.
[0008]
[Means for Solving the Problems]
The invention according to claim 1, which is an invention for achieving the above object, uses a general-purpose register capable of arbitrarily reading and writing data as a zero register dedicated to reading zero value data, and an instruction using the zero register. A microcomputer control method to be executed, which repeatedly checks whether or not there is an abnormality in the read value from the zero register at every predetermined execution timing. characterized by restarting the prohibition or microcomputer to execute the normal processing using the zero register by the computer.
[0009]
Therefore, according to the microcomputer control method of the present invention, if there is an abnormality in the read value from the zero register, the microcomputer does not perform normal processing, so an incorrect processing result based on the abnormality in the read value of the zero register. As a result, it is possible to improve the reliability of a device constituted by a microcomputer having such a zero register.
[0010]
As described in claim 2, when the microcomputer executes a plurality of normal processes in order, it is desirable that the above-described inspection is always performed for each process with the execution timing as the start timing of each normal process .
[0011]
Further, according to the present invention, as described in claim 3 , the zero register is reset before the above-described inspection, or when the readout value is abnormal as a result of the inspection as described in claim 4 , Executing a standby process that repeats register resetting and checking prohibits the execution of normal processing. When the abnormal read value is resolved by the standby process, the normal processing is canceled by terminating the standby process. You may do it.
[0012]
In other words, with the zero register using a general-purpose register, rewriting of the zero register setting value due to the influence of external noise, etc. is normal without resetting the microprocessor by resetting the zero register. You can easily return to the correct state.
[0013]
The invention according to claim 5 is directed to a microcomputer that uses a general-purpose register that can arbitrarily read and write data as a zero register for reading zero-value data and executes an instruction using the zero register. In the apparatus , the zero register checking means checks whether or not the read value from the zero register is normal, and if the read value is abnormal as a result of the check, the abnormality processing means sets the zero register by the microcomputer. Usually prohibit or treatment with, or characterized by restarting the microcomputer.
[0014]
These zero register inspection means and abnormality processing means are preferably realized as processing executed by the microcomputer in order not to increase hardware, but when realized by hardware, when realized by software In contrast, since the zero register can be inspected at all times, it is possible to respond more quickly to an abnormality of the zero register.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1A is a block diagram showing a schematic configuration of a microcomputer to which the present invention is applied.
[0016]
As shown in FIG. 1A, the microcomputer 10 of this embodiment is composed of a RISC type CPU 11 and is composed of a well-known one-chip microcomputer in which a ROM 12, a RAM 13, and various peripheral circuits 14 are built.
The peripheral circuit 14 is used as a so-called watchdog timer, and a timer (hereinafter referred to as “WD timer”) 14a that outputs a WDT signal that becomes active when a reset command is not input and times out within a preset monitoring period. And a reset signal generation circuit 14b that activates an RST signal for hardware resetting the microcomputer 10 for a predetermined period when a change in the WDT signal to active is detected.
[0017]
As shown in FIG. 1B, the CPU 11 includes 16 general-purpose registers R0 to R15 each having a 32-bit width. Among these, the registers R13 to R15 have predetermined uses determined by a compiler to be used. ing. That is, here, the register R13 is used as a zero register used exclusively for reading zero value data, the register R14 is used as a link pointer, and the register R15 is used as a stack pointer.
[0018]
In the zero register, zero value data (00000000H) is written in the initialization process executed after the microcomputer 10 is turned on. Thereafter, the write data for clearing the contents of the RAM 13 and the display are displayed. It is used as a reference address or the like when accessing the RAM 13 (the head is address 0H) using the register indirect addressing mode with a displacement.
[0019]
Here, the CPU 11 implements various functions by executing a program stored in the ROM 12, but the program is divided into a plurality of modules for each function to be implemented, and each module is sequentially or It is assumed that the system is activated when preset activation conditions are met.
[0020]
Each module is configured to always execute a zero register inspection process, which will be described later, at the head of the module, and the main process of the module to be executed after the zero register inspection process is executed normally. Then, a reset command for the WD timer 14a is appropriately inserted so that the WD timer 14a does not time out.
[0021]
Next, the contents of the zero register inspection process executed at the head of each module will be described with reference to the flowchart shown in FIG.
As shown in FIG. 2, when this processing is started, first, in S110, the zero register is reset, that is, zero value data is written to the zero register, and in the subsequent S120, the setting is made from the zero register. The value DZ is read.
[0022]
In S130, it is checked whether or not the read value DZ from the zero register matches the previously written zero value data. If they match, the zero register read value DZ is assumed to be normal. This process ends.
On the other hand, if the read value DZ from the zero register does not match the zero value data in S130, the process returns to S110, and the reset of the zero register, reading of the set value of the zero register, and inspection of the read value DZ are repeatedly executed. To do. The process of repeating S110 to S130 corresponds to the standby process in the present invention. If the read value DZ of the zero register is restored to the normal value by resetting the zero register repeatedly performed during the standby process, the present process is terminated.
[0023]
In other words, by executing this process, in the module in which this process is incorporated, the main process of the module is always started with the zero register set correctly.
If the zero register does not match the zero value data, the loop of S110 to S130 cannot be exited, so that not only the main process of the module is not executed but also the WD timer 14a inserted in the main process. Since the reset command is not executed, if this state continues for the monitoring period or longer, the WDT signal becomes active, and as a result, the microcomputer 10 is hard reset.
[0024]
In this embodiment, the zero register inspection process corresponds to the zero register inspection means in the present invention, and the zero register inspection process, the WD timer 14a, and the reset signal generation circuit 14b correspond to the abnormality processing means.
As described above, in the microcomputer 10 of the present embodiment, when the read value of the zero register is abnormal (does not match the zero value data), the main process is not executed. The processing does not generate an illegal processing result based on the abnormality of the read value of the zero register, and the reliability of the device configured using the microcomputer 10 can be improved.
[0025]
If the read value does not return to the normal value even after resetting the zero register, a hardware reset is performed, so that the zero register set value is corrupted due to external noise. There is a possibility that this can be resolved when an abnormality occurs due to any cause other than a hardware failure.
[0026]
In the above embodiment, when the read value of the zero value data does not coincide with the zero value data (S130-NO), the process returns to S110 to repeatedly reset the zero register and check the read value after the reset. However, as shown in FIG. 3A, instead of returning to S110, the process may be shifted to S140 to execute an abnormality process as an abnormality processing means.
[0027]
In this abnormality process, software reset may be performed, or an abnormality message may be displayed to stop the operation of the CPU. However, when the operation of the CPU is stopped, the hardware reset is eventually performed when the WD timer 14a times out.
[0028]
In the above embodiment, one of the general-purpose registers is used as the zero register. However, as shown in FIG. 3B, a dedicated zero register whose stored value is fixed to zero by hardware, A general-purpose register may be provided separately.
However, in this case, since the zero register cannot be reset, the zero register checking process may be performed by omitting S110 from the flowcharts shown in FIGS. 2 and 3A.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a schematic configuration of a microcomputer according to an embodiment and an explanatory diagram of a zero register.
FIG. 2 is a flowchart showing the contents of a zero register inspection process.
FIG. 3 is an explanatory diagram for supplementing the description of a modified example.
[Explanation of symbols]
10 ... Microcomputer 11 ... CPU 12 ... ROM
DESCRIPTION OF SYMBOLS 13 ... RAM 14 ... Peripheral circuit 14a ... WD timer 14b ... Reset signal generation circuit R0-R15 ... General purpose register

Claims (5)

A microcomputer control method that uses a general-purpose register capable of arbitrarily reading and writing data as a zero register dedicated to reading zero-value data , and executes an instruction using the zero register,
At each predetermined execution timing, whether or not there is an abnormality in the read value from the zero register is repeatedly checked. If the read value is abnormal as a result of the inspection, the microcomputer uses the zero register. A method of controlling a microcomputer, characterized by prohibiting execution of normal processing or restarting the microcomputer. 2. The microcomputer control method according to claim 1, wherein when the microcomputer executes a plurality of normal processes in order, the execution timing is set before the start of each of the normal processes. 3. The microcomputer control method according to claim 1 , wherein the zero register is reset before the inspection. If there is an abnormality in the read value as a result of the inspection, execution of the normal process is prohibited by executing a standby process that repeats resetting and inspection of the zero register, and an abnormality in the read value is caused by the standby process. 4. The microcomputer control method according to claim 1 , wherein when the cancellation is canceled, the prohibition of the normal process is canceled by ending the standby process. A microcomputer monitoring apparatus that uses a general-purpose register that can arbitrarily read and write data as a zero register for reading zero value data , and executes an instruction using the zero register,
Zero register checking means for checking whether or not a read value from the zero register is normal;
As a result of the inspection by the zero register inspection means, if there is an abnormality in the read value, an abnormality processing means for prohibiting normal processing using the zero register by the microcomputer or restarting the microcomputer;
A microcomputer abnormality monitoring device comprising:

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