JP4543174B2 - Tap inductor step-down converter - Google Patents

Description

  In a microprocessor, in order to realize a high clock frequency, high integration, and low power consumption, it is necessary to lower the drive voltage. The CPU of a personal computer was driven with 2.5V several years ago, but recently it has been driven with 1.4V. On the other hand, with the high integration of microprocessors, the current consumption has increased rapidly, and the maximum current consumption of the CPU has reached 100A. The power supply apparatus according to the present invention is suitable for outputting a low voltage and large current with high efficiency.

In order to produce a low voltage output, a step-down converter shown in FIG. 15 is generally used. However, the step-down converter is not suitable for use in a step-down operation because the power efficiency becomes worse as the step-down ratio increases.

In order to increase the step-down ratio, a tap inductor step-down converter as shown in FIG. 16 has been proposed. In this converter, an intermediate tap is provided in the inductor of the conventional step-down converter, and the step-down ratio can be increased in proportion to the turn ratio of the primary winding and the secondary winding.

However, the method using the tap inductor tends to increase the leakage inductance between the windings in proportion to the turns ratio, and it is necessary to take measures to eliminate the switching surge caused by the leakage inductance. However, a method of discarding surge energy as a heat loss such as an RC snubber circuit has a problem because power efficiency is deteriorated.

Therefore, an active clamp method is widely known as a method without loss. An example is shown in FIG. In this method, a clamp capacitor Cc and a clamp switch Sc are connected in parallel with the primary winding n1, and the main switch Sm and the clamp switch Sc are alternately turned on and off. As a result, during the period when the clamp switch Sc is on, surge energy is absorbed by the clamp capacitor Cc once, and then this energy is regenerated to the input power source Vi or the load R, so no power loss occurs in principle. . Further, by providing a period (dead time) in which both switches are turned off at the time of switching, zero voltage switching (ZVS) can be realized, so that switching loss can also be reduced.

However, the step-down converter using the tap inductor method appears to be an improved version of the step-down converter at first glance, but in reality, the operation is similar to that of a flyback converter or a buck-boost converter. Will be lost.
As an advantage of the buck type,
(1) Since the direct current component flowing through the inductor does not exceed the load current value, the size of the inductor can be reduced.
(2) Since the output voltage characteristic with respect to the duty ratio is linear, the stability of PWM control is high. Also, a large step-down ratio can be obtained.
(3) Since the withstand voltage of the switch element only rises to the power supply voltage, a switch element with a low withstand voltage can be used.
Etc. Because these benefits are lost,
(1) Since the superimposed current of the inductor exceeds the load current value, the size of the inductor increases.
(2) The output voltage characteristic with respect to the duty ratio is exponential, and the stability of PWM control is poor. In addition, if the time ratio is increased, the step-down ratio cannot be increased.
(3) Since the withstand voltage of the switch element is about twice that of the power supply voltage, a switch element with a high withstand voltage is required.
Problems arise.

Further, the method using the active clamp needs to increase one switch element only for surge removal, and the power supply cost is inevitably increased. Further, it is difficult to use an existing drive IC for driving the main switch Sm and the clamp switch Sc. This is because the clamp capacitor Cc is connected in series with these switches, and a negative voltage is generated in the clamp capacitor. Therefore, a complicated circuit using a pulse transformer or the like is required for the drive circuit.

Whereas a conventional tap inductor step-down converter using an active clamp system connects a clamp capacitor in parallel with a primary winding, the features of the present invention are as shown in each embodiment and its drawings.
“A main switch Sm, a tap inductor Trs composed of a first winding n1 and a second winding n2, a rectifier element D, and an output smoothing capacitor Co in parallel with the load R are connected between the input power source Ei and the load R. In the provided tap inductor step-down converter,
1) A clamp capacitor Cc is connected in series to the input side of the primary winding n1,
2) A clamp switch Sc that is turned on / off alternately with the main switch Sm is connected in parallel with the primary winding n1 and the clamp capacitor Cc or between one end of the main switch Sm and one end of the input power supply Ei,
3) The output smoothing capacitor Co is connected in series to the secondary winding n2, and the rectifier element D is connected in parallel to both ends thereof.
Alternatively, the tap inductor step-down converter is characterized in that the secondary winding n2 is connected in series with the rectifier element D and the output smoothing capacitor Co is connected in parallel at both ends thereof. Is.
With this configuration, the current flowing through the primary winding n1 and the clamp capacitor Cc is commutated by alternately turning on and off the main switch Sm and the clamp switch Sc .

With the above configuration, the present invention can not only reduce switching loss and surge as in the conventional method, but also the operation of the conventional method is close to a buck-boost converter, whereas the operation is similar to a step-down converter. The advantages of the buck converter can be taken over. The advantages are shown below.
(1) Large step-down ratio (reducing the turns ratio, reducing leakage inductor)
(2) The direct current superposition component of the tap inductor is reduced (the inductor can be downsized)
(3) The switch element has half the withstand voltage (the switch element can be made inexpensive).
(4) For the above reasons, power efficiency can be improved.
(5) High stability of control (load response characteristics can be improved, output smoothing capacitor can be downsized)
Further, in the converter of the present invention, since the clamp capacitor is not connected in series between the main switch and the clamp switch, the existing drive IC can be used as it is for driving. Therefore, the drive circuit can be easily designed. Further, by combining soft switching and current resonance, it is possible to improve power efficiency and reduce noise. Further, if the converter of the present invention has a multi-phase configuration, output voltage ripple can be reduced and response characteristics can be improved.

As a preferred modification of the configuration of the present invention, a secondary winding may be connected in series with an output smoothing capacitor, and a rectifying element may be connected in parallel at both ends.
Further, a secondary winding can be connected in series with the rectifying element, and an output smoothing capacitor can be connected in parallel at both ends.
Note that the same effect can be obtained by using a synchronous rectifier switch as the rectifier element and alternately turning it on and off with the main switch.
The clamp switch may be connected in parallel to the primary winding and the clamp capacitor connected in series.
A clamp switch may be connected between one end of the main switch and one end of the input power supply. This facilitates the design of the drive circuit.
Note that by providing a period (dead time) in which all switches are turned off at the time of switching, a zero voltage switching (ZVS) soft switching operation can be performed.
Moreover, the loss at the time of switching switching can be reduced by causing current resonance between the leakage inductance of the tap inductor and the clamp capacitor.
Furthermore, by connecting a plurality of converters of the present invention in parallel and driving them in multiple phases, output ripple can be reduced and load response characteristics can be improved.
There are a plurality of specific circuit configuration examples of the tap inductor step-down converter according to the present invention, and the present invention is not limited to the circuit examples described below.

FIG. 1 shows a circuit example of a tap inductor step-down converter according to the present invention. The circuit configuration of this converter is different from that of a conventional active clamp type tap inductor step-down converter in that a clamp capacitor Cc is inserted in series with the primary winding. The tap inductor step-down converter includes a MOSFET main switch Sm, a rectifier diode D, a tap inductor Trs having a primary winding n1 and a secondary winding n2, an output smoothing capacitor Co, a clamp capacitor Cc, and a clamp. Switch Sc. Ei is an input power source and R is a load. The control unit includes a PWM (Pulse Width Modulator) and a driver.

The positive electrode of the input power source Ei is connected to the drain of the main switch Sm, the source of the main switch Sm is connected to one end of the clamp capacitor Cc, and the other end of the clamp capacitor Cc is the primary winding n1 of the tap inductor Trs. Connected to one end, the other end of the primary winding n1 is connected to one end of the secondary winding n2, the other end of the secondary winding n2 is connected to one end of the load R, and the other end of the load R is Connected to the negative terminal of the input power supply Ei. The anode of the diode D is connected to the connection point between the primary winding n1 and the secondary winding n2, and the cathode of the diode D is connected to the negative electrode of the input DC power supply Ei. The output smoothing capacitor Co is connected in parallel with the load. The drain of the clamp switch Sc is connected to the source of the switch Sm, and the source of the clamp switch Sc is connected to the anode of the diode D.

First, in the period t0 to t1, as in the equivalent circuit shown in FIG. 3, the main switch Sm is turned on, the clamp switch Sc is turned off, and the input power supply Ei, the clamp capacitor Cc, the tap inductor, and the output smoothing capacitor Co are connected. . Thereby, energy is sent from the input power source Ei to the clamp capacitor Cc and the output smoothing capacitor Co. During this time, the diode D is reverse-biased, so that the tap inductor functions as a simple inductor. Therefore, energy is accumulated in the inductor components Lm and Lkg, and the current ism of the main switch and the currents iLm, iLkg, and in2 of the tap inductor both increase.

In the period t1 to t2, as in the equivalent circuit shown in FIG. 4, the main switch Sm is turned off and the clamp switch Sc is turned on, and the exciting inductor Lm and the leakage inductor Lkg are connected to the clamp capacitor Cc. As a result, the energy stored in the inductors Lm and Lkg in the period t0 to t1 is released to the clamp capacitor Cc, and the inductor currents iLm and iLk1 decrease. On the other hand, the clamp capacitor Cc is connected to the primary winding n1, and the secondary winding n2 is connected to the output smoothing capacitor Co. Therefore, the diode D is forward biased. Therefore, the tap inductor functions as a transformer, and the energy stored in the clamp capacitor is discharged to the output smoothing capacitor Co through the windings n1 and n2.

As described above, in the converter of the present invention, the energy of the leakage inductor Lkg is absorbed by the clamp capacitor and then discharged through the winding to the load. Therefore, switching surge and energy loss can be suppressed as in the tap inductor step-down converter using the conventional active clamp method.

Further, in the converter of the present invention, the clamp capacitor Cc is connected to the input power source Ei and the primary winding n1 during the period t0 to t1, and is connected only to the primary winding n1 during the period t1 to t2. That is, the clamp capacitor Cc is always connected to the primary winding n1. This operation is similar to the operation in which the output smoothing capacitor of the step-down converter is always connected to the reactor. Therefore, the converter of the present invention operates similarly to the step-down converter and can take over the advantages of the step-down converter.
First, the voltage VCc of the clamp capacitor is generated in the direction opposite to the input voltage Ei. Due to this effect, it is possible to make the step-down ratio larger than that of the conventional method. Along with this, since the turn ratio of the tap inductor can be reduced, a transformer with less leakage inductance can be made. Further, since the output voltage with respect to the duty ratio of the main switch changes linearly, the stability of the control is also high. Further, the withstand voltage applied to the switch is about twice that of the power supply voltage in the conventional method, whereas in this method, only the power supply voltage is applied, so that an element with a low withstand voltage can be used. Furthermore, since the direct current superposition component of the tap inductor is small, the core size can be small.

FIG. 6 shows a circuit diagram when the connection position of the secondary winding is changed and inserted in series with the diode. In this circuit, the same effect can be obtained.

In a switching power supply, a diode is normally used as a rectifying element. However, since the rectifying diode has a forward voltage drop of at least 0.3 V, the power efficiency is greatly reduced at a low voltage output. Therefore, in the case of a low voltage output, a synchronous rectification method is generally used in which a semiconductor switching element is used instead of the rectifying diode and the main switch is alternately turned on / off. In this case, since the on-resistance of the FET is as small as several mΩ, the power supply efficiency can be greatly improved.
The circuit shown in FIG. 7 is obtained by replacing the diode of the circuit of FIG. 1 with a synchronous rectification switch SR.
The circuit shown in FIG. 8 is obtained by replacing the diode of the circuit of FIG. 6 with a synchronous rectification switch SR.

The same effect can be obtained by connecting the clamp switch to one end of the input power source and one end of the main switch as shown in FIGS. In this case, since the source of the clamp switch is connected to the negative electrode of the input power supply, it becomes easier to drive the switch.

As shown in the schematic diagram of FIG. 11, the switches Sm, Sc, SR have parasitic capacitances CSm, CSc, CSR. Therefore, the energy stored in the parasitic capacitance during the period when the switch is off is discharged as a short-circuit current at the moment when the switch is turned on, generating a switching surge and power loss. In order to solve this switching problem, a technique called soft switching is applied to the circuits (FIGS. 1, 6, 7, 8, 9, and 10) of the first to fourth embodiments. Since this is a technique well known to those skilled in the art, only a brief description will be given below. In order to realize soft switching, as shown in FIG. 12, periods (dead times) t1 to t3 and t4 to t6 in which all switches are turned off at the time of switching are provided. During this dead time feedback, the current flowing through the leakage inductor discharges the energy stored in the parasitic capacitance of the next switch to be turned on. Due to this discharge, the voltage of the switch is reduced to zero, and even after it becomes zero, the current flows through the body diode and enters the flywheel state, so it keeps 0V. Therefore, if the switch is turned on during the flywheel, no switching loss or surge occurs.

As a method for reducing switching loss and surge, it is also effective to make the current flowing through the rectifier element a sine wave. In order to create a sinusoidal waveform, it is only necessary to cause current resonance between the leakage inductor of the tap inductor and the clamp capacitor. In this case, if frequency control is used as a method for controlling the output voltage, the resonance condition and the on-time of the synchronous rectification switch can be matched, so that ZCS (zero current switching) can be realized. Even in the PWM control, the switching loss and surge can be reduced because the current value at the time of switching switching is reduced due to current resonance.

As a power source for a microprocessor, a method of connecting a plurality of converters in parallel and driving them in a multiphase is widely used. Thereby, the output voltage ripple can be reduced and the output smoothing capacitor can be downsized. In the converter of the present invention, the same effect can be obtained by the same method. Since this specific operation is obvious to those skilled in the art, it will be omitted.

In order to evaluate the present embodiment shown in FIG. 9, an experiment was conducted with the following circuit parameters.
Ei: 48 V, Eo: 1.2 V, Cc: 22 mF, Co: 500 mF, tap inductor primary turns 10 turns, secondary turns 1 turn, switching frequency: 100 kHz.
FIG. 13 shows the relationship of the output voltage with respect to the duty ratio. Compared to the conventional method, the converter of the present invention can greatly reduce the output voltage even if the duty ratio is large. The conventional method changes exponentially like a buck-boost converter, whereas the converter of the present invention changes linearly like a step-down converter. Therefore, as with the step-down converter, stable PWM control is possible. FIG. 14 shows a drain-source voltage waveform of the main switch. The voltage waveform has no surge and is clamped at a power supply voltage of 48V.

  The power source of the microprocessor is required to output a low voltage and large current. The present invention makes a great contribution to this kind of industry because the tap inductor step-down converter as the above means can output a low voltage and large current with high efficiency.

FIG. 2 is a circuit diagram in Example 1. FIG. 3 is a diagram illustrating an equivalent circuit for explaining the operation of the circuit in the first embodiment. It is a figure which shows the equivalent circuit in the t0-t1 period of the circuit in Example 1. FIG. It is a figure which shows the equivalent circuit in the t1-t2 period of the circuit in Example 1. FIG. It is a voltage-current waveform diagram of each part of the circuit. 6 is a circuit diagram in Example 2. FIG. FIG. 6 is a circuit diagram in Example 3 showing a circuit in which a diode in the circuit of FIG. 1 is replaced with a synchronous rectification switch SR. FIG. 9 is a circuit diagram in Example 3 showing a circuit in which a diode in the circuit of FIG. 6 is replaced with a synchronous rectification switch SR. It is a circuit diagram in Example 4 which shows the deformation | transformation circuit shown in FIG. FIG. 9 is a circuit diagram in a fourth embodiment showing the modified circuit shown in FIG. 8. 10 is a schematic diagram of a parasitic component of an FET in the circuit of FIG. 9 in Example 4. FIG. FIG. 10 is a voltage-current waveform diagram when performing soft switching in the circuit of FIG. 9 in Example 4. It is a figure which shows the relationship between the duty of the circuit of FIG. 9 in Example 4, and an output voltage. FIG. 10 is a diagram illustrating a drain-source voltage of a circuit of FIG. 9 and a conventional synchronous rectifier switch according to a fourth embodiment. It is a figure which shows the example of the conventional pressure | voltage fall type | mold converter which produces a low voltage output. It is a figure which shows the tap inductor step-down type converter example which takes large step-down ratio. It is a figure which shows an example of the active clamp system without a loss.

Explanation of symbols

Ei input power
Sm Main switch (Main switch)
D diode
Sc clamp switch
Cc, clamp capacitor
SR synchronous rectifier switch
Co output smoothing capacitor
Trs Tap inductor
n1 Primary winding
n2 Secondary winding
Ti ideal transformer
Lm magnetizing inductor
Lkg leakage inductor
R load

Claims (1)

Between the input power source Ei and the load R, a main switch Sm, a tap inductor Trs including a first winding n1 and a second winding n2, a rectifier element D, and an output smoothing capacitor Co in parallel with the load R are provided. Tap inductor step-down converter
1) A clamp capacitor Cc is connected in series to the input side of the primary winding n1,
2), the main switch Sm and clamp switch Sc to turn on and off alternately between one end of the one end and the input power supply Ei of the primary winding n1 and the clamp capacitor Cc in parallel or the main switch Sm connection,
3) The output smoothing capacitor Co is connected in series to the secondary winding n2, and the rectifier element D is connected in parallel to both ends thereof .
Alternatively, the tap inductor step-down converter is characterized in that the secondary winding n2 is connected in series with the rectifying element D and the output smoothing capacitor Co is connected in parallel at both ends thereof.

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