JP4522777B2 - Method for manufacturing light emitting device - Google Patents

Description

  The present invention relates to a semiconductor device having a circuit formed of a thin film transistor (hereinafter referred to as TFT) and a manufacturing method thereof. For example, the present invention relates to an electronic device in which a light emitting display device having an organic light emitting element is mounted as a component.

  Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

In recent years, research on a light-emitting device having an EL element as a self-luminous light-emitting element has been activated. This light emitting device is also called an organic EL display or an organic light emitting diode. These light-emitting devices have features such as fast response speed, low voltage, and low power consumption driving suitable for moving image display, so next-generation displays such as new-generation mobile phones and personal digital assistants (PDAs) It is attracting a lot of attention.

  An EL element using a layer containing an organic compound as a light-emitting layer has a structure in which a layer containing an organic compound (hereinafter referred to as an EL layer) is sandwiched between an anode and a cathode. Is added, luminescence (Electro Luminescence) is emitted from the EL layer. Light emission from the EL element includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.

  The EL layer has a laminated structure represented by “hole transport layer / light emitting layer / electron transport layer”. In addition, EL materials for forming an EL layer are roughly classified into a low molecular (monomer) material and a high molecular (polymer) material, and the low molecular material is formed using an evaporation apparatus.

  In a conventional vapor deposition apparatus, a substrate is placed on a substrate holder, and an EL material, that is, a crucible (or vapor deposition boat) enclosing the vapor deposition material, a shutter for preventing the EL material from sublimating from rising, and the EL material in the crucible are heated. And a heater. Then, the EL material heated by the heater is sublimated and deposited on the rotating substrate. At this time, in order to form a film uniformly, the distance between the substrate and the crucible is 1 m or more.

  In the conventional vapor deposition apparatus and vapor deposition method, when an EL layer is formed by vapor deposition, most of the sublimated EL material is the inner wall of the deposition chamber of the deposition apparatus, the shutter or the deposition shield (the deposition material adheres to the inner wall of the deposition chamber). It has adhered to the protective plate to prevent it. Therefore, when the EL layer is formed, the utilization efficiency of the expensive EL material is extremely low, about 1% or less, and the manufacturing cost of the light emitting device is very expensive.

  Moreover, in order to obtain a uniform film in the conventional vapor deposition apparatus, the distance between the substrate and the vapor deposition source is 1 m or more. For this reason, the vapor deposition apparatus itself is increased in size, and the time required for evacuating each film formation chamber of the vapor deposition apparatus is also long, so that the film formation rate is reduced and the throughput is reduced. Further, when a large-area substrate is used, there is a problem that the film thickness tends to be non-uniform between the central portion and the peripheral portion of the substrate. Furthermore, since the vapor deposition apparatus has a structure in which the substrate is rotated, there is a limit to the vapor deposition apparatus intended for a large area substrate.

In view of these points, the applicant has proposed a vapor deposition apparatus (Patent Document 1 and Patent Document 2) as one means for solving the above-described problems.
JP 2001-247959 A JP 2002-60926 A

The present invention provides a vapor deposition apparatus and a vapor deposition method which are one of the production apparatuses that reduce the manufacturing cost by increasing the utilization efficiency of the EL material and have excellent uniformity and throughput of the EL layer film formation. is there. Moreover, the light-emitting device produced by the vapor deposition apparatus and vapor deposition method of this invention, and its production method are provided.

  In addition, the present invention provides a manufacturing apparatus that efficiently deposits an EL material on a large area substrate having a substrate size of, for example, 600 mm × 720 mm, 680 mm × 880 mm, 1000 mm × 1200 mm, 1100 mm × 1250 mm, 1150 mm × 1300 mm. It is to provide. In addition, the present invention provides a TFT substrate that can be manufactured at low cost, and provides a light emitting device having a large screen by a vapor deposition apparatus that can obtain a uniform film thickness over the entire surface of a large area substrate. It is.

  The present invention relates to a pixel portion including an n-channel TFT using amorphous silicon as an active layer, a TFT using a semi-amorphous semiconductor (hereinafter also referred to as SAS) as an active layer, or a TFT using an organic semiconductor film as an active layer ( Alternatively, the organic light-emitting element is manufactured by performing vapor deposition toward a large-area substrate provided with a driving circuit).

  In the present invention, vapor deposition is performed by fixing the substrate and moving the vapor deposition source. The distance between the large area substrate and the vapor deposition source is typically 30 cm or less, preferably 20 cm or less, more preferably 5 cm to 15 cm, and the utilization efficiency and throughput of the vapor deposition material are significantly improved.

In addition, when a large area substrate is used, the vapor deposition mask becomes large, so that the vicinity of the frame to which the mask is attached is pulled, but there is a possibility that the deflection may occur near the center of the mask. Therefore, in the present invention, an auxiliary line is provided on the mask, and the mask is brought into close contact with the substrate without causing the mask to bend. As the auxiliary line, it is preferable to use a metal different from the mask material, such as a shape memory alloy.

In the present invention, a thin film transistor (TFT) is manufactured using a semi-amorphous semiconductor film in which crystal grains are dispersed in an amorphous semiconductor film, and the TFT is used for a pixel portion or a driver circuit. A light emitting device is manufactured. A TFT using a semi-amorphous semiconductor film has a mobility of ² to 10 cm ² / V · sec, which is 2 to 20 times the mobility of a TFT using an amorphous semiconductor film. A part or the whole of the pixel portion can be integrally formed on the same substrate as the pixel portion.

  SAS is a semiconductor having an intermediate structure between an amorphous structure and a crystalline structure (including single crystal and polycrystal). This semiconductor is a semiconductor having a third state which is stable in terms of free energy, and is a crystalline material having a short-range order and lattice strain, and having a grain size of 0.5 to 20 nm. It can be dispersed in a semiconductor. Further, hydrogen or halogen is contained at least 1 atomic% or more as a neutralizing agent for dangling bonds. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. Such a description regarding SAS is disclosed in, for example, Japanese Patent No. 3065528.

In addition, SAS exhibits weak N-type electrical conductivity when an impurity element for the purpose of valence electron control is not intentionally added. This is due to impurities contained in the SAS, and it is typically considered that oxygen imparts N-type conductivity. The oxygen contained in the SAS also varies depending on the high frequency power density during film formation. In the present invention, the oxygen concentration of SAS is 5 × 10 ¹⁹ atoms / cm ³ or less, preferably 1 × 10 ¹⁹ atoms / cm ³ or less. Of course, not all of this oxygen functions as a donor. Therefore, in order to control the conductivity type, an appropriate amount of impurity element is added.

Unlike a polycrystalline semiconductor film, a semi-amorphous semiconductor film (microcrystalline semiconductor film) can be directly formed on a substrate as a semi-amorphous semiconductor film. Specifically, SiH ₄ can be formed into a film by using a plasma CVD method by diluting SiH ₄ with H ₂ at a flow rate ratio of ₂ to 1000 times, preferably 10 to 100 times. The semi-amorphous semiconductor film manufactured using the above method also includes a microcrystalline semiconductor film including crystal grains of 0.5 nm to 20 nm in an amorphous semiconductor. Therefore, unlike the case of using a polycrystalline semiconductor film, it is not necessary to provide a crystallization step after the semiconductor film is formed. Then, unlike the TFT using a polycrystalline semiconductor film that is crystallized using laser light, the length of the long axis of the laser beam is limited, so that the size of the substrate is not limited. . That is, it can be easily manufactured on a meter-angle substrate of the fifth generation or later.

  In addition, by using an amorphous silicon film, a semi-amorphous silicon film, or an organic semiconductor film as an active layer of a TFT, the number of steps in manufacturing a TFT can be reduced compared to a TFT using a polycrystalline semiconductor film. Therefore, the yield of the light emitting device can be increased and the cost can be reduced.

  Note that when a semi-amorphous silicon film is used as an active layer of a TFT, the channel formation region does not have to be a semi-amorphous semiconductor in the film thickness direction, and it is sufficient that at least a part of the channel formation region includes a semi-amorphous semiconductor.

The configuration of the invention disclosed in this specification is as follows.
A material containing an organic compound is vapor-deposited from a vapor deposition source disposed facing the substrate to form a film containing the organic compound on the first electrode provided on the substrate, and the film containing the organic compound is formed on the film containing the organic compound. A method of manufacturing a light emitting device for forming a second electrode,
The first electrode connected to the TFT having the amorphous semiconductor film or the semi-amorphous semiconductor film provided on the substrate as the active layer is deposited in parallel to the long side or the short side of the pixel portion arranged in a matrix. Forming a film containing an organic compound on the first electrode by moving a source;
And a step of forming a second electrode over the film containing the organic compound.

  Further, in the above structure, in the case of taking multiple faces, a plurality of the pixel portions are arranged in parallel or in series.

  In the above structure, the distance between the vapor deposition source and the substrate is 30 cm or less during vapor deposition.

  In the above structure, the evaporation source moves in the X direction or the Y direction of the substrate.

  In the above-described configuration, the vapor deposition source is provided with a plurality of containers, which are heated at the same time to be atomized by colliding vapor deposition materials from a plurality of directions.

  In the above structure, the first electrode is a cathode or an anode of a light-emitting element that is electrically connected to a TFT having an amorphous semiconductor film or a semi-amorphous semiconductor film as an active layer.

As the cathode of the light-emitting element, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function (work function of 3.8 eV or less). Specific examples of the cathode material include elements belonging to Group 1 or Group 2 of the element periodic rule, that is, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg : Ag, Al: Li) and compounds (LiF, CsF, CaF ₂ ), transition metals including rare earth metals can be used, but metal such as Al, Ag, ITO (including alloys) is laminated. Things can also be used.

  As the anode of the light-emitting element, it is preferable to use a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a high work function (work function of 4.0 eV or more). Specific examples of the anode material include ITO (indium tin oxide), ITSO, zinc oxide (ZnO), and IZO (indium zinc oxide) in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide. In addition, gold (Au), platinum (Pt), titanium (Ti), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu ), Palladium (Pd), metal nitride (TiN), or the like can be used.

  When ITO obtained by sputtering is used, the surface has minute irregularities, and therefore it is preferable to perform CMP polishing before depositing a layer containing an organic compound. However, a large-area substrate is used as in the present invention. In this case, it is difficult to reduce fine unevenness over the entire surface of the substrate by CMP polishing. Thus, it is useful to use MoOx or VOx obtained by vapor deposition or sputtering instead of ITO because CMP polishing is not necessary. In the case where the anode is made of MoOx or VOx, it is preferable that the terminal electrode (pad for connection with the FPC formed outside the pixel portion) formed at the same time is also made of MoOx or VOx.

In the case where a layer containing an organic compound is deposited on the cathode, the substance represented by the general formula (1) and any one of an alkali metal, an alkaline earth metal, and a transition metal is 0.1 to 10 ( It is useful to use a cathode material contained in a molar ratio), more preferably 0.5 to 2 (molar ratio) because CMP polishing is not necessary.

（式中、Ａｒはアリール基を示し、Ｒ１〜Ｒ４は、それぞれ独立に水素、ハロゲン、シアノ基、アルキル基（ただし、炭素数１〜１０）、ハロアルキル基（ただし、炭素数１〜１０）、アルコキシル基（ただし、炭素数１〜１０）、置換または無置換のアリール基、置換または無置換の複素環残基を示す。）

(In the formula, Ar represents an aryl group, and R1 to R4 each independently represent hydrogen, halogen, cyano group, alkyl group (however, having 1 to 10 carbon atoms), haloalkyl group (however, having 1 to 10 carbon atoms), An alkoxyl group (however, having 1 to 10 carbon atoms), a substituted or unsubstituted aryl group, or a substituted or unsubstituted heterocyclic residue.

  Specifically, it is formed by doping Li, Na, K, Rb, Cs, Fr, Mg, Ca, Sr, Ce, Yb or the like into the benzoxazole derivative (shown as BzOS) shown in the general formula (1). To do. For example, it is formed by a co-evaporation method so that the molar ratio of a benzoxazole derivative and Li which is an alkali metal is 2.

Moreover, as another cathode material, 0.1-10 (molar ratio) with the substance represented by General formula (2), and any one of an alkali metal, an alkaline-earth metal, or a transition metal, More preferably Use of a cathode material contained at 0.5 to 2 (molar ratio) is useful because it does not require CMP polishing.

（式中、二つのXは同じであっても異なる構造であってもよい。Ｒ１〜Ｒ８は、それぞれ独立に水素、ハロゲン、シアノ基、アルキル基（ただし、炭素数１〜１０）、ハロアルキル基（ただし、炭素数１〜１０）、アルコキシル基（ただし、炭素数１〜１０）、置換または無置換のアリール基、置換または無置換の複素環残基を示す。）

(In the formula, two Xs may be the same or different structures. R1 to R8 are each independently hydrogen, halogen, cyano group, alkyl group (however, having 1 to 10 carbon atoms), haloalkyl group. (However, a C1-C10), an alkoxyl group (C1-C10), a substituted or unsubstituted aryl group, and a substituted or unsubstituted heterocyclic residue are shown.

  Specifically, it is formed by doping Li, Na, K, Rb, Cs, Fr, Mg, Ca, Sr, Ce, Yb or the like into the pyridine derivative (shown as PY) represented by the general formula (2). . For example, it is formed by a co-evaporation method so that the molar ratio of the pyridine derivative and the alkali metal Li is 2.

  The benzoxazole derivatives and pyridine derivatives shown above have excellent electron injecting properties and are difficult to crystallize when deposited, so that light emitting elements with excellent device characteristics and long device lifetime are formed. be able to.

  In addition, by using MoOx or VOx as an anode and a benzoxazole derivative or pyridine derivative doped with any one of alkali metal, alkaline earth metal, or transition metal as a cathode, a light-emitting element that does not use ITO can be obtained. It can also be produced.

  In the above structure, the amorphous semiconductor film or semi-amorphous semiconductor film is formed by a CVD method using a silicide gas.

Moreover, you may produce TFT with an inkjet etc. The structure of other invention is as follows.
A material containing an organic compound is vapor-deposited from a vapor deposition source disposed facing the substrate to form a film containing the organic compound on the first electrode provided on the substrate, and the film containing the organic compound is formed on the film containing the organic compound. A method of manufacturing a light emitting device for forming a second electrode,
Forming a first conductor;
Forming a first insulator and a first semiconductor on the first conductor, and then patterning the first semiconductor using a first pattern;
Forming a second insulator in contact with the patterned first semiconductor, and then patterning the second insulator using a second pattern;
Stacking and forming second and third semiconductors on the second insulator;
Forming a second conductor so as to be in contact with the third semiconductor and then patterning the second and third semiconductors using the second conductor as a mask to form a thin film transistor;
Forming a first electrode in contact with the second conductor;
Forming a film containing an organic compound on the first electrode by moving a deposition source;
Forming a second electrode on the film containing the organic compound,
Forming a semi-amorphous semiconductor as the first to third semiconductors;
The first and second patterns are formed by selectively discharging a composition containing an organic resin,
In the method for manufacturing a light-emitting device, the first and second conductors are formed by selectively discharging a composition containing a conductive material.

  In the above structure, an impurity element imparting N-type conductivity is added to the second and third semiconductors.

  In the above structure, the composition contains silver, gold, copper, or indium tin oxide.

  Further, in the above configuration, the first and second patterns are obtained by decomposing or dispersing a photosensitive agent in a solvent.

  In manufacturing a thin film transistor, a pattern is formed by selectively discharging a composition by using a droplet discharge method (inkjet method). Then, by using a droplet discharge method, patterning of a semiconductor or the like is performed using a pattern drawn only in a desired region.

  Further, by using a droplet discharge method, a thin film transistor can be formed by using no resist mask or using only a few masks. Therefore, steps such as resist coating, resist baking, exposure, development, baking after development, and resist stripping can be omitted, resulting in a significant cost reduction and improved reliability by simplifying the process. The

In the present invention, the loss of vapor deposition material can be suppressed by a vapor deposition apparatus suitable for a mass production process using a large-area substrate, and the manufacturing cost of the entire light emitting device can be reduced.

  Further, the present invention uses an amorphous semiconductor film or a semi-amorphous semiconductor film suitable for a mass production process using a large-area substrate for an active layer of a TFT, thereby omitting a crystallization process of the semiconductor film after the film formation. Manufacturing costs can be reduced.

  In addition, when a semi-amorphous semiconductor film is used for an active layer of a TFT, a drive circuit can also be manufactured. Therefore, a system on panel of a light emitting device can be realized without complicating the TFT process.

  If an amorphous semiconductor film is used for the active layer of the TFT, an amorphous TFT substrate can be manufactured using a conventional existing production line, and the equipment cost can be reduced.

  The best mode of the present invention will be described below. FIG. 1 shows an example of a top view of the vapor deposition apparatus.

In FIG. 1, 100 is a large area substrate, 101 is a film forming chamber, 102 is an installation chamber, 103, 104, 117 are shutters, 105 is a transfer chamber, 106 is a robot arm, 107 is a deposited region, 108 is a panel. , 109 is a vapor deposition holder, 110 is a crucible (material storage container), 115 is a crucible installation base, and 116 is a crucible mounting unit. Here, an example in which the crucible has a square shape is shown, but there is no particular limitation, and the shape may be cylindrical.

  In addition, the large-area substrate 100 is provided with a first electrode (cathode or anode) and an insulator (partition wall) covering an end portion of the first electrode, and is connected to the first electrode. A plurality of thin film transistors (current control TFTs) and other thin film transistors (such as switching TFTs) are provided. Note that an n-channel TFT using an amorphous silicon film as an active layer, a TFT using a semi-amorphous semiconductor film (microcrystalline semiconductor film) as an active layer, or a TFT using an organic semiconductor film as an active layer is used as the thin film transistor. it can.

  Note that an example is shown in which the large-area substrate 100 is designed so that one light-emitting device having a screen size of, for example, 22 inches to 50 inches can be completed in a region 108 serving as one panel. In addition, a plurality of panels may be designed on the large area substrate 100 to be multi-faceted.

  Further, the mask 113 is in contact with the large area substrate 100 and is aligned. Specifically, RGB is separately applied by shifting one mask by one pixel at a time and performing vapor deposition by performing alignment three times.

  FIG. 2 shows a cross-sectional view of the apparatus of FIG. In FIG. 2, the same reference numerals are used for the same portions as those in FIG.

  A thin plate-like mask 113 having a pattern opening is fixed to a frame-like mask frame 114 by adhesion or welding. It is preferable to perform deposition while performing heating suitable for the material to be deposited, and a position to be appropriately fixed may be determined so that an appropriate tension is applied to the mask at the heating temperature. The alignment with the large area substrate is performed by a mask holder 111 that supports the mask 113 and the mask frame 114. First, the conveyed large area substrate is supported by the alignment mechanism 112 a and mounted on the mask holder 111. Next, the large area substrate placed on the mask 113 is brought close to the alignment mechanism 112b, and the large area substrate is attracted and fixed together with the mask 113 by a magnetic force. The alignment mechanism 112b is provided with a permanent magnet (not shown) and heating means (not shown).

  Further, when vapor deposition is performed, vapor deposition is performed on a large-area substrate while moving the tip of the robot arm 106 in the X direction, the Y direction, or the Z direction. A vapor deposition holder 109 is provided at the tip of the robot arm 106, and a container 110 in which a vapor deposition material is stored is set.

  Further, when the container 110 is mounted on the deposition holder 109, the container installed on the container mounting table 115 outside the film forming chamber is deposited in the film forming chamber 101 by the container mounting unit 116 provided in the setting chamber 102. It is mounted on the holder 109. Further, it is preferable to move the robot arm 106 so that the container can be easily mounted. By providing the installation chamber 102 in this manner and appropriately switching between the vacuum and the atmospheric pressure in the installation chamber, the inside of the film formation chamber 101 can be always kept in a vacuum.

  Note that in the case of performing co-evaporation, an evaporation source may be attached at any angle so that the evaporation center matches one point of a large-area substrate on which evaporation is performed. However, in order to incline the angle for each vapor deposition source, a certain interval between the two vapor deposition sources is required. Therefore, as shown in FIGS. 3A to 3E, the container is formed into a prismatic shape, and the evaporation center is adjusted in the opening direction of the container to collide the vapor deposition materials from two different directions to form fine particles. preferable. The container is composed of an upper part and a lower part, and a plurality of upper parts having different angles at which the vapor deposition material jumps out from the opening may be prepared and appropriately selected. Since vapor deposition spreads differently depending on the vapor deposition material, two vapor deposition sources with different upper parts may be prepared when performing co-vapor deposition.

  In co-evaporation, it is important to mix two different vapor deposition materials. If the container shown in FIGS. 3 (A) to 3 (E) is mixed immediately after being discharged from the opening of the container, A film can be formed on the area substrate. In particular, in the vapor deposition apparatus shown in FIG. 2, the distance d between the large area substrate and the opening of the container is typically 30 cm or less, preferably 20 cm or less, more preferably 5 cm to 15 cm, and the utilization efficiency of the vapor deposition material. Is significantly improved.

3A is a perspective view of the container, FIG. 3B is a cross-sectional view cut along a chain line AB, and FIG. 3C is a cross-sectional view cut along a dotted line CD. .

When the deposition angle of the deposition source is changed, the cylindrical crucible and the heater surrounding it are also tilted. Therefore, when co-evaporation is performed using two crucibles, the distance between them becomes large. When the interval increases, it becomes difficult to uniformly mix two different vapor deposition materials. In addition, when it is desired to perform deposition while narrowing the distance between the deposition source and the large area substrate, it is difficult to obtain a uniform film.

  Therefore, instead of changing the attachment angle of the vapor deposition source, the evaporation center is adjusted by the opening 810 of the container upper portion 800a. The container is composed of a container upper part 800a, a container lower part 800b, and an inner lid 800c. The inner lid 800c is provided with a plurality of small holes, and the vapor deposition material is passed through the holes during vapor deposition. The container is made of a material such as a sintered body of BN, a composite sintered body of BN and AlN, quartz, or graphite, and can withstand high temperature, high pressure, and reduced pressure. Since the vapor deposition direction and the spreading method differ depending on the vapor deposition material, a container in which the area of the opening 810, the guide portion of the opening, and the position of the opening suitable for each vapor deposition material are adjusted is appropriately prepared.

  By setting it as the container of this invention, a vapor deposition center can be adjusted, without tilting the heater of a vapor deposition source. In addition, as shown in FIG. 3D, in the co-evaporation, both the opening 810a and the opening 810b face each other, and the interval between a plurality of containers storing a plurality of different evaporation materials (material A805 and material B806) is narrowed. , Vapor deposition can be performed with uniform mixing. In FIG. 3D, the heating means 801 to 804 are connected to different power sources and perform temperature adjustment independently of each other. The vapor deposition source includes a container and heating means. A uniform film can also be obtained when it is desired to perform deposition while narrowing the distance between the deposition source and the large-area substrate, for example, to 20 cm or less.

  An example different from FIG. 3D is shown in FIG. In FIG. 3E, an opening 810c is an example in which an upper part that evaporates in the vertical direction is used, and an upper part having an opening 810d that is inclined in accordance with that direction is used for evaporation. Also in FIG. 3E, the heating means 801, 803, 807, and 808 are connected to different power sources and perform temperature adjustment independently of each other.

Further, the container of the present invention shown in FIGS. 3A to 3E has an elongated opening, so that a uniform vapor deposition region is widened, and is suitable for performing vapor deposition uniformly with a large area substrate fixed. ing.

  Alternatively, a multi-chamber manufacturing apparatus including the vapor deposition apparatus illustrated in FIG. 1 as one chamber may be used. Needless to say, the vapor deposition apparatus shown in FIG. 1 can be provided as one room of an in-line manufacturing apparatus.

  The present invention having the above-described configuration will be described in more detail with the following examples.

  FIG. 4A shows one mode of a circuit diagram of a pixel, and FIG. 4B shows a cross-sectional view of a TFT used for a pixel portion. 201 corresponds to a switching TFT for controlling input of a video signal to the pixel, and 202 corresponds to a driving TFT for controlling supply of current to the light emitting element 203. Specifically, the drain current of the driving TFT 202 is controlled in accordance with the potential of the video signal input to the pixel through the switching TFT 201, and the drain current is supplied to the light emitting element 203. Note that reference numeral 204 corresponds to a capacitor for holding a gate-source voltage (hereinafter referred to as a gate voltage) of the driving TFT when the switching TFT 201 is off, and is not necessarily provided.

In FIG. 4A, specifically, the gate electrode of the switching TFT 201 is connected to the scanning line G, one of the source region and the drain region is connected to the signal line S, and the other is the gate of the driving TFT 202. It is connected to the. One of a source region and a drain region of the driving TFT 202 is connected to the power supply line V, and the other is connected to the pixel electrode 230 of the light emitting element 203. One of the two electrodes of the capacitor 204 is connected to the gate electrode of the driving TFT 202, and the other is connected to the power supply line V.

  In FIGS. 4A and 4B, a plurality of switching TFTs 201 are provided and connected in series. In addition, a multi-gate structure has a structure in which a plurality of TFTs to which gate electrodes are connected share a first semiconductor film. With the multi-gate structure, the off-state current of the switching TFT 201 can be reduced. Specifically, in FIGS. 4A and 4B, the switching TFT 201 has a configuration in which two TFTs are connected in series, but three or more TFTs are connected in series, and A multi-gate structure in which gate electrodes are connected may be used. The switching TFT does not necessarily have a multi-gate structure, and may be a normal single-gate TFT having a single gate electrode and channel formation region.

  The TFTs 201 and 202 are an inverted stagger type (bottom gate type). The active layer of the TFT uses an amorphous semiconductor, a semi-amorphous semiconductor, or an organic semiconductor. If the active layer of the TFT is a semi-amorphous semiconductor, not only the pixel portion but also the drive circuit can be formed on the same substrate, and the n-type has higher mobility than the p-type and is suitable for the drive circuit. However, each TFT may be either n-type or p-type. Regardless of which polarity TFT is used, it is desirable that all TFTs formed on the same substrate have the same polarity in order to reduce the number of steps.

  In the driving TFT 202 of the pixel portion, the gate electrode 220 formed on the substrate 200, the gate insulating film 211 covering the gate electrode 220, and the gate electrode 220 are overlapped with the gate insulating film 211 interposed therebetween. And a first semiconductor film 222 formed of a semi-amorphous semiconductor film. Further, the TFT 202 includes a pair of second semiconductor films 223 functioning as a source region or a drain region, and a third semiconductor film 224 provided between the first semiconductor film 222 and the second semiconductor film 223. is doing.

  The second semiconductor film 223 is formed using an amorphous semiconductor film, a semi-amorphous semiconductor film, or an organic semiconductor film, and an impurity imparting one conductivity type is added to the semiconductor film. The pair of second semiconductor films 223 are provided to face each other with the channel formation region in the first semiconductor film 222 interposed therebetween.

  The third semiconductor film 224 is formed of an amorphous semiconductor film, a semi-amorphous semiconductor film, or an organic semiconductor film, has the same conductivity type as the second semiconductor film 223, and is also a second semiconductor film. It has characteristics that conductivity is lower than H.223. Since the third semiconductor film 224 functions as an LDD region, an electric field concentrated on the end portion of the second semiconductor film 223 functioning as a drain region can be relaxed and the hot carrier effect can be prevented. The third semiconductor film 224 is not necessarily provided, but the provision of the third semiconductor film 224 can increase the withstand voltage of the TFT and improve the reliability.

  Note that in the case where the TFT 202 is n-type, an impurity imparting n-type is added when the first semiconductor film 222 is formed. When the TFT 202 is n-type, it is not always necessary to add an n-type impurity to the third semiconductor film 224. However, an impurity imparting p-type conductivity is added to the first semiconductor film in which the channel is formed, and the conductivity type is controlled to be as close to i-type as possible.

  A wiring 225 is formed so as to be in contact with the pair of third semiconductor films 224.

  Further, a first passivation film 240 and a second passivation film 241 made of an insulating film are formed so as to cover the TFTs 201 and 202 and the wiring 225. The passivation film that covers the TFTs 201 and 202 is not limited to two layers, and may be a single layer or three or more layers. For example, the first passivation film 240 can be formed using silicon nitride, and the second passivation film 241 can be formed using silicon oxide. By forming the passivation film using silicon nitride or silicon nitride oxide, it is possible to prevent the TFTs 201 and 202 from being deteriorated by the influence of moisture, oxygen, or the like.

  The TFTs 201 and 202 and the wiring 225 are covered with a flat interlayer insulating film 205. The flat interlayer insulating film 205 may be a film obtained by planarizing an insulating film by a PCVD method, or may be a SiOx film containing an alkyl group obtained by a coating method using a siloxane polymer.

  Then, a contact hole reaching the wiring 225 is formed, and a pixel electrode 230 electrically connected to one of the wirings 225 is formed.

  Then, an insulator 229 (referred to as a bank, a partition, a barrier, a bank, or the like) that covers an end portion of the pixel electrode 230 is formed. As the insulator 229, an inorganic material (silicon oxide, silicon nitride, silicon oxynitride, or the like), a photosensitive or non-photosensitive organic material (polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene), or a material thereof For example, a photosensitive organic resin covered with a silicon nitride film is used. For example, when positive photosensitive acrylic is used as the organic resin material, it is preferable that only the upper end portion of the insulator has a curved surface having a curvature radius. As the insulator, either a negative type that becomes insoluble in an etchant by photosensitive light or a positive type that becomes soluble in an etchant by light can be used. Further, an SiOx film containing an alkyl group obtained by a coating method using a siloxane polymer may be applied to the insulator 229.

Then, an EL layer (electroluminescent layer) 231 is formed so as to be in contact with the pixel electrode 230 of the light emitting element 203. Note that the EL layer 231 has a stacked structure, and at least one layer is selectively formed using the evaporation apparatus in FIG. A vapor deposition apparatus suitable for a mass production process using a large-area substrate (an example of which is shown in FIG. 1) can suppress the loss of vapor deposition material, thereby reducing the manufacturing cost of the entire light emitting device.

A counter electrode 232 is formed in contact with the EL layer 231. Note that although the light-emitting element 203 has an anode and a cathode, either one is used as a pixel electrode and the other is used as a counter electrode.

  In the case where a transparent conductive film is used as the pixel electrode 230, light emission from the EL layer 231 passes through the substrate 200 and is emitted in the direction of the arrow in the drawing.

  In this embodiment, since the first semiconductor film 222 including the channel formation region is formed of a semi-amorphous semiconductor, a TFT having higher mobility than a TFT using an amorphous semiconductor film can be obtained. Accordingly, the driver circuit and the pixel portion can be formed over the same substrate.

  Next, one mode of a driving circuit using semi-amorphous TFTs having the same polarity, for example, a shift register will be described. FIG. 5A shows the structure of the shift register of this embodiment. The shift register illustrated in FIG. 5A operates using the first clock signal CLK, the second clock signal CLKb, and the start pulse signal SP. Reference numeral 1401 denotes a pulse output circuit, and its specific structure is shown in FIG.

  The pulse output circuit 1401 includes TFTs 801 to 806 and a capacitor 807. The TFT 801 has a gate connected to the node 2, a source connected to the gate of the TFT 805, and a potential Vdd applied to the drain. The TFT 802 has a gate connected to the gate of the TFT 806, a drain connected to the gate of the TFT 805, and a potential Vss applied to the source. The TFT 803 has a gate connected to the node 3, a source connected to the gate of the TFT 805, and a potential Vdd applied to the drain. The TFT 804 has a gate connected to the node 2, a drain connected to the gate of the TFT 805, and a potential Vss applied to the source. The TFT 805 has a gate connected to one electrode of the capacitor 807, a drain connected to the node 1, and a source connected to the other electrode of the capacitor 807 and the node 4.

  Next, operation of the pulse output circuit 1401 illustrated in FIG. 5B is described. However, CLK, CLKb, and SP are Vdd when they are at the H level and Vss when they are at the L level.

  When SP becomes H level, the TFT 801 is turned on, so that the gate potential of the TFT 805 rises. Finally, when the gate potential of the TFT 805 becomes Vdd−Vth (Vth is a threshold value of the TFTs 801 to 806), the TFT 801 is turned off and enters a floating state. On the other hand, when SP becomes H level, the TFT 804 is turned on, so that the gate potentials of the TFTs 802 and 806 are lowered to finally Vss, and the TFTs 802 and 806 are turned off. At this time, the gate of the TFT 803 is at the L level and is turned off.

  Next, SP becomes L level, the TFTs 801 and 804 are turned off, and the gate potential of the TFT 805 is held at Vdd−Vth. Here, if the gate-source voltage of the TFT 805 exceeds the threshold value Vth, the TFT 805 is turned on.

  Next, when the CLK applied to the node 1 changes from the L level to the H level, the TFT 805 is turned on, so that the potential of the node 4, that is, the source of the TFT 805 starts to rise. Since the potential of the capacitor 807 is held between the gate and the source of the TFT 805, the potential of the gate of the TFT 805 in a floating state rises again as the potential of the node 4 rises. Eventually, the potential of the gate of the TFT 805 becomes higher than Vdd + Vth, and the potential of the node 4 becomes equal to Vdd. Then, the above-described operation is similarly performed in the pulse output circuit 1401 in the second and subsequent stages, and pulses are output in order.

  Next, FIG. 6A shows a block diagram of the light-emitting device of the present invention. A light-emitting device illustrated in FIG. 6A controls a pixel portion 701 including a plurality of pixels each including a light-emitting element, a scan line driver circuit 702 that selects each pixel, and input of a video signal to the selected pixel. And a signal line driver circuit 703.

  In FIG. 6A, the signal line driver circuit 703 includes a shift register 704 and an analog switch 705. A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 704. When the clock signal (CLK) and the start pulse signal (SP) are input, a timing signal is generated in the shift register 704 and input to the analog switch 705.

  The analog switch 705 is supplied with a video signal. The analog switch 705 samples the video signal in accordance with the input timing signal and supplies it to the subsequent signal line.

  Next, the configuration of the scan line driver circuit 702 is described. The scan line driver circuit 702 includes a shift register 706 and a buffer 707. In some cases, a level shifter may be provided. In the scan line driver circuit 702, a selection signal is generated by inputting a clock signal (CLK) and a start pulse signal (SP) to the shift register 706. The generated selection signal is buffered and amplified in the buffer 707 and supplied to the corresponding scanning line. The gate of the transistor of the pixel for one line is connected to the scanning line. Since the transistors of pixels for one line must be turned on all at once, a buffer 707 that can flow a large current is used.

  In a full-color light emitting device, when video signals corresponding to R (red), G (green), and B (blue) are sequentially sampled and supplied to corresponding signal lines, a shift register 704 and an analog switch 705 The number of terminals for connecting is equivalent to about one third of the number of terminals for connecting the analog switch 705 and the signal line of the pixel portion 701. Therefore, by forming the analog switch 705 over the same substrate as the pixel portion 701, the number of terminals used for connecting a separately formed substrate can be reduced as compared with the case where the analog switch 705 is formed over a different substrate from the pixel portion 701. Thus, the probability of occurrence of connection failure can be suppressed, and the yield can be increased.

  FIG. 6B is a block diagram of a light-emitting device of the present invention, which is different from FIG. 6A. In FIG. 6B, the signal line driver circuit 713 includes a shift register 714, a latch A 715, and a latch B 716. The scan line driver circuit 712 and the pixel portion 711 have the same structure as that in the case of FIG.

  A clock signal (CLK) and a start pulse signal (SP) are input to the shift register 714. When the clock signal (CLK) and the start pulse signal (SP) are input, a timing signal is generated in the shift register 714 and sequentially input to the first-stage latch A715. When a timing signal is input to the latch A715, video signals are sequentially written and held in the latch A715 in synchronization with the timing signal. In FIG. 6B, it is assumed that video signals are sequentially written in the latch A 715, but the present invention is not limited to this structure. A plurality of stages of latches A715 may be divided into several groups, and so-called divided driving may be performed in which video signals are input in parallel for each group. Note that the number of groups at this time is called the number of divisions. For example, when the latches are divided into groups for every four stages, it is said that the driving is divided into four.

  The time until video signal writing to all the latches of the latch A 715 is completed is called a line period. Actually, the line period may include a period in which a horizontal blanking period is added to the line period.

  When one line period ends, a latch signal (Latch Signal) is supplied to the second-stage latch B 716, and the video signal held in the latch A 715 is written to the latch B 716 in synchronization with the latch signal, Retained. In the latch A 715 that has finished sending the video signal to the latch B 716, the next video signal is sequentially written in synchronization with the timing signal from the shift register 714 again. During this second line period, the video signal written and held in the latch B 716 is input to the signal line.

  Note that the structures illustrated in FIGS. 6A and 6B are just examples, and the structures of the signal line driver circuit and the scan line driver circuit are not limited thereto.

  In the case where the first semiconductor film including the channel formation region is formed using an amorphous semiconductor, only the pixel portion is formed over the substrate, and the driver circuit is manufactured by attaching an IC chip or the like. Good.

FIG. 7A shows a mode of an element substrate in which a driver circuit 6023 formed separately is attached to a substrate and connected to a pixel portion 6022 formed over the substrate 6021. Note that in the case where a driver circuit is separately formed, the chip on which the driver circuit is formed is not necessarily attached to the substrate on which the pixel portion is formed, and may be attached to, for example, an FPC.

  The pixel portion 6022 is formed using an amorphous TFT. The driver circuit 6023 is connected to the pixel portion 6022 through connection wiring (not shown) provided on the substrate. A potential of a power source, various signals, and the like are supplied to the pixel portion 6022 and the driver circuit 6023 through the FPC 6025, respectively.

  Further, only a part of the signal line driver circuit or a part of the scanning line driver circuit is formed on the same substrate as the pixel portion using a semi-amorphous TFT, and the rest is separately formed and electrically connected to the pixel portion. You may do it. In FIG. 7B, an analog switch 6033a included in the signal line driver circuit is formed over the same substrate 6031 as the pixel portion 6032 and the scan line driver circuit 6034, and a shift register 6033b included in the signal line driver circuit is provided over a different substrate. The form of the element substrate formed and bonded is shown. The pixel portion 6032 and the scan line driver circuit 6034 are formed using semi-amorphous TFTs. A shift register 6033 b included in the signal line driver circuit is connected to the pixel portion 6032 through the FPC 6035. A potential of a power source, various signals, and the like are supplied to the pixel portion 6032, the signal line driver circuit 6033, and the scan line driver circuit 6034 through the FPC 6035, respectively.

  Note that a method for connecting a separately formed substrate is not particularly limited, and a known COG method, wire bonding method, TAB method, or the like can be used. Further, the connection position is not limited to the positions illustrated in FIGS. 7A and 7B as long as electrical connection is possible. In addition, a controller, a CPU, a memory, and the like may be separately formed and connected.

  Note that the signal line driver circuit used in the present invention is not limited to a mode having only a shift register and an analog switch. In addition to the shift register and the analog switch, other circuits such as a buffer, a level shifter, and a source follower may be included. The shift register and the analog switch are not necessarily provided. For example, another circuit that can select a signal line such as a decoder circuit may be used instead of the shift register, or a latch or the like may be used instead of the analog switch. May be.

  In this embodiment, pixel variations using an amorphous TFT or a semi-amorphous TFT included in the light-emitting device of the present invention will be described.

  FIG. 8A illustrates one mode of the pixel of this embodiment. A pixel shown in FIG. 8A includes a light-emitting element 901, a switching TFT 902 used as a switching element for controlling input of a video signal to the pixel, and a driving TFT 903 for controlling a current value flowing through the light-emitting element 901. And a current control TFT 904 for selecting whether or not to supply current to the light emitting element 901. Further, as in this embodiment, a capacitor 905 for holding the potential of the video signal may be provided in the pixel.

  The switching TFT 902, the driving TFT 903, and the current control TFT 904 may be either n-type or p-type, but all have the same polarity. Then, the driving TFT 903 is operated in the saturation region, and the current control TFT 904 is operated in the linear region.

  Further, L of the driving TFT 903 may be longer than W, and L of the current control TFT 904 may be equal to or shorter than W. More preferably, the ratio of L to W of the driving TFT 903 is 5 or more. With the above structure, variation in luminance of the light-emitting element 901 between pixels due to a difference in characteristics of the driving TFT 903 can be further suppressed. Further, when the channel length of the driving TFT is L1, the channel width is W1, the channel length of the current control TFT is L2, and the channel width is W2, X is 5 when L1 / W1: L2 / W2 = X: 1. It is desirable to set it to 6000 or more. For example, it is desirable that L1 / W1 = 500 μm / 3 μm and L2 / W2 = 3 μm / 100 μm.

  The gate electrode of the switching TFT 902 is connected to the scanning line G. One of the source and the drain of the switching TFT 902 is connected to the signal line S, and the other is connected to the gate electrode of the current control TFT 904. The gate electrode of the driving TFT 903 is connected to the second power supply line Vb. The driving TFT 903 and the current control TFT 904 are connected to the first power supply so that the current supplied from the first power supply line Va is supplied to the light emitting element 901 as the drain current of the driving TFT 903 and the current control TFT 904. The line Va is connected to the light emitting element 901. In this embodiment, the source of the current control TFT 904 is connected to the first power supply line Va, and the drain of the drive TFT 903 is connected to the pixel electrode of the light emitting element 901.

  Note that the source of the driving TFT 903 may be connected to the first power supply line Va, and the drain of the current control TFT 904 may be connected to the pixel electrode of the light emitting element 901.

  The light-emitting element 901 includes an anode, a cathode, and an electroluminescent layer provided between the anode and the cathode. As shown in FIG. 8A, when the cathode is connected to the driving TFT 903, the cathode serves as a pixel electrode and the anode serves as a counter electrode. A potential difference is provided between the counter electrode of the light emitting element 901 and the first power supply line Va so that a current in the forward bias direction is supplied to the light emitting element 901. The counter electrode of the light emitting element 901 is connected to the auxiliary electrode.

  One of the two electrodes of the capacitor 905 is connected to the first power supply line Va, and the other is connected to the gate electrode of the current control TFT 904. The capacitor element 905 is provided to hold the potential difference between the gate and the source of the current control TFT 904 when the switching TFT 902 is in a non-selected state (off state). Note that FIG. 8A illustrates a structure in which the capacitor 905 is provided; however, the pixel illustrated in FIG. 8A is not limited to this structure, and the capacitor 905 may not be provided.

  In FIG. 8A, the driving TFT 903 and the current control TFT 904 are n-type, and the drain of the driving TFT 903 and the cathode of the light emitting element 901 are connected. Conversely, if the driving TFT 903 and the current control TFT 904 are p-type, the source of the driving TFT 903 and the anode of the light emitting element 901 are connected. In this case, the anode of the light emitting element 901 is a pixel electrode, and the cathode is a counter electrode.

  FIG. 14 shows an example of a pixel top view corresponding to FIG. In FIG. 14, portions corresponding to those in FIG. 8A are described using the same reference numerals.

On the base film, the gate electrodes of the TFTs 902, 903, and 904, the scanning line G, and the second power supply line Vb are formed from the same conductive film. Although not shown, a gate insulating film is formed thereafter, and the first electrode 920 of the light-emitting element 901 is formed over the gate insulating film. Next, an amorphous semiconductor film or a semi-amorphous semiconductor film is formed over the entire surface by plasma CVD, and is patterned using a mask so as to have a desired shape. Thereafter, the conductive film formed by a sputtering method or a CVD method is patterned to form a source wiring and a drain wiring, a signal line S, and a first power supply line Va. Further, the capacitor element 905 is formed by the gate electrode 999 of the TFT 904 and the first power supply line Va.

  Next, FIG. 8B shows a circuit diagram of a pixel in which a TFT (erasing TFT) 906 for forcibly turning off the current control TFT 904 is provided in the pixel shown in FIG. 8A. Note that in FIG. 8B, elements already described in FIG. 8A are denoted by the same reference numerals. In order to distinguish the first scanning line from the second scanning line, the first scanning line is indicated by Ga, and the second scanning line is indicated by Gb. The erasing TFT 906 has a gate electrode connected to the first scanning line Ga, one of the source and the drain connected to the gate electrode of the current control TFT 904 and the other connected to the first power supply line Va. The erasing TFT 906 may be either n-type or p-type, but has the same polarity as other TFTs in the pixel.

  Next, FIG. 8C shows a circuit diagram of a pixel in which the gate electrode of the driving TFT 903 is connected to the second scanning line Gb in the pixel shown in FIG. Note that in FIG. 8C, elements already described in FIG. 8A are denoted by the same reference numerals. As shown in FIG. 8C, by switching the potential applied to the gate electrode of the driving TFT 903, light emission of the light-emitting element 901 can be forcibly terminated regardless of information included in the video signal.

  Next, FIG. 8D shows a circuit diagram of a pixel provided with a TFT (erase TFT) 906 for forcibly turning off the current control TFT 904 in the pixel shown in FIG. 8C. Note that in FIG. 8D, the elements already described in FIGS. 8A to 8C are denoted by the same reference numerals. The erasing TFT 906 has a gate electrode connected to the second scanning line Gb, and one of the source and drain is connected to the gate electrode of the current control TFT 904 and the other is connected to the power supply line V. The erasing TFT 906 may be either n-type or p-type, but has the same polarity as other TFTs in the pixel.

  Next, FIG. 8E illustrates a structure of a pixel in which a current control TFT is not provided. In FIG. 8E, 911 corresponds to a light emitting element, 912 corresponds to a switching TFT, 913 corresponds to a driving TFT, 915 corresponds to a capacitor element, and 916 corresponds to an erasing TFT 916. The switching TFT 912 has a gate electrode connected to the first scanning line Ga, a source and a drain, one connected to the signal line S, and the other connected to the gate electrode of the driving TFT 913. The driving TFT 913 has a source connected to the power supply line V and a drain connected to the pixel electrode of the light emitting element 911. The counter electrode of the light emitting element 911 is connected to the auxiliary electrode W. The erasing TFT 916 has a gate electrode connected to the second scanning line Gb, one of the source and the drain connected to the gate electrode of the driving TFT 913, and the other connected to the power supply line V.

A method for manufacturing a channel protection type transistor will be described with reference to FIGS.

  Conductors 11 and 12 for forming gate electrodes and gate wirings (scanning lines) are formed over a substrate 10 such as glass or quartz (FIG. 9A). The conductors 11 and 12 are formed by drawing a composition containing a conductive material on the substrate 10 by a droplet discharge method. Next, the insulators 13 and 14 are formed as gate insulating films on the conductors 11 and 12.

  Subsequently, the first semiconductor 15 is formed on the insulators 13 and 14. The first semiconductor 15 is formed of a film (SAS) including a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal). The film further contains a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, thereby improving the stability and obtaining a favorable SAS.

In this embodiment, the oxygen concentration in the first semiconductor 15 is 5 × 10 ¹⁹ atoms / cm ³ or less, preferably 1 × 10 ¹⁹ atoms / cm ³ or less. Further, for the first semiconductor 15 having a channel formation region, the threshold value can be controlled by adding an impurity element imparting P-type simultaneously with or after the film formation. It becomes possible. The impurity element imparting P-type is typically boron, and an impurity gas such as B ₂ H ₆ or BF ₃ may be mixed into the silicide gas at a rate of 1 ppm to 1000 ppm. The boron concentration is preferably 1 × 10 ^{14 to} 6 × 10 ¹⁶ atoms / cm ³ .

  Next, a composition including a photoresist that reacts to ultraviolet rays is selectively discharged by a droplet discharge method to form mask patterns 16 and 17 (FIG. 9B). For the patterns 16 and 17, a composition containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinone diazide compound that is a photosensitizer, a base resin that is a negative resist, diphenyl, and the like. What dissolved or disperse | distributed silanediol, an acid generator, etc. in the well-known solvent is used. Instead of the resist material, an organic material such as acrylic, benzocyclobutene, parylene, flare, permeable polyimide, or siloxane polymer may be used.

  Next, using the patterns 16 and 17 as a mask, the first semiconductor 15 is patterned to form first semiconductors 18 and 19. Subsequently, an insulating film 20 serving as a channel protective film is formed on the entire surface.

  Next, patterns 21 and 22 to be masks are formed again by a droplet discharge method. Then, the insulating film 20 is patterned using the patterns 21 and 22 to form the insulators 23 and 24 (FIG. 9C). The insulators 23 and 24 function as a channel protective film.

  In this embodiment, a thin film obtained by patterning the insulating film 20 is used as the channel protective film, but the present invention is not limited to this. The patterns 21 and 22 may be used as a channel protective film. Then, it is not necessary to remove the etching process and the patterns 21 and 22 used as masks, which is preferable because the process is simplified.

  Alternatively, the channel protective film may be formed by performing backside exposure using the conductors 11 and 12 without forming the patterns 21 and 22.

  Subsequently, the second semiconductor 25 is formed on the entire surface. The second semiconductor 25 is formed without intentionally adding an impurity element for the purpose of valence electron control, and is preferably formed of SAS like the first semiconductor 15. The second semiconductor 25 has a function of a buffer layer (buffer layer) by being formed between the first semiconductor 15 and the third semiconductor 26 having one conductivity type that forms the source and the drain. Yes.

Next, a third semiconductor 26 is formed on the second semiconductor 25. The third semiconductor 26 having one conductivity type may be formed by adding phosphorus as a typical impurity element when forming an N-type transistor, and adding an impurity gas such as PH ₃ to a silicide gas. . The third semiconductor 26 having one conductivity type is formed of a semiconductor such as SAS, an amorphous semiconductor, or a microcrystalline semiconductor except that valence electron control is performed. The transistor formed in this manner has a structure in which a channel formation region is not formed between a source and a drain and between an LDD region, and electric field concentration and current concentration can be reduced.

  Next, the conductors 27 to 30 are formed on the third semiconductor 26 by selectively discharging a composition containing a conductor by a droplet discharge method. Then, using the conductors 27 to 30 as a mask, the second and third semiconductors 25 and 26 are simultaneously patterned and formed into island shapes. As a result, the second semiconductors 31 to 34 and the third semiconductors 35 to 38 separated into island shapes are formed. (Fig. 10 (C))

Through the above steps, a channel protection type transistor is formed. In this transistor, field effect mobility of ² to 10 cm ² / V · sec can be obtained by forming a channel formation region using SAS. Therefore, this TFT can be used as a pixel switching element. Further, it can be used not only as a pixel switching element but also as an element for forming a driving circuit on the scanning line (gate line) side. Therefore, a display device that realizes system-on-panel can be manufactured.

  In addition, as a special point, in this step, a resist mask is formed by a droplet discharge method. More specifically, the first semiconductor 15 is patterned using patterns 16 and 17 formed by a droplet discharge method, and the insulating film 20 is patterned using patterns 21 and 22. The second and third semiconductors 25 and 26 are patterned using the conductors 27 to 30. Therefore, steps such as resist application, resist baking, exposure, development, and baking after development can be omitted. Therefore, the cost can be greatly reduced and the reliability can be improved by simplifying the process.

  Next, a method for manufacturing a display device using a channel protection transistor formed through the above steps will be described. Note that a method for manufacturing a display device using a light-emitting element is described below.

  First, the insulator 39 is formed on the entire surface by a known method. Next, an opening is formed at a predetermined location of the insulator 39 so that the conductor 30 is exposed. The mask for forming the opening is formed by using a normal photolithography method or a pattern selectively used as a mask by a droplet discharge method.

  Next, the composition is selectively discharged so as to fill the opening, thereby forming the conductor 40 corresponding to the pixel electrode. (Fig. 10 (C))

  Next, the insulator 41 is formed on the entire surface, and then an opening is provided at a predetermined position so that the conductor 40 is exposed.

  Next, the EL layer (electroluminescent layer) 42 is formed on the substrate on which the evaporation source is moved and fixed using the evaporation apparatus shown in FIG. . (FIG. 10D) The EL layer 42 is formed of a wide variety of materials such as an inorganic material and an organic material, and may be formed of a single layer or a plurality of layers. . Next, a conductor 43 serving as a counter electrode is formed on the EL layer 42 by a droplet discharge method. A stacked body of the conductor 40, the EL layer 42, and the conductor 43 corresponds to the light emitting element 44.

  The light emitting element 44 is formed by continuously forming a plurality of thin films of the electroluminescent layer 42 and the conductor 43 by changing the composition discharged from the nozzle or changing the head filled with the composition. can do. This is preferable because throughput is improved and productivity is improved.

In this embodiment, a panel corresponding to one mode of the display device of the present invention will be described with reference to FIG. FIG. 11 is a cross-sectional view of a panel in which a semi-amorphous transistor and a light-emitting element formed over a first substrate are sealed with a sealant between the second substrate.

  The pixel portion 4002 and the scan line driver circuit 4004 provided over the first substrate 4001 have a plurality of transistors. FIG. 11 illustrates the transistor 4010 included in the pixel portion 4002. Note that the transistor 4010 corresponds to a transistor using a semi-amorphous semiconductor.

  A pixel electrode included in the light-emitting element 4011 is electrically connected to the drain of the transistor 4010 through a wiring 4017. The counter electrode of the light emitting element 4011 and the transparent conductive film 4012 are electrically connected. Note that the structure of the light-emitting element 4011 can be changed as appropriate depending on the direction of light extracted from the light-emitting element 4011, the conductivity type of the transistor 4010, or the like.

  In addition, a signal line driver circuit 4003 including a transistor 4009 which is separately formed and bonded, and various signals and potentials applied to the scan line driver circuit 4004 or the pixel portion 4002 are connected to connection terminals through lead wirings 4014 and 4015. 4016.

  In this embodiment, the connection terminal 4016 is formed of the same conductive film as the pixel electrode included in the light emitting element 4011. Further, the lead wiring 4014 is formed of the same conductive film as the wiring 4017. The lead wiring 4015 is formed using the same conductive film as the gate electrode of the transistor 4010. The connection terminal 4016 is electrically connected to a terminal included in the FPC 4018 through an anisotropic conductive film 4019.

  As the filler 4007 filling the space between the first substrate 4001, the second substrate 4006, and the sealant 4005, an ultraviolet curable resin or a thermosetting resin can be used in addition to an inert gas such as nitrogen or argon. , PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. In this example, a thermosetting resin was used as the filler.

  In order to expose the filler 4007 to a hygroscopic substance (preferably barium oxide) or a substance capable of adsorbing oxygen, a recess is provided in the second substrate 4006 so that the hygroscopic substance or oxygen is adsorbed in the recess. It is good to arrange a possible substance. By providing a hygroscopic substance or a substance that can adsorb oxygen, deterioration of the light-emitting element 4011 can be suppressed.

  In addition, this embodiment can be freely combined with any of the configurations shown in the above-described best mode and Embodiments 1 to 4.

  In this embodiment, an example using a TFT having an organic semiconductor film as an active layer is shown in FIG.

A base insulating film 641 is formed over the substrate, and a gate electrode 638 is formed thereover. Next, a gate insulating film 639 is formed, and an organic semiconductor film 630 is formed. Next, after the charge transport layer 631 is formed, the source electrode 635 and the drain electrode 636 are formed.

Next, a flat insulating film (a SiOx film containing an alkyl group) is formed by a coating method using a siloxane polymer, and an interlayer insulating film 640 is formed. Next, after a contact hole reaching the drain electrode 636 is formed, a pixel electrode 642 is formed.

  As the gate electrode 638, a conductive material, typically a metal or an alloy obtained by a sputtering method is used.

  For the gate insulating film 639, a material mainly containing silicon oxide, silicon nitride, or silicon nitride oxide obtained by a PCVD method is used. Alternatively, the gate insulating film 639 may be formed by a coating method using a siloxane polymer to form an SiOx film containing an alkyl group.

The organic semiconductor film 630 is a substance made of a certain amount of carbon or an allotrope of carbon (excluding diamond) in combination with other elements, and has a charge of at least 10 ⁻³ cm ² / V · s at room temperature (20 ° C.). A material exhibiting carrier mobility, for example, a π-electron conjugated aromatic compound, a chain compound, an organic pigment, an organic silicon compound, or the like may be used. Specific examples include pentacene, tetracene, thiophen oligomer derivatives, phenylene derivatives, phthalocyanine compounds, polyacetylene derivatives, polythiophene derivatives, and cyanine dyes.

As the charge transport layer 631, triphenyldiamine functioning as a hole transport layer and oxadiazole functioning as an electron transport layer may be used.

As a material for the source electrode 635 and the drain electrode 636, an organic material such as polyaniline or polythiophene that can be formed by a coating method, or a conductive ink can be used.

Next, a pixel electrode (not shown) serving as an anode or a cathode of the light emitting element, a layer containing an organic compound (not shown), and a counter electrode (not shown) are sequentially formed. The layer containing an organic compound is formed using the vapor deposition apparatus shown in FIG.

By forming the interlayer insulating film 640 by the coating method and improving the flatness, uneven portions due to the gate electrode 638, the organic semiconductor film 630, the source electrode 635, the drain electrode 636, and the like are eliminated, and a short circuit of the light emitting element is prevented. can do.

  The present embodiment can be freely combined with the best mode and any of the configurations shown in Embodiments 1 to 5.

  The semi-amorphous TFT that can be used in the present invention may be either n-type or p-type. However, the semi-amorphous TFT has higher mobility in the n-type than in the p-type, and is more suitable for the pixel of the light-emitting device. In this embodiment, a cross-sectional structure of a pixel will be described with an example in which a driving TFT is an n-type.

  FIG. 13 is a cross-sectional view of a pixel in the case where the driving TFT 7021 is n-type and light emitted from the light-emitting element 7022 is emitted from both the anode 7025 side and the cathode 7023 side. In FIG. 13, a cathode 7023 of a light-emitting element 7022 is formed over a transparent conductive film 7027 electrically connected to the driving TFT 7021, and an electroluminescent layer 7024 and an anode 7025 are sequentially stacked over the cathode 7023. Yes. A known material can be used for the cathode 7023 as long as it is a conductive film having a low work function. However, the film thickness is set so as to transmit light. For example, Al having a thickness of 20 nm can be used as the cathode 7023. The electroluminescent layer 7024 may be formed of a single layer or a plurality of layers stacked. The anode 7025 can be formed using a transparent conductive film that transmits light.

  A portion where the cathode 7023, the electroluminescent layer 7024, and the anode 7025 overlap corresponds to the light-emitting element 7022. In the case of the pixel shown in FIG. 13, light emitted from the light emitting element 7022 passes through both the anode 7024 side and the cathode 7023 side as indicated by white arrows.

  In this embodiment, an example in which the driving TFT and the light emitting element are electrically connected is shown. However, even in a configuration in which a current control TFT is connected between the driving TFT and the light emitting element. Good.

  Note that in the pixel illustrated in FIG. 13, a protective film may be formed so as to cover the light-emitting element 7022. As the protective film, a film that hardly transmits a substance that causes deterioration of the light-emitting element, such as moisture or oxygen, as compared with other insulating films is used. Typically, it is desirable to use, for example, a DLC film, a carbon nitride film, a silicon nitride film formed by an RF sputtering method, or the like. In addition, the above-described film that hardly transmits a substance such as moisture or oxygen and a film that easily allows a substance such as moisture or oxygen to pass through can be stacked to be used as a protective film.

  In FIG. 13, in order to obtain light from the cathode side, there is a method of using ITO whose work function is reduced by adding Li in addition to the method of reducing the film thickness of the cathode.

  The present embodiment can be freely combined with any of the configurations shown in the best mode and Embodiments 1 to 6.

  As the display device and electronic device of the present invention, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook type personal computer, a game device, a mobile phone An information terminal (mobile computer, mobile phone, portable game machine, electronic book, etc.), an image playback device equipped with a recording medium (specifically, a recording medium such as a digital versatile disc (DVD) is played back and the image is displayed. And a device equipped with a display that can be used. In particular, it is desirable to use the present invention for a large TV having a large screen. Specific examples of these electronic devices are shown in FIGS.

 FIG. 15A illustrates a large display device having a large screen of 22 inches to 50 inches, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The display device includes all information display devices for personal computers, TV broadcast reception, and the like.

   FIG. 15B shows a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like.

 FIG. 15C illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.

FIG. 15D illustrates a decorative display board such as an advertising board, which includes a display portion 2501, a housing 2502, and an illumination portion 2503 such as an LED light.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. Further, the electronic device shown in this embodiment can be freely combined with the best mode and any structure shown in Embodiments 1 to 7.

  In addition to providing a deposition apparatus that can obtain a uniform film thickness over the entire surface of a large-area substrate and suppress loss of the deposition material, an amorphous semiconductor film, a semi-amorphous semiconductor film, or an organic semiconductor film is formed on a TFT. By using it for the active layer, the manufacturing cost of the light emitting device can be significantly reduced.

  In addition, when a semi-amorphous semiconductor film is used for an active layer of a TFT, a drive circuit can also be manufactured. Therefore, a system on panel of a light emitting device can be realized without complicating the TFT process.

It is a top view which shows the vapor deposition apparatus of this invention. (Best form) It is sectional drawing which shows the vapor deposition apparatus of this invention. (Best form) It is a figure which shows an example of the container set to a vapor deposition source. (Best form) 2A and 2B are a circuit diagram and a cross-sectional view of a pixel in a light emitting device of the present invention. Example 1 It is a figure which shows one form of a shift register. Example 1 It is a block diagram which shows the structure of the light-emitting device of this invention. Example 1 It is a figure which shows one form of an element substrate. (Example 2) It is a circuit diagram of a pixel in a light emitting device of the present invention. (Example 3) It is a figure which shows the manufacturing process of the light-emitting device of this invention. Example 4 It is a figure which shows the manufacturing process of the light-emitting device of this invention. Example 4 It is sectional drawing which shows the light-emitting device of this invention. (Example 5) It is sectional drawing which shows another thin-film transistor. (Example 6) It is sectional drawing which shows the light-emitting device of this invention. (Example 7) It is a top view of the pixel in the light-emitting device of this invention. (Example 3) FIG. 11 illustrates an example of an electronic device. (Example 8)

Explanation of symbols

100: Large area substrate 101: Film formation chamber 102: Installation chamber 103, 104: Shutter 105: Transfer chamber 106: Robot that moves the deposition holder

Claims (7)

A method for manufacturing a light-emitting device having a thin film transistor and a light-emitting element over a substrate,
On the substrate, the first composition containing a conductive material by selectively discharging, to form the first conductor,
The first conductor on the body, a first insulator first semi-amorphous semiconductor is laminated,
On the first semi-amorphous semiconductor, a second composition selectively ejected, the first mask pattern is formed, by using the first mask pattern, the first semi-amorphous semiconductor patterned,
A patterned first on semi-amorphous semiconductor, forming a second insulator,
Wherein on the second insulator, the third composition selectively ejected, the second mask pattern is formed, by using the second mask pattern, by patterning the second insulator ,
The patterned the upper second insulator to form a second semi-amorphous semiconductor,
A second composition including a conductive material is selectively ejected onto the second semi-amorphous semiconductor to form a second conductor, and the second conductor is used as a mask. patterning the semi-amorphous semiconductor,
Forming a third insulator on the second conductor ;
A fourth composition is selectively ejected on the third insulator to form a third mask pattern, and the third insulator is used to form the third mask pattern on the third insulator. Forming an opening to expose the second conductor ;
Forming a first electrode by selectively discharging a fifth composition containing a conductive material so as to fill the opening of the third insulator;
Moving the arranged evaporation source facing the substrate, by depositing a material containing an organic compound from the deposition source, film is formed containing an organic compound over the first electrode,
The organic compound on the membrane containing the sixth composition containing a conductive material by selectively discharging method for manufacturing a light-emitting device, which comprises forming the second electrodes. In claim 1,
Between said first semi-amorphous semiconductor of the second semi-amorphous semiconductor, to form a third semi-amorphous semiconductors,
Said second conductor as a mask, a method for manufacturing a light emitting device, characterized in that said second pattern two in g the third semi-amorphous semiconductor at the same time as the semi-amorphous semiconductor. In claim 1 or claim 2,
A method for manufacturing a light-emitting device, wherein an impurity element imparting N-type conductivity is added to the second semi-amorphous semiconductor. In any one of claims 1 to 3,
Each of the first and fourth compositions contains silver, gold, copper, or indium tin oxide. In any one of Claims 1 thru | or 4 ,
Each of the second and the third composition, the method for manufacturing a light-emitting device according to claim Rukoto to have a photosensitive agent to decompose or dispersed in a solvent. In any one of Claims 1 thru | or 4,
The method for manufacturing a light-emitting device, wherein the second composition includes acrylic, benzocyclobutene, valylene, or polyimide. In any one of Claims 1 thru | or 6,
The method for manufacturing a light-emitting device, wherein each of the first and second semi-amorphous semiconductors contains a rare gas element.

Images