JP4521295B2 - Organic light emitting display device and method for manufacturing the same - Google Patents

Organic light emitting display device and method for manufacturing the same Download PDF

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JP4521295B2
JP4521295B2 JP2005042917A JP2005042917A JP4521295B2 JP 4521295 B2 JP4521295 B2 JP 4521295B2 JP 2005042917 A JP2005042917 A JP 2005042917A JP 2005042917 A JP2005042917 A JP 2005042917A JP 4521295 B2 JP4521295 B2 JP 4521295B2
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JP2005340168A (en
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昌秀 徐
泰旭 姜
▲ムン▼熙 朴
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate

Description

本発明は、有機電界発光表示素子及びその製造方法に係り、さらに詳細には銀（Ａｇ）で形成された反射膜が介在した画素電極を具備する有機電界発光表示素子及びその製造方法に関する。   The present invention relates to an organic light emitting display device and a method for manufacturing the same, and more particularly to an organic light emitting display device including a pixel electrode having a reflective film formed of silver (Ag) and a method for manufacturing the same.

一般に有機電界発光表示素子は、蛍光性有機化合物を電気的に励起させて発光するようにする自発光型表示素子である。これはマトリックス形態で配置されたＮ×Ｍ個の画素（ｐｉｘｅｌ）を駆動する方式によってパッシブマトリックス（ｐａｓｓｉｖｅ ｍａｔｒｉｘ）方式とアクティブマトリックス（ａｃｔｉｖｅ ｍａｔｒｉｘ）方式に分けられる。前記アクティブマトリックス方式の有機電界発光表示（ＡＭＯＬＥＤ）素子はパッシブマトリックス方式に比べて電力消費が少なく、大面積を実現するのに適し、高解像度を有するという長所がある。   In general, an organic electroluminescent display element is a self-luminous display element that emits light by electrically exciting a fluorescent organic compound. This may be divided into a passive matrix method and an active matrix method according to a method of driving N × M pixels arranged in a matrix form. The active matrix organic light emitting display (AMOLED) device has advantages in that it consumes less power than the passive matrix method, is suitable for realizing a large area, and has high resolution.

前記有機電界発光表示素子は、有機化合物から発光した光の放出方向によって前面発光型または背面発光型の有機電界発光表示素子と、前記前面発光型及び背面発光型が同時に具備される有機電界発光表示素子に分けられる。前記前面発光型有機電界発光表示素子は、前記背面発光型とは違って前記単位画素が位置した基板反対方向に光を放出させる装置で開口率が大きいという長所がある。   The organic light emitting display device includes a front light emitting type or a back light emitting type organic light emitting display device according to a light emission direction of light emitted from an organic compound, and an organic light emitting display having the front light emitting type and the back light emitting type at the same time. Divided into elements. Unlike the back-light-emitting type, the front-emitting organic light-emitting display device has an advantage in that it has a large aperture ratio in a device that emits light in the direction opposite to the substrate where the unit pixel is located.

素子の小型化及び低電力化にしたがって前面発光型である主表示窓と背面発光型である補助表示窓が同時に具備される有機電界発光表示素子の需要が増加している。このような有機電界発光表示素子は主に携帯電話に使われており、外側には補助表示窓が設けられて、内側には主表示窓が設けられる。特に前記補助表示窓は、主表示窓に比べて電力が少なくて済み、携帯電話の通話待機状態時に連続してオン（ｏｎ）状態を維持するため、受信状態、バッテリー残余量及び時間などを随時に観察することができる。   With the miniaturization and low power consumption of the device, there is an increasing demand for an organic electroluminescence display device having a front display type main display window and a back emission type auxiliary display window at the same time. Such an organic light emitting display device is mainly used in a mobile phone, and an auxiliary display window is provided on the outside and a main display window is provided on the inside. In particular, the auxiliary display window requires less power than the main display window, and continuously maintains an on state when the mobile phone is in a call waiting state. Can be observed.

図１Ａは、従来技術により形成された有機電界発光表示素子を示した断面図である。   FIG. 1A is a cross-sectional view illustrating an organic light emitting display device formed according to a conventional technique.

先に、透明絶縁基板１００上部に所定厚さの緩衝膜１１０を形成して、多結晶シリコンパターン１２２、ゲート電極１３２及びソース／ドレイン電極１５０、１５２を具備する薄膜トランジスタを形成する。この時、前記多結晶シリコンパターン１２２の両側に不純物が注入されたソース／ドレイン領域１２０が具備される。そして、前記多結晶シリコンパターン１２２を含んだ全体表面上部にはゲート絶縁膜１３０が具備される。   First, a buffer film 110 having a predetermined thickness is formed on the transparent insulating substrate 100 to form a thin film transistor having a polycrystalline silicon pattern 122, a gate electrode 132, and source / drain electrodes 150 and 152. At this time, source / drain regions 120 into which impurities are implanted are provided on both sides of the polycrystalline silicon pattern 122. A gate insulating layer 130 is provided on the entire surface including the polycrystalline silicon pattern 122.

その次に、全体表面上部に所定厚さの保護膜１６０を形成する。続いて、フォトエッチング工程で前記保護膜１６０をエッチングして前記ソース／ドレイン電極１５０、１５２のうちいずれか一つ、例えばドレイン電極１５２を露出させる第１ビアコンタクトホール（図示せず）を形成する。前記保護膜１６０は、無機絶縁膜としてシリコン窒化物、シリコン酸化物またはその積層構造を使うことができる。   Next, a protective film 160 having a predetermined thickness is formed on the entire surface. Subsequently, the passivation layer 160 is etched by a photoetching process to form a first via contact hole (not shown) that exposes one of the source / drain electrodes 150 and 152, for example, the drain electrode 152. . The protective layer 160 may use silicon nitride, silicon oxide, or a laminated structure as an inorganic insulating layer.

次に、全体表面上部に第１絶縁膜１７０を形成する。前記第１絶縁膜１７０はポリイミド（ｐｏｌｙｉｍｉｄｅ）、ベンゾシクロブテン系樹脂（ｂｅｎｚｏｃｙｃｌｏｂｕｔｅｎｅ ｓｅｒｉｅｓ ｒｅｓｉｎ）、ＳＯＧ（ｓｐｉｎ ｏｎ ｇｌａｓｓ）及びアクリレイト（ａｃｒｙｌａｔｅ）で構成された群から選択される１種の物質で形成することができて、画素領域の平坦化のために形成されたのである。   Next, a first insulating film 170 is formed on the entire surface. The first insulating layer 170 is formed of one material selected from the group consisting of polyimide, benzocyclobutene series resin, SOG (spin on glass), and acrylate. It is possible to form the pixel region.

続いて、フォトエッチング工程で前記第１絶縁膜１７０をエッチングして前記第１ビアコンタクトホールを露出させる第２ビアコンタクトホール（図示せず）を形成する。   Subsequently, the first insulating film 170 is etched by a photoetching process to form a second via contact hole (not shown) exposing the first via contact hole.

次に、全体表面上部に反射膜（図示せず）と画素電極用薄膜（図示せず）の積層構造を形成する。この時、前記反射膜はアルミニウム（Ａｌ）、モリブデン（Ｍｏ）、チタン（Ｔｉ）、金（Ａｕ）、銀（Ａｇ）、パラジウム（Ｐｄ）、またはこれら金属の合金等のように反射率が高い金属のうち一つを用いて形成される。前記のように反射膜を形成する場合、前面発光型有機電界発光素子が形成され、前記反射膜を後続工程で形成する場合には背面発光型有機電界発光素子が形成される。   Next, a laminated structure of a reflective film (not shown) and a pixel electrode thin film (not shown) is formed on the entire surface. At this time, the reflective film has high reflectivity such as aluminum (Al), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), palladium (Pd), or an alloy of these metals. It is formed using one of the metals. When the reflective film is formed as described above, a front light emitting organic electroluminescent element is formed. When the reflective film is formed in a subsequent process, a back light emitting organic electroluminescent element is formed.

そして、前記画素電極用薄膜はＩＴＯ（Ｉｎｄｉｕｍ Ｔｉｎ Ｏｘｉｄｅ）のように透明な金属物質を用いて１０〜３００Å厚さに形成される。   The pixel electrode thin film is formed to a thickness of 10 to 300 mm using a transparent metal material such as ITO (Indium Tin Oxide).

続いて、フォトエッチング工程で前記積層構造をエッチングして画素電極１８２及び反射膜パターン１８０ａを形成する。   Subsequently, the stacked structure is etched by a photoetching process to form the pixel electrode 182 and the reflective film pattern 180a.

その後、全体表面上部に発光領域を定義する第２絶縁膜パターン１９０を形成する。前記第２絶縁膜パターン１９０はポリイミド（ｐｏｌｙｉｍｉｄｅ）、ベンゾシクロブテン系樹脂（ｂｅｎｚｏｃｙｃｌｏｂｕｔｅｎｅ ｓｅｒｉｅｓ ｒｅｓｉｎ）、フェノール系樹脂（ｐｈｅｎｏｌ ｒｅｓｉｎ）及びアクリレイト（ａｃｒｙｌａｔｅ）で構成された群から選択される１種の物質で形成することができる。   Thereafter, a second insulating film pattern 190 defining a light emitting region is formed on the entire surface. The second insulating layer pattern 190 is a material selected from the group consisting of polyimide, benzocyclobutene series resin, phenol resin, and acrylate. Can be formed.

続いて、前記第２絶縁膜パターン１９０により定義された画素領域に低分子蒸着法またはレーザー熱転写法で発光層１９２を形成する。その後対向電極（図示せず）などを形成して有機電界発光表示素子を形成する。この時、前面発光型有機電界発光素子である場合、前記対向電極は、透明電極または透明金属電極で形成されて、背面発光型有機電界発光素子である場合、反射膜を具備する金属電極または反射電極で形成される。   Subsequently, a light emitting layer 192 is formed on the pixel region defined by the second insulating film pattern 190 by a low molecular vapor deposition method or a laser thermal transfer method. Thereafter, a counter electrode (not shown) or the like is formed to form an organic electroluminescence display element. At this time, in the case of a front emission type organic electroluminescence device, the counter electrode is formed of a transparent electrode or a transparent metal electrode, and in the case of a rear emission type organic electroluminescence device, a metal electrode or a reflection electrode provided with a reflective film. Formed with electrodes.

上述したように、前面発光型有機電界発光表示素子は、反射膜パターンと画素電極を積層構造で形成する場合、フォトエッチング工程に使われる電解質溶液に同時に露出して前記積層構造のうち起電力が大きい物質が腐蝕されるガルバニック現象が発生して画素電極を損傷させる。これによって輝度が低下する等光特性が低下する問題点が発生した。   As described above, in the case of forming the reflective film pattern and the pixel electrode in a laminated structure, the front light emitting organic light emitting display device is exposed to the electrolyte solution used in the photoetching process and has an electromotive force in the laminated structure. A galvanic phenomenon in which a large material is corroded occurs to damage the pixel electrode. As a result, there has been a problem in that the light characteristics are degraded, such as a decrease in luminance.

図１Ｂは、他の従来技術により形成された有機電界発光表示素子の断面図で、前記有機電界発光表示素子は、上記の問題点を解決するために反射膜パターン１８０ｂをアイランド（ｉｓｌａｎｄ）構造で形成したものになっている。これによって反射膜パターン１８０ｂと画素電極１８２がフォトエッチング工程に使われる電解質溶液に同時に露出することを防止することができる。   FIG. 1B is a cross-sectional view of an organic light emitting display device formed according to another conventional technique. The organic light emitting display device has a reflective film pattern 180b having an island structure in order to solve the above problems. It has been formed. Accordingly, the reflective film pattern 180b and the pixel electrode 182 can be prevented from being simultaneously exposed to the electrolyte solution used in the photoetching process.

上述したように、前面発光型有機電界発光表示素子は、光の共振効果を利用するので画素電極の厚さを可能な限り薄く形成して色座標調節を容易にすることが重要である。しかし、画素電極を薄く形成する場合、ビアコンタクトホールの段差で短絡が起きるという不良が発生する可能性がある。また、前面発光型有機電界発光表示素子と背面発光型有機電界発光表示素子とを同時に具備する有機電界発光表示素子の製造時、前面発光型と背面発光型の有機電界発光素子に同じ厚さの画素電極を用いるようになれば、抵抗増加により光特性が低下する問題がある。   As described above, since the front light emitting organic light emitting display element utilizes the resonance effect of light, it is important to form the pixel electrode as thin as possible to facilitate the color coordinate adjustment. However, when the pixel electrode is formed thin, there is a possibility that a short circuit occurs at the step of the via contact hole. In addition, when manufacturing an organic light emitting display device having a front light emitting organic electroluminescent display device and a back light emitting organic electroluminescent display device at the same time, the front light emitting organic electroluminescent device and the back light emitting organic electroluminescent device have the same thickness. If a pixel electrode is used, there is a problem that optical characteristics are degraded due to an increase in resistance.

本発明は、上記のような問題点を解決するためになされたものであって、下部画素電極、銀を利用した反射膜パターン及び上部画素電極の積層構造を具備する第１領域と、下部画素電極及び上部画素電極の積層構造を具備する第２領域が同時に具備されて素子の信頼性を向上させることができる有機電界発光表示素子及びその製造方法を提供することを目的とする。   The present invention has been made to solve the above problems, and includes a first pixel region having a lower pixel electrode, a reflective film pattern using silver, and a stacked structure of upper pixel electrodes, and a lower pixel. It is an object of the present invention to provide an organic light emitting display device and a method of manufacturing the same that can simultaneously improve the reliability of the device by providing a second region having a stacked structure of an electrode and an upper pixel electrode.

前記のような目的を達成するための本発明による有機電界発光表示素子は、
透明絶縁基板上部の第１領域及び第２領域にゲート電極及びソース／ドレイン電極を含む複数個の薄膜トランジスタと、
前記透明絶縁基板上部の絶縁膜内に形成された複数個のビアコンタクトホールを介して前記第１領域及び第２領域ソース／ドレイン電極のうちいずれか一つにそれぞれ接続される下部画素電極と、
前記第１領域の下部画素電極上部全面に具備される反射膜パターンと、
前記第１領域の反射膜パターン上部と前記第２領域の下部画素電極上部に具備される上部画素電極と、
前記上部画素電極上部に具備されて少なくとも発光層を具備する有機膜層と、
前記有機膜層上部に具備される対向電極を含むことを特徴とする。 In order to achieve the above object, an organic light emitting display device according to the present invention is provided.
A plurality of thin film transistors including a gate electrode and a source / drain electrode in a first region and a second region on the transparent insulating substrate;
A lower pixel electrode connected to any one of the first and second region source / drain electrodes through a plurality of via contact holes formed in an insulating film on the transparent insulating substrate;
A reflective film pattern provided on the entire upper surface of the lower pixel electrode of the first region;
An upper pixel electrode provided above the reflective film pattern in the first region and an upper part of the lower pixel electrode in the second region;
An organic film layer provided on the upper pixel electrode and including at least a light emitting layer;
A counter electrode provided on the organic film layer is included.

また、本発明による有機電界発光表示素子は、前記絶縁膜は保護膜と平坦化膜の積層構造であることを特徴とする。   The organic light emitting display device according to the present invention is characterized in that the insulating film has a laminated structure of a protective film and a planarizing film.

また、本発明による有機電界発光表示素子は、前記絶縁膜は無機絶縁膜と有機絶縁膜の積層構造であることを特徴とする。   In the organic light emitting display device according to the present invention, the insulating film has a laminated structure of an inorganic insulating film and an organic insulating film.

また、本発明による有機電界発光表示素子は、前記下部画素電極の厚さは１００〜１０００Åであることを特徴とする。   The organic light emitting display device according to the present invention is characterized in that a thickness of the lower pixel electrode is 100 to 1000 mm.

また、本発明による有機電界発光表示素子は、前記反射膜パターンは銀（Ａｇ）、プラチナ（Ｐｔ）及びパラジウム（Ｐｄ）で構成される群から選択される一つで形成されることを特徴とする。   The organic light emitting display device according to the present invention is characterized in that the reflective film pattern is formed of one selected from the group consisting of silver (Ag), platinum (Pt) and palladium (Pd). To do.

また、本発明による有機電界発光表示素子は、前記反射膜パターンは銀（Ａｇ）で形成されることを特徴とする。   In the organic light emitting display device according to the present invention, the reflective film pattern is formed of silver (Ag).

また、本発明による有機電界発光表示素子は、前記反射膜パターンの厚さは５００〜３０００Åであることを特徴とする。   In the organic light emitting display device according to the present invention, the thickness of the reflective film pattern is 500 to 3000 mm.

また、本発明による有機電界発光表示素子は、前記上部画素電極の厚さは１０〜３００Åであることを特徴とする。   The organic light emitting display device according to the present invention is characterized in that the upper pixel electrode has a thickness of 10 to 300 mm.

また、本発明による有機電界発光表示素子は、前記上部画素電極の厚さは２０〜１００Åであることを特徴とする。   The organic light emitting display device according to the present invention is characterized in that the upper pixel electrode has a thickness of 20 to 100 mm.

また、本発明による有機電界発光表示素子は、前記第１領域の対向電極は透明電極であって、第２領域の対向電極は透明電極または反射電極であることを特徴とする。   In the organic light emitting display device according to the present invention, the counter electrode in the first region is a transparent electrode, and the counter electrode in the second region is a transparent electrode or a reflective electrode.

また、前記のような目的を達成するための本発明による有機電界発光表示素子の製造方法は、
第１領域及び第２領域で構成される透明絶縁基板上部にゲート電極及びソース／ドレイン電極を含む薄膜トランジスタを形成する工程と、
全体表面上部に絶縁膜を形成する工程と、
フォトエッチング工程で前記絶縁膜をエッチングして前記第１領域及び第２領域のソース／ドレイン電極のうちいずれか一つの電極をそれぞれ露出させる複数個のビアコンタクトホールを形成する工程と、
前記ビアコンタクトホールを介して前記ソース／ドレイン電極のうちいずれか一つに接続される下部画素電極を形成する工程と、
前記第１領域の下部画素電極上部全面に反射膜パターンを形成する工程と、
前記第１領域の反射膜パターン上部及び第２領域の下部画素電極上部に上部画素電極を形成する工程と、
前記上部画素電極上部に少なくとも発光層を含む有機膜を形成する工程と、
前記有機膜上部に対向電極を形成する工程を含むことを特徴とする。 In addition, a method for manufacturing an organic light emitting display device according to the present invention for achieving the above-described object is as follows.
Forming a thin film transistor including a gate electrode and a source / drain electrode on a transparent insulating substrate formed of a first region and a second region;
Forming an insulating film on the entire surface; and
Etching the insulating film in a photo-etching step to form a plurality of via contact holes exposing each one of the source / drain electrodes of the first and second regions;
Forming a lower pixel electrode connected to any one of the source / drain electrodes through the via contact hole;
Forming a reflective film pattern on the entire upper surface of the lower pixel electrode in the first region;
Forming an upper pixel electrode on the reflective film pattern in the first region and on the lower pixel electrode in the second region;
Forming an organic film including at least a light emitting layer on the upper pixel electrode;
The method includes a step of forming a counter electrode on the organic film.

また、本発明による有機電界発光表示素子の製造方法は、前記絶縁膜を保護膜と平坦化膜の積層構造で形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the insulating film is formed of a laminated structure of a protective film and a planarizing film.

また、本発明による有機電界発光表示素子の製造方法は、前記絶縁膜を無機絶縁膜と有機絶縁膜の積層構造で形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the insulating film is formed of a laminated structure of an inorganic insulating film and an organic insulating film.

また、本発明による有機電界発光表示素子の製造方法は、前記ビアコンタクトホールを２回にわたるフォトエッチング工程で形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the via contact hole is formed by two photoetching steps.

また、本発明による有機電界発光表示素子の製造方法は、前記下部画素電極を１００〜１０００Å厚さに形成することを特徴とする。   The method of manufacturing an organic light emitting display device according to the present invention is characterized in that the lower pixel electrode is formed to a thickness of 100 to 1000 mm.

また、本発明による有機電界発光表示素子の製造方法は、前記反射膜パターンを銀（Ａｇ）、プラチナ（Ｐｔ）及びパラジウム（Ｐｄ）で構成される群から選択した一つで形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the reflective film pattern is formed of one selected from the group consisting of silver (Ag), platinum (Pt) and palladium (Pd). And

また、本発明による有機電界発光表示素子の製造方法は、前記反射膜パターンを銀（Ａｇ）で形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the reflective film pattern is formed of silver (Ag).

また、本発明による有機電界発光表示素子の製造方法は、前記反射膜パターンの厚さを５００〜３０００Åで形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the thickness of the reflective film pattern is 500 to 3000 mm.

また、本発明による有機電界発光表示素子の製造方法は、前記上部画素電極の厚さを１０〜３００Åで形成することを特徴とする。   The method of manufacturing an organic light emitting display device according to the present invention is characterized in that the upper pixel electrode is formed with a thickness of 10 to 300 mm.

また、本発明による有機電界発光表示素子の製造方法は、前記上部画素電極の厚さを２０〜１００Åで形成することを特徴とする。   The method of manufacturing an organic light emitting display device according to the present invention is characterized in that the upper pixel electrode is formed with a thickness of 20 to 100 mm.

また、本発明による有機電界発光表示素子の製造方法は、前記第１領域の対向電極を透明電極で形成し、第２領域の対向電極を透明電極または反射電極で形成することを特徴とする。   The method for manufacturing an organic light emitting display device according to the present invention is characterized in that the counter electrode in the first region is formed of a transparent electrode and the counter electrode in the second region is formed of a transparent electrode or a reflective electrode.

以上説明してきた特徴によれば、本発明は、二重構造の画素電極間に銀（Ａｇ）を利用した反射膜パターンを介装して反射度を向上させ、画素電極の接合領域で抵抗が増加する現象を防止して、段差部分で画素電極が断線される等の不良を防止して素子の特性及び信頼性を向上できるという利点がある。
すなわち、本発明によれば、透明基板上部の絶縁膜内に形成されたビアコンタクトホールを介して透明絶縁基板上部の第１領域及び第２領域の各薄膜トランジスタのソース／ドレイン電極のうちいずれか一つに接続される下部画素電極と、第１領域の下部画素電極上部全面に具備される反射膜パターンと、第１領域の下部画素電極及び反射膜パターンの上部と第２領域の下部画素電極上部に具備される上部画素電極と、上部画素電極上部に具備されて少なくとも発光層を具備する有機膜層と、有機膜層上部に具備される対向電極を含んで形成された有機電界発光表示素子では、下部画素電極と上部画素電極間に銀を利用して反射膜パターンを形成することによって反射膜パターンと絶縁膜間の界面特性を向上させて、コンタクト領域での電気的特性を向上させることができる。 According to the characteristics described above, the present invention improves the reflectivity by interposing a reflective film pattern using silver (Ag) between the pixel electrodes having a double structure, and the resistance is reduced in the junction region of the pixel electrodes. There is an advantage that the phenomenon of increasing can be prevented, and defects such as disconnection of the pixel electrode at the stepped portion can be prevented to improve the characteristics and reliability of the element.
That is, according to the present invention, any one of the source / drain electrodes of the thin film transistors in the first region and the second region on the transparent insulating substrate through the via contact hole formed in the insulating film on the transparent substrate. A lower pixel electrode connected to the first region, a reflective film pattern provided on the entire upper surface of the lower pixel electrode in the first region, an upper portion of the lower pixel electrode and the reflective film pattern in the first region, and an upper portion of the lower pixel electrode in the second region An organic light emitting display device including an upper pixel electrode, an organic film layer provided on the upper pixel electrode and having at least a light emitting layer, and a counter electrode provided on the organic film layer. By forming a reflective film pattern using silver between the lower pixel electrode and the upper pixel electrode, the interface characteristics between the reflective film pattern and the insulating film are improved, and the Thereby improving the characteristics.

以下、本発明の実施形態を添付図面を参照しながら詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

図２Ａ及び図２Ｂは、本発明による有機電界発光表示素子の断面図であって、透明絶縁基板２００は、第１領域Ａと第２領域Ｂで構成されていてそれぞれ相異なる構造の画素電極が具備されている。   2A and 2B are cross-sectional views of an organic light emitting display device according to the present invention. The transparent insulating substrate 200 includes a first region A and a second region B, and pixel electrodes having different structures from each other. It is equipped.

前記第１領域Ａには、下部画素電極２８２ａと、前記下部画素電極２８２ａ上部全面に形成された反射膜パターン２８０と前記下部画素電極２８２ａ及び反射膜パターン２８０上に形成された上部画素電極２８２ｂの積層構造が具備される。この時、前記下部画素電極２８２ａは上部画素電極２８２ｂより厚く形成されて、前記反射膜パターン２８０は銀（Ａｇ）で形成されかつ前記下部画素電極２８２ａ及び上部画素電極２８２ｂのような領域に形成される。   The first region A includes a lower pixel electrode 282a, a reflective film pattern 280 formed on the entire upper surface of the lower pixel electrode 282a, and an upper pixel electrode 282b formed on the lower pixel electrode 282a and the reflective film pattern 280. A laminated structure is provided. At this time, the lower pixel electrode 282a is formed thicker than the upper pixel electrode 282b, and the reflective film pattern 280 is formed of silver (Ag) and is formed in a region such as the lower pixel electrode 282a and the upper pixel electrode 282b. The

そして、前記第２領域Ｂには、下部画素電極２８２ａと上部画素電極２８２ｂの積層構造が具備される。この時、前記下部画素電極２８２ａは抵抗が増加して光特性を低下させない程度の厚さで形成する。   The second region B includes a stacked structure of a lower pixel electrode 282a and an upper pixel electrode 282b. At this time, the lower pixel electrode 282a is formed with a thickness that does not increase the resistance and deteriorate the optical characteristics.

本発明による有機電界発光表示素子は次のような方法で形成される。   The organic light emitting display device according to the present invention is formed by the following method.

先に、ガラス、石英、サファイアなどの透明絶縁基板２００に第１領域Ａ及び第２領域Ｂを定義する。参考に、前記第１領域Ａの反射膜形成工程を除外した以後すべての工程は第１領域Ａ及び第２領域Ｂに同時に実施される。   First, the first region A and the second region B are defined in the transparent insulating substrate 200 such as glass, quartz, or sapphire. For reference, all processes after the step of forming the reflective film in the first area A are performed simultaneously in the first area A and the second area B.

次に、前記透明絶縁基板２００の全面にシリコン酸化物をプラズマ−強化化学気相蒸着（ｐｌａｓｍａ−ｅｎｈａｎｃｅｄ ｃｈｅｍｉｃａｌ ｖａｐｏｒ ｄｅｐｏｓｉｔｉｏｎ、ＰＥＣＶＤ）方法で所定厚さの緩衝膜２１０を形成する。この時、前記緩衝膜２１０は、後続工程で形成される非晶質シリコン層の結晶化工程時に、前記透明絶縁基板２００内の不純物が拡散することを防止する。   Next, a buffer film 210 having a predetermined thickness is formed on the entire surface of the transparent insulating substrate 200 using a plasma-enhanced chemical vapor deposition (PECVD) method. At this time, the buffer layer 210 prevents the impurities in the transparent insulating substrate 200 from diffusing during a crystallization process of an amorphous silicon layer formed in a subsequent process.

次に、前記緩衝膜２１０上部に、所定厚さの非晶質シリコン層（図示せず）を蒸着して、前記非晶質シリコン層をＥＬＡ（Ｅｘｃｉｍｅｒ Ｌａｓｅｒ Ａｎｎｅａｌｉｎｇ）、ＳＬＳ（Ｓｅｑｕｅｎｔｉａｌ Ｌａｔｅｒａｌ Ｓｏｌｉｄｉｆｉｃａｔｉｏｎ）、ＭＩＣ（Ｍｅｔａｌ Ｉｎｄｕｃｅｄ Ｃｒｙｓｔａｌｌｉｚａｔｉｏｎ）またはＭＩＬＣ（Ｍｅｔａｌ Ｉｎｄｕｃｅｄ Ｌａｔｅｒａｌ Ｃｒｙｓｔａｌｌｉｚａｔｉｏｎ）法を用いて結晶化する。その後フォトエッチング工程でパターニングして単位画素内の薄膜トランジスタ領域に多結晶シリコンパターン２２２を形成する。前記多結晶シリコンパターン２２２の領域は、後続工程で形成されるソース／ドレイン領域２２０まで含む。   Next, an amorphous silicon layer (not shown) having a predetermined thickness is deposited on the buffer film 210, and the amorphous silicon layer is deposited by ELA (Excimer Laser Annealing), SLS (Sequential Lateral Solidification), Crystallization is performed using MIC (Metal Induced Crystallization) or MILC (Metal Induced Lateral Crystallization). Thereafter, patterning is performed by a photoetching process to form a polycrystalline silicon pattern 222 in the thin film transistor region in the unit pixel. The region of the polycrystalline silicon pattern 222 includes source / drain regions 220 formed in a subsequent process.

その次に、全体表面上部に所定厚さのゲート絶縁膜２３０を形成する。前記ゲート絶縁膜２３０は、シリコン酸化物、シリコン窒化物またはその積層構造で形成することができる。   Next, a gate insulating film 230 having a predetermined thickness is formed on the entire surface. The gate insulating layer 230 may be formed of silicon oxide, silicon nitride, or a stacked structure thereof.

前記ゲート絶縁膜２３０上部にゲート電極物質で使われる金属膜（図示せず）を形成する。この時、前記金属膜はアルミニウム（Ａｌ）またはアルミニウム−ネオジム（ＡｌＮｄ）のようなアルミニウム合金の単一層や、クロム（Ｃｒ）またはモリブデン（Ｍｏ）合金上にアルミニウム合金が積層された多重層で形成されることができる。続いて、フォトエッチング工程で前記金属膜をエッチングしてゲート電極２３２を形成する。その後、前記ゲート電極２３２両側下部の多結晶シリコンパターン２２２に不純物をイオン注入してソース／ドレイン領域２２０を形成する。   A metal layer (not shown) used as a gate electrode material is formed on the gate insulating layer 230. At this time, the metal film is formed of a single layer of an aluminum alloy such as aluminum (Al) or aluminum-neodymium (AlNd), or a multiple layer in which an aluminum alloy is laminated on a chromium (Cr) or molybdenum (Mo) alloy. Can be done. Subsequently, the metal film is etched by a photoetching process to form a gate electrode 232. After that, impurities are ion-implanted into the polycrystalline silicon pattern 222 on both lower sides of the gate electrode 232 to form source / drain regions 220.

次に、全体表面上部に所定厚さの層間絶縁膜２４０を形成する。一般に前記層間絶縁膜２４０はシリコン窒化膜が使われる。   Next, an interlayer insulating film 240 having a predetermined thickness is formed on the entire upper surface. In general, a silicon nitride film is used for the interlayer insulating film 240.

その次に、フォトエッチング工程で前記層間絶縁膜２４０及びゲート絶縁膜２３０をエッチングして前記ソース／ドレイン領域２２０を露出させるコンタクトホール（図示せず）を形成する。前記コンタクトホールを含んだ全体表面上部に電極物質を形成して、フォトエッチング工程で前記電極物質をエッチングして前記ソース／ドレイン領域２２０に接続されるソース／ドレイン電極２５０、２５２を形成する。この時、前記電極物質としてはモリブデンータングステン（ＭｏＷ）またはアルミニウム−ネオジム（ＡｌＮｄ）が利用でき、その積層構造を使うことができる。   Next, a contact hole (not shown) exposing the source / drain region 220 is formed by etching the interlayer insulating layer 240 and the gate insulating layer 230 in a photoetching process. An electrode material is formed on the entire surface including the contact hole, and the electrode material is etched by a photoetching process to form source / drain electrodes 250 and 252 connected to the source / drain region 220. At this time, molybdenum-tungsten (MoW) or aluminum-neodymium (AlNd) can be used as the electrode material, and a laminated structure thereof can be used.

その次に、全体表面上部にシリコン窒化膜、シリコン酸化膜またはその積層構造を所定厚さ蒸着して保護膜２６０を形成する。   Next, a protective film 260 is formed by vapor-depositing a silicon nitride film, a silicon oxide film, or a laminated structure thereof to a predetermined thickness on the entire surface.

続いて、フォトエッチング工程で前記保護膜２６０をエッチングして前記ソース／ドレイン電極２５０、２５２のうちいずれか一つ、例えばドレイン電極２５２を露出させる第１ビアコンタクトホール（図示せず）を形成する。   Subsequently, the passivation layer 260 is etched by a photoetching process to form a first via contact hole (not shown) that exposes one of the source / drain electrodes 250 and 252, for example, the drain electrode 252. .

全体表面上部に第１絶縁膜２７０を形成する。前記第１絶縁膜２７０は、薄膜トランジスタ領域が完全に平坦化される程度の厚さに形成される。そして、前記第１絶縁膜２７０は、ポリイミド（ｐｏｌｙｉｍｉｄｅ）、ベンゾシクロブテン系樹脂（ｂｅｎｚｏｃｙｃｌｏｂｕｔｅｎｅ ｓｅｒｉｅｓ ｒｅｓｉｎ）、ＳＯＧ（ｓｐｉｎ ｏｎ ｇｌａｓｓ）及びアクリレイト（ａｃｒｙｌａｔｅ）で構成された群から選択される１種の物質で形成されることができる。   A first insulating film 270 is formed on the entire surface. The first insulating layer 270 is formed to have a thickness such that the thin film transistor region is completely planarized. The first insulating layer 270 is a material selected from a group consisting of polyimide, benzocyclobutene series resin, SOG (spin on glass), and acrylate. Can be formed.

次に、フォトエッチング工程で前記第１絶縁膜２７０をエッチングして前記第１ビアコンタクトホールを介してソース／ドレイン電極２５０、２５２のうちいずれか一つを露出させる第２ビアコンタクトホール（図示せず）を形成する。   Next, a second via contact hole (not shown) is formed by etching the first insulating layer 270 in a photoetching process to expose one of the source / drain electrodes 250 and 252 through the first via contact hole. Z).

その次に、全体表面上部に下部画素電極用薄膜（図示せず）を形成する。前記下部画素電極用薄膜はＩＴＯ（Ｉｎｄｉｕｍ Ｔｉｎ Ｏｘｉｄｅ）、ＩＺＯ、Ｉｎ２Ｏ３またはＳｎ２Ｏ３のように透明な金属電極を用いて１００〜１０００Å厚さに形成する。前記下部画素電極用薄膜は、第１領域では反射膜と第１絶縁膜２７０間の界面特性、すなわち接着性を向上させて、第２領域では抵抗増加を防止するために形成される。 Next, a lower pixel electrode thin film (not shown) is formed on the entire surface. The thin film for the lower pixel electrode is formed to a thickness of 100 to 1000 mm using a transparent metal electrode such as ITO (Indium Tin Oxide), IZO, In 2 O 3 or Sn 2 O 3 . The thin film for the lower pixel electrode is formed to improve the interface characteristic between the reflective film and the first insulating film 270 in the first region, that is, the adhesion, and to prevent the resistance increase in the second region.

次に、フォトエッチング工程で前記下部画素電極用薄膜をエッチングして下部画素電極２８２ａを形成する。前記下部画素電極２８２ａは、第２ビアコンタクトホールを介して前記ソース／ドレイン電極２５０、２５２のうちいずれか一つ、例えばドレイン電極２５２に接続される。   Next, the lower pixel electrode thin film is etched by a photoetching process to form a lower pixel electrode 282a. The lower pixel electrode 282a is connected to one of the source / drain electrodes 250 and 252 such as the drain electrode 252 through a second via contact hole.

その次に、全体表面上部に反射膜（図示せず）を形成する。この時、前記反射膜は、反射度が８０％である銀（Ａｇ）、パラジウム（Ｐｄ）またはプラチナ（Ｐｔ）などで形成することができて、望ましくは銀（Ａｇ）で形成する。前記反射膜は５００〜３０００Å厚さに形成される。   Next, a reflective film (not shown) is formed on the entire surface. At this time, the reflective film may be formed of silver (Ag), palladium (Pd), or platinum (Pt) having a reflectivity of 80%, and is preferably formed of silver (Ag). The reflective film is formed to a thickness of 500 to 3000 mm.

次に、フォトエッチング工程で前記反射膜をエッチングして前記第１領域Ａの下部画素電極２８２ａ上部全面に反射膜パターン２８０を形成する。前記反射膜パターン２８０は、第１領域Ａで光を反射する役割をし、輝度と光効率を増加させる目的で形成されたもので、第２領域Ｂには形成しない。（図２Ａ参照）   Next, the reflective film is etched by a photoetching process to form a reflective film pattern 280 on the entire upper surface of the lower pixel electrode 282a in the first region A. The reflective film pattern 280 serves to reflect light in the first region A and is formed for the purpose of increasing luminance and light efficiency, and is not formed in the second region B. (See Figure 2A)

その次に、全体表面上部に上部画素電極用薄膜（図示せず）を形成する。前記上部画素電極用薄膜は１０〜３００Å厚さに形成され、望ましくは２０〜１００Å厚さに形成して色座標調節を容易にする。   Next, an upper pixel electrode thin film (not shown) is formed on the entire surface. The upper pixel electrode thin film is formed to a thickness of 10 to 300 mm, preferably 20 to 100 mm to facilitate color coordinate adjustment.

次に、フォトエッチング工程で前記上部画素電極用薄膜をエッチングして上部画素電極２８２ｂを形成する。前記上部画素電極２８２ｂは、前記第１領域Ａで反射膜パターン２８０の上部及び側面に形成され、第２領域Ｂでは前記下部画素電極２８２ａ上部に形成される。すなわち、前記第１領域Ａには下部画素電極２８２ａ、反射膜パターン２８０及び上部画素電極２８２ｂで形成された三重構造の画素電極が形成されて、前記第２領域Ｂには下部画素電極２８２ａと上部画素電極２８２ｂで形成された二重構造の画素電極が形成される。   Next, the upper pixel electrode thin film is etched to form an upper pixel electrode 282b in a photoetching process. The upper pixel electrode 282b is formed on the upper and side surfaces of the reflective film pattern 280 in the first region A, and is formed on the lower pixel electrode 282a in the second region B. That is, a pixel electrode having a triple structure formed by the lower pixel electrode 282a, the reflective film pattern 280, and the upper pixel electrode 282b is formed in the first region A, and the lower pixel electrode 282a and the upper pixel electrode are formed in the second region B. A double-structured pixel electrode formed by the pixel electrode 282b is formed.

その次に、全体表面上部に第２絶縁膜（図示せず）を形成する。   Next, a second insulating film (not shown) is formed on the entire surface.

その後、フォトエッチング工程で前記第２絶縁膜をエッチングして発光領域を定義する第２絶縁膜パターン２９０を形成する。   Thereafter, a second insulating film pattern 290 defining a light emitting region is formed by etching the second insulating film in a photoetching process.

続いて、前記第２絶縁膜パターン２９０により露出した発光領域に発光層２９２を形成する。前記発光層２９２は低分子蒸着法またはレーザー熱転写法により形成される。前記発光層２９２は、電子注入層、電子輸送層、正孔注入層、正孔輸送層、正孔阻止層及び有機発光層から選択される少なくとも一つ以上の薄膜で形成できる。（図２Ｂ参照）   Subsequently, a light emitting layer 292 is formed in the light emitting region exposed by the second insulating film pattern 290. The light emitting layer 292 is formed by a low molecular vapor deposition method or a laser thermal transfer method. The light emitting layer 292 may be formed of at least one thin film selected from an electron injection layer, an electron transport layer, a hole injection layer, a hole transport layer, a hole blocking layer, and an organic light emitting layer. (See Figure 2B)

図示していないが、対向電極を形成して有機電界発光素子を完成する。この時、前記対向電極は、第１領域Ａでは透明電極または透明金属電極で形成でき、第２領域Ｂでは反射膜が積層された透明電極または反射電極で形成できる。そして、前記第２領域Ｂの対向電極を前記第１領域Ａの対向電極のように透明電極または透明金属電極で形成することもできる。   Although not shown, a counter electrode is formed to complete the organic electroluminescent element. At this time, the counter electrode may be formed of a transparent electrode or a transparent metal electrode in the first region A, and may be formed of a transparent electrode or a reflective electrode in which a reflective film is laminated in the second region B. The counter electrode in the second region B can be formed of a transparent electrode or a transparent metal electrode like the counter electrode in the first region A.

図３は、反射膜の種類による反射度を示したグラフ図であって、反射膜としてＡｌＮｄを用いた場合（Ｘ）、反射膜であるＡｌＮｄ上部にＩＴＯを形成した場合（Ｙ）、そして反射膜で銀（Ａｇ）を用いた場合（Ｚ）の、光の波長による反射度を示す。ここで、前記反射膜で銀（Ａｇ）が使われた場合（Ｚ）では、銀（Ａｇ）としては、銀の合金の一つであるＡＴＤ−３０（商品名）が用いられた。グラフに示したように反射膜で銀（Ａｇ）を用いた場合（Ｚ）、光の波長に関係なく反射度が、反射膜としてＡｌＮｄを用いた場合（Ｘ）と、反射膜であるＡｌＮｄ上部にＩＴＯを形成した場合（Ｙ）に比べて、１５％程度高いことが分かる。   FIG. 3 is a graph showing the reflectivity according to the type of the reflection film. When AlNd is used as the reflection film (X), ITO is formed on the AlNd as the reflection film (Y), and reflection is performed. When silver (Ag) is used for the film (Z), the reflectivity according to the wavelength of light is shown. Here, when silver (Ag) was used in the reflective film (Z), ATD-30 (trade name) which is one of silver alloys was used as the silver (Ag). As shown in the graph, when silver (Ag) is used in the reflective film (Z), the reflectance is regardless of the wavelength of light, and when AlNd is used as the reflective film (X), the upper part of the AlNd as the reflective film It can be seen that it is about 15% higher than the case where ITO is formed on (Y).

そして、図４は、反射膜の種類と画素電極の厚さによる反射度を示したグラフ図であって、反射膜で銀（Ａｇ）を用いた場合（Ｘ′、Ｙ′）と、ＡｌＮｄを用いた場合（Ｚ′）の、光の波長による反射度を示す。この図で、前記銀（Ａｇ）上部に形成される画素電極の厚さが１２５Åである場合（Ｘ′）と、２５０Åである場合（Ｙ′）の光の波長による反射度が表されている。反射膜上部に形成される画素電極の厚さが２５０Åである場合、光の波長が５００以下程度である短波長領域で反射度が顕著に低下する。このことから、反射膜として銀（Ａｇ）を用いる場合、前記反射膜上部に形成される画素電極の厚さが薄いほど光の波長によって反射度の変化が少ないことが分かる。   FIG. 4 is a graph showing the reflectivity depending on the type of the reflective film and the thickness of the pixel electrode. When silver (Ag) is used in the reflective film (X ′, Y ′), AlNd is expressed as follows. When used (Z ′), the reflectivity according to the wavelength of light is shown. This figure shows the reflectivity according to the wavelength of light when the pixel electrode formed on the silver (Ag) has a thickness of 125 mm (X ') and 250 mm (Y'). . When the thickness of the pixel electrode formed on the reflective film is 250 mm, the reflectivity is remarkably lowered in a short wavelength region where the wavelength of light is about 500 or less. From this, it can be seen that when silver (Ag) is used as the reflective film, the change in reflectivity with the wavelength of light decreases as the thickness of the pixel electrode formed on the reflective film decreases.

従来技術により形成された有機電界発光表示素子を示した断面図である。1 is a cross-sectional view illustrating an organic light emitting display device formed according to a conventional technique. 他の従来技術により形成された有機電界発光表示素子を示した断面図である。It is sectional drawing which showed the organic electroluminescent display element formed by the other prior art. 本発明による有機電界発光表示素子の製造方法を示した断面図である。1 is a cross-sectional view illustrating a method for manufacturing an organic light emitting display device according to the present invention. 本発明による有機電界発光表示素子の製造方法を示した断面図である。1 is a cross-sectional view illustrating a method for manufacturing an organic light emitting display device according to the present invention. 反射膜の種類によった反射度を示したグラフの図である。It is the figure which showed the reflectivity by the kind of reflective film. 反射膜の種類と画素電極の厚さによる反射度を示したグラフの図である。It is the figure which showed the reflectance by the kind of reflection film, and the thickness of a pixel electrode.

符号の説明Explanation of symbols

１００、２００：透明絶縁基板
１１０、２１０：緩衝膜
１２０、２２０：ソース／ドレイン領域
１２２、２２２：多結晶シリコンパターン
１３０、２３０：ゲート絶縁膜
１３２、２３２：ゲート電極
１４０、２４０：層間絶縁膜
１５０、２５０：ソース電極
１５２、２５２：ドレイン電極
１６０、２６０：保護膜
１７０、２７０：第１絶縁膜
１８０ａ、１８０ｂ、２８０：反射膜パターン
１８２：画素電極
２８２ａ：下部画素電極
２８２ｂ：上部画素電極
１９０、２９０：第２絶縁膜パターン
１９２、２９２：発光層
100, 200: Transparent insulating substrate 110, 210: Buffer film 120, 220: Source / drain region 122, 222: Polycrystalline silicon pattern 130, 230: Gate insulating film 132, 232: Gate electrode 140, 240: Interlayer insulating film 150 250, source electrode 152, 252: drain electrode 160, 260: protective film 170, 270: first insulating film 180a, 180b, 280: reflective film pattern 182: pixel electrode 282a: lower pixel electrode 282b: upper pixel electrode 190, 290: Second insulating film pattern 192, 292: Light emitting layer

Claims (21)

第１領域と第２領域とを有する透明絶縁基板と、
前記透明絶縁基板上部の第１領域に形成され、ゲート電極及びソース／ドレイン電極を含む薄膜トランジスタと、前記透明絶縁基板上部の第２領域に形成され、ゲート電極及びソース／ドレイン電極を含む薄膜トランジスタと、
前記複数個の薄膜トランジスタを含んで前記透明絶縁基板上に形成される絶縁膜と、
前記絶縁膜内に形成されたビアコンタクトホールを介して前記第１領域のソース／ドレイン電極のうちいずれか一つに接続される下部画素電極と、前記絶縁膜内に形成されたビアコンタクトホールを介して前記第２領域のソース／ドレイン電極のうちいずれか一つに接続され、前記第１領域に形成される下部画素電極と同一の材料で形成される下部画素電極と、
前記第１領域の下部画素電極上部全面に具備される反射膜パターンと、
前記第１領域の反射膜パターン上部に具備される上部画素電極と、前記第２領域の下部画素電極上部に具備され、前記第１領域に形成される上部画素電極と同一の材料で形成される上部画素電極と、
前記第１領域の上部画素電極上部に具備されて少なくとも発光層を具備する有機膜層と、前記第２領域の上部画素電極上部に具備されて少なくとも発光層を具備する有機膜層と、
前記第１領域の有機膜層上部に具備される対向電極と、前記第２領域の有機膜層上部に具備される対向電極と、を含むことを特徴とする有機電界発光表示素子。 A transparent insulating substrate having a first region and a second region;
A thin film transistor including a gate electrode and a source / drain electrode formed in a first region above the transparent insulating substrate; and a thin film transistor including a gate electrode and a source / drain electrode formed in a second region above the transparent insulating substrate;
An insulating film formed on the transparent insulating substrate including the plurality of thin film transistors;
A lower pixel electrode connected to any one of the source / drain electrodes of the first region via a via contact hole formed in the insulating film; and a via contact hole formed in the insulating film. is connected to one of the source / drain electrode of the second region through a lower pixel electrode that will be formed of the same material as the lower pixel electrode formed on the first region,
A reflective film pattern provided on the entire upper surface of the lower pixel electrode of the first region;
An upper pixel electrode provided in the reflective layer pattern over the first region, is provided on the lower pixel electrode above the second region, Ru is formed of the same material as the upper pixel electrode formed on the first region An upper pixel electrode;
An organic film layer provided on the upper pixel electrode of the first region and including at least a light emitting layer; an organic film layer provided on the upper pixel electrode of the second region and including at least a light emitting layer;
An organic light emitting display device comprising: a counter electrode provided on an organic film layer in the first region; and a counter electrode provided on an organic film layer in the second region. 前記絶縁膜は、保護膜と平坦化膜の積層構造であることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic electroluminescent display device according to claim 1, wherein the insulating film has a laminated structure of a protective film and a planarizing film. 前記絶縁膜は、無機絶縁膜と有機絶縁膜の積層構造であることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic light emitting display device according to claim 1, wherein the insulating film has a laminated structure of an inorganic insulating film and an organic insulating film. 前記下部画素電極の厚さは、１００〜１０００Åであることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic light emitting display device of claim 1, wherein the lower pixel electrode has a thickness of 100 to 1000 mm. 前記反射膜パターンは、銀（Ａｇ）、プラチナ（Ｐｔ）及びパラジウム（Ｐｄ）で構成される群から選択される一つで形成されることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic electroluminescent display according to claim 1, wherein the reflective film pattern is formed of one selected from the group consisting of silver (Ag), platinum (Pt), and palladium (Pd). element. 前記反射膜パターンは、銀（Ａｇ）で形成されることを特徴とする請求項５に記載の有機電界発光表示素子。   The organic light emitting display device according to claim 5, wherein the reflective film pattern is made of silver (Ag). 前記反射膜パターンの厚さは、５００〜３０００Åであることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic light emitting display device according to claim 1, wherein the reflective film pattern has a thickness of 500 to 3000 mm. 前記上部画素電極の厚さは、１０〜３００Åであることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic light emitting display device of claim 1, wherein the upper pixel electrode has a thickness of 10 to 300 mm. 前記上部画素電極の厚さは、２０〜１００Åであることを特徴とする請求項８に記載の有機電界発光表示素子。   The organic light emitting display device of claim 8, wherein the upper pixel electrode has a thickness of 20 to 100 mm. 前記第１領域の対向電極は透明電極であって、第２領域の対向電極は透明電極または反射電極であることを特徴とする請求項１に記載の有機電界発光表示素子。   The organic light emitting display device according to claim 1, wherein the counter electrode of the first region is a transparent electrode, and the counter electrode of the second region is a transparent electrode or a reflective electrode. 第１領域及び第２領域を有する透明絶縁基板を提供する工程と、
前記透明絶縁基板上部の第１領域にゲート電極及びソース／ドレイン電極を含む薄膜トランジスタと、前記透明絶縁基板上部の第２領域にゲート電極及びソース／ドレイン電極を含む薄膜トランジスタと、を形成する工程と、
前記複数の薄膜トランジスタを含んで前記透明絶縁基板上に絶縁膜を形成する工程と、
前記絶縁膜をフォトエッチング工程でエッチングして、前記第１領域に形成されたソース／ドレイン電極のうちいずれか一つの電極を露出させるビアコンタクトホールと、前記第２領域に形成されたソース／ドレイン電極のうちいずれか一つの電極を露出させるビアコンタクトホールと、を形成する工程と、
前記第１領域に形成されたビアコンタクトホールを介して前記ソース／ドレイン電極のうちいずれか一つに接続される下部画素電極と、前記第２領域に形成されたビアコンタクトホールを介して前記ソース／ドレイン電極のうちいずれか一つに接続される下部画素電極と、を同時に形成する工程と、
前記第１領域の下部画素電極上部全面に反射膜パターンを形成する工程と、
前記第１領域の反射膜パターン上部に上部画素電極と、前記第２領域の下部画素電極上部に上部画素電極と、を同時に形成する工程と、
前記第１領域の上部画素電極上部に少なくとも発光層を含む有機膜と、前記第２領域の上部画素電極上部に少なくとも発光層を含む有機膜と、を形成する工程と、
前記第１領域の有機膜上部に対向電極と、前記第２領域の有機膜上部に対向電極と、を形成する工程を含むことを特徴とする有機電界発光表示素子の製造方法。 Providing a transparent insulating substrate having a first region and a second region;
Forming a thin film transistor including a gate electrode and a source / drain electrode in a first region above the transparent insulating substrate; and a thin film transistor including a gate electrode and a source / drain electrode in a second region above the transparent insulating substrate;
Forming an insulating film on the transparent insulating substrate including the plurality of thin film transistors;
The insulating film is etched by a photoetching process to expose one of the source / drain electrodes formed in the first region, and the source / drain formed in the second region. Forming a via contact hole exposing any one of the electrodes;
A lower pixel electrode connected to any one of the source / drain electrodes through a via contact hole formed in the first region; and the source through a via contact hole formed in the second region. Forming a lower pixel electrode connected to any one of the / drain electrodes at the same time ;
Forming a reflective film pattern on the entire upper surface of the lower pixel electrode in the first region;
Simultaneously forming an upper pixel electrode on the reflective film pattern of the first region and an upper pixel electrode on the lower pixel electrode of the second region;
Forming an organic film including at least a light emitting layer on the upper pixel electrode of the first region, and an organic film including at least a light emitting layer on the upper pixel electrode of the second region;
A method of manufacturing an organic light emitting display device, comprising: forming a counter electrode on the organic film in the first region; and forming a counter electrode on the organic film in the second region. 前記絶縁膜は、保護膜と平坦化膜の積層構造であることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   12. The method of manufacturing an organic light emitting display device according to claim 11, wherein the insulating film has a laminated structure of a protective film and a planarizing film. 前記絶縁膜は、無機絶縁膜と有機絶縁膜の積層構造であることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   The method of manufacturing an organic light emitting display device according to claim 11, wherein the insulating film has a laminated structure of an inorganic insulating film and an organic insulating film. 前記ビアコンタクトホールは、２回にわたるフォトエッチング工程で形成されることを特徴とする請求項１１ないし１３のうちいずれか一つの項に記載の有機電界発光表示素子の製造方法。   14. The method of manufacturing an organic light emitting display device according to claim 11, wherein the via contact hole is formed by two photo-etching steps. 前記下部画素電極は、１００〜１０００Å厚さに形成されることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   The method of claim 11, wherein the lower pixel electrode is formed to a thickness of 100 to 1000 mm. 前記反射膜パターンは、銀（Ａｇ）、プラチナ（Ｐｔ）及びパラジウム（Ｐｄ）で構成される群から選択される一つであることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   The organic light emitting display device of claim 11, wherein the reflective film pattern is one selected from the group consisting of silver (Ag), platinum (Pt), and palladium (Pd). Production method. 前記反射膜パターンは、銀（Ａｇ）であることを特徴とする請求項１６に記載の有機電界発光表示素子の製造方法。   The method of claim 16, wherein the reflective film pattern is silver (Ag). 前記反射膜パターンの厚さは、５００〜３０００Åであることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   The method of claim 11, wherein the reflective film pattern has a thickness of 500 to 3000 mm. 前記上部画素電極の厚さは、１０〜３００Åであることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   12. The method of claim 11, wherein the upper pixel electrode has a thickness of 10 to 300 mm. 前記上部画素電極の厚さは、２０〜１００Åであることを特徴とする請求項１９に記載の有機電界発光表示素子の製造方法。   The method of claim 19, wherein the upper pixel electrode has a thickness of 20-100mm. 前記第１領域の対向電極は透明電極であって、第２領域の対向電極は透明電極または反射電極であることを特徴とする請求項１１に記載の有機電界発光表示素子の製造方法。   The method according to claim 11, wherein the counter electrode in the first region is a transparent electrode, and the counter electrode in the second region is a transparent electrode or a reflective electrode.
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