JP4519547B2 - Ultrasonic diagnostic equipment - Google Patents

Description

The present invention relates to an ultrasonic diagnostic apparatus , and more particularly to a technique for suitably synchronizing processors that perform different image generation processes in an ultrasonic diagnostic apparatus.

  An ultrasonic diagnostic apparatus transmits and receives ultrasonic waves in a subject and displays a tissue structure in a living body as a tomographic image. Accordingly, the ultrasonic diagnostic apparatus has a probe that has a plurality of transducer channels and transmits / receives ultrasonic waves to / from the subject, and drives the probe to transmit ultrasonic waves of a plurality of channels and from within the subject. An ultrasonic transmission / reception system that generates an ultrasonic reception signal by receiving reflected waves of a plurality of channels, a signal processing circuit system that reconstructs a tomographic image from the ultrasonic reception signal from the ultrasonic transmission / reception system, A display device or the like for displaying a tomogram by inputting an image signal from the signal processing circuit system is provided.

In the ultrasonic diagnostic apparatus, the displayed image has various modes ((a) A mode: the horizontal axis represents the distance from the probe, and the vertical axis represents the amplitude of the reflected wave. (B) B mode: ultrasonic wave Scanning is performed by sequentially changing the direction of transmission and reception, and displayed as a two-dimensional image. (C) M mode: used for diagnosis of motor function of the organ. (D) Doppler mode: blood flow velocity is displayed.) Images in various modes are displayed on the display device by performing a task assigned to each of a plurality of signal processing circuits provided in the signal processing circuit system, and synthesizing the results in a timely manner. In such a case, when the image displayed on the display device shifts from the state where the B mode is mainly displayed to the state where the Doppler mode is mainly displayed, the composition processing in the next state is performed. In order to improve the timing, it is necessary to synchronize so that all the tasks of each signal processing circuit in the previous state are completed at the time of state transition. On the other hand, each signal processing circuit is driven by a processor. Conventionally, in order to finish driving by a plurality of processors synchronously in order to finish all tasks of each signal processing circuit synchronously, Patent Document 1 As described in [0006] and [0008], a method of performing a busy wait by synchronizing with one CPU has been common.
JP-A-5-151174

The present inventor has found the following problems as a result of studying the above prior art.
In other words, in the method of busy-waiting with one CPU to synchronize multiple processors, the CPU could not do other work until it was synchronized.

An object of the present invention is to provide an ultrasonic diagnostic apparatus capable of suitably synchronizing processors that perform different image generation processing or signal processing and reducing the load on the CPU.

The object is to transmit an ultrasonic wave to a living body and receive a reflected echo signal thereof, to drive the probe, and to transmit and receive the ultrasonic signal, and to transmit and receive the echo signal. Phasing means for phasing the echo signal amplified by the sound wave transmitting / receiving means, conversion means for converting the signal phased by the phasing means into image data, and image data converted by the conversion means are displayed. A display unit and a central processing unit for controlling the ultrasonic transmission / reception unit to the display unit, and the conversion unit controls operations of various signal processing and image reconstruction processing related to an ultrasonic diagnostic image, respectively. In the ultrasonic diagnostic apparatus including a plurality of processors, the processing performed by the plurality of processors includes a change of an ultrasonic image display mode, a change of freeze on / off, an ultrasonic wave A process including a change of a scan condition, a change of an image quality adjustment parameter, a change of a cine memory operation, and a change of a screen, wherein one master processor of the plurality of processors is a master processor itself and a slave processor different from the master processor Having the function of synchronizing the end of the processing of the master processor and the slave processor, the central processing unit receives instructions from the central processing unit only to the master processor. This is achieved by causing the display unit to display a processed image in which the master processor and the slave processor have synchronized the end of the processing.

According to the present invention, there is provided an ultrasonic diagnostic apparatus capable of suitably synchronizing processors that perform different image generation processing or signal processing and reducing the load on the CPU.

FIG. 1 is a schematic block diagram showing an ultrasonic diagnostic apparatus according to the present invention.
Reference numeral 1 denotes a probe 1 that transmits and receives ultrasonic waves to and from a living body. The probe 1 is driven by an ultrasonic transmission / reception unit 2, and an echo signal received by the probe 1 is an ultrasonic transmission / reception unit 2. Is received and amplified. The ultrasonic phasing unit 3 is used for phasing the echo signal received by a plurality of transducers in order to form a received beam signal when the probe 1 is an array type probe. is there. The ultrasonic signals scanned two-dimensionally are sequentially input to a signal processing circuit such as the B image processing circuit 4 and the Doppler image processing circuit 5 to be subjected to signal processing and reconstruction processing. The reception beam signal subjected to these signal processings is converted into image data in a memory in the digital scan converter (DSC) 6, scanned and read, and displayed as an image on the monitor 7. However, in FIG. 1, the number of signal processing circuits is illustrated as being two in order to make the drawing easier to see, but this number is not limited to two, and various numbers can be considered, and various functions are provided. Variations that can be held in are possible.

  In FIG. 1, the ultrasonic transmission / reception unit 2, the ultrasonic phasing unit 3, the B image processing circuit 4, and the Doppler image processing circuit 5 are driven or controlled by the processors 8a to 8d directly connected thereto, and the processors 8a to 8d. Is controlled by the CPU 10 via the interfaces 9a to 9d. At this time, the received beam signals that are processed by a plurality of signal processing circuits such as the B image processing circuit 4 and the Doppler image processing circuit 5 must be displayed on the monitor in synchronism. When an assigned task in a certain state (for example, a state in which a B-mode image is displayed on the monitor) shifts to a task in another state (for example, a state in which a Doppler mode image is displayed on the monitor simultaneously with the B-mode image) Therefore, it is necessary to synchronize all the tasks of each signal processing circuit at the time of state transition. In the present invention, in order to synchronize the termination, the processor that controls the task of the signal processing circuit is operated in the following manner.

Hereinafter, embodiments of the present invention will be described in order with reference to FIGS.
First, FIG. 2 shows the internal state of each processor, and shows that the internal state is composed of three states (states), Task1 state, Task2 state and Sync state. FIG. 3 shows the flow of instructions between the CPU 10 and the plurality of processors via the general-purpose bus 11 with the interface sandwiched therebetween omitted. However, the number of processors that must be synchronized in FIG. 3 is four, unlike FIG. 1, for ease of explanation. The processor according to the present embodiment is composed of one master processor and three slave processors as described below.

  In FIG. 3, solid arrows indicate the flow of instructions from the CPU 10 to the master processor 6c, and broken arrows indicate the flow of instructions from the master processor 6c to the slave processors 6d to 6f.

  Next, the flow of processing of the CPU 10, the master processor 6c, and the slave processors 6d to 6f will be described with reference to FIG. When the image size, display mode, or the like is changed from Task2 to Task1, for example, and a request for execution of the Task1 state is generated in the processor, the CPU 10 issues an execution instruction for the Task1 state to the master processor 6c. At this stage, the CPU 10 can start processing other than processor control. The master processor 6c includes a control task unit and a processor unit, and an execution instruction for the Task1 state from the CPU 10 is transmitted to the control task unit. Then, the control task unit in the master processor 6c issues a transition instruction to the Sync state to the processor unit in the master processor 6c and the three slave processors 6d to 6f. When the transition to the Sync state is completed, the processor unit in the master processor and the three slave processors 6d to 6f notify the control task unit in the master processor 6c of the completion of the transition to the Sync state. Synchronization between the processors is completed when the control task unit receives notification of completion of transition to the Sync state from the processor unit in the master processor 6c and all of the three slave processors 6d to 6f. Since the synchronization is completed, the control task unit in the master processor 6c issues an execution instruction for the Task1 state to the processor unit in the master processor 6c and the three slave processors 6d to 6f, and all the processors simultaneously execute the Task1 state. Start execution.

  According to the present embodiment, processing related to CPU processor synchronization only issues instructions to the master processor, eliminating the need for synchronization wait processing (busy wait), thus improving the throughput of other processing performed by the CPU. To do. For example, it can respond quickly to user input. In this embodiment, since a part of the master processor is used to control the synchronization waiting process, it is not necessary to prepare an extra processor.

Next, Embodiment 2 of the present invention will be described with reference to the drawings.
In this embodiment, in order to increase the processing speed and allow the processor to perform multiple tasks in parallel, as shown in FIG. 5, the processor is divided into two sets of processors 6g and 6h, 6i and 6k, and the processors 6g and 6i Is a master processor, and processors 6h and 6k are slave processors. In this embodiment, the CPU 10 can cause the processor to execute the processes of Task3 and Task4 in parallel by simply issuing the execution instruction of Task3 to the master processor 6g and issuing the execution instruction of Task4 to the master processor 6i.

The present invention is not limited to the above embodiment, and can be variously modified without departing from the gist of the present invention. For example, an example of the type of how the tasks of each processor (and the display circuit connected to it) are changed when the display mode is changed can be as shown in FIG. . In addition to changing the display mode, the mode can be changed as well as changing Freeze On / Off, changing the ultrasound scan conditions (depth switching, Density switching, transmission frequency switching, etc.), changing image quality adjustment parameters (dynamic range, SCC, various In some cases, it may be necessary to synchronize and terminate tasks in front of multiple processors when changing cine memory operations (frame playback, continuous playback), changing screen switching (1 screen, 2 screens), etc. Needless to say, the present invention is applicable. As a processor to be used as a master processor, if a processor with a relatively small load on the original image reconstruction task is selected from among a plurality of processors , the synchronization process can be suitably performed.

1 is a schematic block diagram showing Example 1 of an ultrasonic diagnostic apparatus according to the present invention. The figure which shows the internal state of each processor. The figure which shows the flow of an instruction | indication with CPU and several processors via a general purpose bus. The figure which shows the flow of a process of CPU10 and the processors 6c-6f. FIG. 10 is a diagram showing an embodiment 2 of an ultrasonic diagnostic apparatus according to the present invention in which a processor is divided into two sets of systems for execution. An example of how the task of each processor (and the display circuit connected to it) is changed when the display mode is changed.

Explanation of symbols

6c Master processor (including control tasks)
6d to f Slave processor 11 General-purpose bus

Claims (2)

A probe that transmits ultrasonic waves to a living body and receives the reflected echo signal; an ultrasonic transmission / reception unit that drives the probe and amplifies the received echo signal; and the ultrasonic transmission / reception unit Phasing means for phasing the amplified echo signal, conversion means for converting the signal phased by the phasing means into image data, display means for displaying the image data converted by the conversion means, A central processing unit that controls the ultrasonic transmission / reception means to the display means, and the conversion means includes a plurality of processors that respectively control various signal processing and image reconstruction processing operations related to an ultrasonic diagnostic image. In the equipped ultrasonic diagnostic apparatus,
The processing performed by the plurality of processors is processing including change of the display mode of the ultrasound image, change of freeze on / off, change of the ultrasound scan condition, change of image quality adjustment parameter, change of cine memory operation, change of screen switching. And
One master processor of the plurality of processors causes the master processor itself and a slave processor different from the master processor to perform the above processing, and has a function of synchronizing the end of processing of the master processor and the slave processor. And
The central processing unit functions so that an instruction from the central processing unit is transmitted only to the master processor, and the master processor synchronizes the end of the processing by the master processor and the slave processor. An ultrasonic diagnostic apparatus characterized in that an image is displayed on the display means . The ultrasound according to claim 1, wherein the master processor causes the master processor itself and the slave processor to start the process, and performs a synchronization waiting process for the completion of the processes of the master processor and the slave processor. Diagnostic device.

Images