JP4515051B2 - Element substrate and light emitting device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a light emitting device provided with means for controlling light emission of a light emitting element, and an element substrate in which the control means is formed on a substrate.
[0002]
[Prior art]
Since the light emitting element emits light by itself, the visibility is high, a backlight necessary for a liquid crystal display (LCD) is not necessary, and it is optimal for thinning, and the viewing angle is not limited. Therefore, in recent years, a light-emitting device using a light-emitting element has attracted attention as a display device that replaces a CRT or an LCD. Note that in this specification, a light-emitting element means an element whose luminance is controlled by current or voltage, and an MIM type electron used in an OLED (Organic Light Emitting Diode) or an FED (Field Emission Display). Source elements (electron emitting elements) and the like are included.
[0003]
Note that the light-emitting device includes a panel and a module in which an IC or the like including a controller is mounted on the panel. Furthermore, the present invention relates to an element substrate corresponding to an embodiment before the panel is completed in the process of manufacturing the light-emitting device, and the element substrate has a means for supplying current to the light-emitting element in each of the plurality of pixels. Prepare.
[0004]
An OLED (Organic Light Emitting Diode), which is one of light emitting elements, includes a layer containing a light emitting substance that can obtain electroluminescence generated by applying an electric field, an anode layer, and a cathode layer. Yes. The layer containing a luminescent material is provided between the anode and the cathode, and is composed of a single layer or a plurality of layers. In some cases, these layers contain an inorganic compound. Luminescence in the layer containing a light-emitting substance includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.
[0005]
As an example of the light emitting device, for example, a device as shown in Patent Document 1 is well known. The pixel configuration and operation of this type of display panel will be briefly described below with reference to the drawings.
[0006]
In the pixel shown in FIG. 8, the switching transistor 800 has a gate connected to the scanning line 805, one of the source and the drain connected to the signal line 804, and the other connected to the gate of the driving transistor 801. . The driving transistor 801 has a source connected to the power supply line 806 and a drain connected to the anode of the light emitting element 803. One terminal of the light emitting element 803 is connected to the counter electrode 807. The capacitor 802 is provided so as to hold a potential difference between the gate and the source of the driving transistor 801. A predetermined voltage is applied to each of the power supply line 806 and the counter electrode 807 from the power supply, and has a potential difference from each other.
[0007]
When the switching transistor 800 is turned on by the signal of the scanning line 805, the video signal input to the signal line 804 is input to the gate of the driving transistor 801. The difference between the potential of the input video signal and the power supply line 806 becomes the gate-source voltage Vgs of the driving transistor 801, and current is supplied to the light emitting element 803 so that the light emitting element 803 emits light.
[0008]
[Patent Document 1]
JP-A-8-234683 (page 5, FIG. 1)
[0009]
[Problems to be solved by the invention]
In the above light-emitting device, in order to suppress a change in potential of the capacitor 802, the off-state current of the switching transistor 800 is required to be low, and the on-state current is required to be charged in order to charge the capacitor. ing. Further, there is a problem that Vgs of the driving transistor 801 changes with the switching of the switching transistor 800 and the change of the potential of the signal line and the scanning line. This is due to the parasitic capacitance attached to the gate of the driving transistor 801.
[0010]
In view of the above-described problems, the present invention does not require a low off-state current of a switching transistor, does not need to increase the capacitance of a capacitor, and is not easily affected by parasitic capacitance, a light-emitting device, a driving method of the light-emitting device, and The problem is to propose an element substrate.
[0011]
[Means for Solving the Problems]
The light emitting device and the element substrate of the present invention are characterized in that they are operated with the gate potential of the driving transistor fixed.
[0012]
Specifically, a video signal that transmits a light emission / non-light emission signal of a pixel through a switching transistor by arranging a driving transistor with a fixed gate potential and a current control transistor connected in series with the driving transistor. Is input to the gate of the current control transistor.
[0013]
In this manner, by fixing the gate potential of the driving transistor, Vgs (potential difference between the gate and the source) of the driving transistor changes due to the influence of the potential change of the capacitive element, the parasitic capacitance, and the like. This can be suppressed.
[0014]
Note that since the input / non-input of current to the light emitting element cannot be controlled with the potential of the driving transistor fixed, a current control transistor connected in series with the driving transistor is provided, and the current control transistor emits light. Current input / non-input to the element is controlled.
[0015]
Note that in addition to the above structure, an erasing transistor for erasing the potential of the written video signal may be used.
[0016]
In the light emitting device having the above-described configuration, the number of power supply lines for inputting a fixed potential to the gate of the driving transistor is increased. For this reason, the risk of short-circuiting due to process-related dust or the like increases. Therefore, in order to reduce the wiring, in a plurality of arranged pixels, between adjacent pixels, the gate electrode of the driving transistor is connected by the wiring, and the gate electrode is supplied with a current to the light emitting element. The power source may be connected to a second power source provided independently of the power source.
[0017]
In other words, the gate electrode of the driving transistor is connected by wiring between adjacent pixels, and the gate electrode is connected to the second power source, and the potential of the gate electrode is common between at least adjacent pixels. It is characterized by being. The wiring that connects the gate electrodes of the driving transistors may be provided inside the pixel portion.
[0018]
With the above configuration, it is possible to reduce the probability of occurrence of a defect due to a short circuit between adjacent wirings.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
One embodiment of the present invention will be described with reference to FIG.
[0020]
FIG. 1 shows an embodiment of a pixel included in a light emitting device of the present invention. 1 includes a light-emitting element 104, a switching transistor (first transistor) 101 for controlling input of a video signal to the pixel, and a driving transistor (third transistor) having a fixed gate potential. ) 102, a current control transistor (second transistor) 103 that controls the supply of current to the light emitting element 104, and an erasing transistor (fourth transistor) 106 for erasing the potential of the video signal. ing. Further, as in this embodiment, a capacitor 105 for holding the potential of the video signal may be provided in the pixel. Note that the light emitting element 104, the driving transistor 102, and the current control transistor 103 are connected in series.
[0021]
The driving transistor 102 and the current control transistor 103 have the same polarity. In this embodiment, both the driving transistor 102 and the current control transistor 103 are operated in a linear region. Note that the saturation region is a region that satisfies Vds> Vgs−Vth (Vds is a drain-source voltage and Vth is a threshold voltage), and other regions are linear regions.
[0022]
Normally, when the driving transistor 102 is operated in the saturation region, it is less affected by an increase in the forward voltage due to deterioration of the light emitting element, but on the other hand, for driving due to variations in mobility and threshold values. Display unevenness due to variations in drain current of the transistor 102 is likely to occur. As can be seen from the fact that the drain current in the saturation region and the drain current in the linear region are expressed by (Equation 1) and (Equation 2), respectively, this is higher in the saturation region than in the operation in the linear region. This is because the above operation is more easily influenced by Vth.
Ids = 1 / 2.mu.Co.W / L. (Vgs-Vth) ² ... (Formula 1)
Ids = μ · Co · W / L · (Vgs−Vth) · Vds (Formula 2)
Μ is mobility (cm ² / Vs), Co is the gate capacitance (F / cm) ² ), L represents a gate length (μm), and W represents a gate width (μm).
[0023]
However, as described above, by operating the driving transistor 102 in a linear region, a light-emitting device with less display unevenness due to variation in drain current of the driving transistor 102 due to variation in mobility or threshold value can be obtained. .
[0024]
The gate of the switching transistor 101 is connected to a scanning line Gj (j = 1 to y) for inputting a selection signal from the scanning line driving circuit (gate signal line driving circuit). One of the source and drain of the switching transistor 101 is a signal line Si (i = 1 to x) for inputting a signal from a signal line driver circuit (source signal line driver circuit), and the other is a current control transistor. 103 is connected to the gate. The gate of the driving transistor 102 is connected to the second power supply line Wi (i = 1 to x). In the driving transistor 102 and the current control transistor 103, the current supplied from the first power supply line Vi (i = 1 to x) is used as the drain current of the driving transistor 102 and the current control transistor 103. Are connected to the first power supply line Vi (i = 1 to x) and the light emitting element 104. In this embodiment mode, the source of the current control transistor 103 is connected to the first power supply line Vi (i = 1 to x), and the drain of the driving transistor 102 is connected to the pixel electrode of the light emitting element 104. The gate of the erasing transistor 106 is connected to the second scanning line Gej (j = 1 to y), and one of the source and the drain is connected to the first power supply line Vi (i = 1 to x), and the other Is connected to the gate of the current control transistor 103
[0025]
Note that the source of the driving transistor 102 may be connected to the first power supply line Vi (i = 1 to x), and the drain of the current control transistor 103 may be connected to the pixel electrode of the light emitting element 104. Even in this case, the gate potential of the driving transistor is fixed.
[0026]
In this embodiment, an enhancement type transistor or a depletion type transistor may be used as the driving transistor 102.
[0027]
The light-emitting element 104 includes an anode, a cathode, and a layer containing a light-emitting substance provided between the anode and the cathode. As shown in FIG. 1, when the anode is connected to the driving transistor 102, the anode serves as a pixel electrode and the cathode serves as a counter electrode. A potential difference is provided between the counter electrode of the light emitting element 104 and each of the first power supply lines Vi (i = 1 to x) so that a forward bias current is supplied to the light emitting element 104.
[0028]
One of the two electrodes of the capacitor 105 is connected to the first power supply line Vi (i = 1 to x), and the other is connected to the gate of the current control transistor 103. The capacitor 105 is provided to hold a potential difference between the electrodes of the capacitor 105 when the switching transistor 101 is in a non-selected state (off state). Note that FIG. 1 illustrates a structure in which the capacitor 105 is provided; however, the present invention is not limited to this structure, and the capacitor 105 may be omitted.
[0029]
In FIG. 1, the driving transistor 102 and the current control transistor 103 are p-channel transistors, and the drain of the driving transistor 102 and the anode of the light emitting element 104 are connected. Conversely, if the driving transistor 102 and the current control transistor 103 are n-channel transistors, the source of the driving transistor 102 and the cathode of the light emitting element 104 are connected. In this case, the cathode of the light emitting element 104 is a pixel electrode, and the anode is a counter electrode.
[0030]
Next, a method for driving the pixel shown in FIG. 1 will be described. The operation of the pixel illustrated in FIG. 1 can be described by being divided into a writing period, a holding period, and an erasing period. First, when the scanning line Gj (j = 1 to y) is selected in the writing period, the switching transistor 101 whose gate is connected to the scanning line Gj (j = 1 to y) is turned on. The video signals input to the signal lines S <b> 1 to Sx are input to the gate of the current control transistor 103 via the switching transistor 101. Note that the gate of the driving transistor 102 is always on because the gate is connected to the first power supply line Vi (i = 1 to x).
[0031]
When the current control transistor 103 is turned on by the video signal, a current is supplied to the light emitting element 104 via the first power supply line Vi (i = 1 to x), and the light emitting element 104 emits light.
[0032]
When the current control transistor 103 is turned off by the video signal, no current is supplied to the light emitting element 104 and the light emitting element 104 does not emit light.
[0033]
In the holding period, the switching transistor 101 is turned off by controlling the potential of the scanning line Gj (j = 1 to y), and the potential of the video signal written in the writing period is held. When the current control transistor 103 is turned on in the writing period, the potential of the video signal is held by the capacitor 105, so that supply of current to the light-emitting element 104 is maintained. On the other hand, when the current control transistor 103 is turned off in the writing period, the potential of the video signal is held by the capacitor 105, so that no current is supplied to the light-emitting element 104.
[0034]
In the erasing period, the second scanning line Gej (j = 1 to y) is selected and the erasing transistor 106 is turned on, and the potentials of the power supply lines V1 to Vx are connected to the current control transistor 103 via the erasing transistor 106. Given to the gate. Therefore, since the current control transistor 103 is turned off, a state where no current is forcibly supplied to the light-emitting element 304 can be created.
[0035]
An example of driving timing in the above driving method will be described in detail in Embodiment 6.
[0036]
Note that the element substrate corresponds to one mode before the light-emitting element is formed in the process of manufacturing the light-emitting device of the present invention.
[0037]
The transistor used in the light-emitting device of the present invention may be a transistor formed using single crystal silicon, a transistor using SOI, or a thin film transistor using polycrystalline silicon or amorphous silicon. It may be. Further, a transistor using an organic semiconductor or a transistor using carbon nanotubes may be used. In addition, the transistor provided in the pixel of the light-emitting device of the present invention may have a single gate structure, a double gate structure, or a multi-gate structure having more gate electrodes.
[0038]
In the light emitting device of the present invention described above, since the gate of the driving transistor 102 is connected to the second power supply line Wi (i = 1 to x) and the potential is fixed, there is a problem with the conventional light emitting device. Thus, the change in the potential of the capacitor element and the change in Vgs of the driving transistor 701 due to the switching of the switching transistor and the change in the potential of the signal line and the scanning line are suppressed. In addition, the configuration provided with the erasing transistor as described above is used to increase the duty ratio of light emission and the number of gradations, particularly when gradation display is performed by the time division method. It is effective against.
[0039]
(Embodiment 2)
In this embodiment mode, a mode different from that in FIGS. 1A and 1B of a pixel included in the light-emitting device of the present invention will be described.
[0040]
Similar to the pixel shown in FIG. 1, the pixel shown in FIG. 2 has a light-emitting element 204, a switching transistor (first transistor) 201 for controlling input of a video signal to the pixel, and a fixed gate potential. Driving transistor (third transistor) 202, current control transistor (second transistor) 203 for controlling the supply of current to the light emitting element 204, and erasing transistor (for erasing the potential of the video signal) A fourth transistor) 206. Further, as in this embodiment, a capacitor 205 for holding the potential of the video signal may be provided in the pixel. The light emitting element 204, the driving transistor 202, and the current control transistor 203 are connected in series.
[0041]
In the pixel shown in FIG. 2, the second scanning line Gej is provided, and the gate of the driving transistor 202 is connected to the second scanning line Gej (j = 1 to y). The gate of the erasing transistor 206 is connected to the second scanning line Gej (j = 1 to y), and one of the source and drain is connected to the first power supply line Vi (i = 1 to x) and the other is connected to the second scanning line Gej (j = 1 to y). It is connected to the gate of the current control transistor 203. Therefore, the second power supply line is not provided in this embodiment. However, other configurations are the same as those in FIG.
[0042]
Next, a method for driving the pixel shown in FIG. 2 will be described. The operation of the pixel illustrated in FIG. 2 can be described by being divided into a writing period, a lighting period, a non-lighting period, and an erasing period.
[0043]
First, in the writing period, when the first scanning line Gaj (j = 1 to y) is selected, the switching transistor 201 whose gate is connected to the first scanning line Gaj (j = 1 to y) is turned on. become. The video signals input to the signal lines S1 to Sx are input to the gate of the current control transistor 203 via the switching transistor 201. At the same time, the potential of the video signal is held by the capacitor 205.
[0044]
In the lighting period, the second scanning line Gej (j = 1 to y) is selected, and the driving transistor 202 whose gate is connected to the second scanning line Gej (j = 1 to y) is turned on. At this time, when the current control transistor 203 is turned on by the potential of the video signal held by the capacitor 205, a current is supplied to the light-emitting element 204 through the power supply line Vi (i = 1 to x). In the case where the current control transistor 203 is turned off by the potential of the video signal held by the capacitor 205, no current is supplied to the light emitting element 204, and the light emitting element 204 does not emit light. In the non-lighting period, the driving transistor 202 is turned off by the second scanning line Gej (j = 1 to y). As a result, no current is supplied to the light emitting element 204. Note that in the writing period, the second scanning line Gej (j = 1 to y) may be selected or not selected.
[0045]
In the erasing period, the erasing transistor 206 is turned on and the driving transistor 202 is turned off by controlling the potential of the second scanning line Gej (j = 1 to y). Since the potential of the power supply line V (1 to x) is applied to the gate of the current control transistor 203 via the erasing transistor 206, the current control transistor 203 is turned off. Therefore, it is possible to create a state in which no current is supplied from the power supply line V (1 to x) to the light emitting element 204. Since the gate potential of the current control transistor 203 is held, the erasing transistor 206 may be kept on during the erasing period or may be turned on only for a period shorter than the erasing period. Note that the gate of the driving transistor 202 may be connected to the second scanning line before one row or may be connected to the second scanning line after one row.
[0046]
In the light emitting device of the present invention described above, since the potential of the gate of the driving transistor 102 is not a capacitor element but is fixed by the scanning line Gej (j = 1 to y), there is a problem in the conventional light emitting device. Thus, the change in the potential of the capacitor element and the change in Vgs of the driving transistor 701 due to the switching of the switching transistor and the change in the potential of the signal line and the scanning line are suppressed. In addition, the configuration provided with the erasing transistor as described above is used to increase the duty ratio of light emission and the number of gradations, particularly when gradation display is performed by the time division method. It is effective against.
[0047]
(Embodiment 3)
In the light-emitting device having the pixel described in any of Embodiments 1 to 3, the number of power supply lines or scanning lines for inputting a fixed potential to the gate of the driving transistor is increased. For this reason, the risk of short-circuiting due to process-related dust or the like increases. Thus, in this embodiment, a light-emitting device using a novel structure for connecting transistors in order to reduce wiring will be described with reference to FIGS.
[0048]
FIG. 3 is a top view for explaining the detailed configuration of the pixel, and FIG. 5 is a circuit diagram showing the configuration of one pixel of the pixel portion shown in FIG. FIG. 7 shows a structure of an element substrate of the present invention in which a pixel portion 3009, a scanning line driver circuit 3007, a signal line driver circuit 3006, and an FPC connection portion (external input terminal) 3005 are arranged on a substrate 3008. The pixel portion 3009 includes a plurality of pixels 3000 having the configuration shown in FIG. 5 and is arranged in a matrix.
[0049]
In FIG. 3, pixels corresponding to a video signal line 5001, a first power supply line 5002, and a second power supply line 5011, each having a TFT disposed in a region surrounded by the first scan line 5004 and the second scan line 5003 are shown. Show.
[0050]
In this embodiment mode, the video signal line 5001, the first power supply line 5002, and the second power supply line 5011 are formed using the same conductive film, and the first scan line 5004 and the second scan line 5003 are formed using the same conductive film. Form. Reference numeral 5005 denotes a switching transistor, and a part of the first scan line 5004 functions as its gate electrode. Reference numeral 5006 denotes an erasing transistor, and a part of the second scanning line 5003 functions as its gate electrode. 5007 corresponds to a driving transistor, and 5008 corresponds to a current control transistor. Reference numeral 5009 corresponds to a pixel electrode. Light is emitted in a region (light emitting area) overlapping with a layer containing a light emitting material (light emitting layer) and a cathode (both not shown).
[0051]
FIG. 4 is a longitudinal sectional view of this pixel, and shows a portion corresponding to the AA ′ line shown in FIG. Semiconductor films 10 to 13 are formed on the substrate 3008. The semiconductor film is preferably sandwiched between gas barrier inorganic insulating films such as silicon nitride and silicon oxynitride. In this embodiment mode, the transistor has a top-gate structure; however, a bottom-gate structure may be employed. The gate electrode 5010 of the driving transistor is connected to the wiring 5011 through the first interlayer insulating film 15. The pixel electrode 5001 is connected to the underlying wiring 16 through the second interlayer insulating film 17.
[0052]
Here, symbols of the driving transistor 702 in FIG. 5 will be described. This symbol represents a transistor in which contact regions are provided at two different points of the gate electrode, and is particularly represented because the connection relationship is different from usual. In the pixel shown in FIG. 5, in connecting the driving transistor 702, the gate electrode and the wiring are contacted at two places, the gate is used as a part of the wiring, and the second power supply line Wi (i = 1 to x) However, the portion disposed in parallel with the signal line Si (i = 1 to x) and the first power supply line in the same layer is reduced. A portion surrounded by a dotted line 710 in FIG. 5 corresponds to a portion surrounded by a dotted line 710 in FIG.
[0053]
Note that the pixel shown in FIG. 5 operates in the same manner as the pixel shown in FIG. 1 except for the configuration related to the connection of the driving transistor 702 described above.
[0054]
As in this embodiment mode, the wiring for controlling the gate voltage of the driving transistor has two contact points between the gate electrode and the wiring, the gate is used as a part of the wiring, and the second power supply line is in the same layer. By reducing the number of parts arranged in parallel with the signal lines and the first power supply lines, it is possible to reduce the probability of occurrence of a defect due to a short circuit between adjacent lines. For example, it is possible to reduce the probability of occurrence of a wiring short circuit due to dust generated in the process before and after a layer for forming a signal line or a power supply line.
[0055]
Note that the top view shown in FIG. 3 is an example, and the present invention is not limited to this.
[0056]
(Embodiment 4)
In this example, one embodiment of a light-emitting device of the present invention will be described with reference to the drawings.
[0057]
In this embodiment, the structure and driving of a light-emitting device having an active matrix pixel structure driven by a thin film transistor (TFT) will be described.
[0058]
FIG. 8 shows a block diagram of an external circuit and a schematic diagram of a panel. As shown in FIG. 8, the active matrix display device includes an external circuit 3004 and a panel 3010. The external circuit 3004 includes an A / D conversion unit 3001, a power supply unit 3002, and a signal generation unit 3003. The A / D converter 3001 converts a video data signal input as an analog signal into a digital signal (video signal) and supplies the digital signal to the signal line driver circuit 3006. A power supply unit 3002 generates a power supply having a desired voltage value from power supplied from a battery or an outlet, and a signal line driving circuit (source signal line driving circuit) 3006 and a scanning line driving circuit (gate signal line driving circuit) 3007. , To the light emitting element 3011, the signal generation unit 3003, and the like. The signal generation unit 3003 receives a power source, a video signal, a synchronization signal, and the like, converts various signals, and generates a clock signal and the like for driving the signal line driver circuit 3006 and the scan line driver circuit 3007.
[0059]
A signal and power from the external circuit 3004 are input to an internal circuit or the like from an FPC connection unit 3005 in the panel 3010 through the FPC.
[0060]
In addition, as illustrated in FIG. 7, the panel 3010 includes an FPC connection portion 3005, an internal circuit, and a light emitting element 3011 over a substrate 3008. The internal circuit includes a signal line driver circuit 3006, a scanning line driver circuit 3007, and a pixel portion 3009. In FIG. 7, the pixel described in Embodiment 4 is used as an example, but any of the pixel configurations described in Embodiments 1 to 3 can be used in the pixel portion 3009.
[0061]
A pixel portion 3009 is disposed at the center of the substrate, and a signal line driver circuit 3006 and a scanning line driver circuit 3007 are disposed around the pixel portion 3009. The light emitting element 3011 and the counter electrode of the light emitting element are formed over the entire surface of the pixel portion 3009.
[0062]
More specifically, FIG. 9 shows a block diagram of the signal line driver circuit 3006. The signal line driver circuit 3006 includes a shift register 4002 using a plurality of stages of D flip-flops 4001, a data latch circuit 4003, a latch circuit 4004, a level shifter 4005, a buffer 4006, and the like. Input signals are a clock signal line (S-CK), an inverted clock signal line (S-CKB), a start pulse (S-SP), a video signal (DATA), and a latch pulse (LatchPulse).
[0063]
First, sampling pulses are sequentially output from the shift register 4002 in accordance with the timing of the clock signal, the clock inversion signal, and the start pulse. The sampling pulse is input to the data latch circuit 4003, and the video signal is captured and held at that timing. This operation is performed in order from the first row.
[0064]
When the data latch circuit 4003 in the final stage completes holding the video signal, a latch pulse is input during the horizontal blanking period, and the video signals held in the data latch circuit 4003 are transferred to the latch circuit 4004 all at once. . Thereafter, the level shifter 4005 shifts the level, the buffer 4006 shapes the signal, and the signals are simultaneously output from the signal lines S1 to Sn. At that time, H level (high level) and L level (low level) are input to the pixels in the row selected by the scan line driver circuit 3007, and the light emission and non-light emission of the light emitting element 3011 are controlled.
[0065]
In the active matrix display device described in this embodiment mode, the panel 3010 and the external circuit 3004 are independent, but they may be formed over the same substrate. The display device uses a light emitting element as an example, but may be a light emitting device using another light emitting element. Further, the level shifter 4005 and the buffer 4006 may not be provided in the signal line driver circuit 3006.
[0066]
(Embodiment 5)
In this embodiment, a cross-sectional structure of a pixel will be described. FIG. 10A is a cross-sectional view of a pixel in the case where the driving transistor 9021 is a P-type and light emitted from the light-emitting element 9022 is emitted to the anode 9023 side.
[0067]
In FIG. 10A, an anode 9023 of a light-emitting element 9022 and a driving transistor 9021 are electrically connected, and a light-emitting layer 9024 and a cathode 9025 are stacked over the anode 9023 in this order. A known material can be used for the cathode 9025 as long as it has a small work function and reflects light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are desirable. The light emitting layer 9024 may be formed of a single layer or may be formed of a plurality of stacked layers. In the case of a plurality of layers, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are stacked in this order on the anode 9023. Note that it is not necessary to provide all of these layers. The anode 9023 is formed using a transparent conductive film that transmits light. For example, in addition to ITO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used.
[0068]
A portion where the anode 9023, the light emitting layer 9024, and the cathode 9025 overlap corresponds to the light emitting element 9022. In the case of the pixel shown in FIG. 10A, light emitted from the light-emitting element 9022 passes to the anode 9023 side as shown by a hollow arrow.
[0069]
FIG. 10B is a cross-sectional view of a pixel in the case where the driving transistor 9001 is N-type and light emitted from the light-emitting element 9002 passes through the anode 9005 side. In FIG. 10B, the cathode 9003 of the light-emitting element 9002 and the driving transistor 9001 are electrically connected, and a light-emitting layer 9004 and an anode 9005 are stacked over the cathode 9003 in this order. A known material can be used for the cathode 9003 as long as it has a small work function and reflects light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are desirable. The light emitting layer 9004 may be formed of a single layer or may be formed of a plurality of stacked layers. In the case of a plurality of layers, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are stacked in this order on the cathode 9003. Note that it is not necessary to provide all of these layers. The anode 9005 is formed using a transparent conductive film that transmits light. For example, in addition to ITO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used.
[0070]
A portion where the cathode 9003, the light emitting layer 9004, and the anode 9005 overlap corresponds to the light emitting element 9002. In the case of the pixel shown in FIG. 10B, light emitted from the light-emitting element 9002 passes to the anode 9005 side as shown by a hollow arrow.
[0071]
FIG. 10C is a cross-sectional view of a pixel in the case where light emitted from the light-emitting element 9032 passes through both sides of the cathode 9035 and the anode 9033. In FIG. 10C, an anode 9033 of the light-emitting element 9032 and a driving transistor 9031 are electrically connected, and a light-emitting layer 9034 and a cathode 9035 are stacked over the anode 9033 in this order. The cathode 9035 is, for example, a thin film made of a material having a small work function such as Ca, Al, CaF, MgAg, or AlLi, or a thin film containing these materials and having a light transmitting property and a transparent conductive film are laminated. It is desirable to have a structure. The light emitting layer 9034 may be formed of a single layer or a plurality of layers stacked. In the case of a plurality of layers, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are stacked in this order on the anode 9033. Note that it is not necessary to provide all of these layers. The anode 9023 is formed using a transparent conductive film that transmits light. For example, in addition to ITO, a transparent conductive film in which 2 to 20% zinc oxide (ZnO) is mixed with indium oxide may be used.
[0072]
A portion where the cathode 9033, the light emitting layer 9034, and the anode 9035 overlap corresponds to the light emitting element 9032. In the case of the pixel shown in FIG. 10C, light emitted from the light-emitting element 9032 passes through both sides of the cathode 9035 and the anode 9033 as indicated by white arrows.
[0073]
In this embodiment, an example in which the driving transistor and the light emitting element are electrically connected is shown. However, even in a configuration in which a current control transistor is connected between the driving transistor and the light emitting element. Good.
[0074]
(Embodiment 6)
An example of drive timing using the pixel configuration of the present invention will be described with reference to FIG.
[0075]
FIG. 11A shows an example of expressing a 4-bit gradation using the digital time gradation method. The data retention periods Ts1 to Ts4 have a length ratio of Ts1: Ts2: Ts3: Ts4 = 2. ^Three : 2 ² : 2 ¹ : 2 ⁰ = 8: 4: 2: 1.
[0076]
The operation will be described. First, in the writing period Tb1, the first scanning line is sequentially selected from the first row, and the switching transistor is turned on. Next, a video signal is input to each pixel from the signal line, and light emission and non-light emission of each pixel are controlled by the potential. In the row where the writing of the video signal is completed, the data holding period Ts1 is immediately started. The same operation is performed up to the last row, and the period Ta1 ends. At this time, the writing period Tb2 is sequentially shifted from the row in which the data holding period Ts1 ends.
[0077]
Here, in a subframe period (in this case, SF4 corresponds) having a data holding period shorter than the writing period, an erasing period 2102 is provided so that the next period does not start immediately after the data holding period ends. In the erasing period, the light emitting element is forced to be in a non-light emitting state.
[0078]
Although the case of expressing a 4-bit gradation has been described here, the number of bits and the number of gradations are not limited to this. The order of light emission need not be Ts1 to Ts4, and may be random or may be divided into a plurality of light emission.
[0079]
FIG. 11B shows an example of a write pulse and an erase pulse. As shown in the erase pulse (1), the erase pulse may be inputted one row at a time and held by the capacitor means during the erase period, or during the erase period as shown in the erase pulse (2). The H level may be continuously input all the time. Note that all of the pulses shown in FIG. 11B are when the switching transistor and the erasing transistor are n-type, and when the switching transistor and the erasing transistor are p-type, the pulse shown in FIG. In both cases, the H level and the L level are inverted.
[0080]
(Embodiment 7)
The light emitting device of the present invention can be used for display portions of various electronic devices. In particular, it is desirable to use the light emitting device of the present invention for a mobile device that requires low power consumption.
[0081]
FIG. 12 shows a light emitting device according to the present invention in a state where the connection wiring to the external circuit is assembled. FIG. 12A is a top view. A pixel portion 1202, a signal line driver circuit 1201, and a scan line driver circuit 1203 are formed over the first substrate 1204. These various circuits are manufactured with the structure described in the first to sixth embodiments. The second substrate is fixed so as to face the first substrate 1210 with a sealant 1205. These substrates are typically glass substrates (called alkali-free substrates, such as aluminosilicate glass and barium borosilicate glass), but other plastic substrates may also be used. When a plastic substrate is used, it is desirable to provide a gas barrier film in order to hard coat the surface and prevent intrusion of water vapor or the like.
[0082]
FIG. 12B is a vertical cross-sectional view corresponding to AA ′ and schematically illustrates a state where the pixel portion 1202 and the signal line driver circuit 1201 are formed over the first substrate 1201. In this embodiment mode, the signal line driver circuit 1201 includes the n-channel transistor 1223 and the p-channel transistor 1224; however, the circuit may be formed using only one channel-type transistor. In addition, all the circuit configurations may be integrally formed with the pixel portion 1202, but only a signal selection circuit such as a shift register may be formed, and the others may be mounted with an external IC chip.
[0083]
The pixel portion 1202 includes a switching transistor 1211 and a driving transistor 1212. Although other transistors are not shown, those formed in the same manner as in Embodiments 1 to 4 are arranged.
[0084]
A light-emitting element 1218 connected to the driving transistor 1212 has a structure in which a light-emitting layer containing an organic compound is interposed between a first electrode 1213 and a second electrode 1216, and an interlayer insulating film is interposed over the transistor. Are stacked. The light-emitting element 1218 is a light-emitting device that emits light toward the first substrate 1202 side or the second substrate 1204 side by forming one of the first electrode 1213 and the second electrode 1216 with a light-transmitting electrode. It can be. In addition, by using both electrodes as a light-transmitting electrode, a so-called single-screen double-sided light-emitting device that emits light of a light-emitting element on both surfaces can be obtained.
[0085]
A passivation layer 1208 is formed over the light-emitting element 1218, and the second substrate 1204 is fixed to the light-emitting element 1218 through a resin 1230 for sealing. In order to strengthen the sealing, a seal pattern may be formed on the periphery of the substrate with a sealant 1205 and fixed. In the connection portion with the external circuit, the connection wiring 1208 is drawn from the driving circuit side at the end portion of the first substrate 1210 and bonded to the flexible printed wiring board (FPC) using an anisotropic conductive material. A module is provided in such a form.
[0086]
Examples of electronic devices on which such modules can be mounted include portable information terminals (cell phones, mobile computers, portable game machines, electronic books, etc.), video cameras, digital cameras, goggle type displays, display displays, navigation systems, and the like. . Specific examples of these electronic devices are shown in FIGS.
[0087]
FIG. 13A illustrates a monitor device, which includes a housing 6001, an audio output portion 6002, a display portion 6003, and the like. The module described above can be incorporated as the display portion 6003, and this device can be completed. The monitor device includes all information display devices such as a personal computer, a TV broadcast receiver, and an advertisement display.
[0088]
FIG. 13B illustrates a mobile computer, which includes a main body 6101, a stylus 6102, a display portion 6103, operation buttons 6104, an external interface 6105, and the like. The aforementioned module can be incorporated as the display portion 6103, and this device can be completed.
[0089]
FIG. 13C illustrates a game machine, which includes a main body 6201, a display portion 6202, operation buttons 6203, and the like. The above-described module can be incorporated as the display portion 6202, and this device can be completed.
[0090]
FIG. 13D illustrates a cellular phone, which includes a main body 6301, an audio output portion 6302, an audio input portion 6303, a display portion 6304, operation switches 6305, an antenna 6306, and the like. The above-described module can be incorporated as the display portion 6304, and this device can be completed.
[0091]
As described above, the applicable range of the display device of the present invention is so wide that the display device can be used for electronic devices in various fields.
[0092]
【The invention's effect】
According to the present invention, a light-emitting device can be obtained in which the off-state current of a switching transistor does not need to be kept low, the capacity of a capacitor does not need to be increased, and is hardly affected by parasitic capacitance.
[0093]
[Brief description of the drawings]
FIG. 1 is a circuit diagram illustrating a configuration of a pixel according to an embodiment of the present invention.
FIG. 2 is a circuit diagram illustrating a configuration of a pixel according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating a detailed configuration of a pixel according to an embodiment of the present invention.
4 is a longitudinal sectional view showing the structure of a pixel corresponding to FIG. 3. FIG.
FIG. 5 is a circuit diagram illustrating a configuration of a pixel according to an embodiment of the present invention.
FIG. 6 is a diagram illustrating a conventional technique.
FIG. 7 is a diagram illustrating a configuration of a pixel portion according to an embodiment of the present invention.
FIG. 8 is a diagram showing an outline of an external circuit and a panel according to an embodiment of the present invention.
FIG. 9 is a diagram illustrating a configuration example of a signal line driver circuit.
FIG. 10 is a diagram showing an example of a cross-sectional structure of a pixel of the present invention.
FIG. 11 is a diagram showing an example of operation timing of the light emitting device according to the invention.
FIG. 12 is a diagram showing one embodiment of a module according to the present invention.
FIG. 13 illustrates an example of an electronic device to which the present invention can be applied.

Claims (2)

A light emitting element;
A first transistor having one of a source and a drain connected to the signal line and a gate connected to the first scan line;
A second transistor having a source connected to a power supply line and a gate connected to the other of the source and the drain of the first transistor;
A third transistor having a gate connected to the second scan line, a source connected to the drain of the second transistor, and a drain connected to the light emitting element;
A fourth transistor having a gate connected to the second scan line, one of a source and a drain connected to the gate of the second transistor, and the other of the source and the drain connected to the first power supply line; have,
Before Symbol the second transistor and the third transistor a light-emitting device characterized in that it operates in the linear region. A first transistor having one of a source and a drain connected to the signal line and a gate connected to the first scan line;
A second transistor having a source connected to a power supply line and a gate connected to the other of the source and the drain of the first transistor;
A third transistor having a gate connected to the second scan line, a source connected to the drain of the second transistor, and a drain connected to the light emitting element;
A fourth transistor having a gate connected to the second scan line, one of a source and a drain connected to the gate of the second transistor, and the other of the source and the drain connected to the first power supply line; have,
An element substrate, wherein the pre-Symbol second transistor and the third transistor is operating in the linear region.

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