JP4509882B2 - Viterbi decoding device, Viterbi decoding method, Viterbi decoding program, and computer-readable recording medium recording Viterbi decoding program - Google Patents

Description

  The present invention relates to a Viterbi decoding system suitable for a system for recording and reproducing digital information two-dimensionally by using a hologram memory or the like.

  In recent years, a hologram memory that records and reproduces information two-dimensionally, that is, as page data using holography, is attracting attention as a next-generation high-density recording / reproducing system.

  As shown in FIG. 10, in this system, when information data is recorded, a recording signal is recorded on the basis of information data to be recorded by using a spatial light modulator 20 (for example, a liquid crystal panel or the like) composed of a plurality of pixels. The light is spatially modulated to generate a two-dimensional interference fringe by causing the recording signal light passing through the lens 21 and the coherent recording reference light to interfere, and an image formed by the interference fringe is used as two-dimensional information. Recording on the hologram medium 22.

  The hologram medium 22 includes a rewritable medium using an inorganic photorefractive crystal typified by lithium niobate and a write-once medium using a photopolymer that is an organic polymer material.

  On the other hand, when information data is reproduced by reading the recorded interference fringes from the hologram medium 22, it is generated by irradiating the hologram medium 22 with the reproduction reference light at the same incident angle as the recording reference light. The reflected light or transmitted light is received by the light receiving element 24 (for example, CCD) having a plurality of pixels through the lens 23 to generate a reproduction signal, and the original information data is reproduced using the generated reproduction signal.

  Thus, in the above system, since reproduction is performed in units of two-dimensional page data, it is possible to significantly improve the reproduction speed as compared with a conventional optical disk that performs reproduction in one dimension.

  Here, in the hologram memory system, various noises may be mixed in the recording process and the reproducing process (in particular, noises are often generated due to the inhomogeneity of the recording medium). The S / N ratio decreases due to the influence. In addition, there is an influence of a reproduction signal from an adjacent pixel, that is, an inter-pixel interference, and the original signal may not be reproduced accurately.

  Therefore, as a technique for accurately reproducing information data while reducing the influence of noise and inter-pixel interference, a technique for performing Viterbi decoding processing on a reproduction signal output from a light receiving element has been studied. As a result, a Decision Feedback Viterbi Algorithm has been developed (see Patent Document 1).

  The determination feedback Viterbi decoding method performs the process of determining the decoded bits row by row by performing Viterbi decoding along the horizontal direction (row direction) of the page data while shifting the row downward (column direction). At this time, it is characterized in that decision feedback is performed using the previous decoding result (feedback row) for Viterbi decoding of the next row.

  The outline of the conventional decision feedback Viterbi decoding method will be described with reference to FIGS. Assuming that inter-pixel interference is a two-dimensional impulse response h represented by a 3 × 3 matrix as shown in FIG. 11, the trellis state is defined as a 2 × 2 matrix, and the trellis diagram is as shown in FIG. Expressed. Note that “two-dimensional impulse response” means inputting a unit impulse signal (a two-dimensional bitmap in which the signal level of only one pixel is 1 and the signal levels of all other pixels are all 0) to the linear system. This means the output signal when In the two-dimensional impulse response h in FIG. 11, it can be seen that signal levels are generated not only in the central pixel but also in neighboring adjacent pixels, and the occurrence of inter-pixel interference is assumed. An ideal output signal (without noise) when an arbitrary two-dimensional bitmap consisting of 0 and 1 is input to the linear system is obtained by a two-dimensional convolution operation of the bitmap and the two-dimensional impulse response. There is a property that can be.

  The trellis state [k, l; m, n] ([k, l; m, n]) means a matrix in which row vectors [k, l] and [m, n] are arranged in the column direction. In this case, k, l, m, and n are all 0 or 1, so there are 2 4 = 16 types of trellis states (partly in FIG. 12). Abbreviated).

  There are four branches from each trellis state to the next trellis state, and there are also four branches input to each trellis state. The assumed waveform level assumed by each branch is 3 rows 3 by combining a feedback row (details of the feedback row will be described later) with a matrix of 2 rows and 3 columns obtained by combining two trellis states connected to the branch. Determined by a matrix of columns.

  For example, the level assumed by the branch of [0, 0; 0, 1] → [0, 1; 1, 0] is assumed to be a matrix [ 1, 1, 0; 0, 0, 1; 0, 1, 0]. Specifically, 0.31 obtained by two-dimensional convolution of the impulse response h and the matrix [1, 1, 0; 0, 0, 1; 0, 1, 0] is the assumed waveform level of this branch.

  The Viterbi decoding process is performed in the row direction from left to right. Assuming that the waveform obtained by scanning the playback signal in the row direction is the “playback waveform signal”, the square error between the playback waveform signal and the assumed waveform level of each branch is the branch metric, and the cumulative branch metric of the path to each trellis state And the path metric with the smallest path metric among the four paths input to each trellis state is left as a surviving path.

  If this is repeated in the row direction, the surviving path converges to one if it is traced back by a predetermined time (leftward), so this is determined as the correct path (this “predetermined time” is the path memory length) Called). This process is in principle the same as conventional one-dimensional Viterbi decoding, so detailed description is omitted. However, the difference from one-dimensional Viterbi decoding is that one-dimensional correct path corresponds to the bit sequence itself, but two In the dimension, since the correct path is a matrix, it corresponds to a plurality of bit rows (2 rows in the above example).

  Of these two bit lines, the second line does not consider the influence from the third and subsequent bit lines, that is, only partially considers the influence of inter-pixel interference, and is not reliable. Only the first line that is Viterbi-decoded with all the waveform interference from the top, bottom, left and right taken into account is output as decoded bits.

  Since one bit line is obtained by Viterbi decoding in the row direction as described above, this process is repeated while shifting in the column direction (downward) one row at a time in order to decode the entire page data.

  Here, the concept of decision feedback is introduced. Judgment feedback is a technique of reflecting the decoding result of the next row as a feedback row in the Viterbi decoding of the next row. Specifically, as described above, the expected waveform level of the branch of the next row is set as follows. It is reflected by using it for the processing to decide.

  The procedure for decision feedback will be explained in a little more detail. When the reproduction is performed based on the reproduction waveform signal received in the uppermost row of the light receiving element 24, the amount of light received in the upper row of the uppermost row can be regarded as 0, so that the reproduction waveform signal from the uppermost row is obtained. When reproducing based on the above, all feedback lines are set to zero.

  Next, when reproducing based on the reproduction waveform signal from the second line from the top, it is assumed that the bit line is correctly decoded in the first line (the uppermost line), and this is used as the feedback line. Used for decoding.

  Furthermore, when reproducing based on the reproduction waveform signal from the third row from the top, it is assumed that the bit row is correctly decoded in the second row, and this is used as a feedback row to decode the third row. Use.

As described above, it is assumed that the decoding process has been correctly performed on the line immediately above the current decoding target line, and taking into consideration the influence of the line above (that is, performing a decision feedback in the column direction) Since the Viterbi decoding is performed on the reproduced waveform signal from the row, the Viterbi decoding process is performed in consideration of the influence of inter-pixel interference in the column direction, and the change in the reproduced waveform only in the row direction is used. Compared with conventional one-dimensional Viterbi decoding processing, more accurate decoding processing can be performed.
US Pat. No. 5,740,184 (issued in 1998) Miller et al. "Image restoration with the Viterbi algorithm" Vol.17. No.2 / February 2000 / J.Opt.Soc.Am.A pp265-275

  In the above prior art, if the assumed width of inter-pixel interference is assumed to be 3, the trellis state is defined as a 2-by-2 matrix (a row above the decoding target row is considered as a feedback row). Therefore, the line width of the trellis state can be 3-1 = 2).

  In other words, the assumed waveform level of the branch is determined from the three rows of the feedback row, the decoding target row, and the lower row, and the branch metric is calculated as a square error between the reproduced waveform signal corresponding to the decoding target row and the assumed waveform level. The Thereby, the influence of the inter-pixel interference from the upper and lower rows included in the reproduced waveform signal of the decoding target row is reflected in the Viterbi decoding.

  However, inter-pixel interference is interactive, and the decoding target row itself also gives inter-pixel interference to the upper and lower rows. In the above prior art, the influence is not reflected in Viterbi decoding at all, and the surviving path is determined using only the reproduced waveform signal of the decoding target row, so the most likely path for the entire page data does not survive. There was no problem of high risk.

  The present invention has been made in view of the above problems, and an object thereof is to reduce an error rate of a decoding result in Viterbi decoding of a two-dimensional reproduction signal of page data.

  A Viterbi decoding device according to the present invention is a Viterbi decoding device that performs Viterbi decoding of a two-dimensional reproduction signal of page data, and in order to solve the above problem, a trellis state related to a plurality of rows including decoding target rows in the page data. Based on the transition, Viterbi decoding means for performing Viterbi decoding using the sum of errors of each reproduced signal for a plurality of assumed signal values assumed in the transition as a branch metric of the transition, and among the paths that survived the Viterbi decoding, And decoding bit output means for outputting a decoding bit row corresponding to the decoding target row as a decoding result.

  The Viterbi decoding method according to the present invention is a Viterbi decoding method for Viterbi decoding a two-dimensional reproduction signal of page data, wherein the transition is based on a trellis state transition related to a plurality of rows including a decoding target row in the page data. A Viterbi decoding process for performing Viterbi decoding using the sum of errors of each reproduced signal for a plurality of assumed signal values assumed in FIG. 4 as a branch metric of the transition, and corresponding to the decoding target row among paths surviving as a result of the Viterbi decoding And a decoded bit output process for outputting a decoded bit row to be output as a decoding result.

  In the above configuration and method, the two-dimensional reproduction signal of the page data is Viterbi decoded. Here, “page data” means data consisting of a two-dimensional array of binary digits (bits), which is the minimum unit of information representation.

  And in the said structure and method, when trying to decode a certain line (decoding object line) in page data in Viterbi decoding, the transition of the trellis state regarding several lines including decoding object line is assumed. Then, when obtaining the branch metric in the transition of the trellis state, the assumed signal value assumed in the transition is used. Specifically, the sum of errors of the reproduction signals with respect to the assumed signal value is used as a branch metric in the trellis state transition. By performing Viterbi decoding using this branch metric, the surviving paths for the plurality of rows are specified.

  As a result, with regard to decoding of the decoding target row, it becomes possible to survive the maximum likelihood path taking into consideration the reproduction signal in which the decoding target row has been affected by the inter-pixel interference in the column direction.

  Here, in the above Viterbi decoding, since the trellis state transition regarding a plurality of rows including the decoding target row is assumed as the trellis state, a plurality of decoded bit rows corresponding to each of the plurality of rows are generated. Of the plurality of decoded bit rows, the decoding bit rows other than those corresponding to the decoding target row do not sufficiently consider the influence of the inter-pixel interference in the column direction.

  Therefore, only the decoded bit row corresponding to the decoding target row is output as a decoding result. This avoids that other decoded bit rows that are not sufficiently considered by the inter-pixel interference in the column direction become decoding results, and the decoded bit row output as the decoding result is the same between the pixels in the column direction. The influence of interference will be fully considered.

  As a result, the error rate can be reduced as a whole decoding result.

  In the Viterbi decoding device, the Viterbi decoding means and the decoded bit output means may perform the operations while sequentially shifting the decoding target row in the column direction of the page data. As a result, the entire page data can be decoded.

  In the Viterbi decoding apparatus, the decoding target row can be one row of the page data.

  The Viterbi decoding device according to the present invention is the above Viterbi decoding device, wherein the decoded bit storage means for storing the decoded bit row output by the decoded bit output means for the immediately preceding decoding target row, and the decoding stored by the decoded bit storage means An assumed signal value setting means for setting an assumed signal value used in the Viterbi decoding means based on a bit row may be further provided.

  In the above configuration, an assumed signal value used in the Viterbi decoding for the next decoding target row is set based on the decoding bit row that is the decoding result for the immediately preceding decoding target row. As a result, Viterbi decoding can be performed taking into account only the state transitions that match the decoding result for the immediately preceding decoding target row, so that the circuit size can be reduced by reducing the amount of computation, and the error rate can be further reduced. Decoding can be realized.

  Alternatively, in the Viterbi decoding device according to the present invention, in the Viterbi decoding device, the decoded bit storage unit that stores the decoded bit row output by the decoded bit output unit with respect to the immediately preceding decoding target row, and the decoded bit storage unit stores Transition limiting means for limiting the transition of the trellis state assumed in the Viterbi decoding means based on the decoded bit row to be performed.

  In the above configuration, the trellis state transition assumed in Viterbi decoding related to the next decoding target row is limited based on the decoding bit row that is the decoding result related to the previous decoding target row. As a result, Viterbi decoding can be performed taking into account only the state transitions that match the decoding result for the immediately preceding decoding target row, so that the circuit size can be reduced by reducing the amount of computation, and the error rate can be further reduced. Decoding can be realized.

  The Viterbi decoding apparatus according to the present invention may further include waveform equalizing means for equalizing a two-dimensional reproduction signal to be decoded so as to approximate a predetermined two-dimensional impulse response.

  With the above configuration, it is possible to realize decoding with a lower error rate than the configuration in which the two-dimensional reproduction signal to be decoded is directly Viterbi decoded. The predetermined two-dimensional impulse response may be close to the two-dimensional impulse response in a device (for example, a reproduction device) that generates a two-dimensional reproduction signal to be decoded.

  A reproduction system according to the present invention can be configured by including the above Viterbi decoding apparatus and a reproduction apparatus that reproduces the two-dimensional reproduction signal by performing two-dimensional reproduction from a two-dimensional recording medium.

  The Viterbi decoding program according to the present invention is a program for causing a computer to function as each means in order to operate the computer as the Viterbi decoding device. A recording medium according to the present invention is a computer-readable recording medium in which the Viterbi decoding program is recorded.

  With the above configuration, the Viterbi decoding device can be realized by realizing each unit of the Viterbi decoding device with a computer. Therefore, the above Viterbi decoding apparatus can reduce the error rate as a whole decoding result.

  The Viterbi decoding device according to the present invention, based on the transition of the trellis state relating to a plurality of rows including the decoding target row in the page data, calculates the sum of errors of each reproduction signal with respect to a plurality of assumed signal values assumed in the transition. Viterbi decoding means for performing Viterbi decoding as a branch metric, and decoding bit output means for outputting a decoded bit row corresponding to a decoding target row as a decoding result among paths surviving as a result of Viterbi decoding.

  In addition, the Viterbi decoding method according to the present invention is based on the transition of the trellis state regarding a plurality of rows including the decoding target row in the page data, and calculates the sum of errors of each reproduction signal with respect to a plurality of assumed signal values assumed in the transition. This is a method including Viterbi decoding processing that performs Viterbi decoding as a branch metric of transition, and decoding bit output processing that outputs a decoding bit row corresponding to a decoding target row among decoding paths that survived as a result of Viterbi decoding.

  With the above configuration and method, regarding decoding of a decoding target row, it is possible to survive a maximum likelihood path in consideration of a reproduction signal in which the decoding target row has been affected by inter-pixel interference in the column direction. In addition, it avoids that other decoded bit rows that are not sufficiently considered by the inter-pixel interference in the column direction become a decoding result, and the decoded bit row output as a decoding result has inter-pixel interference in the column direction. The effect of the will be fully considered.

  As a result, the error rate can be reduced as a whole decoding result.

[Embodiment 1]
A first embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 is a block diagram showing a configuration of a hologram memory reproducing system 10 of the present embodiment to which the decoding apparatus and decoding method of the present invention are applied. A hologram memory reproduction system 10 includes a hologram memory reproduction device 1, a buffer memory 2, a two-dimensional waveform equalization circuit 3, a two-dimensional Viterbi decoding circuit 4, a decoded bit row output circuit 5, a decoded bit register 6, and an assumed waveform level setting circuit. 7 is provided.

  The hologram memory reproducing apparatus 1 corresponds to the structure on the reproducing side in the system described with reference to FIG. 10 in the background art column, and irradiates reproduction reference light to a hologram medium on which information is recorded as interference fringes. In this device, reflected light or transmitted light generated by the light is received by a light receiving element (for example, a CCD) having a plurality of pixels through a lens to generate a reproduction signal.

  The buffer memory 2 is a storage device that stores the reproduction signal generated by the hologram memory reproduction device 1 in units of page data. Note that the reproduction signal in units of page data stored in the buffer memory 2 is a two-dimensional reproduction signal affected by the inter-pixel interference as described in the Background Art section.

  The two-dimensional waveform equalization circuit 3 performs two-dimensional waveform equalization on the reproduction signal generated by the hologram memory reproduction device 1 (more precisely, the reproduction signal stored in the two-dimensional waveform equalization circuit 3). By applying this, the reproduced signal is converted into a signal more suitable for the two-dimensional impulse response assumed in the two-dimensional Viterbi decoding circuit 4.

  The two-dimensional Viterbi decoding circuit 4 is a circuit that performs two-dimensional Viterbi decoding based on the signal waveform-equalized by the two-dimensional waveform equalization circuit 3. The specific processing content of the two-dimensional Viterbi decoding will be described later.

  The decoded bit row output circuit 5 is a circuit that extracts and outputs an appropriate decoded bit string included in the path that survives the decoding in the two-dimensional Viterbi decoding circuit 4. The reason for this extraction will be described later.

  The decoded bit register 6 is a register that holds the decoded bit string output from the decoded bit row output circuit 5.

  The assumed waveform level setting circuit 7 calculates an assumed waveform level w1 / w2 to be used in the two-dimensional Viterbi decoding circuit 4 using the decoded bit string held in the decoding bit register 6 and sends it to the two-dimensional Viterbi decoding circuit 4 It is.

  In the hologram memory reproduction system 10, the two-dimensional waveform equalization circuit 3, the two-dimensional Viterbi decoding circuit 4, the decoded bit row output circuit 5, the decoded bit register 6, and the assumed waveform level setting circuit 7 are included in the Viterbi decoding device 12. Is configured.

  The two-dimensional waveform equalizing circuit 3 is a waveform equalizing means, the two-dimensional Viterbi decoding circuit 4 is a Viterbi decoding means, the decoded bit row output circuit 5 is a decoded bit output means, the decoded bit register 6 is a decoded bit storage means, and an assumed waveform. The level setting circuit 7 corresponds to the assumed signal value setting means.

  FIG. 2 shows an impulse response h that approximates the influence of inter-pixel interference in the hologram memory reproducing apparatus 1, and FIG. 3 shows a trellis diagram representing the operation of the two-dimensional Viterbi decoding circuit 4. The operation of the two-dimensional Viterbi decoding circuit 4 assumes the impulse response h. Therefore, this impulse response h is referred to as an assumed impulse response h.

  For simplification of explanation, the assumed impulse response h will be described in the case where the bit width of the inter-pixel interference is 2. However, the assumed impulse response is not limited to this, and the assumed impulse response is close to the impulse response of the hologram memory reproducing device 1. Should be assumed.

  Since the bit width of the inter-pixel interference of the assumed impulse response h is 2, when the conventional decision feedback Viterbi decoding method is applied, the trellis state is defined as a 1-by-1 matrix (up one decoding target row). Since a feedback row can be used for the row of, the row width is 2-1 = 1).

  On the other hand, in the Viterbi decoding method of this embodiment, one extra redundant row is added below to define a trellis state of 2 rows and 1 column as shown in FIG. As a result, a trellis state is defined for a plurality of rows including a decoding target row, an upper row (feedback row) and a lower row (redundant row) convolved with the decoding target row. Since the decoding result has already been determined for the feedback row, it is not shown in the trellis state of FIG. 3, but the feedback row is also used when calculating the assumed waveform level of the branch in the transition of the trellis state.

  Since this trellis state has 2 rows and 1 column (2 bits in total), the number of trellis states is 2 squared = 4, and there are four branches to be input and output to each trellis state.

  In FIG. 3, the numerical values attached to the branches indicate the assumed waveform level of each branch (the assumed signal value assumed for the transition of the trellis state), and two assumed waveform levels correspond to one branch.

  The assumed waveform level in FIG. 3 is obtained when the feedback row corresponding to the branch is [0, 0]. In the calculation example of the assumed waveform level, the bitmap defined by the branch of the trellis state [0; 0] → [1; 1] is [0, 0; 0, 1; 0, 1] when combined with the feedback row. Therefore, as shown in FIG. 4, 1 and 2 are obtained by the convolution operation of this bitmap and the assumed impulse response h. In FIG. 4, it is expressed as 1/2, but this is not a fraction, and the assumed waveform level determined from the first and second rows is 1, and the assumed waveform level determined from the second and third rows. Is 2.

  The assumed waveform levels of all branches can be similarly obtained. When the feedback row is [f1, f2], the assumed waveform levels w1 / w2 of the branches in the trellis state [p; q] → [r; s] are , W1 = (f1 + f2 + p + r), w2 = (p + r + q + s). As described above, a plurality of rows of assumed waveform levels correspond to transitions of the respective trellis states.

  As can be seen from the above description, the assumed waveform level of the branch varies depending on the feedback line. Therefore, the assumed waveform level setting circuit 7 calculates the assumed waveform level w1 / w2 of each branch based on the feedback row [f1, f2], and the assumed waveform level w1 / w2 used for branch metric calculation in the two-dimensional Viterbi decoding circuit 4. w2 is variably set.

  The assumed waveform level w1 / w2 may be set by performing calculation as in the above calculation example every time according to the feedback row [f1, f2] input from the decoding bit register 6, or may be calculated in advance. The assumed waveform may be stored in a memory such as a lookup table, and a corresponding value may be read from the memory and set according to the feedback row.

  The branch metric of the conventional decision feedback Viterbi decoding method is a square error between the reproduced waveform signal and the assumed waveform level of the branch. In this embodiment, not only the reproduced waveform signal for the decoding target row but also the reproduction for the redundant row is used. Since the waveform signal is also used, two square errors are obtained for each. Therefore, there is a great feature in that these sums are defined as branch metrics.

That is, if the reproduced waveform signal and the assumed waveform level corresponding to the decoding target row are x1 and w1, respectively, and the reproduced waveform signal and the assumed waveform level corresponding to the redundant row below are x2 and w2, the branch metric is ( x1-w1) ² + (x2-w2) ² is calculated.

As an example, if the reproduced waveform signals corresponding to the decoding target row and the redundant row below are 1.2 and 1.8, respectively, the branch metric of the trellis state [0; 0] → [1; 1] is (1.2-1) ² + (1.8-2) ² = 0.08 is calculated.

  Next, the reproducing operation by the hologram memory reproducing system 10 having the above-described configuration shown in FIG. 1 will be described with reference to the flowchart of FIG.

  In the hologram memory reproducing apparatus 1, reproduction reference light is irradiated onto a hologram medium (100 page and 100 column page information data is recorded), and two-dimensional from a light receiving element (100 row and 100 column CCD array). Since the operation of outputting the reproduction waveform signal is as described in the background art, details are omitted. The output two-dimensional reproduced waveform signal is stored in the buffer memory 2 (step S1).

  First, the decoding target row i is set to the first row (step S2), and Viterbi decoding in the row direction is started from the j = 1st column (step S3).

  Next, the reproduction waveform signals corresponding to the first row, first column and the second row, first column are read from the buffer memory 2 and are converted into x1 / x2 through the two-dimensional waveform equalization circuit 3 to the two-dimensional Viterbi decoding circuit 4. (Step S4).

  Here, the two-dimensional waveform equalization circuit 3 performs two-dimensional equalization so that the reproduced waveform signal approaches the impulse response h assumed in FIG. 2, and this processing directly performs Viterbi decoding of the reproduced waveform signal. Compared to the above, it is possible to realize decoding with a lower error rate. Therefore, it is desirable to provide the two-dimensional waveform equalization circuit 3 from the viewpoint of error rate, but the hologram memory reproduction system 10 can be configured by omitting the two-dimensional waveform equalization circuit 3 from the viewpoint of circuit scale. .

Next, the two-dimensional Viterbi decoding circuit 4 executes Viterbi decoding in the row direction based on the trellis diagram of FIG. That is, the sum of squared errors (x1−w1) ² between the input reproduction waveform signals x1 / x2 of the recording bits of the first row and first column and the second row and first column and the corresponding assumed waveform levels w1 / w2 respectively. + (X2-w2) ² is obtained as a branch metric, and a surviving path is determined based on the branch metric accumulated until reaching each trellis state, that is, the path metric (step S5).

  Here, the assumed waveform level w1 / w2 used in the Viterbi decoding is obtained by the assumed waveform level setting circuit 7 from the bitmap determined for each branch and the feedback row [f1, f2] stored in the decoding bit register 6. As described above, it is a numerical value.

  Next, if the path memory length of the two-dimensional Viterbi decoding circuit 4 is L, it is determined whether the current j-th column is before or after the L-th column (step S6), and the j-th column is after the L-th column. Then, the decoded bit row output circuit 5 extracts only the bit b1 of the first row from the bit 2 rows [b1; b2] in the trellis state of the (j−L) th column of the surviving path and outputs it as a decoded bit row. (Step S7).

  This decoded bit row is the decoding result itself, but is also stored in the decoded bit register 6 at the same time (step S8).

  The above processing from S4 to S8 is advanced by shifting one column at a time in the row direction (step S9), and when decoding for an extra portion of the path memory length L, that is, (100 + L) columns is completed (step S10). ) Shifting one row at a time in the column direction (step S11), and repeating the processing from S3 to S11 until all 100 decoded bit rows are obtained (step S12).

  At this time, since the decoded bit row on the first row is stored in the decoded bit register 6, this is used as the feedback row for Viterbi decoding of the next row.

  With the above operation, a decoding result bit map is finally obtained as page data.

  FIG. 6 is a trellis diagram showing an example of a survivor path of the trellis diagram obtained by the above reproduction operation, and shows a state where survivor paths up to the 24th column are determined (survivor paths are bold lines). Represented). It can be seen that there is one surviving path leading to each trellis state in the 24th column, but the path converges to one when going back 3 columns (21st column).

  If the path memory length L = 20, the surviving path is surely converged if it is 20 columns before (the fourth column), and the bits 1 and 0 corresponding to the surviving trellis state [1; 0] here Only 1 in the first row is extracted as a decoded bit.

  When viewed from the leftmost column (j = 1) in order, the surviving path is [0; 0] → [0; 1] → [1; 0] → [1; 0], so the decoded bit row is “0, 0, 1”. 1 ”. As already described, a redundant row decoding result “0, 1, 0, 0” is also obtained from this surviving path, but this bit row is not a decoding result because of its low reliability.

  The graph of FIG. 7 shows an experimental result in which the relationship between the reproduction signal quality and the bit error rate of the decoding result is compared and evaluated using the number of rows defining the trellis state of the two-dimensional Viterbi decoding circuit 4 as a parameter. The number of rows = 1 corresponds to the prior art, and the number of rows = 2 and 3 corresponds to this embodiment.

  As a reproduction target bitmap (recording bitmap), randomly generated 0 and 1 bitmap patterns are used, and a white Gaussian noise is generated in an ideal waveform obtained by convolution of the recording bitmap and the assumed impulse response h. Was applied to generate a reproduced waveform signal in a pseudo manner.

The number of columns is 100, that is, Viterbi decoding in the row direction is performed in units of 100 bits, this is repeated for 1000 rows, and the bit error rate is obtained by comparing the decoded bits with the recorded bits (number of sample bits = 1E + 5 (1 × 10 ⁵ ) bits). Further, the path memory length L = 20.

  The horizontal axis of the graph represents the S / N ratio of the reproduced waveform signal (a value defined by the ratio between the ideal waveform variance and the noise variance), and the vertical axis represents the bit error rate of the decoding result.

  From this result, in this embodiment, a lower bit error rate is obtained for the same signal quality as compared with the prior art (when the S / N ratio = 18 dB, the number of errors is 2 and 3 in both cases) Since it was 0, it was not plotted in the graph), and it was confirmed that the decoding capability was high.

  It was also confirmed that as the number of rows in the trellis state increases, the bit error rate decreases and the decoding capability increases. This is because the length in the column direction of inter-pixel interference to be taken into account has an effect similar to the path memory length in the Viterbi decoding in the row direction, so the longer the length, the more reliable the decoding result of the decoding target row. It can be considered to improve. From the viewpoint of circuit scale, it is desirable that the number of rows of the matrix that defines the trellis state is short, but from the viewpoint of decoding capability, it is desirable that the number of rows is long, so an appropriate number of rows may be set according to the system requirements. .

  As described above, when the branch metric is obtained based only on the reproduction waveform signal of the decoding target row as in the conventional technique, the survival path is determined without reflecting the influence of inter-pixel interference on the upper and lower rows. Therefore, the risk that the maximum likelihood path as the entire page data does not survive increases, whereas the sum of errors obtained from the reproduced waveform signals of a plurality of rows including the decoding target row as in this embodiment is used as a branch metric. By performing Viterbi decoding, it is possible to sufficiently take into consideration the influence of inter-pixel interference in the column direction, and it is possible to obtain an effect that decoding with a low error rate can be realized.

[Embodiment 2]
A second embodiment of the present invention will be described with reference to FIGS.

  In the first embodiment, the feedback row stored in the decoding bit register 6 is used to determine the assumed waveform level in the trellis diagram of the two-dimensional Viterbi decoding circuit 4. In the present embodiment, a configuration will be described in which a feedback row is used to determine a transition prohibited branch of a trellis diagram.

  FIG. 8 is a block diagram showing the configuration of the hologram memory reproduction system 11 of this embodiment to which the decoding device and decoding method of the present invention are applied. Note that, in the constituent elements of the hologram memory reproducing system 11, constituent elements having functions equivalent to those of the constituent elements of the hologram memory reproducing system 10 in Embodiment 1 are denoted by the same reference numerals and description thereof is omitted.

  The hologram memory reproduction system 11 is different from the hologram memory reproduction system 10 in that the hologram memory reproduction system 11 includes a transition prohibition setting circuit 9 instead of the assumed waveform level setting circuit 7 and a two-dimensional Viterbi. The decoding circuit 8 is configured based on a trellis diagram as shown in FIG. 9 different from the two-dimensional Viterbi decoding circuit 4 of the first embodiment. In the hologram memory reproduction system 11, the two-dimensional waveform equalization circuit 3, the two-dimensional Viterbi decoding circuit 8, the decoded bit row output circuit 5, the decoded bit register 6, and the transition prohibition setting circuit 9 include the Viterbi decoding device 13. The transition prohibition setting circuit 9 corresponds to transition limiting means.

  FIG. 9 is a trellis diagram that defines the two-dimensional Viterbi decoding circuit 8. In the 3 × 1 matrix representing the trellis state, the first row is the feedback row, the second row is the decoding target row, and the third row is Corresponds to a redundant row.

  FIG. 9 shows a case where the feedback row is “0, 0, 1, 1”, and the transition prohibition branch by the transition prohibition setting circuit 9 removes a branch that cannot be taken in relation to the feedback row. It is shown by

  For example, since the bit of the feedback row in the leftmost column is 0, all branches that are input to and output from the trellis state in which the first row is 1 are removed. Similarly, since the bits of the feedback rows in the second column and the third column are 0 and 1, respectively, all branches that are input and output in the trellis state in which the first row is 1 and 0 are all removed.

  Since the assumed waveform level of the branch that has not been removed is determined only from the two trellis states connected to the branch, it is a fixed value that does not change depending on the feedback row, and the assumed waveform level is calculated as in the first embodiment. And a memory for the lookup table and the lookup table are not necessary.

  However, the trellis state is 8 states, and the number of states is twice that of the 4 states of the first embodiment (see FIG. 3). Although the number of trellis states has increased to eight, the number of branches input to and output from each trellis state is four each, and the number of trellis states has not increased compared to the case of the first embodiment. The risk of occurrence is the same as in the first embodiment. Therefore, as in the first embodiment, the effect that decoding with a low error rate is realized can be obtained.

  The reproducing operation by the hologram memory reproducing system 11 having the above-described configuration shown in FIG. 8 is substantially the same as the reproducing operation shown in the flowchart of FIG. 5 in the first embodiment, and thus detailed description is omitted, but step S5 of FIG. The processing corresponding to is different. That is, the two-dimensional Viterbi decoding circuit 8 is different in that Viterbi decoding is executed based on the trellis diagram of FIG. 9 instead of FIG. Furthermore, there is a difference in that the transition prohibition branch is set by the transition prohibition setting circuit 9.

In the configuration of the first embodiment, since the assumed waveform level changes according to the feedback line, it is necessary to calculate the branch metric by changing the assumed waveform level each time, whereas in the configuration of the second embodiment, the feedback line is changed. Since the assumed waveform level does not change according to, and the assumed waveform level is determined only from the trellis state, the branch metric calculation formula itself is the same as (x1−w1) ² + (x2−w2) ² in the first embodiment. , W1 and w2 are different in that they are fixed values determined in advance for each branch.

  In the hologram memory reproducing systems 10 and 11 described in the first and second embodiments, the decoding bit register 6 stores only the decoding result of the upper row and uses only one feedback row. In order to take into account more the influence of inter-pixel interference in the column direction, a plurality of feedback results may be stored by storing a plurality of decoding results of two or more rows. Thereby, the decoding capability can be further improved.

  In the hologram memory reproducing systems 10 and 11 described in the first and second embodiments, the decoding bit row output circuit 5 outputs only one row as a decoding target row. However, the number of rows in the trellis state is increased. Thus, a configuration may be adopted in which a plurality of rows are output as decoding target rows. In this case, when the Viterbi decoding in the row direction is completed to the right end, the next Viterbi decoding is executed while being shifted downward by a plurality of rows. As a result, the number of rows decoded at the same time increases, so that the decoding speed increases several times and higher speed reproduction can be realized.

  In the hologram memory reproducing systems 10 and 11 described in the first and second embodiments, the entire two-dimensional reproduction signal is decoded by executing two-dimensional Viterbi decoding in the row direction and repeating this in the column direction. Since the definition of the column itself has no meaning, it is needless to say that the configuration may be such that the row and the column are interchanged. Further, the relationship between the upper and lower sides and the left and right used in the description has no meaning, and a configuration in which the upper and lower sides and the left and right sides are interchanged is naturally acceptable.

  In the hologram memory reproducing systems 10 and 11 described in the first and second embodiments, the assumed waveform level of the branch is determined based on the impulse response h as shown in FIG. Needless to say, the assumed waveform level should be set to an appropriate value in accordance with the assumed impulse response.

  In the first and second embodiments, the hologram memory system has been described as an example of the reproduction system. However, the reproduction system is not limited to this, and the same effect can be achieved in a system that reproduces a two-dimensional signal. That is, the present invention can be applied to a two-dimensional barcode reproduction system represented by a QR code as another reproduction system.

  Each block of the hologram memory reproducing systems 10 and 11 described in the first and second embodiments may be configured by hardware logic, or may be realized by software using a computer as follows.

  That is, the decoding apparatus (the apparatus excluding the hologram memory reproducing apparatus 1 and the buffer memory 2 in the hologram memory reproducing system 10 in FIG. 1 or the hologram memory reproducing system 11 in FIG. 8) realizes each function of this apparatus. CPU (central processing unit) that executes Viterbi decoding program instructions, ROM (read only memory) that stores the program, RAM (random access memory) that expands the program, memory that stores the program and various data, etc. It can also be realized by a computer having a storage device or the like.

  That is, an object of the present invention is to supply a computer with a recording medium in which a program code (execution format program, intermediate code program, source program) of a decoding program, which is software that realizes the above-described functions, is readable by a computer. This can also be achieved by the computer reading and executing the program code recorded on the recording medium.

  Thus, in this specification, the means does not necessarily mean physical means, but includes cases where the functions of the means are realized by software. Further, the function of one means may be realized by two or more physical means, or the functions of two or more means may be realized by one physical means.

  As described above, the Viterbi decoding device of the present invention is a device for decoding recorded bits from a two-dimensional reproduction signal, and a trellis line expressed by a transition in the row direction of a trellis state defined by a bit matrix. Viterbi decoding means for performing Viterbi decoding using the sum of errors between a plurality of assumed waveform levels corresponding to each trellis state transition and the reproduced signal as a branch metric using the figure, and the surviving path determined by the Viterbi decoding means Decoding bit output means for outputting only N rows (N is a natural number smaller than the number of rows in the trellis state) as decoded bit rows, while shifting the trellis state in the column direction by N rows and the Viterbi decoding means and In this configuration, the process of the decoded bit output means is repeated.

  Further, the Viterbi decoding device of the present invention includes a decoded bit storage unit that stores the decoded bit row output from the decoded bit output unit, and a decoding bit storage unit that stores the assumed waveform level in the Viterbi decoding unit. There may be further provided an assumed waveform level setting means for variably setting based on the bit row.

  In addition, the Viterbi decoding device of the present invention includes a decoded bit storage unit that stores a decoded bit row output from the decoded bit output unit, and a decoded bit stored in the decoded bit storage unit among the transitions in the Viterbi decoding unit. Transition prohibiting means for prohibiting transition corresponding to the row may be further provided.

  In the Viterbi decoding device of the present invention, the decoded bit row N output from the decoded bit output means may be N = 1.

  The Viterbi decoding means may have an assumed waveform level corresponding to the transition based on a predetermined two-dimensional impulse response.

  In addition, the Viterbi decoding apparatus of the present invention may further include waveform equalization means for performing two-dimensional waveform equalization so that a reproduction signal approaches the predetermined two-dimensional impulse response.

  The Viterbi decoding method of the present invention is a method for decoding recorded bits from a two-dimensional reproduction signal using a trellis diagram expressed by a transition in the row direction of a trellis state defined by a bit matrix, A step of performing Viterbi decoding using a sum of errors between a plurality of assumed waveform levels corresponding to trellis state transitions and a reproduction signal as a branch metric, and N rows (N is a row in the trellis state) from the surviving paths determined by the Viterbi decoding Only a natural number smaller than the number) is output as decoded bit rows, and the above two steps are repeated while shifting in the column direction by N rows.

  According to the above Viterbi decoding apparatus and Viterbi decoding method, Viterbi decoding is performed based on reproduced waveform signals of a plurality of upper and lower rows including a decoding target row, so that the influence of inter-pixel interference is sufficiently taken into account in the column direction as well. In addition, it is possible to realize decoding with a low error rate close to maximum likelihood decoding.

  Further, by storing a bit row of the decoding result and using it for determining the assumed waveform level of Viterbi decoding in the row below and determining the prohibited transition, the circuit scale can be reduced and the error rate can be further reduced. Can be realized.

  Further, by adopting a configuration that performs two-dimensional equalization so that the reproduced waveform signal approaches the assumed impulse response, it is possible to realize decoding with a lower error rate than a configuration in which the reproduced waveform signal is directly Viterbi-decoded. Become.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  According to the Viterbi decoding apparatus and the Viterbi decoding method of the present invention, a two-dimensional signal can be decoded with a low error rate. Therefore, a hologram memory reproducing apparatus for reproducing a two-dimensional signal, a two-dimensional barcode represented by a QR code It can be applied to a playback device.

1 is a block diagram showing a configuration of a hologram memory reproduction system according to a first embodiment of the present invention. It is a figure which shows the assumed impulse response of the hologram memory reproduction system of FIG. FIG. 2 is a trellis diagram expressing the operation of two-dimensional Viterbi decoding in the hologram memory reproduction system of FIG. 1. It is a figure explaining the example of calculation which calculates | requires the assumption waveform level of the trellis diagram of FIG. 3 is a flowchart showing a reproduction operation of the hologram memory reproduction system of FIG. 1. FIG. 3 is a trellis diagram showing an example of a surviving path obtained by the reproducing operation of the hologram memory reproducing system of FIG. 1. It is a graph which shows the experimental result performed in order to verify the effect of this invention. It is a block diagram which shows the structure of the hologram memory reproduction system which concerns on 2nd Embodiment of this invention. FIG. 9 is a trellis diagram representing the operation of two-dimensional Viterbi decoding in the hologram memory reproduction system of FIG. 8. It is a block diagram which shows the structure of the conventional hologram memory recording / reproducing apparatus. It is a figure which shows the assumed impulse response of the conventional hologram memory reproduction | regeneration system. It is a trellis diagram expressing the conventional decision feedback Viterbi decoding method.

Explanation of symbols

1 Hologram memory playback device (playback device)
2 Buffer memory 3 Two-dimensional waveform equalization circuit (waveform equalization means)
4 Two-dimensional Viterbi decoding circuit (Viterbi decoding means)
5 Decoded bit row output circuit (decoded bit output means)
6 Decoding bit register (decoding bit storage means)
7 Assumed waveform level setting circuit (assumed signal value setting means)
8 Two-dimensional Viterbi decoding circuit (Viterbi decoding means)
9 Transition prohibition setting circuit (transition restriction means)
10 Hologram memory reproduction system (reproduction system)
11 Hologram memory reproduction system (reproduction system)
12 Viterbi decoding device 13 Viterbi decoding device

Claims (9)

In a Viterbi decoding device for Viterbi decoding a two-dimensional reproduction signal of page data,
Viterbi that performs Viterbi decoding based on a transition of trellis states related to a plurality of rows including a decoding target row in the page data, using a sum of errors of reproduction signals for a plurality of assumed signal values assumed in the transition as a branch metric of the transition Decryption means;
Of the paths that survived the Viterbi decoding, the decoding bit output means for outputting the decoding bit row corresponding to the decoding target row as a decoding result ,
The Viterbi decoding means and the decoded bit output means perform the operations while sequentially shifting the decoding target row in the column direction of the page data,
Decoded bit storage means for storing the decoded bit row output by the decoded bit output means with respect to the immediately preceding decoding target row;
A Viterbi decoding device further comprising: a transition restriction unit that restricts a transition of a trellis state assumed in the Viterbi decoding unit based on a decoded bit row stored in the decoded bit storage unit. In a Viterbi decoding device for Viterbi decoding a two-dimensional reproduction signal of page data,
  Viterbi that performs Viterbi decoding based on a transition of trellis states related to a plurality of rows including a decoding target row in the page data, using a sum of errors of reproduction signals for a plurality of assumed signal values assumed in the transition as a branch metric of the transition. Decryption means;
  A decoding bit output means for outputting a decoded bit row corresponding to the decoding target row as a decoding result among paths that survive the Viterbi decoding;
  The Viterbi decoding unit and the decoded bit output unit perform the operations while sequentially shifting the decoding target row in the column direction of the page data,
  Decoded bit storage means for storing the decoded bit row output by the decoded bit output means with respect to the immediately preceding decoding target row;
  The Viterbi decoding apparatus further comprising: an assumed signal value setting unit that sets an assumed signal value used in the Viterbi decoding unit based on a decoded bit row stored in the decoded bit storage unit. The Viterbi decoding apparatus according to claim 1, wherein the decoding target row is one row of the page data. The waveform equalization means for equalizing a two-dimensional waveform so that a two-dimensional reproduction signal to be decoded is approximated to a predetermined two-dimensional impulse response is further provided. Viterbi decoding device. A Viterbi decoding device according to any one of claims 1 to 4,
  A reproduction system comprising: a reproduction device that reproduces the two-dimensional reproduction signal by performing two-dimensional reproduction from a two-dimensional recording medium.   In a Viterbi decoding method for Viterbi decoding a two-dimensional reproduction signal of page data,
  Viterbi that performs Viterbi decoding based on a transition of trellis states related to a plurality of rows including a decoding target row in the page data, using a sum of errors of reproduction signals for a plurality of assumed signal values assumed in the transition as a branch metric of the transition. Decryption processing,
  A decoding bit output process for outputting a decoding bit row corresponding to the decoding target row as a decoding result among paths that survived the Viterbi decoding;
  A decoded bit storage process for storing the decoded bit line output in the decoded bit output process with respect to the immediately preceding decoding target line;
  A transition restriction process for restricting a transition of a trellis state assumed in the Viterbi decoding process based on a decoded bit row stored in the decoded bit storage process;
  The Viterbi decoding method, wherein the Viterbi decoding process and the decoded bit output process are performed while sequentially shifting the decoding target row in the column direction of the page data.   In a Viterbi decoding method for Viterbi decoding a two-dimensional reproduction signal of page data,
  Viterbi that performs Viterbi decoding based on a transition of trellis states related to a plurality of rows including a decoding target row in the page data, using a sum of errors of reproduction signals for a plurality of assumed signal values assumed in the transition as a branch metric of the transition. Decryption processing,
  Of the paths that survived the Viterbi decoding, a decoded bit output process for outputting a decoded bit row corresponding to the decoding target row as a decoding result;
A decoded bit storage process for storing the decoded bit line output in the decoded bit output process with respect to the immediately preceding decoding target line;
  An assumed signal value setting process for setting an assumed signal value to be used in the Viterbi decoding process based on the decoded bit row stored in the decoded bit storage process,
  The Viterbi decoding method, wherein the Viterbi decoding process and the decoded bit output process are performed while sequentially shifting the decoding target row in the column direction of the page data.   A Viterbi decoding program for causing a computer to function as each of the means for operating the computer as the Viterbi decoding device according to any one of claims 1 to 4.   A computer-readable recording medium on which the Viterbi decoding program according to claim 8 is recorded.

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