JP6774824B2 - Decoding device, hologram reproduction device, and decoding method - Google Patents

Description

The present invention relates to a decoding device, a hologram reproduction device, and a decoding method, and more particularly to a decoding device, a hologram reproduction device, and a decoding method for decoding an error-correcting coded and n: r-modulated signal. Although the present invention will be described with reference to an example of a hologram reproduction device, the decoding device and the decoding method of the present invention are not limited to the hologram reproduction device.

In recent years, a hologram optical memory medium (hologram recording medium) has attracted attention as a medium capable of efficiently recording a large amount of data. Holographic memory is expected to be used as a large-capacity memory for images, sounds, computers, etc.

In a holographic memory recording system, generally, an object light carrying digital data is simultaneously irradiated to a hologram recording medium together with reference light, and interference fringes formed in the hologram recording medium are written to the optical recording medium to write the digital data. To record. On the other hand, when the hologram recording medium on which the digital data is recorded is irradiated with the reference light, the interference fringes written in the hologram recording medium cause the light to be diffracted, and the digital data carried by the object light is reproduced. Can be done. An example of the holographic memory recording system currently used will be briefly described with reference to FIGS. 5 and 6.

First, it will be described from the time of recording. FIG. 5 is a diagram showing an example of the optical arrangement and the optical path (thick alternate long and short dash line) at the time of recording of the holographic memory recording system 100. Optical elements that are not used during recording are drawn with thin alternate long and short dash lines.

The laser beam (here, S-polarized light (longitudinal polarized light)) output from the laser light source 101 and passed through the shutter 102 is rotated to 45-degree polarized light by the 1/2 wave plate 103, and then PBS (polarized beam splitter). ) 104, it is divided into P-polarized light and S-polarized light. The P-polarized light passes through the PBS 104 and then passes through the shutter 105. Then, after being magnified by the magnifying lens 106, it passes through the PBS 107 and is irradiated on the SLM (spatial light modulation element) 108 made of a reflective liquid crystal element or the like. The irradiated light carries the digital data of the two-dimensional image by the white and black bit patterns projected on the element surface of the SLM108, and is converted into S-polarized light (actually, it is displayed in white). The light from the element is converted to S-polarized light) and reflected back to PBS107 as object light. The object light returned from the SLM 108 is reflected by the PBS 107, passes through the FT (Fourier transform) lens 109, is transmitted by the spatial filter 110 for the Nyquist frequency, cuts the frequency component beyond that, and is again FT (Fourier). The hologram recording medium 113 is irradiated through the conversion) lens 111 and the FT (Fourier transform) lens 112.

On the other hand, the S-polarized light reflected by the PBS 104 passes through the 1/2 wavelength plate 117, but here, the polarization axes of the beam are aligned with the 1/2 wavelength plate 117, and the polarization plane of the beam is not rotated. Next, it is incident on PBS 116, where it is reflected, reflected by the mirror 120 and the galvano mirror 121, passed through the relay lens 122, and then irradiated onto the hologram recording medium 113. Since both the reference light and the object light irradiated on the hologram recording medium 113 in this way are S-polarized, they interfere with each other on the hologram recording medium 113 to form interference fringes, and the interference fringes are holograms. It will be written to the recording medium 113.

Next, the time of reproduction will be described with reference to FIG. FIG. 6 is a diagram showing an example of the optical arrangement and the optical path (thick alternate long and short dash line) during reproduction of the holographic memory recording system 100. The optical elements that are not used during reproduction are drawn by thin alternate long and short dash lines.

Up to PBS 104 is the same as at the time of recording, but the transmitted P-polarized light is stopped by the shutter 105. On the other hand, the reflected S-polarized light changes the axis of the 1/2 wave plate 117 to a set value of 45 degrees and rotates the polarization plane by 90 degrees to become P-polarized light. After passing through PBS 116, this P-polarized light is reflected by the galvanometer mirror 115, passes through the relay lens 114, and then enters the hologram recording medium 113. The signal light diffracted by the interference fringes written on the hologram recording medium 113 passes through the FT lens 112, the FT lens 111, the spatial filter 110, and the FT lens 109, passes through the PBS 107, and is imaged by the two-dimensional image sensor 118. , Digital data will be restored by processing with the arithmetic unit 119.

In such a holographic memory recording system, the light passing through the FT lens is affected by a kind of low-pass filter, and in the two-dimensional image sensor 118 that reproduces a signal, the point image is greatly expanded and the neighboring point images are close to each other. In that case, it becomes a reproduced image in which the point images are joined to each other. Further, since the light emitted from the laser light source 101 is increased to the size of the SLM 108 by the magnifying lens 106, the central portion of the SLM 108 is bright and the peripheral portion is slightly dark.

In the threshold value determination in this case, the threshold value must be changed between the peripheral portion and the central portion according to the luminance distribution. However, since the brightness distribution has various dependences such as recording conditions and reproduction conditions, it cannot be unconditionally determined. Therefore, as a recording code, a difference code for determining white and black within a certain range has been proposed (Patent Document 1). By adopting this method, there is a feature that data can be reproduced by distinguishing between white and black within a certain range.

On the other hand, in a holographic memory recording system, in addition to uneven brightness, various noises such as noise from an optical system and a recording medium and leakage from multiple recording pages are added. Therefore, since it is difficult to record and reproduce the difference code as it is without any error using only the above-mentioned difference code, an error correction code is usually added.

The error correction code is roughly divided into a block code and a convolutional code. In recent years, LDPC (Low Density Parity Check) is often used for block codes, and turbo codes are often used for convolutional codes because they show error correction capability approaching the Shannon limit.

Of these, the turbo code is not suitable from the viewpoint of error correction of the recording device because the decoding process is complicated and the latency is relatively large. On the other hand, LDPC is used in various places such as satellite broadcasting, wireless LAN, and wireless Internet because it is linear time decoding and suitable for parallel mounting. Similarly, in a holographic memory recording system, the use of LDPC as an error correction is promising (Patent Document 2).

Here, the outline of LDPC coding / decoding will be described.

In LDPC, the bit to be encoded is generally called an "information bit". Further, in performing the coding of the LDPC, an "inspection matrix" (denoted as H) is determined in advance. In the coding, first, a "check bit string" (parity) is generated based on the input information bit string and the check matrix H. The data unit to which the inspection bit is added, that is, the unit of "information bit + inspection bit" is the "1LDPC block" which is the minimum unit of LDPC coding / decoding. The LDPC-encoded data (LDPC code string) is transmitted to the communication path or recorded on the recording medium.

In decoding the LDPC code, first, the "log-likelihood ratio" (LLR) of each bit constituting the LDPC code string is calculated from the received signal (or read signal). This "logarithmic likelihood ratio" is used as information representing the likelihood of the value of each bit ("0" or "1"), and is abbreviated as "LLR" below.

Here, a method of obtaining LLR (set as λn) when the transmission signal is Xn (Xn is +1 or -1) and the reception signal is Yn will be described. From the conditional probability P (Yn | Xn) of the communication path, LLR can be calculated by the following equation (1).

In the case of the LDPC coding / decoding model assuming a general AWGN (additive white Gaussian noise) communication path, the conditional probability of the communication path can be set to the following equation (2). However, σ ² is the variance of Gaussian noise, and b takes the values of +1 and -1.

Here, by substituting the equation (2) into the equation (1), the LLR (λn) becomes the following equation (3).

The LLR for each bit is expressed as λ (n). The LLR (λ (n)) for each bit is calculated from the received signal, and based on these λ (n) and the predetermined check matrix (H), each of the information bits for each LDPC block is calculated by the LDPC decoding algorithm. LDPC decoding estimates the bit value.

The LDPC decoding algorithm is based on the so-called MAP (Maximum A posteriori Possibility) decoding method. In the MAP decoding method, a conditional probability representing the probability that the received word Y is received when the code word X is transmitted is calculated, and the symbol of "0" or "1" that maximizes the conditional probability P is estimated. Use as a value. However, if the procedure for calculating the posterior probability for each bit by adding the value of the posterior probability P (Yn | Xn) for all the code words is executed as it is according to the definition, the amount of calculation will be enormous. As an LDPC decoding algorithm for reducing this amount of calculation, for example, a sum-product algorithm has been proposed. This sum-product algorithm can be said to be an approximation algorithm of the MAP decoding method. Next, the sum-product algorithm will be described.

FIG. 7 is a flowchart showing the contents of the decoding process for simply explaining the contents of the LDPC decoding process by the sum-product algorithm (Non-Patent Document 2).

As for the outline of the flowchart, first, as step 1 (S1), a process of obtaining a message αmn from the check node m to the variable node n is performed, and then, as step 2 (S2), the obtained αmn and the log-likelihood ratio λn Based on the above, the process of obtaining the message β nm from the variable node n to the check node m is performed. After that, as step 3 (S3), an approximate value Ln of the logarithmic posterior probability ratio described later is obtained, and the estimation bit is determined based on this value.

After that, as step 4 (S4), a parity check is performed based on the obtained estimated bits, and if the estimated bits satisfy the parity check, this is output as a correct estimated bit in step 5 (S5) and is not satisfied. In that case, the process returns to step 1 and the process is repeated.

In each equation of the flowchart, "A (m)" represents a set of variable nodes connected to the check node m, and "A (m) \ n" is a set of differences obtained by removing n from the set A (m). Represents. Similarly, "B (n)" represents a set of check nodes connected to the variable node n, and "B (n) \ m" represents a set of differences obtained by removing m from the set B (n). Further, as shown in the figure, the function f (x) is a function defined by the following equation (4), and has the property that f and f are conformal maps.

The function sign (x) is a sign function that takes +1 when x is positive, -1 when x is negative, and 0 when x is 0. In the decoding process, the initial value of "message β nm from the variable node n to the check node m" is set to "0" and the calculation is started.

Ln calculated in the estimation bit determination process of step 3 (S3) is an approximate value of a quantity called “logarithmic posterior probability ratio” related to posterior probability P. The absolute value of Ln represents the reliability of the estimation, and the larger the value, the higher the reliability of the estimation. If the value of Ln is positive, "0" is determined as the value of the estimated bit (0 (Ln> 0)). If the value of Ln is negative, "1" is determined as the value of the estimated bit (1 (Ln <0)).

In the parity check process of step 4 (S4), a predetermined check matrix H is used. When the estimated bit sequence satisfies the parity check condition, the estimated bit sequence is output as an estimated value of the transmitted (recorded) information bit sequence (S5).

In this way, in the decoding process by the sum-product algorithm, the check node process, the variable node process, and the estimated bit determination process are treated as one round process, and this process is repeated until the estimated bit sequence satisfies the parity check condition. The details of the LDPC decoding algorithm including such a sum-product algorithm are described in documents (Non-Patent Document 1, Non-Patent Document 2, Non-Patent Document 3, etc.).

By the way, since a general signal is a time-series one-dimensional signal, the likelihood calculation may be performed by applying the amplitude value of the received signal to the equation (3). On the other hand, in hologram recording, as described above, a difference code may be used as a countermeasure against luminance unevenness and the like. In such a case, the received signal cannot be directly applied to the equation (3).

Therefore, an example of likelihood calculation when a difference code is used will be described. In hologram recording, it is attempted to record and reproduce 2 × 2 4 bits by using only one bit as white and the other as black, that is, using 4 bits of 2 bit information. Hereinafter, a modulation method in which nbit information is expressed using rbit will be referred to as "n: r modulation". The method of recording and reproducing the above 2-bit information using 4 bits is "2: 4 modulation". The n: r modulation can be realized by, for example, expressing the nbit information as an rbit by arranging a predetermined number of bits in the r location, and when converting the signal into two-dimensional data or by converting the DC component of the signal. It is used when removing.

Here, when 2: 4 modulation is used, the received word of 2 bits can be obtained by the following equation (5), where the measured values of each element of rbit (4 bits) are r1 to r4.

Since each received word Yn (reproduced signal) has a normal distribution with 1 as the average value when there is no noise and 1 as the average value when there is noise, the conditional probabilities corresponding to Eq. (2) are as follows. Equations (6) to (9) are obtained.

From this, with respect to the original 2 bits, the LLR of the 1st bit is obtained by the following equation (10), and the LLR of the 2nd bit is obtained by the following equation (11).

Using this LLR, error correction and decoding of LDPC can be performed (Patent Document 2).

In addition, a method for calculating the likelihood of LDPC has been proposed in 9:16 modulation in which 9-bit information is expressed in 16-bit (Patent Document 3). As described above, several methods have been proposed in which the likelihood of each bit is obtained for the n: r-modulated signal and error correction / decoding is performed.

Japanese Patent No. 3209439 JP-A-2007-272973 JP-A-2010-186503

"Practical construction method of LDPC code (above)" Nikkei Electronics August 15, 2005 issue (pages 126-130) "Practical Construction Method of LDPC Code (Middle)" Nikkei Electronics August 29, 2005 (pp. 127-132) "Practical construction method of LDPC code (below)" Nikkei Electronics September 12, 2005 issue (pages 137-145)

However, in the method of obtaining the original 2-bit LLR from the measured value of the 4-bit two-dimensional data of Patent Document 2 and using this LLR to correct the error of the LDPC, the amount of calculation increases as the code length is increased. There was a challenge. Further, in the 9:16 modulation of Patent Document 3, the method of calculating the likelihood of LDPC is lacking in versatility because it requires various calculations such as reordering many times and detecting the minimum value. At the same time, there is a problem that it is difficult to apply when the code length becomes large. In this way, in order to determine the likelihood (LLR) for each bit from the measured value of the n: r-modulated data, the determination method is complicated, the amount of calculation is large, and it takes time. was there.

Therefore, an object of the present invention made in view of the above problems is to simply perform the likelihood (LLR) of nbit data based on the measured values of n: r-modulated data by only four arithmetic operations. , To provide a decoding device and a decoding method that can be determined accurately.

Another object of the present invention is to reduce the error rate of the recording system by making it possible to easily and quickly perform the likelihood (LLR) calculation in hologram recording with a small amount of calculation in a holographic memory. The purpose is to provide a hologram reproducing device capable of performing the same.

In order to solve the above problems, the decoding device according to the present invention is a block extraction unit that blocks an n: r-modulated input signal that expresses nbit information using rbit (n <r) into rbit blocks. The hard judgment unit that performs hard judgment and outputs nbit data from the blocked rbit input signal, and the other bits with 1 being the bit that calculates the likelihood based on the hard judgment nbit data. A first nbit in which the data is determined to be rigid and a second nbit in which the bit for calculating the likelihood is set to 0 and the other bits are determined to be rigid are created, and the rbit conversion data corresponding to the first nbit and the first nbit are created. and the difference between the RBIT conversion data corresponding to 2Nbit, and characterized in that based on the average value of the product for each bit of the input signal of the RBIT, equipped with a LLR determination unit for calculating the likelihood of the bit To do.

Further, the decoding device performs error correction coding processing on a signal whose input signal is nbit, and further performs error correction / decoding processing of nbit based on the likelihood calculated by the LLR determination unit. It is desirable to have an error correction decoding unit.

Further, in the decoding device, it is desirable that the error correction coding is LDPC coding.

Further, in the decoding device, the LLR determination unit converts the input signal data in the block into a value from -1 to +1 based on the maximum value and the minimum value of the input signal in the block. It is desirable to include obtaining the average value of the product of the difference and the standardized input signal for each bit.

In order to solve the above problems, the hologram reproduction device according to the present invention includes the decoding device, the n: r modulation signal is recorded with a two-dimensional code, and the read signal of the two-dimensional code is used as the input signal. It is characterized by that.

In order to solve the above problems, the decoding method according to the present invention includes a step of extracting rbit from an n: r-modulated input signal expressing nbit information using rbit (n <r) , and a step of extracting rbit. The first nbit, in which the bit for calculating the likelihood is set to 1 and the other bits are set as the hard-determined data based on the process of performing the hard determination and outputting the nbit data from the input signal and the hard-determined nbit data . A second nbit is created in which the bit for calculating the likelihood is set to 0 and the other bits are hard-determined data, and the difference between the rbit conversion data corresponding to the first nbit and the rbit conversion data corresponding to the second nbit. It is characterized by including a step of calculating the likelihood of the bit based on the average value of the product of each bit with the input signal of rbit.

Further, it is desirable that the decoding method includes a step of performing an nbit error correction decoding process based on the calculated likelihood.

According to the decoding device and the decoding method in the present invention, the likelihood (LLR) of nbit data can be simply and accurately determined only by four arithmetic operations based on the n: r modulated signal. Further, according to the hologram reproduction apparatus of the present invention, the amount of likelihood (LLR) calculation in hologram recording can be reduced, the calculation can be performed at high speed, and the error rate of the recording system can be reduced.

It is a block diagram of an example of the decoding apparatus of this invention. It is a flowchart which shows the likelihood determination method of this invention. It is a figure explaining the likelihood determination method of this invention based on an example of a received (read) signal. This is the result of performing LDPC error correction using the likelihood (LLR) of the present invention. This is an example of an optical layout diagram at the time of recording in a holographic memory recording system. This is an example of an optical layout diagram during playback in a holographic memory recording system. It is a flowchart which shows LDPC decoding processing by sum-product algorithm.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a block diagram of an example of a decoding device as an embodiment of the present invention.

The decoding device 10 includes a block extraction unit 11, a rigid determination unit 12, an LLR calculation unit 13, and an error correction decoding unit 14, and an n: r modulation signal is input to generate error correction and decoding nbit data. It is output. Here, it is desirable that the input n: r modulated signal is error-corrected coded (for example, LDPC coded) at the stage of the nbit signal (before conversion to rbit). As the n: r modulation signal, the measurement data imaged (read) by the two-dimensional image sensor 118 can be used in the hologram reproduction device of FIG. The n: r modulated signal may be measurement data (amplitude value) of the received signal received from the communication line.

The block extraction unit 11 blocks the n: r-modulated signal (n: r-modulated input signal) into rbit blocks (rbit units corresponding to the original nbits), and the extracted blocks are used in the hard determination unit 12. Output. For example, in the holographic memory storage system of FIGS. 5 and 6, when 5: 9 modulation is used, a 9-bit data unit consisting of 3 × 3 pixels becomes one block.

The hardness determination unit 12 determines the hardness of nbit based on the input signal data of rbit input from the block extraction unit 11, and outputs the determination result to the LLR calculation unit 13. For example, the rbit pattern is determined based on the strength of the input signal, and the corresponding nbit is output as the hardness determination result.

The LLR calculation unit 13 calculates the LLR as likelihood information for each bit of the nbit data input from the rigidity determination unit 12, and outputs the LLR to the error correction / decoding unit 14. The LLR is calculated by creating a first nbit in which the bit of the LLR calculation target is 1 and a second nbit in which the bit of the LLR calculation target is 0 among the conversion data of the nbit determined to be rigid, and the difference between the respective rbit conversion data. Is taken, and the likelihood (LLR) is calculated based on the average value of the values obtained by multiplying the input signal (measurement data of rbit) for each bit. For details, follow the procedure described later.

The error correction / decoding unit 14 performs error correction / decoding corresponding to the error correction coding of the input signal based on the LLR of the nbit signal input from the LLR calculation unit 13. For example, if the error correction coding is LDPC coding, the LDPC decoding process described above is performed. Estimated bits are determined by error correction / decoding processing, the obtained estimated bits are output to the LLR calculation unit 13, and the likelihood (LLR) is calculated again. When an estimated bit satisfying the parity check is obtained as a result of the iterative processing, it is output from the decoding device 10 as error-corrected and decoded nbit data.

In the hologram reproduction device of FIG. 6, the decoding device 10 can be realized by the arithmetic unit 119.

Next, the likelihood determination method (LLR calculation procedure) of the decoding device 10 will be described based on the flowchart of FIG. 2 and the example of the received (read) signal shown in FIG.

As an example of n: r modulation, 5: 9 modulation will be described. In a holographic memory recording system, 5: 9 modulation is a modulation code in which 5 bits of data are converted into 9 bits (3 × 3) pixels, 2 of the 9 pixels are white, and the others are black. Is. Since 2 out of 9 pixels are white, the number of selections is 36 as shown in the following equation (12).

Since the data of ⁵ bits is ²⁵ = 32, 5: 9 modulation can be supported by selecting 32 ways from 36 ways. When selecting, it is desirable to avoid patterns with many errors during reading and large intersymbol interference.

At the time of recording and reproducing the hologram, two white pixels are identified among the reproduced 3 × 3 pixels, and 5 bits are decoded by the arrangement of the pixels. That is, if the LLR of the 5-bit data can be finally determined as the likelihood from the reproduced (measured) data, the LDPC decoding at the 5-bit before the 5: 9 modulation may be performed.

In step 1 (S1) of the flowchart of FIG. 2, the measurement data of the blocked rbit is read. Here, the blocked _9- bit input signal data (a _{1 to} a ₉ ) of FIG. 3 (1) is read. The data of each bit is, for example, a gradation signal of 0 to 255 in the case of 8-bit gradation measurement data acquired by an image sensor in a holographic memory recording system.

Next, in step 2 (S2), conversion from the rbit input signal to nbit (nbit hardness determination) is performed. Here, the _9- bit measurement data (a _{1 to} a ₉ ) of (1) is made to correspond to the black-and-white (1,0) data pattern, and what kind of 5-bit corresponds to is hard-determined. In this case, for example, the measurement data are arranged in order from the data having the highest brightness, the top two brightnesses are determined to be white, and the hardness determination result is obtained from that position. In the example of FIG. 3, of the measurement data 9bit of (1), the next highest luminance data and the highest data of the luminance (e.g., a ₆₎ (e.g., a ₇₎ a white [1], other data Obtain 9-bit data of "000001100" (corresponding to the data of FIG. 3 (4)) corresponding to black [0], and obtain "10011" of FIG. 3 (2) which is 5-bit data corresponding to this 9-bit data. , Derived as a hard judgment result. The steps 1 (S1) and 2 (S2) correspond to the processing of the hardness determination unit 12 of FIG.

Next, as step 3 (S3), k = 1. This k means that it is a process of obtaining the likelihood information (LLR) of the kth bit from the upper order.

As step 4 (S4), first, for the nbit obtained in step 2 (S2), an nbit (first nbit) is created in which the determination result of the kth bit from the upper order is 1. For example, when obtaining the likelihood (LLR) of the upper 1 bit (k = 1) of the hard judgment result, only the upper 1 bit is set to "1", and the other bits are the nbits (1st nbit) which are left as the hard judgment result. create. In the example of FIG. 3, since the first bit of the hard determination result (“10011”) is 1, the first nbit is (2), which matches the nbit of the hard determination result. Next, with respect to the nbit obtained in step 2 (S2), an nbit (second nbit) in which the determination result of the kth bit from the upper order is 0 is created. For example, in the process of obtaining the likelihood (LLR) of the upper 1 bit (k = 1), only the upper 1 bit is set to "0", and the other bits are created as nbits (second nbits) in which the result of the hardness determination is left as it is. In the example of FIG. 3, the upper 1 bit (leftmost bit) of the 5 bit data “10011” of FIG. 3 (2) is set to “0” (inverted), and the second nbit (3) of “00011” is created. The portion surrounded by the thick frame of (2) and (3) is a bit for obtaining the likelihood (LLR).

As step 5 (S5), the bit-by-bit difference between the conversion data of the first nbit to the rbit obtained in step 4 (S4) and the conversion data of the second nbit to the rbit is calculated. That is, from the first nbit (= hardness determination result) “10011” obtained in step 4 (S4), the 9 bits ((4) “000001100” in FIG. 3) assigned to the 5 bits are obtained. Similarly, from the obtained second nbit (“00011”), 9 bits ((5) “100010000” in FIG. 3) assigned to the 5 bits of the second nbit are obtained. Then, the 9-bit bit string (4) assigned to the first nbit whose likelihood determination bit (upper 1 bit) is "1" and the 9 bits assigned to the second nbit whose likelihood determination bit is "0". Take the difference from the bit string (5). That is, ((4)-(5)) is obtained for each bit of 9 bits to obtain the data string "-1000-11100" of (6). The part where the bit string (4) and the bit string (5) do not match (here, the 1, 5, 6 and 7th bits surrounded by a frame) becomes 1 or -1 in the data string of (6), and the other The bit is 0. In the case of 5: 9 modulation, out of 9 bits, data 1 is 2 bits, so the number of mismatched bits is only 4 bits at the maximum. Regarding whether to perform (4)-(5) or (5)-(4) as the operation for obtaining the difference, the maximum value of the measurement data corresponds to "-1" in the next standardization process. It is not fixed because it can change depending on whether it is made to correspond to "+1".

As step 6 (S6), the measurement data of rbit is standardized. For example, the _9- bit measurement data (a _{1 to} a ₉ ) in FIG. 3 (1) is set to the maximum value (max (a ₁ , ..., a ₉ )) and the minimum value among the nine data by the following equation (13). value _{(min (a 1, ...,} a 9)) based on, normalized from -1 to 1, to obtain a normalized data in Fig. _{3 (7) (a 1 '} ~a 9'). For example, when the measurement data obtained by the image sensor is a minimum of 15 gradation data and a maximum of 200 gradation data, the data distributed in 185 gradations is standardized from -1 to 1 to correspond.

Whether the maximum / minimum of the measurement data (a _{1 to} a ₉ ) corresponds to -1 to +1 or +1 to -1 is determined by step 5 (4)-(5). It is also related to whether to perform (5)-(4), and appropriately set so as to obtain an appropriate LLR. Further, when the measurement data (a _{1 to} a ₉ ) is dispersed from -1 to 1, such as a received signal transmitted through a communication path as an input signal, it is necessary to perform standardization processing. Absent.

As step 7 (S7), the difference data obtained in step 5 (S5) and the rbit measurement data (if necessary, the rbit data standardized in S6) are multiplied bit by bit (product). Ask). It should be noted that even if multiplication is performed, since the difference data is 1 or -1, the multiplication is substantially only the operation of the positive and negative signs of the measurement data, and the amount of calculation is small. Then, the average value of the entire multiplication result is obtained. For example, in the example of FIG. 3, as the product of the difference data and the normalized measurement _{data, (- a 1 '-a 5} ' + a 6 '+ a 7') is Motomari, the number of bits which occurs in the difference ( Here, divide by 4) to obtain the overall average value. Then, this average value is regarded as the received signal Yn as shown in FIG. 3 (8).

In step 8 (S8), the calculation result of step 7 (S7) is used as the received signal Yn to calculate the LLR as the likelihood of the kth bit. That is, Yn (mean value) in FIG. 3 (8) is substituted for Yn in the above equation (3). At this time, the noise σ ² may be obtained as an actually measured value or an appropriate value may be input as an estimated value. The obtained result is defined as the log-likelihood ratio (LLR) of the upper 1 bit (k = 1).

Then, in step 9 (S9), it is determined whether or not k = n. If the determination result is Yes (k = n), the process ends, and if No (k <n), the process proceeds to step 10 (S10).

In step 10 (S10), 1 is added to k, and the process is performed again from step 4 (S4). That is, in the above step, the most significant 1 bit in 5 bits has been described, but in the next process, k = 2 and the likelihood of the second bit in 5 bits is obtained. When calculating the likelihood (LLR) of the second bit, similarly, based on the nbit data of the hardness determination result, the second bit (k = 2) is set to "1" and the first nbit (FIG. In the example of 3, "11011") and the second bit ("10011" in the example of FIG. 3) in which the second bit is "0" are created, and the same calculation is performed.

The processing of steps 3 to 10 corresponds to the processing of the LLR calculation unit 13 of FIG.

By performing such arithmetic processing, the likelihood (LLR) of the bit string can be determined at once from the measurement data, and further, the bit can be determined. In this calculation, only the very basic four arithmetic operations of difference, multiplication, and mean value are performed, so that the likelihood (LLR) can be calculated very quickly and accurately.

In the description of FIG. 3, (2) is a rigid determination result, but it is replaced with an estimation bit in the iterative calculation of LDPC performed between the LLR calculation unit 13 and the error correction / decoding unit 14.

(inspection result)
FIG. 4 shows the result of error correction using the likelihood (LLR) derived by the likelihood determination method of the present invention. The horizontal axis is the number of repetitions of one round of processing including the check node processing, the variable node processing, and the estimated bit determination processing shown in FIG. 7, and the vertical axis is the data error rate. Known data is recorded in advance, and the error rate is measured for each repetition from the known data. The error rate before the error correction process is 0.045, and it can be seen that the error rate decreases by repeating the calculation, and the error becomes 0 after 16 times. That is, it can be seen that LDPC error correction is working effectively using this likelihood (LLR) definition.

Although the above embodiments have been described as typical examples, it will be apparent to those skilled in the art that many modifications and substitutions can be made within the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited by the above embodiments, and various modifications and modifications can be made without departing from the scope of claims. For example, it is possible to combine the plurality of constituent blocks described in the embodiment into one, or to divide one constituent block into one.

101 Laser light source 102 Shutter 103 1/2 wave plate 104 PBS (polarization beam splitter)
105 Shutter 106 Magnifying Lens 107 PBS (Polarizing Beam Splitter)
108 SLM (Spatial Light Modulation Element)
109 FT lens 110 Spatial filter 111 FT lens 112 FT lens 113 Hologram recording medium 114 Relay lens 115 Galvano mirror 116 PBS
117 1/2 wave plate 118 2D image sensor 119 Arithmetic logic unit 120 Mirror 121 Galvano mirror 122 Relay lens

Claims (7)

A block extractor that blocks n: r-modulated input signals into blocks of rbit, which expresses nbit information using rbit (n <r) .
A hard judgment unit that performs hard judgment and outputs nbit data from the blocked rbit input signal,
Based on the data of the hard-determined nbit, the bit for calculating the likelihood is set to 1 and the other bits are set as the hard-determined data for the first nbit, and the bit for calculating the likelihood is set to 0 and the other bits are hard-determined. create a first 2Nbit that the data, the difference between the RBIT conversion data corresponding to the first corresponding to 1Nbit RBIT converted data and said second 2Nbit, the average value of the product for each bit of the input signal of the RBIT Based on the LLR determination unit that calculates the likelihood of the bit,
Decoding device equipped with. In the decoding device according to claim 1, the input signal is subjected to error correction coding processing on the nbit signal, and further, the nbit error correction decoding is performed based on the likelihood calculated by the LLR determination unit. A decoding device including an error correction decoding unit that performs processing. The decoding device according to claim 2, wherein the error correction coding is LDPC coding. In the decoding device according to any one of claims 1 to 3, the LLR determination unit obtains input signal data in the block from -1 based on the maximum and minimum values of the input signal in the block. A decoding apparatus comprising performing standardization processing for converting to a value up to +1 and obtaining an average value of the product of the difference and the standardized input signal for each bit. A hologram reproducing device including the decoding device according to any one of claims 1 to 4.
A hologram reproduction device in which an n: r modulation signal is recorded with a two-dimensional code, and the read signal of the two-dimensional code is used as the input signal. The process of extracting rbit from the n: r-modulated input signal, which expresses nbit information using rbit (n <r) , and
From the input signal of the rbit, the process of determining the hardness and outputting the nbit data ,
Based on the data of the hard-determined nbit, the bit for calculating the likelihood is set to 1 and the other bits are set as the hard-determined data for the first nbit, and the bit for calculating the likelihood is set to 0 and the other bits are hard-determined. A second nbit is created as the data, and the difference between the rbit conversion data corresponding to the first nbit and the rbit conversion data corresponding to the second nbit is based on the average value of the bit-by-bit product of the input signal of the rbit. The step of calculating the likelihood of the bit and
Decryption method including. The decoding method according to claim 6, further comprising a step of performing an nbit error correction decoding process based on the calculated likelihood.

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