JP4505225B2 - Apparatus and method for semiconductor IC defect detection - Google Patents

Description

  The present invention relates to a method and apparatus for detecting electrical defects in a semiconductor device or test structure having a plurality of features specifically designed to create a potential that changes during voltage contrast inspection. More specifically, the present invention relates to a voltage contrast technique for detecting open and short circuit type defects in circuit or test structure features.

  Voltage contrast inspection of the test structure is accomplished with a scanning electron microscope. The voltage contrast technique works on the basis that potential differences at various locations of the sample under test produce differences in secondary electron emission intensity when the sample is the target of an electron beam. The potential state of the scanned region is obtained as a voltage contrast image. For example, the low potential portion of the wiring pattern can be displayed brightly (the intensity of secondary electron emission is high), and the high potential portion can be displayed darkly (secondary). The intensity of electron emission is lower). Alternatively, the system can be configured such that the low potential portion is displayed dark and the high potential portion is displayed bright.

  The secondary electron detector is used to measure the intensity of this secondary electron emission generated from the path swept by the scanning electron beam. The defective portion can be identified from the potential state, that is, the appearance of the portion under inspection. The part under examination is typically designed to create a specific potential and a bright level in the resulting image during the voltage contrast test. Thus, a scanned portion is classified as a defect when the potential of the scanned portion and the appearance of the resulting image differ significantly from the expected results.

  A number of test structures designed by the applicant are listed in a co-pending US entitled “TEST STRUCTURES AND METHODS FOR INSPECTION OF SEMICONDUCTOR INTEGRATED CIRCUITS” by Akella VS Satya et al. No. 09 / 648,380 (Lawyer Docket No. KLA1P016B), which is hereby incorporated by reference in its entirety for all purposes. In certain embodiments, the test structure is designed to have alternating high and low potential conductive lines during voltage contrast inspection. In some inspection applications, the low potential line is a ground potential and the high potential is a floating potential. If a line that should be floating is shorted to an adjacent ground-coupled line, both lines will create a new low potential during the voltage contrast test. If there is an open defect in a line that should be coupled to ground, this open will leave a portion of that line at a floating potential, thereby creating a high potential during voltage contrast inspection. Both open and short circuit defects cause two adjacent lines to be at the same potential during voltage inspection.

  Unfortunately, conventional voltage contrast test structures have associated drawbacks. For example, at least two photolithographic masking steps are required to produce these test structures. One masking step is necessary to make a contact to the substrate connected to ground and another masking step is necessary to produce the metal layer of the test structure being tested. The time required to fabricate a conventional voltage contrast test structure can be important in some applications such as using a voltage contrast based test structure to quickly qualify and / or monitor the status of process tools.

  Another more important disadvantage of the conventional voltage contrast test structure is that they can only detect hard opens and shorts. This is a very important problem, for example in the Cu metallization process, but a significant percentage of the defects are partial opens. This partial open at the via or at the metal line is a concern for reliability and reduces the parametric performance of the semiconductor chip.

  Therefore, there is a need for an improved test structure that can be manufactured quickly. There is also a need for an improved test structure that can detect partial open and short defects.

In one embodiment of the present invention, a semiconductor device with an improved voltage contrast test structure is provided. Broadly speaking, a test structure region (hereinafter simply referred to as a test structure) can be fabricated with a single photolithography step, or a single reticle or mask. The test structure includes a substructure having a specific potential pattern during voltage contrast inspection. For example, when an electron beam is scanned across the test structure, an expected luminance pattern is created and imaged as a result of the expected potential of the test structure. However, when there is an unexpected pattern of potential during voltage contrast inspection, this indicates that a defect is present in the test structure. To create different potentials, the first set of substructures is coupled to a relatively large conductive structure, such as a large conductive pad, and the first set of substructures is coupled to a relatively large conductive structure. Charges slower than 2 sets. A mechanism for manufacturing such a test structure is also disclosed. In addition, along with other types of voltage contrast structures, a search mechanism is also provided for quickly locating defects within such test structures during voltage contrast inspection.

  In certain embodiments, a test structure designed for voltage contrast inspection is disclosed. The test structure includes a first substructure having a plurality of floating conductive structures designed to be charged to a first potential during a voltage contrast test, and a second substructure that is different from the first potential during the voltage contrast test. A second substructure coupled to a conductive structure having a size selected to be charged to two potentials. In a preferred embodiment, the first and second substructures are formed in a single photolithography step.

In a specific embodiment Ru Ah, the second sub-structure includes a plurality of parallel strips segment adjacent a respective one of the conductive line group of said first sub-structure. In yet another aspect, the second substructure forms a zigzag shape.

  In other implementations, the second substructure is designed to charge more slowly than the first substructure during voltage contrast inspection. In another aspect, the second substructure is designed to have a different brightness level than the first substructure during voltage contrast inspection. Preferably, the conductive structure of the second substructure has a size selected such that a partial opening can be inspected into the second substructure during a voltage contrast test. In an alternative embodiment, a method of manufacturing one or more of the test structure embodiments described above is also disclosed. The test structure is designed for voltage contrast inspection.

  In another embodiment, the invention relates to a method for inspecting a test structure. Based on whether there is an unexpected pattern of potential in the test structure as a result of the initial scan by first scanning two or more initial portions of the test structure with a charged particle beam. It is determined whether there are defects in the structure. When a defect is present, it sequentially steps to one or more potential defect portions of the test structure and scans the one or more potential defect portions of the test structure with a charged particle beam, thereby The defect is located.

  In one embodiment, the stepping is a shape of a binary search pattern that locates the defect. In another embodiment, determining whether a defect is present by first scanning two or more initial portions of the test structure with a charged particle beam comprises: Scanning to obtain the first potential at the first end, obtaining the second potential at the second end by scanning the second end of the test structure, and the potential at the first end to the first end When different from the two-end potential, the test structure is achieved by determining that it has an open defect.

  In another aspect, stepping sequentially to one or more potential defect portions of the test structure and scanning the one or more potential defect portions of the test structure with a charged particle beam, thereby The operation of locating the defect includes: a) stepping to a first current position of the test structure and scanning the first current position of the test structure looking for a defect; b) not finding the defect; And when a luminance transition occurs between the previous scan and the current scan, stepping to the next portion of the test structure between the previous scan and the current scan, and c) the defect Is not found, and no luminance transition occurs between the previous scan and the current scan, the step transitions to the next part of the test structure that is not between the previous scan and the current scan. Including that. In one aspect, when the defect is not found and a luminance transition occurs between the previous scan and the current scan, the next portion is intermediate between the previous scan and the current scan. Yes, when the defect is not found and no luminance transition occurs between the previous scan and the current scan, the next portion of the current scan and the previous scan and the current scan It is in between and not between the ends of the test structure. In yet another aspect, the method further includes determining whether the current scan includes a luminance transition point for the current scan that is not a defect, and the step of moving to the next portion includes the current scan Is performed in a new orientation when the scan includes a luminance transition point that is not defective. In one implementation, the new orientation of the next scan is perpendicular to the orientation of the previous scan. In a specific aspect, operations (b) and (c) are repeated until the defect is found.

  In some embodiments, the defect can be an open defect, which is found when a luminance transition occurs in the test structure itself. In still other embodiments, the open defect may be a partial open defect. In other implementations, the defect may be a short circuit defect, which is found when a physical short circuit is found in the test structure.

  In another embodiment, the present invention relates to an inspection system for detecting defects in a test structure. The system includes a beam generator that generates an electron beam, a detector that detects electrons, and a controller configured to perform one or more of the methods described above.

  These and other features of the present invention will be presented in more detail in the following specification of the invention and the accompanying drawings, which illustrate the principles of the invention by way of example.

  Reference will now be made in detail to specific embodiments of the invention. An example of this embodiment is shown in the accompanying drawings. While the invention will be described in terms of this particular embodiment, it will be understood that it is not intended to limit the invention to one embodiment. Rather, it is intended to include alternatives, modifications, and equivalents that may be included within the spirit and scope of the invention as defined by the appended claims. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.

  Broadly, certain embodiments of the present invention provide a test structure based on voltage contrast that can be fabricated in a single photolithographic masking step and / or used to detect partial open. In certain implementations, the test structure includes at least two substructures. The two substructures are designed to create different voltage contrast intensities without having to couple one of the structures to ground (eg, the substrate).

FIG. 1 is a schematic top view of a voltage contrast image of a test structure 100 according to an embodiment of the invention. As shown, the test structure includes a first substructure 102 (corresponding to the “second substructure region” in the claims) coupled to a large conductive pad 110, and a plurality of floating conductive lines (eg, 104a to 104g). A second sub-structure 104 formed from (corresponding to “first sub-structure region” in the claims) . The first substructure is described as being coupled to a large conductive pad, but during voltage contrast scanning, a different potential is created in the first substructure compared to that in the second substructure. Of course, any suitable conductive structure that yields can be used. Since the first and second substructures are formed in the same conductive layer, the entire test structure can be fabricated in a single photolithography step. Photolithographic techniques are well known to those skilled in the art.

  The large conductive pad 110 of the first substructure has a size selected to result in different potentials and intensities (ie secondary and backscattered electrons) compared to the second substructure when scanned with the electron beam. Have. That is, the large conductive pad 110 is sized such that the first substructure that is bonded is charged differently than the first substructure that is not bonded to the pad 110. Different amounts of secondary or backscattered electrons are emitted in response to the incident electron beam from differently charged portions of the test structure. In the illustrated embodiment, the conductive lines 104a-104g of the second substructure are quickly charged and produce a dark image during voltage contrast scanning. In this case, the pad 110 is sized such that the first substructure 102 charges more slowly than the conductive lines of the second substructure 104. Thus, both the conductive pad 110 and the first substructure 102 have an area that is significantly larger than the area of a single one of the conductive lines (eg, 104a) of the second test structure. The size of the conductive pad 110 can be determined by experiment or simulation. For example, a larger size group can be used for various conductive pads of the test structure to determine whether the two substructures of the test structure produce different potentials during voltage contrast detection. Thus, the size of the conductive pad 110 may be selected to be the same as or larger than the smallest sized conductive pad 110 that has experimentally created a different potential.

  When the electron beam passes through these substructures 102 and 104 (eg, in orientation 106), the substructure 102 connected to the large metal pad 110 has a slowly charging potential compared to a structure not connected to the large metal pad. . That is, the large metal pad functions as a virtual ground and appears bright, and the floating conductive lines of the second substructure 104 appear dark. After the beam scans the substructure 102 for a period of time, the substructure 102 approaches the same potential as the second substructure 104 that is not connected to a large metal pad. Therefore, the difference in voltage contrast is inherently transient. However, when the electron beam is first scanned, for example, in orientation 206 along width 208, the test structure appears as an alternating light-dark substructure when no defects are present.

  FIG. 2A is a schematic top view of a voltage contrast image of a test structure 200 having an open defect 204 according to an embodiment of the invention. The test structure 200 of FIG. 2 is similar to the test structure 100 of FIG. 1, but the test structure 200 of FIG. More specifically, the test structure 200 of FIG. 2 includes a first substructure 202 having an open defect 212 and a second substructure 204 having no defect. The first substructure includes a first portion 202 a that remains coupled to the conductive pad 210 and a second portion 202 b that is not coupled to the conductive pad 210.

  Although it is a transient property, an open defect in the first substructure 202 can be detected. During scanning, the portion 202a of the first substructure that is connected to the conductive pad 210 has a different potential than the portion 202b of the substructure 202 that is not connected to the large conductive pad 110. The structure thus exhibits voltage contrast at the point of physical break 212. In other words, when the electron beam is scanned along width 208, eg, in orientation 206, test structure 200 does not have alternating light and dark substructures as expected. Transient potential differences between two different parts 202a and 202b are characterized as open defects.

  The same principle can be employed to detect partial opening in the first substructure 202. Partial opening increases the resistance of the metal path. As a result, under electron beam scanning, a path to pad 210 that includes a partial opening creates a transient potential difference compared to a path to pad 210 that does not have a partial opening defect. This transient potential difference can be detected as a transient voltage contrast signal. This transient potential difference can be determined to be a partial open defect.

  If the initial scan width 208 includes a defect, the specific location of such a defect can then be determined by determining where the first substructure transitions between different potentials. Alternatively, if the initial scan width does not include a defect, a second scan along a direction perpendicular to the first scan, for example, may be required to determine the specific position of the defect. Any suitable technique for determining the presence of defects and the specific location of such defects can be utilized. Furthermore, other types of test structures can be easily modified to implement the present invention. That is, by modifying any suitable voltage contrast type test structure, the first substructure is coupled to a relatively wide conductive structure instead of being coupled to the substrate.

  FIG. 2B is a schematic top view of a voltage contrast image of a test structure 250 with a short circuit defect 262 according to an embodiment of the present invention. As shown, the test structure includes a zigzag substructure 252 coupled with a large conductive pad 260. The test structure also includes a plurality of conductive line substructures 254 designed to remain floating, i.e., not coupled to the large conductive pad 560. However, a short-circuit defect 262 occurs between the zigzag substructure 252 and the conductive line 254c. During a voltage contrast scan of orientation 256, the substructure is expected to have alternating potentials that produce alternating light and dark lines. However, when two adjacent lines have the same potential, it is determined that there is a defect in one of the substructures. As shown, conductive line 254c has the same potential and brightness level as the adjacent strip of zigzag substructure 252. Short 262 can be discovered by scanning along orientation 258.

  In a particular type of voltage contrast test structure, the defect location can be determined by performing a search that minimizes the search time. In certain embodiments of the present invention, defects are located by stepping to various locations in the test structure, for example, rather than continuously scanning over the entire length of the test structure. Yeah. At each step position, the test structure is scanned by an electron beam (eg, raster scanned). This “accelerated search” approach can be implemented on any suitable test structure in addition to the test structure having the large conductive structure described above. One example of such an accelerated search is a binary search. Of course, any suitable search step can be used to quickly “step” to the defect location in one or more steps. For example, the electron beam can be moved relative to the test structure by a predetermined incremental distance.

  FIG. 3A illustrates a binary search mechanism for locating open-type defects in a test structure 300 according to an embodiment of the invention. FIG. 3B is a flowchart illustrating a procedure for locating defects according to an embodiment of the present invention. 3A and 3B are described together. The test structure is connected to ground, for example at the target pad 302. Initially, in operation 352 and 354, it is determined whether open defects are present in the test structure 300 by scanning the structure with a charged particle beam. For example, the potential of the target pad 302 is compared with the potential of the reference pad 308 during a voltage contrast test. When the pad potentials are different, it is determined that an open defect is present in the test structure 300. When the pads have the same potential, it is determined that there are no defects.

  When it is determined that there are no defects in the test structure, the procedure 350 ends. When a defect is found to exist, the charged particle beam moves stepwise relative to the structure to the first portion of the structure to scan for open defects in operation 356. For example, it is determined that there is a light-to-dark luminance transition point in the test structure itself, which indicates the position of the open defect. In the illustrated embodiment of FIG. 3A, a binary search for defects is first performed along the x direction. The test structure is scanned along the top, but any part of the test structure can be scanned during the search. The electron beam is moved to position “1” relative to the sample, which is in the middle of the test structure 300 along the x direction. It is then determined at operation 358 whether an open defect has been found. In the illustrated embodiment, it is determined whether a defect has been found by determining that a transition point has been found in the test structure itself. If a defect is found, the procedure ends.

  If no defect is found, it is determined at operation 360 whether a brightness transition between light and dark has not occurred in the scan direction between the previous scan and the current scan. This determination is based on whether a transition point in the “scan direction” has been found and not on whether a transition point has been found in the test structure itself. For example, the test structure may include a bright part immediately after the dark part along the x direction, but no transition point in the test structure itself has yet been found.

  If a transition point in the scan direction has not yet been found, then in operation 362 it is determined whether there is a transition in the test structure between the previous scan and the current scan. For example, it is determined whether there is a transition between the target pad 302 and the current scan position 1. If it is determined that there is a transition between the target pad 302 and position 1, then it is determined whether the defect is to the left of search position 1, ie “backward”. In other words, it is determined that the defect exists between the previous scan (eg, pad 302) and the current scan (eg, position 1). The charged particle beam is then stepped to the second part of the test structure “back” of the current scan, which is now scanned for open defects in operation 364. Otherwise, the charged particle beam is then stepped to the second part of the test structure “front” of the current scan, which is now scanned for open defects in operation 366.

  The terms “backward” and “frontward” are referred to herein as positions relative to the current stepping direction. For example, if the beam is stepped from the test pad 302 to position 1 in the + x direction, the beam will move to the “back” position of position 1 when moving in the −x direction. In contrast, when the beam moves in the + x direction, it will move to a position “front” of position 1, which is the current stepping direction defined by moving the beam from pad 302 to position 1. In the same direction.

  Since the transition does not occur between position 1 and the target pad, the electron beam then moves relative to the test structure to position 2, which is intermediate between position 1 and the rightmost edge of the test structure (operation 364). The procedure then repeats operation 358 to determine if a defect has been found. In this example, it is determined that no defect was found. Then, it is determined that the scan direction transition point is not found in operation 360. It is then determined at operation 362 that the transition is between the current scan and the previous scan. As shown, the luminance level transition occurred between positions 1 and 2. The electron beam is then moved relative to the sample to position 3, which is intermediate between positions 1 and 2, where an open defect is scanned (operation 364). Since no defect is found at position 3, the transition is determined to be between positions 3 and 1 (ie not between the previous scan and the current scan), the electron beam then moves to position 4 and this Position 4 is to the left of position 3, that is, “forward” of position 3, and is intermediate between positions 3 and 1 (operation 362). A transition in the x direction is also found at position 4.

  After the luminance transition is found in the first direction, the electron beam is then moved along the y direction in a binary search with respect to the test structure to find the position of the defect at operation 368. As shown, the electron beam is first moved relative to the test structure to position 5 which is lowered by half the length of the test structure. The next position 6 is midway between positions 5 and 4 because the luminance transitioned between light and dark when moving from position 4 to position 5. The actual transition point in the test structure itself is found at position 6. It can then be determined that this transition point is the position of the open defect.

  In an alternative embodiment, the test structure detects the presence of a defect by continuously scanning in a first orientation. In the test structure of FIG. 1, the charged particle beam is continuously scanned in direction 108. It is then determined if there are alternating brightness levels of the brightness level for the conductive strip of the test structure. The alternating pattern of luminance patterns indicates that there are no defects. However, when two adjacent strips have the same luminance level, it is determined that a defect exists in the adjacent strip group having the same luminance level. The location of the defect can then be determined using a stepping search algorithm such as a binary search along the orientation 106 as described with reference to FIGS. 3A and 3B. The position of the open defect is found when there is a transition in brightness value from dark to light or vice versa. When a physical short is found between the two strips, a short circuit defect is found.

  FIG. 4 is a schematic diagram of a scanning electron microscope (SEM) system in which the technique of the present invention can be implemented. The details of FIG. 4 are provided for illustrative purposes. Those skilled in the art will appreciate that variations on the system shown in FIG. 4 are within the scope of the present invention. For example, FIG. 4 shows the operation of a particle beam with a continuously moving stage. However, the test and product configurations and many inspection techniques described herein are also useful in the context of other test equipment that includes a particle beam operated in step-and-repeat mode. Instead of moving the stage relative to the beam, the beam may be moved by refracting the field of view with an electromagnetic lens. Alternatively, the beam column may be moved with respect to the stage.

  The sample 1057 is automatically fixed under the particle beam 1020. The particle beam 1020 can be a particle beam such as an electron beam. Sample handler 1034 may be configured to automatically direct a sample on stage 1024. Stage 1024 may be configured to have six degrees of freedom including movement and rotation along the x, y, and z axes. In one specific embodiment, the stage 1024 is aligned to the x-ray emission inducer 120 to correspond to an axis that is perpendicular to the longitudinal axis of the conductive line being examined in the x direction. Fine tuning of the sample alignment can be accomplished automatically or with the assistance of the system operator. The position and movement of stage 1024 during analysis of sample 1057 may be controlled by stage servo 1026 and interferometer 1028. When the stage 1024 moves in the x direction, the inducer 1020 can be repeatedly moved back and forth in the y direction. According to various embodiments, the inducer 1020 moves back and forth at approximately 100 kHz. Alternatively, a relatively wide beam can be used to scan across a specific band or region of the test structure without rastering the beam.

  The detector 1032 can also be aligned to align with the particle beam 1020 to allow further defect detection capabilities. Detector 1032 along with other elements can be controlled using controller 1050. The controller 1050 can include various processors, storage elements, and input and output devices. The controller may be configured to implement the defect inspection and localization of the present invention. The controller can also be configured to correlate the coordinates of the electron beam with respect to the sample at coordinates on the sample, thereby determining, for example, the position of the determined defect. In certain embodiments, the controller is a computer system having a processor and one or more memory devices.

  Regardless of the configuration of the controller, one or more memories or memory modules configured to store data, program instructions for general test operations and / or the inventive techniques described herein may be employed. Program instructions may control the operation of, for example, an operating system and / or one or more applications. The memory or group of memories may also be configured to store scanned sample images, reference images, defect classification and position data, along with values for specific operating parameters of the inspection system.

  Since such information and program instructions can be employed to implement the systems / methods described herein, the present invention provides program instructions, status information, etc. for performing the various operations described herein. It also relates to a machine readable medium including. Examples of machine readable media include, but are not limited to, magnetic media such as hard disks, floppy disks, and magnetic tape, optical media such as CD-ROM disks, and floppy disks. There are hardware devices that are specially configured to store and execute program instructions, such as random magneto-optical media and read only memory (ROM) and random access memory (RAM). The present invention can also be implemented in a carrier wave carried on a suitable medium such as radio waves, optical cables, electrical cables, and the like. Examples of program instructions include both machine language generated by a compiler and files containing high-level languages that can be executed by a computer using an interpreter.

  Although the foregoing invention has been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, the described embodiments are illustrative and not restrictive, and the invention should not be limited to the details listed herein, but by the appended claims and their full scope of equivalents. Should be specified.

FIG. 3 is a schematic top view of a voltage contrast image of a test structure according to an embodiment of the invention. 2 is a schematic top view of a voltage contrast image of a test structure with open defects according to an embodiment of the present invention. FIG. 2 is a schematic top view of a voltage contrast image of a test structure with a short circuit defect according to an embodiment of the present invention. FIG. FIG. 3 illustrates a binary search mechanism for locating open type defects in a test structure according to an embodiment of the present invention. 6 is a flowchart illustrating a series of processes for locating defects according to an embodiment of the present invention. 1 is a schematic diagram of a system in which the techniques of the present invention can be implemented.

Claims (15)

A test semiconductor device having a test structure designed for voltage contrast inspection,
A first substructure region having a plurality of floating conductive structures charged to a first potential during a voltage contrast test ;
A second sub-structure region is charged to a second potential during said voltage contrast test,
A conductive structure formed as a conductive pad of a predetermined size coupled to the second sub-structure region, wherein the second sub-structure region is charged later than the first sub-structure region; A test semiconductor device comprising: a conductive structure having the predetermined size selected experimentally or by simulation so that a second potential is different from the first potential during the voltage contrast test .   2. The test semiconductor device according to claim 1, wherein the first and second sub-structure regions are formed by a single photolithography step. A testing semiconductor device according to claim 1 or claim 2, wherein the first and second sub-structure region testing a semiconductor device to determine that a defect exists when in both at the same potential level.   4. The test semiconductor device according to claim 1, wherein the second sub-structure region includes a plurality of adjacent ones of one of the conductive line groups of the first sub-structure region. 5. Test semiconductor device including parallel strip segments.   5. The test semiconductor device according to claim 4, wherein the second sub-structure region forms a zigzag shape. 6. The test semiconductor device according to claim 1 , wherein the second sub structure region is designed to have a luminance level different from that of the first sub structure region during a voltage contrast inspection. Semiconductor device for testing.   7. The test semiconductor device according to claim 1, wherein the conductive structure of the second substructure region is a portion existing in the second substructure region during a voltage contrast inspection. A test semiconductor device having a size selected such that the opening can be inspected. A method of manufacturing a test semiconductor device designed for voltage contrast inspection,
Forming a first substructure region having a plurality of floating conductive structures charged to a first potential by scanning with an electron beam ;
Forming a second sub-structure region is charged to a second potential by scanning by the electron beam, and
The second substructure region is charged later than the first substructure region when the second substructure region is scanned by the electron beam when the conductive structure is a conductive pad coupled to the second substructure region. The manufacturing method includes forming the second potential as a size selected experimentally or by simulation so that the second potential is different from the first potential during the voltage contrast test . 9. The manufacturing method according to claim 8 , wherein the first and second substructure regions are formed by a single photolithography step. A method according to claim 8 or claim 9, the manufacturing method wherein when scanned by the electron beam, it is determined that the first and second sub-structure area defect exists when in both at the same potential level . 11. The manufacturing method according to claim 8 , wherein the second substructure region is a plurality of parallel strips respectively adjacent to one of the conductive line groups of the first substructure region. Manufacturing method including segments. 12. The manufacturing method according to claim 11 , wherein the second sub-structure region forms a zigzag shape. 13. The manufacturing method according to claim 8 , wherein the second sub structure region is designed to have a luminance level different from that of the first sub structure region during a voltage contrast test. Manufacturing method. 14. The manufacturing method according to claim 8 , wherein the conductive structure in the second substructure region is inspected for a partial opening existing in the second substructure region by a voltage contrast test. Manufacturing method formed as possible size. 15. The manufacturing method according to claim 8, wherein a part of the first and second substructure regions is scanned with an electron beam to obtain a voltage contrast image of the scanned part. A manufacturing method further comprising inspecting the first and second substructure regions.

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