JP4499251B2 - Portable electronic device having power supply circuit and backup battery - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a portable electronic device having a power supply circuit and a backup battery, and more particularly, to a personal computer in which time measurement is continued by operating a clock mechanism (clock circuit) with the power of the backup battery when the apparatus stops operating. First, in a power supply circuit of a portable electronic device having a backup battery such as a PHS, a mobile phone such as a mobile phone, and a PDA, when the main part of the power supply circuit is integrated into an IC, the power supply to the backup battery is switched. The present invention relates to a power supply circuit suitable for an IC that can reduce the area occupied by transistor elements and can easily prevent backflow from a backup battery.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, in personal computers, PHS, mobile phones such as mobile phones, and portable electronic devices, power is supplied to internal circuits that need to be operated by a backup battery even when the power of the device is cut off. Yes.
Examples of such a circuit include a clock mechanism that measures time to display the correct time, data retention such as SRAM, and a reception standby circuit.
In particular, in a portable electronic device, the device normally operates by battery driving (main battery) when the device is turned on. At this time, the main battery is charged to the backup battery. When the power of the apparatus is cut off, power is supplied from the backup battery to each circuit required in the cut-off state. For this purpose, the power supply is switched internally.
FIG. 6 shows a power supply circuit 10 having a power supply switching circuit in this case, wherein 11 is a built-in battery, 12 is a DC / DC converter that boosts the voltage of the battery 11, and 13 is boosted power. , And a regulator 14 for stabilizing the voltage, which is a changeover switch circuit, comprising a series circuit of P-channel MOSFET (P-MOS) transistors Q 1 and Q 2 and inserted between the output of the regulator 13 and the output terminal 18. Has been. 15 is a switching control circuit, 16 is a backup battery, 17 is a diode connected in the forward direction between the backup battery 16 and an output terminal (pad) 18 in the direction of the output current of the backup battery 16, 19 Is a resistor for adjusting a charging current inserted between the output terminal 18 and the backup battery 16.
Reference numeral 20 denotes a load circuit connected to the output terminal 18 that operates in response to power-on, and reference numeral 21 denotes an output terminal 18 that continues to operate with power from the backup battery 16 when the apparatus is powered off. A load circuit such as a clock mechanism (clock circuit) and 22 is a power-on switch.
The load circuit 20 is provided with a switch 22a on the power supply line of the load circuit 20 that is turned off in conjunction with the power switch 22 in order to stop the power supply when the power switch 22 is cut off.
[0003]
When the power source of the device is turned on by the power switch 22, the switching control circuit 15 receives it and the switching control circuit 15 applies a control signal of LOW level (hereinafter "L") to the gate of the transistor Q1, Power is supplied to the load circuit 20 through the transistor Q1 which is turned on by setting the L "active transistor Q1 to the ON state and the transistor Q2 forming a drain-back gate parasitic diode. In this case, the transistors Q1 and Q2 are connected from the regulator 13 side to the output terminal 18 in the order of source-drain-drain-source, and the back gate of each transistor is suspended on the source side. Therefore, the transistor Q2 whose drain side voltage is increased is made conductive by the parasitic diode. Of course, a control signal may be applied to the transistor Q2 at this time so that it is turned on.
By the way, when the MOS transistor is integrated into an IC, a PN junction parasitic diode is usually formed between the back gate and the source or drain. This parasitic diode has an adverse effect of leaking current from the backup battery from the output terminal to the main power source. Therefore, two transistors Q1 and Q2 are required as in this example.
[0004]
When the power switch 22 is cut off, the switching control circuit 15 turns off the transistor Q1 by adding a HIGH level (hereinafter "H") control signal to the gate of the transistor Q1 or setting it to a high impedance state. . At this time, the load circuit 20 is turned off by the switch 22a linked to the power switch 22 being turned off, but power is supplied to the load circuit 21 via the backup battery 16 and the diode 17. . Although current from backup battery 16 at this time is applied to the transistor Q2 via the diode 17 or the resistor 19, the source side of the transistor Q2 is higher voltages, the drain constituted by the transistors Q2 - backgate parasitic diodes of the Is reverse-biased, so that the OFF state of the transistor Q2 is maintained.
In the figure, the frame portion indicated by the alternate long and short dash line is a circuit integrated as an IC.
By the way, a power supply switching circuit for an electronic device having a plurality of batteries is already known (Patent Document 1), and a battery-driven power switching circuit is known (Patent Document 2).
[Patent Document 1] JP-A-8-336243
[Patent Document 2] Japanese Patent Application Laid-Open No. 62-155737
[Problems to be solved by the invention]
In such a power supply switching circuit, a transistor as a switch circuit and a diode-operating transistor must be provided in series to prevent backflow, and since these transistors have a large current capacity, they are integrated into an IC. In this case, there is a problem that the occupied area increases due to these two MOS transistors.
The object of the present invention is to solve such problems of the prior art, which can reduce the occupied area of the transistor element for switching the power source, can easily prevent the backflow from the backup battery, and can be integrated into an IC. The object is to provide a suitable power supply circuit.
Another object of the present invention is to provide a portable electronic device having a backup battery that can reduce the occupied area of the transistor element for switching the power source, can easily prevent the backflow from the backup battery, and is suitable for IC integration. It is in.
[0006]
[Means for Solving the Problems]
A feature of the power supply circuit and portable portable electronic device of the present invention for achieving such an object is that the device is provided with power from a DC power supply to the output terminal when the power of the device is turned on. In a power supply circuit having a MOSFET transistor for transmitting the power and applying a current from a backup battery to the output terminal when the power supply of the apparatus is shut off, the MOSFET transistor is a first transistor, and is parallel to the first transistor. The second transistor of the N-channel MOSFET and the third transistor of the P-channel MOSFET provided on the back of the first transistor, and the connection point of these second and third transistors is connected to the back gate of the first transistor first transistor when the gate bias circuit, the power supply of the apparatus is turned on A control signal to be turned on is applied to the gate of the first transistor and a control signal is sent to the gates of the second and third transistors to turn on one of the transistors and turn off the other transistor to turn the first transistor off. A back gate of the first transistor is connected to the source of the first transistor, a control signal is applied to the gate of the first transistor to turn off the first transistor when the power is shut off, and the second and third transistors A control signal is sent to the gate of the first transistor, one of the transistors is turned off, and the other transistor is turned on, and the voltage from the backup battery is applied to the back gate of the first transistor, thereby setting the parasitic diode of the first transistor. And a reverse bias control circuit.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Thus, the first transistor is turned on when the power is turned on, the first transistor is turned off when the power is turned off, and the first transistor is reverse-biased so that the parasitic diode of the first transistor is reverse-biased. Since the back gate of the transistor is biased with the voltage of the backup battery by turning on either the second or third transistor, the current from the backup battery may leak to the DC power supply side when the power supply is cut off. rare.
Therefore, only one transistor element for switching the power source that allows a relatively large current to flow is required. In this case, the transistor for the back gate bias is a transistor having a small exclusive area because only a small current needs to flow. Since the control circuit is also a circuit that performs ON / OFF control of each transistor, the current value is small. As a result, the number of transistor elements for switching the power source is one, and as a result, when these circuits are integrated, the occupied area can be reduced.
[0008]
【Example】
FIG. 1 is a block diagram of an embodiment to which a power supply circuit having a backup battery of the present invention is applied, FIG. 2 is a schematic diagram of a connection state by a semiconductor cross-sectional structure centering on each transistor in FIG. 1, and FIG. FIG. 4 is a block diagram of another embodiment to which the power supply circuit having the backup battery of the present invention is applied, and FIG. 5 is a timing chart for explaining the operation. In addition, the same component as FIG. 6 is shown with the same code | symbol.
In FIG. 1, 1 is a power supply circuit, 2 is a changeover switch circuit provided in place of the changeover switch circuit 14 in FIG. 6, and 3 is provided in place of the changeover control circuit 15 in FIG. It is a switching control circuit. Other configurations are the same as those in FIG.
[0009]
The changeover switch circuit 2 has a P-MOS transistor Q1 and a series circuit of an N-channel MOSFET (N-MOS) transistor Q3 and a P-MOS transistor Q4, and this series circuit is in parallel with the P-MOS transistor Q1. To the bias circuit of the back gate of the transistor Q1.
That is, the source (S) side of the transistor Q3 is connected to the output side of the regulator 13, the drain (D) of the transistor Q3 is connected to the drain (D) of the transistor Q4, and the source (S) of the transistor Q4 is connected to the output terminal 18. The back gate of the transistor Q1 is connected to a connection point N between the drain (D) of the transistor Q3 and the drain (D) of the transistor Q4 via a connection line 8. The back gate of the transistor Q3 is connected to the ground GND, and the back gate of the transistor Q4 is connected to the source (S) side.
[0010]
The gate of the transistor Q1 is turned ON / OFF in response to a control signal from the switching control circuit 3. The gates of the transistors Q3 and Q4 are also turned on / off in response to a control signal from the switching control circuit 3.
The switching control circuit 3 includes a power supply voltage detection circuit (DET) 4 for detecting the ON / OFF state of the power-on switch 22, a buffer amplifier 5, a load resistor R inserted between the output of the buffer amplifier 5 and the ground GND, an inverter 6 and a power source switching circuit 7 comprising diodes D1 and D2 whose cathodes are connected to each other. The anode side of the diode D1 is connected to the output line of the DC / DC converter 12, the anode side of the diode D2 is connected to the output terminal 18, and the interconnected cathode is connected to the power supply line of the inverter 6. Has been. Thus, the inverter 6 operates with the electric power from the DC / DC converter 12 when the power switch 22 is turned on (ON), and when the power switch 22 is turned off and the power is shut off, the output terminal 18 is turned on. Via the power from the backup battery 16.
Note that the frame indicated by the alternate long and short dash line is an IC part.
[0011]
The DET 4 is composed of a comparator that compares the voltage of the output line of the DC / DC converter 12 with the reference voltage VREF. When the power switch 22 is turned on, the detection signal becomes “H”, and when the power is cut off (power switch When 22 is OFF), the detection signal becomes “L”. The buffer amplifier 5 buffers and amplifies the “H” and “L” signals to generate “H” and “L” voltage signals at the load resistor R. When the inverter 6 receives and inverts it and the power is turned on, "L" is added to the gate of the transistor Q1. At this time, the “H” output of the buffer amplifier 5 is supplied to the gates of the transistors Q3 and Q4. By adding “H” to the gate of the transistor Q3, the transistor Q3 is turned ON, and the back gate of the transistor Q1 is connected to its own source side. As a result, the transistor Q 1 having the “L” signal applied to the gate is turned on, and power is supplied to the load circuits 20 and 21.
At this time, since "H" is applied to the gate of the transistor Q4, this transistor is in the OFF state.
[0012]
When the power switch 22 is cut off, the detection signal becomes “L” and the output of the buffer amplifier 5 becomes “L”. Therefore, the output of the inverter 6 becomes “H” and is applied to the gate of the transistor Q1. As a result, the transistor Q1 is turned off. The “L” output of the buffer amplifier 5 is supplied to the gates of the transistors Q3 and Q4. By adding “L” to the gate of the transistor Q4, the transistor Q4 is turned on, and the back gate of the transistor Q1 is connected to the drain side. Connected to. As a result, the parasitic diode between the back gate and the drain of the transistor Q1 is reverse-biased and the parasitic diode is also turned off.
This prevents the current from the backup battery 16 from flowing to the regulator 13 side (power supply circuit IC side).
At this time, the transistor Q3 is OFF. Further, at this time, since the transistor Q4 is ON, the drain side of the transistor Q3 receives a high voltage from the backup battery 16 via the output terminal 18, and the back gate connected to the drain of the N-channel transistor Q3 and the ground GND. Is reverse biased, and the parasitic diode of the transistor Q3 is also turned off. As a result, the back gate bias circuits of the transistors Q3 and Q4 connected in parallel are also disconnected from the regulator 13 side.
When the power switch 22 is cut off, the buffer amplifier 5 is not supplied with power from the backup battery 16 side. Therefore, the “L” is generated by a pull-down resistor. In addition, the ON / OFF state of each transistor here includes a state in which no voltage is applied to the transistor.
[0013]
FIG. 2 is a schematic diagram of the connection state by the semiconductor cross-sectional structure centering on the transistors Q1, Q3, and Q4 in FIG. 1, and shows the relationship between each source, drain, and back gate. Since these transistors are integrated in one IC, the number of the substrates is one, but for convenience of explanation, they are partially described separately.
When the power switch 22 is cut off, the detection signal of DET4 becomes “L”, and the gates G3 and G4 of the transistors Q3 and Q4 become “L”, respectively. Each back gate is connected by a connection line 8 of the back gate. This back gate voltage is applied to the back gate of the transistor Q1 through the transistor Q4 and the connection line 8 which are in the ON state. As a result, the PN junction between the source (S) of the transistor Q1 and the back gate (well region) is reverse-biased. As a result, the current from the backup battery 16 is prevented from flowing to the regulator 13 side.
Since the transistors Q3 and Q4 here are transistors that only bias the back gate of the transistor Q1, the current is theoretically "0" and the current hardly flows. Therefore, since a transistor having a small current capacity is sufficient, the occupied area is much smaller than that of the transistor Q2 in FIG. 6 in which a large current deleted in FIG. 6 flows. Of course, even if each circuit of the switching control circuit 3 is included, an occupation area smaller than that of the transistor Q2 is sufficient.
[0014]
FIG. 3 shows the relationship between the operation of each transistor and the voltage when the power is turned on in this case, and in FIG. 3, (a) shows the output of the DC / DC converter 12. Voltage (for example, 3.9 V), (b) is the voltage at the gate of the transistor Q1, (c) is the voltage at the gate of the transistor Q3, (d) is the voltage at the gate of the transistor Q4, and (e) is the voltage at the output terminal 18. (F) shows the voltage of the back gate of the transistor Q1, and (g) shows the ON / OFF state of each transistor.
[0015]
FIG. 4 shows another embodiment in which the inverter 6 in FIG. 2 is a CMOS inverter and the buffer amplifier 5 in FIG. 2 is configured by connecting the CMOS inverters 5a and 5b in two stages.
Other configurations are the same as those in FIG.
Corresponding to the timing chart of FIG. 3, the waveforms of the respective parts of the inverters 5a and 5b and the inverter 6 of the buffer amplifier 5 of each part are shown in FIG. 5, (a) is the output voltage of the DC / DC converter (for example, 3.9 V), (b) is the voltage of the detection signal of DET4, (c) is the output voltage of the inverter 5a, and (d) is the output voltage of the inverter 5b. The output voltage, (e), is the output voltage of the inverter 6, and each waveform represents the state of a transient phenomenon when the power supply is turned off from on as in FIG.
The overall operation is the same as that shown in FIG.
In this embodiment, since the main part of the switching control circuit 3 may be an inverter, there is an advantage that the circuit is simplified.
[0016]
As described above, since the MOSFET operates bi-directionally, in the embodiment, the source side of the transistor Q3 is connected to the output of the regulator 13, and the drain side is connected to the drain side of the transistor Q4. Conversely, the drain side of the transistor Q3 may be connected to the output of the regulator 13, and the source side may be connected to the drain side of the transistor Q4.
The backup battery in this specification and claims includes a capacitor having a battery function such as a ferroelectric capacitor as well as a normal button battery.
[0017]
【The invention's effect】
As described above, according to the present invention, the first transistor is turned on when the power is turned on, and the first transistor is turned off when the power is turned off. Since the back gate of the first transistor is biased with the voltage of the backup battery by turning on either the second or third transistor so that the parasitic diode is reverse-biased, the power supply is cut off from the backup battery. Current hardly leaks to the DC power supply side.
Therefore, only one transistor element for switching the power source that allows a relatively large current to flow is required. In this case, the transistor for the back gate bias is a transistor having a small exclusive area because a very small current is required to flow. Since the control circuit is also a circuit that performs ON / OFF control of each transistor, the current value is small. As a result, the number of transistor elements for switching the power source is one, and as a result, when these circuits are integrated, the occupied area can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram of an embodiment to which a power supply circuit having a backup battery according to the present invention is applied.
FIG. 2 is a schematic diagram of a connection state by a semiconductor cross-sectional structure centering on each transistor in FIG. 1;
FIG. 3 is a timing chart for explaining the operation;
FIG. 4 is a block diagram of another embodiment to which a power supply circuit having a backup battery according to the present invention is applied.
FIG. 5 is a timing chart for explaining the operation;
FIG. 6 is an explanatory diagram of a power supply circuit having a conventional backup battery.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1,10 ... Power supply circuit, 2 ... Changeover switch circuit, 3 ... Changeover control circuit,
4 ... power supply voltage detection circuit (DET), 5 ... buffer amplifier,
6 ... Inverter, 7 ... Power supply switching circuit,
8 ... Connection line,
11 ... Battery, 12 ... DC / DC converter,
13 ... Regulator, 14 ... Bias circuit,
15 ... switching control circuit, 16 ... backup battery,
17 ... Diode, 18 ... Output terminal,
20 ... 18 and backup, 20,21 ... load circuit,
22 ... Power-on switch, R ... Load resistance,
D1, D2 ... diodes, Q1-Q4 ... MOSFET transistors.

Claims (4)

Provided in the apparatus, back up to the output terminal when the power of the chromatic and the apparatus MOSFET transistor delivering the power to the output terminal receives power from the DC power supply when the power of the apparatus is turned is interrupted In the power supply circuit where the current from the battery is applied,
The MOSFET transistor is a first transistor , and includes a second transistor of an N-channel MOSFET and a third transistor of a P-channel MOSFET provided in parallel with the first transistor. These second and third transistors A back gate bias circuit in which the connection point is connected to the back gate of the first transistor;
A control signal for turning on the first transistor when the device is turned on is applied to the gate of the first transistor and sent to the gates of the second and third transistors. One of the transistors is turned on, the other transistor is turned off, the back gate of the first transistor is connected to the source of the first transistor, and the first power supply is turned off when the power of the device is shut off. the other one of the transistors in the OFF one of the transistors the one by sending a control signal to the gates of the addition and the second and third transistors of the control signal the first transistor to turn OFF the transistor ON and apply the voltage from the backup battery to the back gate of the first transistor Power supply circuit, comprising a control circuit for reverse biasing the parasitic diodes of the first transistor. The DC power source is a battery, the first transistor is a P-channel MOSFET transistor, the second transistor is an N-channel MOSFET transistor, the third transistor is a P-channel MOSFET transistor, The second and third transistors are connected between the DC power supply and the output terminal in a third order, and the control circuit detects whether the power is turned on, and the detection circuit A buffer amplifier that generates a HIGH level or LOW level output in response to a detection signal and an inverter that receives the output of the buffer amplifier, and the output of the buffer amplifier is used as the control signal. And the output of the inverter is added to the gate of the third transistor. Power circuit according to claim 1, wherein the serial control signal applied to the gate of the first transistor. Provided in the apparatus, the backup battery to the output terminal when the power of the chromatic and the apparatus MOSFET transistor for delivering power to the output terminal receives power from the DC power supply when the power of the apparatus is turned is interrupted In portable electronic devices where current from
The MOSFET transistor is a first transistor , and includes a second transistor of an N-channel MOSFET and a third transistor of a P-channel MOSFET provided in parallel with the first transistor. These second and third transistors A back gate bias circuit in which the connection point is connected to the back gate of the transistor of the title 1;
A control signal for turning on the first transistor when the device is turned on is applied to the gate of the first transistor and sent to the gates of the second and third transistors. One of the transistors is turned on, the other transistor is turned off, the back gate of the first transistor is connected to the source of the first transistor, and the first power supply is turned off when the power of the device is shut off. the other one of the transistors in the OFF one of the transistors the one by sending a control signal to the gates of the addition and the second and third transistors of the control signal the first transistor to turn OFF the transistor ON and apply the voltage from the backup battery to the back gate of the first transistor Portable electronic device having a backup battery, characterized by comprising a control circuit for reverse biasing the parasitic diodes of the first transistor. The DC power source is a battery, the first transistor is a P-channel MOSFET transistor, the second transistor is an N-channel MOSFET transistor, the third transistor is a P-channel MOSFET transistor, The second and third transistors are connected between the DC power supply and the output terminal in a third order, and the control circuit detects whether the power is turned on, and the detection circuit A buffer amplifier that generates a HIGH level or LOW level output in response to a detection signal and an inverter that receives the output of the buffer amplifier, and the output of the buffer amplifier is used as the control signal. And the output of the inverter is added to the gate of the third transistor. Portable electronic device having the first backup battery according to claim 3, wherein applied to the gate of the transistor as a serial control signal.

Images