JP4493931B2 - Display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device using a semiconductor element (typically a transistor) as a device, in particular, a technical field related to a light-emitting device typified by an electroluminescence display device, and an electronic apparatus including the display device in an image display unit. Belongs to the technical field.
[0002]
[Prior art]
In recent years, development of a liquid crystal display device or an electroluminescence display device in which transistors (particularly thin film transistors) are integrated on a substrate has been advanced. Each of these display devices is characterized in that a transistor is formed on a glass substrate by using a thin film formation technique, the transistor is arranged in each pixel arranged in a matrix, and functions as a display device that performs image display. .
[0003]
There are various specifications required for an image display area (hereinafter referred to as a pixel portion) of the display device. First, the number of dots is high and the definition is high, and the area of the effective display area of each pixel is large and bright. For example, image display is possible, and there is no defect that induces a point defect or a line defect over the entire pixel portion. In order to satisfy these specifications, not only the performance of the transistors arranged in each pixel is good, but also a technique capable of forming transistors with a stable process and high yield is required.
[0004]
In addition, among organic electroluminescence display devices, organic electroluminescence display devices use an organic compound for a light-emitting element serving as a light-emitting source, and thus a device for suppressing deterioration of the organic compound is the most important issue in ensuring reliability. . That is, in order to obtain a display device with high reliability, it is necessary to pay attention not only to the influence of accumulated damage on the process in the middle of manufacturing, but also to subsequent deterioration due to accumulated damage.
[0005]
In the development situation as described above, the problem that the applicant is most concerned about at present is that the plasma damage caused by the etching process accumulates in the insulating film, for example, the variation of the threshold voltage of the transistor. And shifts.
[0006]
[Problems to be solved by the invention]
The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a device configuration effective in reducing the influence of plasma damage in a manufacturing process of a display device. Then, by reducing the influence of plasma damage, a variation in threshold voltage of the transistor is suppressed, and a display device having uniform display characteristics (referring to a display characteristic with a small degree of luminance variation or deterioration in adjacent pixels). The issue is to provide.
[0007]
[Means for Solving the Problems]
The present invention is a display device characterized by including the following configuration as a device configuration effective in solving the above-described problems. Here, the light-emitting element is a light-emitting body (light-emitting layer, carrier injection layer, carrier transport layer, carrier blocking layer, or other organic compound or inorganic compound required for light emission) between a pair of electrodes (anode and cathode). It is a device provided with a laminated body. For example, an electroluminescent element corresponds to a light emitting element.
[0008]
(1) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a barrier layer above the active layer, and on the barrier layer A planarization layer and a drain electrode on the planarization layer;
The light emitting element has a pixel electrode connected to and in contact with the upper surface of the drain electrode on the planarizing layer, a light emitter that is in contact with the pixel electrode, and a counter electrode that faces the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer. .
[0009]
Note that the planarizing layer in the present invention may be an inorganic insulating film formed by sputtering, plasma CVD, reduced pressure thermal CVD, or spin coating, or an organic resin film. Further, when formed by sputtering, plasma CVD, or low pressure thermal CVD, the surface thereof may be polished (including mechanical, chemical, or polishing having a combined effect thereof). With the planarization layer, the surface of the first electrode provided over the planarization layer can be planarized, and a short circuit of the light-emitting element (EL element) is prevented. Further, by providing a barrier layer, impurity diffusion from the EL element is blocked to protect the TFT, and further, degassing from the organic insulating film is prevented. Further, by providing a barrier layer near the active layer of the TFT, impurity diffusion from the EL element is blocked and the TFT is effectively protected.
[0010]
(2) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The light emitting element has a pixel electrode connected to and in contact with the upper surface of the drain electrode on the planarizing layer, a light emitter that is in contact with the pixel electrode, and a counter electrode that faces the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer,
The barrier layer covers an upper surface of the planarization layer and a side surface of the second opening provided in the planarization layer.
[0011]
In the configuration shown in (2), by providing a barrier layer, the planarization layer is prevented from being etched when the first electrode and the drain electrode are etched. In addition, by covering the planarization layer with a barrier layer, impurity diffusion from the planarization layer to the light-emitting element is prevented.
[0012]
(3) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The light emitting element has a pixel electrode connected to and in contact with the upper surface of the drain electrode on the planarizing layer, a light emitter that is in contact with the pixel electrode, and a counter electrode that faces the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through an opening provided in the gate insulating film, the planarization layer, and the barrier layer,
The barrier layer covers an upper surface of the planarizing layer.
[0013]
Further, in the configuration shown in (3), the openings provided in the gate insulating film, the planarization layer, and the barrier layer are etched using the same mask, which is compared with (1) and (2). It can be manufactured with a small number of masks.
[0014]
(4) In a display device including a transistor provided on a substrate surface and a light emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a barrier layer above the active layer, and on the barrier layer A planarization layer and a drain electrode on the planarization layer;
The light emitting element has a pixel electrode connected to the lower surface of the drain electrode on the planarizing layer, a light emitter in contact with the pixel electrode, and a counter electrode facing the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer. .
[0015]
(5) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The light emitting element has a pixel electrode connected to the lower surface of the drain electrode on the planarizing layer, a light emitter in contact with the pixel electrode, and a counter electrode facing the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer,
The barrier layer covers an upper surface of the planarization layer and a side surface of a first opening provided in the planarization layer.
[0016]
(6) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The light emitting element has a pixel electrode connected to the lower surface of the drain electrode on the planarizing layer, a light emitter in contact with the pixel electrode, and a counter electrode facing the pixel electrode through the light emitter. ,
The drain electrode is connected to the active layer through an opening provided in the gate insulating film, the planarization layer, and the barrier layer,
The barrier layer covers an upper surface of the planarizing layer.
[0017]
The configurations shown in (4), (5), and (6) are configurations in which the drain electrode is formed after the pixel electrode is formed, which is useful when the drain electrode is thick. When it is formed after the drain electrode, it is necessary to form a part of the pixel electrode so as to be in contact with and overlap with the drain electrode. However, when the drain electrode is thick, a coverage defect such as disconnection occurs in the pixel electrode. There is a fear.
[0018]
(7) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a barrier layer above the active layer, and on the barrier layer An insulating layer, a drain electrode on the insulating layer, and a planarization layer on the source electrode or drain electrode;
The light emitting element includes a pixel electrode provided on the planarization layer and connected to the drain electrode through an opening provided in the planarization layer, a light emitter in contact with the pixel electrode, and the light emitter A counter electrode facing the pixel electrode through
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the insulating layer.
[0019]
(8) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, an insulating layer above the active layer, and on the insulating layer A barrier layer, a drain electrode on the barrier layer, and a planarization layer on the drain electrode;
The light emitting element includes a pixel electrode provided on the planarization layer and connected to the drain electrode through an opening provided in the planarization layer, a light emitter in contact with the pixel electrode, and the light emitter A counter electrode facing the pixel electrode through
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the insulating layer,
The barrier layer covers an upper surface of the insulating layer and a side surface of a second opening provided in the insulating layer.
[0020]
(9) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, an insulating layer above the active layer, and on the insulating layer A barrier layer, a drain electrode on the barrier layer, and a planarization layer on the drain electrode;
The light emitting element includes a pixel electrode provided on the planarization layer and connected to the drain electrode through an opening provided in the planarization layer, a light emitter in contact with the pixel electrode, and the light emitter A counter electrode facing the pixel electrode through
The drain electrode is connected to the active layer through an opening provided in the gate insulating film, the insulating layer, and the barrier layer,
The barrier layer covers the upper surface of the insulating layer.
[0021]
Further, in the configurations shown in (7), (8), and (9), the pixel electrode is connected to the drain electrode through the contact hole, and is insulated from the other wirings by the planarization layer. The area can be increased.
[0022]
Note that the upper surface of the planarization layer in the configuration shown in the above (7) to (9) may be covered with a silicon nitride film. In particular, when an organic resin film is used as the planarizing layer, a gas (component gas or moisture) generated from the organic resin film is covered by covering the upper surface (including the inner wall surface of the opening if there is an opening) with a silicon nitride film. This is because diffusion to the light emitting element side can be effectively suppressed.
[0023]
Moreover, it is preferable that the edge part (at least corner | angular part) of the said pixel electrode is covered with the resin film. This is because an electric field concentration tends to occur at the end of the pixel electrode and the coverage of the film formed thereon is poor, so that the end is preferably not used for forming the light emitting element. The resin film may be a non-photosensitive resin film or a photosensitive resin film, and may be either a positive type or a negative type as long as it is a photosensitive resin film.
[0024]
(10) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a barrier layer above the active layer, and on the barrier layer A planarization layer and a drain electrode on the planarization layer;
The drain electrode is a laminated electrode including a structure in which a first metal film and a second metal film are laminated, and has a portion where the first metal film is exposed by removing a part of the second metal film,
The light emitting device includes a portion where the first metal film is exposed, a light emitter that is in contact with the portion where the first metal film is exposed, and a counter electrode that faces the portion where the first metal film is exposed via the light emitter. Have
The drain electrode is connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer. .
[0025]
(11) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The drain electrode is a laminated electrode including a structure in which a first metal film and a second metal film are laminated, and has a portion where the first metal film is exposed by removing a part of the second metal film,
The light emitting device includes a portion where the first metal film is exposed, a light emitter that is in contact with the portion where the first metal film is exposed, and a counter electrode that faces the portion where the first metal film is exposed via the light emitter. Have
The barrier layer covers an upper surface of the planarizing layer and a side surface of a first opening provided in the insulating layer.
[0026]
(12) In a display device including a transistor provided on a substrate surface and a light-emitting element connected to the transistor,
The transistor includes an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode facing the active layer through the gate insulating film, a planarizing layer above the active layer, and the planarizing layer An upper barrier layer and a drain electrode on the barrier layer;
The drain electrode is a laminated electrode including a structure in which a first metal film and a second metal film are laminated, and has a portion where the first metal film is exposed by removing a part of the second metal film,
The light emitting device includes a portion where the first metal film is exposed, a light emitter that is in contact with the portion where the first metal film is exposed, and a counter electrode that faces the portion where the first metal film is exposed via the light emitter. Have
The source electrode and the drain electrode are connected to the active layer through openings provided in the gate insulating film, the insulating layer, and the barrier layer,
The barrier layer covers an upper surface of the planarizing layer.
[0027]
In the structures shown in (10) to (12), a section of the second metal film and a portion of the second metal film in a portion where the first metal film is exposed by removing a part of the second metal film. The angle formed by the upper surface of the substrate is preferably an obtuse angle. That is, the portion is formed by removing the second metal film by etching, but it means that the etching is preferably performed so that the etching cross section has a tapered shape. This is because even if the light generated inside the light emitter propagates in the lateral direction in the light emitter, if the cross section of the second metal film is tapered, it is reflected by the cross section and can be extracted efficiently. is there. The configurations shown in (10) to (12) reflect or condense the light emission in the lateral direction on the slope of the second metal film formed in the step portion of the laminated electrode, and pass in one direction (pass the counter electrode). The amount of emitted light is increased in the direction in which the light is emitted. For that purpose, it is preferable that the thickness of the luminous body is smaller than the thickness of the second metal film.
[0028]
Further, a portion other than the portion where the part of the second metal film in the pixel portion is removed and the first metal film is exposed is covered with a resin film. This is because the second metal film is etched using this resin film, and all the parts other than a part (removed part) of the second metal film are covered with the resin film. However, it is sufficient that the resin film is in the pixel portion, and it is not always necessary to remain in a portion other than the pixel portion (for example, a drive circuit portion). In addition, the resin film has to be removed from the terminal portion that exchanges signals with the external circuit.
[0029]
As the first metal film, it is preferable to use a titanium film, a titanium nitride film, or other metal film that can function as an anode of a light emitting element, and as the second metal film, an aluminum film (an aluminum alloy film and other elements). It is preferable to use a metal film having a high reflectivity such as an aluminum film to which is added. Here, only the two-layer structure of the first metal film and the second metal film is illustrated, but a plurality of stacked structures may be used.
[0030]
In the structures of these inventions, the silicon nitride film used as the barrier layer is desirably as dense as possible. If it is dense, the barrier property is increased by that amount, and the effect of preventing diffusion of degassed components is high. For example, when an organic resin film is used as the planarizing layer, it is possible to effectively suppress diffusion of component gases and moisture from the organic resin film to the transistor side or the light emitting element side.
[0031]
Even when an inorganic insulating film (typically a spin-on-glass film) formed by a spin coating method is used as the planarizing layer, it is also very effective in suppressing the diffusion of component gases and moisture. As the SOG (spin-on-glass) film, there are an organic SOG film and an inorganic SOG film. However, when used in the present invention, an inorganic SOG film with less outgassing is preferred. As the inorganic SOG film, a SiOx film, a PSG (phosphorus silicate glass) film, a BSG (boron silicate glass) film, or a BPSG (boron phosphorus silicate glass) film formed by a spin coating method is suitable. A typical example of the SOG film is the OCD series of Tokyo Ohka Kogyo Co., Ltd. Of course, other known SOG films may be used.
[0032]
DETAILED DESCRIPTION OF THE INVENTION
[Embodiment 1]
This embodiment is an example of the electroluminescent display device of the present invention. 1A is a top view of one pixel of an electroluminescence display device (however, up to the point where a pixel electrode is formed), and FIG. 1B is a circuit diagram thereof. 1 (C) and (D) are drawings corresponding to cross-sectional views taken along AA ′ and BB ′, respectively.
[0033]
As shown in FIGS. 1A and 1B, the pixel portion of the electroluminescent display device is surrounded by a gate wiring 151, a data wiring 152, and a power supply wiring (wiring for supplying a constant voltage or a constant current) 153. A plurality of pixels are arranged in a matrix arrangement, and each pixel functions as a thin film transistor (TFT) (hereinafter referred to as a switching TFT) 154 that functions as a switching element, and a means for supplying current or voltage for causing the light emitting element to emit light. A TFT 155 (hereinafter referred to as a driving TFT) 155, a capacitor portion 156, and a light emitting element 157 are provided. Although not shown here, the light emitting element 157 can be formed by providing a light emitter above the pixel electrode 158.
[0034]
Note that although a multi-gate n-channel TFT is used as the switching TFT 154 and a p-channel TFT is used as the driving TFT 155 in this embodiment mode, the pixel structure of the light-emitting device needs to be limited to this. However, the present invention can be applied to any known configuration.
[0035]
In the cross-sectional view of FIG. 1C, an n-channel TFT 154 and a capacitor portion 156 appear. Reference numeral 101 denotes a substrate, which can be a glass substrate, a ceramic substrate, a quartz substrate, a silicon substrate, or a plastic substrate (including a plastic film). Reference numeral 102 denotes a silicon nitride oxide film and 103 denotes a silicon oxynitride film, which are stacked to function as a base film. Of course, it is not necessary to limit to these materials. Further, an active layer of an n-channel TFT 154 is provided on the silicon oxynitride film 103, and the active layer includes a source region 104, a drain region 105, LDD regions 106a to 106d, and channel forming regions 107a and 107b. In addition, two channel formation regions and four LDD regions are provided between the source region 104 and the drain region 105.
[0036]
The active layer of the n-channel TFT 154 is covered with a gate insulating film 108, and gate electrodes 109a and 109b and gate electrodes 110a and 110b are provided thereon. As the gate insulating film 108, a silicon oxynitride film is used in this embodiment mode; however, when the above-described nitride insulating film such as an aluminum nitride film having a high relative dielectric constant is used, the area occupied by the element can be reduced. It is effective for improvement.
[0037]
Further, a tantalum nitride film is used as the gate electrodes 109a and 110a, and a tungsten film is used as the gate electrodes 109b and 110b. Since these metal films have a high selectivity to each other, such a structure can be obtained by selecting etching conditions. Regarding this etching condition, Japanese Patent Application Laid-Open No. 2001-313397 by the present applicant may be referred to.
[0038]
In addition, a silicon nitride film or a silicon nitride oxide film is provided as the insulating layer 111 covering the gate electrode, and a silicon nitride film is provided as the barrier layer 112 thereon. This silicon nitride film is formed by a high frequency sputtering method using nitrogen and argon as sputtering gases and using silicon as a target, and can have an extremely dense film quality and is useful as a barrier layer. . Further, a planarized inorganic insulating film is provided over the barrier layer 112 as the planarizing layer 113. In this embodiment mode, an SOG (spin-on-glass) film or an inorganic insulating film whose surface is polished is used as the planarized inorganic insulating film.
[0039]
At this time, the stacked body including the gate insulating film 108, the insulating layer 111, and the barrier layer 112 is provided with a first opening on the source region 104 and the drain region 105, and the planarization layer 113 has a first opening therein. A second opening is provided so that the one opening can be accommodated. In such a structure, (1) after the first opening is formed first, the first opening is once filled with a planarizing layer, and further the second opening is formed, and (2) a planarizing layer is provided. Thereafter, the second opening may be formed, and then a method of newly forming the first opening in the second opening using a mask may be selected. However, since it is preferable to use a dry etching method for forming the first opening, it is better to avoid exposing the planarization layer 113 to plasma as much as possible. In that sense, the method (1) is preferable. I can say that.
[0040]
Also, data wiring 152 The connection wiring (corresponding to a drain electrode) is connected to the source region 104 or the drain region 105 through the first opening and the second opening. The connection wiring 114 is a wiring connected to the gate of the driving TFT 155. For the data wiring 152 and the connection wiring 114, a structure in which a wiring mainly composed of a low resistance metal such as aluminum or copper is sandwiched between other metal films or an alloy film of these metals may be used.
[0041]
Reference numeral 115 denotes a source region of the driving TFT 155 to which a power supply wiring 153 is connected. Further, the power supply wiring 153 is opposed to the gate wiring 116 of the driving TFT 155 via the insulating layer 111 and the barrier layer 112 and forms a storage capacitor 156a. Further, the gate wiring 116 is opposed to the semiconductor film 117 through the gate insulating film 108 and forms a storage capacitor 156b. Since the power supply wiring 153 is connected to the semiconductor film 118, the semiconductor film 117 functions as an electrode by being supplied with electric charges therefrom. As described above, since the capacitor portion 156 has a configuration in which the storage capacitors 156a and 156b are connected in parallel, a large capacity can be obtained with a very small area. Furthermore, since the storage capacitor 156a in particular uses a silicon nitride film having a high relative dielectric constant as a dielectric, a large capacitance can be secured. In addition, since the dielectric of the storage capacitor 156a has a stacked structure of the insulating layer 111 and the barrier layer 112, the probability of occurrence of pinholes is extremely low, and a highly reliable capacitor can be formed.
[0042]
In the case where the first opening and the second opening are formed, the number of masks used in the photolithography process is increased as compared with the conventional case. As shown in FIG. 4, it is possible to newly form a storage capacitor. This is also one of the features of the present invention. This feature more than compensates for the disadvantages of increased masks, and as a result greatly contributes to industrial development. For example, in order to obtain a high-definition image display, it is necessary to reduce the relative occupied area of the storage capacitor with respect to the area of each pixel in the display unit and improve the aperture ratio. Is extremely useful.
[0043]
In FIG. 1D, reference numeral 119 denotes a drain region of the driving TFT 155 which is connected to the drain electrode 120. The drain electrode 120 is connected to the pixel electrode 158 to constitute a pixel. In this embodiment, an oxide conductive film transparent to visible light (typically, an ITO film) is used as the pixel electrode 158; however, the present invention is not limited to this. Further, the pixel electrode 158 is formed after the drain electrode 120 is formed, so that the pixel electrode 158 is in contact with and connected to the upper surface of the drain electrode 120.
[0044]
FIG. 2 shows an example in which up to the light emitting element 157 is actually formed in the electroluminescence display device having the above pixel configuration. FIG. 2A is a drawing corresponding to the cross section shown in FIG. 1C and shows a state where an EL element 157 is formed over the pixel electrode 158. In the case of the structure shown in FIG. 2, the pixel electrode 158 functions as an anode of the light emitting element 157.
[0045]
The ends of the pixel electrodes 158 are covered with a photosensitive organic resin film 121 as shown in FIG. 2B, and the photosensitive organic resin film 121 is provided in a grid pattern so as to border each pixel. Alternatively, the stripes are provided in a row unit or a column unit. In any case, the concave portion can be filled efficiently by forming on the first opening and the second opening described above, and the entire flattening can be achieved. The photosensitive organic resin film 121 may be a positive type or a negative type. In addition, a known resist material (polymer material including chromophore) can also be used.
[0046]
Although not shown, if the upper surface of the photosensitive organic resin film 121 is covered with a silicon nitride film, degassing from the photosensitive organic resin film 121 can be suppressed. In addition, an opening is provided in the photosensitive organic resin film 121 over the pixel electrode 158, and the light emitter 122 and the pixel electrode 158 are in contact with each other in the opening. The light-emitting body 122 is generally configured by stacking thin films such as a light-emitting layer, a carrier injection layer, or a carrier transport layer, but any structure and material that has been confirmed to emit light can be used. For example, SAlq (Alq which is an organic material containing silicon as an electron transport layer or a hole blocking layer _Three It is also possible to use one in which one of the three ligands is substituted with a triphenylsilanol structure.
[0047]
Of course, it is not necessary to comprise only an organic thin film, a structure in which an organic thin film and an inorganic thin film are laminated, a polymer thin film, or a low molecular thin film may be used. The film forming method varies depending on whether a polymer thin film or a low molecular thin film is used, but may be formed by a known method.
[0048]
Further, a counter electrode (a cathode in this embodiment) 123 is provided on the light emitter 122 so as to face the pixel electrode 158 via the light emitter 122, and further, a final passivation film 124 is formed thereon. A silicon nitride film is provided. As a material of the passivation film 124, the same material as that of the barrier layer 112 described above may be used. As the cathode 124, a metal thin film containing an element belonging to Group 1 or 2 of the periodic table may be used, but 0.2 to 1.5 wt% (preferably 0.5 to 1.0 wt%) lithium is added to aluminum. The added metal film is suitable in terms of charge injection and other points. Note that although lithium may be harmful to the operation of the TFT by diffusing, since this embodiment is completely protected by the barrier layer 112, there is no need to worry about diffusion of lithium. .
[0049]
In the structure shown in FIGS. 2A and 2B, light emitted from the EL element is transmitted from the pixel electrode 158 and emitted from the substrate 101 side. At this time, since the planarization layer 113 is light-transmitting, light emitted from the light-emitting element can be transmitted without any problem.
[0050]
In the electroluminescence display device including the device configuration as described above, the influence of plasma damage is reduced, so that variation in threshold voltage of the transistor is suppressed, and uniform display characteristics can be obtained.
[0051]
[Embodiment 2]
The present embodiment is an example including a device configuration in which the positions of the planarization layer and the barrier layer are reversed in the first embodiment. Other configurations are the same as those in the first embodiment, and therefore the description of the first embodiment may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first embodiment.
[0052]
FIGS. 3A and 3B are drawings corresponding to FIGS. 2A and 2B in the first embodiment, and the same reference numerals as those in the first embodiment are given. In this embodiment mode, the planarization layer 301 is provided over the insulating layer 111, and after the second opening is formed in the planarization layer 301, the upper surface of the planarization layer 301 and the side surface (inside of the second opening) The barrier layer 302 is formed so as to cover the wall surface, and the first opening is formed by etching the gate insulating film 108, the insulating layer 111, and the barrier layer 112 inside the second opening.
[0053]
In the case of the structure of this embodiment mode, the planarization layer 301 can be completely surrounded by the insulating layer 111 and the barrier layer 302, and degassing from the planarization layer 301 can be completely sealed. That is, since a degassing component does not diffuse to the light emitting element side or the transistor side, a highly reliable display device in which deterioration with time is suppressed can be obtained. Needless to say, as in the first embodiment, the influence of plasma damage is reduced, whereby variation in threshold voltage of transistors is suppressed, and uniform display characteristics can be obtained.
[0054]
[Embodiment 3]
The present embodiment is an example including a device configuration in which the positions of the planarization layer and the barrier layer are reversed in the first embodiment. Other configurations are the same as those in the first embodiment, and therefore the description of the first embodiment may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first embodiment.
[0055]
FIGS. 4A and 4B are drawings corresponding to FIGS. 2A and 2B in the first embodiment, and the same reference numerals as those in the first embodiment are given. In this embodiment mode, the planarization layer 401 is provided over the insulating layer 111. After the barrier layer 402 is formed over the planarization layer 401, the barrier layer 402, the planarization layer 401, the insulating layer 111, and the gate insulating film are formed. An opening is formed by etching 108.
[0056]
In the case of the structure of this embodiment mode, degassing from the planarization layer 401 can be suppressed. That is, a highly reliable display device in which deterioration with time is suppressed can be obtained by suppressing diffusion of degassing components to the light emitting element side and the transistor side. Needless to say, as in the first embodiment, the influence of plasma damage is reduced, whereby variation in threshold voltage of transistors is suppressed, and uniform display characteristics can be obtained.
[0057]
[Embodiment 4]
In this embodiment shown in FIGS. 5A to 5C, in the device configuration corresponding to each of Embodiments 1 to 3, a non-photosensitive organic resin film 501 is used as a resin film covering an end portion of the pixel electrode 158. This is an example using ~ 503. Since other configurations are the same as those of the first to third embodiments, the description of the first to third embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first to third embodiments.
[0058]
When a photosensitive organic resin film is used, the upper end is rounded (having a curvature) as shown in FIGS. 2B, 3B, and 4B, and a light emitter and a counter electrode are formed. Although it is a useful configuration for improving the time coverage, it is not necessary to limit to this, and there is no problem even if a non-photosensitive organic resin film is used as shown in this embodiment. Further, when the upper end portion of the resin film covering the end portion of the pixel electrode 158 is rounded (having a curvature), when cleaning the surface of the pixel electrode 158, foreign matters (dust etc.) remain in the skirt portion. Can be prevented.
[0059]
In addition, although this Embodiment partially changes the structure of Embodiment 1-3, the effect of Embodiment 1-3 is not impaired and the same effect can be acquired.
[0060]
[Embodiment 5]
This embodiment mode shown in FIGS. 6A to 6C is an example in which the configuration of the active layer of the thin film transistor is changed in the device configuration corresponding to each of Embodiment Modes 1 to 3. Since other configurations are the same as those of the first to third embodiments, the description of the first to third embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first to third embodiments.
[0061]
In FIG. 6A, the active layer of the thin film transistor includes a source region 601 and a drain region 602, and four LDD (lightly doped drain) regions and two channel formation regions 603 and 604 therebetween. The four LDD regions are each composed of a combination of two LDD regions. The LDD regions 605a and 605b, the LDD regions 606a and 606b, the LDD regions 607a and 607b, and the LDD regions 608a and 608b function as an LDD region. .
[0062]
For example, the LDD region 605a is formed so as to overlap (overlap) with the gate electrode, and the LDD region 605b is formed so as not to overlap with the gate electrode. In this case, the LDD region 605a contributes to suppression of hot carrier deterioration, and the LDD region 605b contributes to reduction of off current (also referred to as leakage current). These characteristics are well known, and Japanese Patent Application Laid-Open No. 2002-57162 filed by the present applicant may be referred to.
[0063]
In addition, although this Embodiment partially changes the structure of Embodiment 1-3, the effect of Embodiment 1-3 is not impaired and the same effect can be acquired. A combination with the fourth embodiment is also possible.
[0064]
[Embodiment 6]
This embodiment mode shown in FIGS. 7A to 7C is an example in which the configuration of the active layer and the gate electrode of the thin film transistor is changed in the device configuration corresponding to each of the first to third embodiments. Since other configurations are the same as those of the first to third embodiments, the description of the first to third embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first to third embodiments. Since the active layer and the gate electrode in FIGS. 7A to 7C have the same configuration, only FIG. 7A will be described.
[0065]
In FIG. 7A, the active layer of the thin film transistor includes a source region 701 and a drain region 702, and four LDD (lightly doped drain) regions 703a to 703d and two channel formation regions 704a and 704b therebetween. Further, the LDD regions 703a to 703d are characterized in that they are formed before the formation of the gate electrodes 705 and 706. By forming in this order, it is possible to design the degree of overlap between the LDD region and the gate electrode in accordance with the specifications of the transistor characteristics, and the configuration of the active layer can be made different for each circuit. These characteristics are well known, and Japanese Patent Application Laid-Open No. 2000-332257 filed by the present applicant may be referred to.
[0066]
In addition, although this Embodiment partially changes the structure of Embodiment 1-3, the effect of Embodiment 1-3 is not impaired and the same effect can be acquired. A combination with the fourth and fifth embodiments is also possible.
[0067]
[Embodiment 7]
This embodiment mode shown in FIGS. 8A to 8C is an example in which the configuration of the light emitting element is changed in the device configuration corresponding to Embodiment Modes 1 to 3, respectively. Since other configurations are the same as those of the first to third embodiments, the description of the first to third embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first to third embodiments. 8A to 8C are the same (the configuration other than the light emitting element), and therefore only FIG. 8A will be described.
[0068]
In FIG. 8A, a pixel electrode 801 is a metal film functioning as an anode and is made of gold, platinum, titanium, titanium nitride, or tungsten. On the pixel electrode 801, as described in Embodiment Mode 1, the light emitter 122, the counter electrode 123 functioning as a cathode, and the passivation film 124 are provided.
[0069]
Note that although an example in which a metal film is used as an anode is described in this embodiment mode, a metal film functioning as a cathode can be provided instead of the anode 801. As the metal film functioning as the cathode, aluminum (including an element added with an element belonging to Group 1 or 2 of the periodic table, typically an alloy of aluminum and lithium) or an alloy of magnesium and silver may be used. In that case, the structure of the light emitter 122 also needs to be changed, and a transparent electrode that functions as an anode must be provided on the light emitter 122, and any known structure can be adopted.
[0070]
In this embodiment, the polarity of the driving TFT is a p-channel type in consideration of the pixel electrode being an anode. However, when the pixel electrode is a cathode, the polarity of the driving TFT is an n-channel type. Is preferred.
[0071]
In addition, although this Embodiment partially changes the structure of Embodiment 1-3, the effect of Embodiment 1-3 is not impaired and the same effect can be acquired. A combination with the fourth to sixth embodiments is also possible.
[0072]
[Embodiment 8]
This embodiment mode shown in FIGS. 9A to 9D is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to the first embodiment. Other configurations are the same as those in the first embodiment, and therefore the description of the first embodiment may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first embodiment.
[0073]
The pixel electrode 901 illustrated in FIG. 9A is connected so as to be in contact with the lower surface of the drain electrode 902 as illustrated in FIG. That is, after the planarization layer 113 is formed, the pixel electrode 901 is formed, and then the drain electrode 902 is formed so as to overlap with part of the pixel electrode 901. Note that there are two different methods for forming the pixel electrode 901 and the drain electrode 902.
[0074]
First, after the planarization layer 113 is formed, the pixel electrode 901 is formed, and then the first opening and the second opening are formed in the planarization layer 113, and the drain electrode 902 is formed. Second, there is a method in which after the first opening and the second opening are formed in the planarization layer 113, the pixel electrode 901 and the drain electrode 902 are formed in this order. These orders may be appropriately selected by the practitioner.
[0075]
Next, FIGS. 10A and 10B are cross-sectional views corresponding to FIGS. 9C and 9D when the light-emitting element 157 is formed. The materials of the photosensitive organic resin film 121, the light emitter 122, the counter electrode 123, and the passivation film 124 are as described in the first embodiment.
[0076]
In addition, although this Embodiment partially changes the structure of Embodiment 1, the effect of Embodiment 1 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0077]
[Embodiment 9]
This embodiment mode shown in FIGS. 11A and 11B is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to Embodiment Mode 2. FIG. Other configurations are the same as those in the second embodiment, and therefore the description of the second embodiment may be referred to. Further, the connection relation between the pixel electrode and the drain electrode and the order of formation are the same as those described in the eighth embodiment, and thus the eighth embodiment may be referred to for this point.
[0078]
In addition, although this Embodiment partially changes the structure of Embodiment 2, the effect of Embodiment 2 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0079]
[Embodiment 10]
This embodiment mode shown in FIGS. 12A and 12B is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to Embodiment Mode 3. FIG. Other configurations are the same as those in the third embodiment, and therefore the description of the third embodiment may be referred to. Further, the connection relation between the pixel electrode and the drain electrode and the order of formation are the same as those described in the eighth embodiment, and thus the eighth embodiment may be referred to for this point.
[0080]
In addition, although this Embodiment partially changes the structure of Embodiment 3, the effect of Embodiment 3 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0081]
[Embodiment 11]
This embodiment mode shown in FIGS. 13A to 13C is an example in which the configuration of the light emitting element is changed in the device configuration corresponding to each of Embodiment Modes 8 to 10. Since other configurations are the same as those of the eighth to tenth embodiments, the description of the eighth to tenth embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the eighth to tenth embodiments. Note that since the device configurations (configurations other than the light emitting elements) in FIGS. 13A to 13C are the same, only FIG. 13A will be described.
[0082]
In FIG. 13A, a pixel electrode 1301 is a metal film functioning as an anode and is made of gold, platinum, titanium, titanium nitride, or tungsten. Over the pixel electrode 1301, as described in Embodiment Mode 1, the light emitter 122, the counter electrode 123 functioning as a cathode, and the passivation film 124 are provided.
[0083]
Note that although an example in which a metal film is used as an anode is described in this embodiment mode, a metal film that functions as a cathode can be provided instead of the anode 1301. As the metal film functioning as the cathode, aluminum (including an element added with an element belonging to Group 1 or 2 of the periodic table, typically an alloy of aluminum and lithium) or an alloy of magnesium and silver may be used. In that case, the structure of the light emitter 122 also needs to be changed, and a transparent electrode that functions as an anode must be provided on the light emitter 122, and any known structure can be adopted.
[0084]
In this embodiment, the polarity of the driving TFT is a p-channel type in consideration of the pixel electrode being an anode. However, when the pixel electrode is a cathode, the polarity of the driving TFT is an n-channel type. Is preferred.
[0085]
In addition, although this Embodiment partially changes the structure of Embodiment 8-10, it does not impair the effect of Embodiment 8-10, and can acquire the same effect. Moreover, the combination with Embodiment 4-6, 8-10 is possible.
[0086]
[Embodiment 12]
This embodiment shown in FIGS. 14A to 14D is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to Embodiment 1. FIG. Other configurations are the same as those in the first embodiment, and therefore the description of the first embodiment may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first embodiment.
[0087]
As shown in FIG. 14A, a planarization layer 1401 is provided over the drain electrode 120 and the power supply wiring 153, and a pixel electrode 1402 is provided over the planarization layer 1401. That is, the pixel electrode 1402 is not in direct contact with the drain region 119 but is electrically connected through the drain electrode 120. At this time, the insulating layer 1403 may be an inorganic insulating film or an organic insulating film. Needless to say, using a planarization layer such as an SOG film as the insulating layer 1403 is effective in improving planarity.
[0088]
Next, FIGS. 15A and 15B are cross-sectional views corresponding to FIGS. 14C and 14D when the light-emitting element 157 is formed. The materials of the photosensitive organic resin film 121, the light emitter 122, the counter electrode 123, and the passivation film 124 are as described in the first embodiment.
[0089]
In addition, although this Embodiment partially changes the structure of Embodiment 1, the effect of Embodiment 1 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0090]
[Embodiment 13]
This embodiment mode shown in FIGS. 16A and 16B is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to Embodiment Mode 2. FIG. Other configurations are the same as those in the second embodiment, and therefore the description of the second embodiment may be referred to. Further, the connection relation between the pixel electrode and the drain electrode and the order of formation are the same as those described in Embodiment 12, so that Embodiment 12 can be referred to for that point.
[0091]
In addition, although this Embodiment partially changes the structure of Embodiment 2, the effect of Embodiment 2 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is also possible.
[0092]
[Embodiment 14]
This embodiment mode shown in FIGS. 17A and 17B is an example in which the connection configuration of the pixel electrode and the drain electrode is changed in the device configuration corresponding to Embodiment Mode 3. FIG. Other configurations are the same as those in the third embodiment, and therefore the description of the third embodiment may be referred to. Further, the connection relation between the pixel electrode and the drain electrode and the order of formation are the same as those described in Embodiment 12, so that Embodiment 12 can be referred to for that point.
[0093]
In addition, although this Embodiment partially changes the structure of Embodiment 3, the effect of Embodiment 3 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0094]
[Embodiment 15]
This embodiment mode shown in FIGS. 18A to 18C is an example in which the configuration of the light emitting element is changed in the device configuration corresponding to Embodiment Modes 12 to 14, respectively. Since other configurations are the same as those of the twelfth to fourteenth embodiments, the description of the twelfth to fourteenth embodiments may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the twelfth to fourteenth embodiments. Note that since the device configurations (configurations other than the light emitting elements) in FIGS. 18A to 18C are the same, only FIG. 18A will be described.
[0095]
In FIG. 18A, a pixel electrode 1801 is a metal film functioning as an anode and is made of gold, platinum, titanium, titanium nitride, or tungsten. On the pixel electrode 1801, as described in Embodiment Mode 1, the light emitter 122, the counter electrode 123 functioning as a cathode, and the passivation film 124 are provided.
[0096]
Note that although an example in which a metal film is used as an anode is described in this embodiment mode, a metal film that functions as a cathode can be provided instead of the anode 1801. As the metal film functioning as the cathode, aluminum (including an element added with an element belonging to Group 1 or 2 of the periodic table, typically an alloy of aluminum and lithium) or an alloy of magnesium and silver may be used. In that case, the structure of the light emitter 122 also needs to be changed, and a transparent electrode that functions as an anode must be provided on the light emitter 122, and any known structure can be adopted.
[0097]
In this embodiment, the polarity of the driving TFT is a p-channel type in consideration of the pixel electrode being an anode. However, when the pixel electrode is a cathode, the polarity of the driving TFT is an n-channel type. Is preferred.
[0098]
In addition, although this Embodiment partially changes the structure of Embodiment 12-14, the effect of Embodiment 12-14 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-6, 12-14 is possible.
[0099]
[Embodiment 16]
This embodiment mode shown in FIGS. 19A and 19B is an example in which the configuration of the pixel electrode in the device configuration corresponding to Embodiment Mode 1 is changed. Other configurations are the same as those in the first embodiment, and therefore the description of the first embodiment may be referred to. Therefore, the present embodiment will be described by paying attention only to differences from the first embodiment.
[0100]
First, the CAD drawing illustrated in FIG. 19A is an example of a pixel structure which can be applied to the electrode structure of this embodiment. A circuit diagram showing the CAD drawing shown in FIG. 19A is shown in FIG. Needless to say, this embodiment mode is not limited to the pixel configuration shown in FIGS. In this embodiment mode, a metal film is used as the pixel electrode, and light is extracted in a direction opposite to the substrate. Therefore, an aperture ratio (pixel area) can be formed regardless of the circuit formed under the pixel electrode. The functions of individual pixels can be diversified without impairing the effective display area ratio). Note that the pixel configuration shown in FIGS. 19A and 19B is described in Japanese Patent Application No. 2001-289983 filed by the present applicant, and is a novel configuration according to the invention of the present applicant.
[0101]
Here, the device configuration will be specifically described with reference to FIG. Note that the structure of the thin film transistor is the same as that in Embodiment 1, and thus the description of Embodiment 1 may be referred to. This embodiment is different from the first embodiment in the configuration of data wiring, drain electrode, and the like provided on the planarization layer 113.
[0102]
As shown in FIGS. 20A and 20B, a titanium film 11, a titanium nitride film 12, and an aluminum film 13 are provided on the planarizing layer 113, and a part of the aluminum film 13 is removed by etching to be nitrided. The titanium film 12 is exposed. Etching of the aluminum film 13 is performed using the resin film 14 as a mask, and this resin film 14 plays the same role as the photosensitive organic resin film 121 of the first embodiment as it is. That is, the resin film 14 is provided so as to cover a portion other than the portion where the titanium nitride film 12 is exposed. A light emitter 15 is provided so as to be in contact with the exposed portion of the titanium nitride film 12, and a counter electrode 16 and a passivation film 17 are provided thereon.
[0103]
FIG. 20C is an enlarged view of the region 10 surrounded by the dotted line in FIG. As shown in FIG. 20C, the etching cross section of the aluminum film 13 has a tapered shape having an angle of 30 to 60 ° (preferably 45 °). That is, the angle formed by the cross section of the aluminum film and the upper surface of the aluminum film is an obtuse angle. With such a configuration, the light generated in the light emitter 15 can be extracted directly (direct light), reflected after being reflected by the titanium nitride film (reflected light), After being propagated in the direction, it is composed of three elements (reflected light) extracted after being reflected by the cross section of the aluminum film 13, and an improvement in extraction efficiency can be expected as compared with the conventional structure.
[0104]
A cross-sectional TEM (transmission electron microscope) photograph (FIG. 24A) and a schematic diagram thereof (FIG. 24B) when the above-described pixel electrode configuration is actually produced are shown. It can be confirmed that the aluminum film is tapered and the titanium nitride film is exposed.
[0105]
In this embodiment, the lowermost layer is a titanium film so that ohmic contact with a drain region made of a semiconductor is possible, and a titanium nitride film that can function as an anode (working if ultraviolet light irradiation is applied to the surface) 3), and an aluminum film is provided as a reflective electrode for preventing light leakage. However, the present invention is not limited to this structure, and the first layer functions as an anode. It is sufficient to provide one metal film (corresponding to a titanium nitride film in this embodiment) and a second metal film (corresponding to an aluminum film in this embodiment) functioning as a reflective electrode.
[0106]
In addition, although this Embodiment partially changes the structure of Embodiment 1, the effect of Embodiment 1 is not impaired and the same effect can be acquired. Furthermore, since the metal film formed as the data wiring or the like is used as it is as the anode without using an oxide conductive film such as ITO, the number of steps can be reduced. Further, combinations with Embodiments 4 to 6 or combinations with Embodiment 15 (in place of the pixel electrode 1801) are possible.
[0107]
[Embodiment 17]
This embodiment mode shown in FIGS. 21A and 21B is an example in which the configuration of the pixel electrode is changed in the device configuration corresponding to Embodiment Mode 2. FIG. Other configurations are the same as those in the second embodiment, and therefore the description of the second embodiment may be referred to. Further, the configuration of the pixel electrode is the same as that described in the sixteenth embodiment, so that the sixteenth embodiment may be referred to for this point.
[0108]
In addition, although this Embodiment partially changes the structure of Embodiment 2, the effect of Embodiment 2 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7, 15 is possible.
[0109]
[Embodiment 18]
This embodiment mode shown in FIGS. 22A and 22B is an example in which the configuration of the pixel electrode is changed in the device configuration corresponding to Embodiment Mode 3. FIG. Other configurations are the same as those in the third embodiment, and therefore the description of the third embodiment may be referred to. Further, the configuration of the pixel electrode is the same as that described in the sixteenth embodiment, so that the sixteenth embodiment may be referred to for this point.
[0110]
In addition, although this Embodiment partially changes the structure of Embodiment 3, the effect of Embodiment 3 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7, 15 is possible.
[0111]
[Embodiment 19]
In this embodiment, the structure shown in FIG. 23A is a modification of the structure of Embodiment 16, in which a barrier layer 23 is provided so as to cover the insulating layer 22 of the driving TFT 21, and a power source is provided thereon. A planarization layer 25 is provided so as to cover the wiring 24 and the power supply wiring 24. What is necessary is just to select the film thickness of the insulating layer 22 from the range of 0.3-1 micrometer. Then, the pixel electrode and the driving TFT 21 are electrically connected through the second opening provided in the planarization layer 25 and the first opening provided in each insulating layer provided below the barrier layer 23. Is done. For the structure of the pixel electrode and the structure of the light emitting element, the description of Embodiment Mode 16 may be referred to.
[0112]
The structure shown in FIG. 23B is an example in which a barrier layer is provided at a position different from that in FIG. 23A, and is provided so as to cover the upper surface of the planarization layer 25 and the side surface of the second opening. There is a feature. With such a configuration, since the planarization layer 25 can be sealed with the insulating layer 22 and the barrier layer 26, the influence of degassing can be further suppressed.
[0113]
The structure illustrated in FIG. 23C is a structure in which FIG. 23A and FIG. 23B are combined, and a barrier layer 23 is provided so as to be in contact with the lower surface of the planarization layer 25, and the upper surface is formed. A barrier layer 26 is provided in contact therewith. With such a configuration, the planarization layer 25 can be sealed with the barrier layer 23 and the barrier layer 26, so that the influence of degassing can be further suppressed.
[0114]
In addition, although this Embodiment partially changes the structure of Embodiment 16, the effect of Embodiment 16 is not impaired and the same effect can be acquired. Moreover, the combination with Embodiment 4-7 is possible.
[0115]
[Embodiment 20]
The present embodiment is an example in which the diameter of the first opening is larger than the diameter of the second opening in the configuration shown in the second embodiment. That is, after the insulating layer 111 is formed, the insulating layer 111 and the gate insulating film 108 are etched to form the first opening, and the planarization layer 301 is formed thereon. Further, the planarization layer 301 is etched to form a second opening inside the first opening to expose the active layer (source region 104), and a barrier layer 302 is formed to cover the second opening. Thereafter, a third opening is formed in a part of the barrier layer 302 at the bottom of the second opening. Therefore, the data line 151 is connected to the source region 104 through the third opening.
[0116]
In the case of the structure of this embodiment mode, the insulating layer 111 and the gate insulating film 108 are not exposed to the etchant when the planarization layer 301 is etched. In particular, when an inorganic insulating film such as an SOG film is used as the planarizing layer 301, the insulating layer 111 and the gate insulating film 108 do not need to be etched, which is an effective structure. Further, in the case where an SOG film is used as the planarizing layer 301, it is possible to prevent the occurrence of a phenomenon in which the wiring material corrodes due to moisture release from the SOG film (referred to as poisoned via).
[0117]
Note that this embodiment can be combined with the configurations of Embodiments 2 to 11 and 16 to 18 as well as Embodiment 1.
[0118]
[Embodiment 21]
The present embodiment is an example in which the shape of the etched cross section of the drain electrode is different from that of the ninth embodiment. That is, as shown in FIGS. 26A and 26B, the etching cross section has a reverse taper shape. In FIG. 26A, 31 is a drain electrode, and 32 is a power supply wiring of an adjacent pixel. Here, an enlarged view of a region 33 surrounded by a dotted line is shown in FIG.
[0119]
As shown in FIG. 26B, the light generated in the light emitter 122 becomes direct light, reflected light reflected by the cathode 123, and reflected light reflected by the power supply wiring 32, and these are recognized by the observer. Is done. The effect of this embodiment is to increase the light extraction efficiency in this way.
[0120]
Note that this embodiment can be combined not only with the ninth embodiment but also with the configurations of the fourth to sixth, eighth, and tenth embodiments.
[0121]
[Embodiment 22]
The present embodiment is an example in which the configuration of the pixel electrode is different from that of the second embodiment. That is, as shown in FIG. 27A, a stacked electrode of a first metal film (preferably an aluminum film) 41 and a second metal film (preferably a titanium nitride film) 42 is formed as a pixel electrode, and an end portion thereof is formed. A photosensitive organic resin film 121 is provided so as to cover it, and an oxide conductive film (preferably ITO film) 43 is provided thereon. Therefore, the final light emitting region is a portion where the oxide conductive film 43 and the light emitter 122 are in contact with each other.
[0122]
In the structure shown in FIG. 27B, the second metal film 42 in FIG. 27A is provided after the formation of the photosensitive organic resin film 121, and the oxide conductive film 43 and the second metal film 42 are stacked. It is an example. In this case, the final light emitting region is a region where the second metal film 42 and the oxide conductive film 43 are in contact with each other, and almost the entire region in the pixel can be used as the light emitting region.
[0123]
As described above, according to this embodiment, the pixel area can be effectively used, and a display with a high aperture ratio and a bright luminance can be achieved. In addition, since the same luminance as the conventional luminance can be obtained with low power consumption, a highly reliable display device can be obtained.
[0124]
In addition, this embodiment can be combined with the device configuration shown in Embodiments 1 to 3 (configuration before pixel electrode formation), and can also be combined with the configurations of Embodiments 4 to 6. Is possible.
[0125]
[Embodiment 23]
Although the thin film transistors shown in any of Embodiments 1 to 22 each have a top gate structure (specifically, a planar structure), each embodiment (except for Embodiment 6) has a bottom gate structure (specific). In other words, an inverted staggered structure) is also possible. Further, the present invention is not limited to a thin film transistor, and may be applied to a MOS transistor formed using a silicon well.
[0126]
[Embodiment 24]
Each of the display devices described in Embodiments 1 to 22 exemplifies an electroluminescence display device, but the device configuration itself (up to the time of pixel electrode formation) is also common when applied to a liquid crystal display device. Yes, it may be applied to a display device such as a liquid crystal display device or a field emission display device.
[0127]
[Embodiment 25]
In this embodiment mode, an overall structure of an electroluminescent display device to which the present invention can be applied will be described with reference to FIG. FIG. 28 is a top view of an electroluminescence display device formed by sealing an element substrate on which a thin film transistor is formed with a sealing material, and FIG. 28B is a cross-sectional view taken along line BB in FIG. FIG. 28C is a cross-sectional view taken along the line AA ′ of FIG.
[0128]
On the substrate 201, a pixel portion (display portion) 202, a data line driver circuit 203, gate line driver circuits 204a and 204b, and a protection circuit 205 provided so as to surround the pixel portion 202 are arranged so as to surround them. A sealing material 206 is provided. For the structure of the pixel portion 202, Embodiment Modes 1 to 23 and the description thereof may be referred to. Sealing material 207 For example, a glass material, a metal material (typically a stainless steel material), a ceramic material, or a plastic material (including a plastic film) can be used, but only an insulating film is used as described in Embodiments 1 to 24. It is also possible to seal. In addition, a light-transmitting material needs to be used depending on the emission direction of light from the EL element.
[0129]
The sealant 206 may be provided so as to overlap with part of the data line driver circuit 203, the gate line driver circuits 204a and 204b, and the protection circuit 205. A sealing material 207 is provided using the sealing material 206, and a sealed space 208 is formed by the substrate 201, the sealing material 206, and the sealing material 207. The sealing material 207 is provided with a moisture absorbent (barium oxide, calcium oxide, or the like) 209 in the recess in advance, and adsorbs moisture, oxygen, etc. in the sealed space 208 to maintain a clean atmosphere. Plays a role in suppressing deterioration. The concave portion is covered with a fine mesh-shaped cover material 210, and the cover material 210 allows air and moisture to pass therethrough and does not allow the moisture absorbent 209 to pass. Note that the sealed space 208 may be filled with a rare gas such as nitrogen or argon, and may be filled with a resin or a liquid if inactive.
[0130]
An input terminal portion 211 for transmitting signals to the data line driving circuit 203 and the gate line driving circuits 204 a and 204 b is provided on the substrate 201, and an FPC (flexible printed circuit) 212 is connected to the input terminal portion 211. A data signal such as a video signal is transmitted via the. A cross section of the input terminal portion 211 is as shown in FIG. 28B. The input terminal portion 211 is provided on the side of the FPC 212 and the input wiring having a structure in which the oxide conductive film 214 is stacked over the wiring 213 formed simultaneously with the gate wiring or the data wiring. The wiring 215 thus formed is electrically connected using a resin 217 in which a conductor 216 is dispersed. Note that the conductor 216 may be a spherical polymer compound that is plated with gold or silver.
[0131]
FIG. 28D is an enlarged view of a region 218 surrounded by a dotted line in FIG. The protection circuit 205 may be configured by combining the thin film transistor 219 and the capacitor 220, and any known configuration may be used. The present invention is characterized in that it is possible to form a capacitor without increasing the photolithography process at the same time as improving the contact hole. In this embodiment, the capacitor 220 is formed taking advantage of the feature. . Note that the structure of the thin film transistor 219 and the capacitor 220 may be referred to Embodiment Mode 1 and the description thereof.
[0132]
In this embodiment mode, the protection circuit 205 is provided between the input terminal portion 211 and the data line driving circuit 203. When static electricity such as a sudden pulse signal enters between the two, the pulse signal is externally transmitted. Play the role of escape. At that time, a high voltage signal that enters instantaneously is blunted by the capacitor 220, and other high voltages can be released to the outside by a circuit configured using a thin film transistor or a thin film diode. Needless to say, the protection circuit may be provided in another place, for example, between the pixel portion 202 and the data line driver circuit 203 or between the pixel portion 202 and the gate line driver circuits 204a and 204b.
[0133]
As described above, in the present embodiment, an example in which a capacitor used in a protection circuit such as a countermeasure against static electricity provided in an input terminal portion is simultaneously formed in implementing the present invention is shown. It can be implemented in combination with any of the 23 configurations.
[0134]
[Embodiment 26]
As an electronic device using the display device of the present invention as a display unit, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, an audio playback device (car audio, audio component, etc.), a notebook type personal computer, Reproducing a recording medium such as a game machine, a portable information terminal (mobile computer, cellular phone, portable game machine or electronic book), an image reproducing apparatus (specifically, a digital versatile disc (DVD)) provided with a recording medium, And a device provided with a display capable of displaying the image). Specific examples of these electronic devices are shown in FIGS.
[0135]
FIG. 29A illustrates a television which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The present invention can be applied to the display portion 2003. Note that all information display televisions such as a personal computer, a TV broadcast reception, and an advertisement display are included.
[0136]
FIG. 29B illustrates a digital camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The present invention can be applied to the display portion 2102.
[0137]
FIG. 29C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The present invention can be applied to the display portion 2203.
[0138]
FIG. 29D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The present invention can be applied to the display portion 2302.
[0139]
FIG. 29E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. Although the display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information, the present invention can be applied to the display portions A, B 2403, and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.
[0140]
FIG. 29F illustrates a goggle type display (head mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. The present invention can be applied to the display portion 2502.
[0141]
FIG. 29G illustrates a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control reception portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and the like. . The present invention can be applied to the display portion 2602.
[0142]
FIG. 29H illustrates a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. The present invention can be applied to the display portion 2703. Note that the display portion 2703 can suppress current consumption of the mobile phone by displaying white characters on a black background.
[0143]
As described above, the display device obtained by implementing the present invention may be used as a display unit of any electronic device. Note that a display device having any of the structures described in Embodiments 1 to 25 may be used for the electronic device of this embodiment.
[0144]
【The invention's effect】
By using a display device having a device configuration according to the present invention, the influence of plasma damage in the manufacturing process can be reduced, and variation in threshold voltage of transistors can be suppressed, and a display device with uniform display characteristics can be obtained. Can do.
[Brief description of the drawings]
FIG. 1 is a top view, a circuit diagram, and a cross-sectional view illustrating a device configuration of a display device.
FIG. 2 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 3 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 4 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 5 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 6 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 7 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 8 is a cross-sectional view illustrating a device configuration of a display device.
FIGS. 9A and 9B are a top view, a circuit diagram, and a cross-sectional view illustrating a device structure of a display device. FIGS.
FIG. 10 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 11 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 12 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 13 is a cross-sectional view illustrating a device configuration of a display device.
14A and 14B are a top view, a circuit diagram, and a cross-sectional view illustrating a device structure of a display device.
FIG. 15 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 16 is a cross-sectional view illustrating a device configuration of a display device.
FIG 17 is a cross-sectional view illustrating a device structure of a display device.
FIG. 18 is a cross-sectional view illustrating a device configuration of a display device.
19A and 19B are a top view and a circuit diagram illustrating a device structure of a display device.
FIG. 20 is a cross-sectional view illustrating a device configuration of a display device.
FIG. 21 is a cross-sectional view illustrating a device configuration of a display device.
FIG 22 is a cross-sectional view illustrating a device structure of a display device.
FIG. 23 is a cross-sectional view illustrating a device structure of a display device.
FIG. 24 is a transmission electron micrograph showing the structure of a pixel electrode.
FIG 25 is a cross-sectional view illustrating a device structure of a display device.
FIG 26 is a cross-sectional view illustrating a device structure of a display device.
FIG 27 is a cross-sectional view illustrating a device structure of a display device.
28A and 28B are a top view and a cross-sectional view illustrating the appearance of a display device.
FIG 29 illustrates an example of an electronic device.

Claims (21)

In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
A barrier layer above the active layer, a planarization layer on the barrier layer, and a drain electrode on the planarization layer;
The pixel electrode has a portion contacting the upper surface or lower surface of the front Symbol drain electrode,
The drain electrode is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer,
A display device, wherein the first opening is inside the second opening. In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
A planarization layer above the active layer, a barrier layer on the planarization layer, and a drain electrode on the barrier layer;
The pixel electrode has a portion contacting the upper surface or lower surface of the front Symbol drain electrode,
The drain electrode is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer,
The display device, wherein the barrier layer covers an upper surface of the planarizing layer and a side surface of the second opening provided in the planarizing layer. In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
A barrier layer above the active layer, an insulating layer on the barrier layer, a drain electrode on the insulating layer, a planarizing layer on the drain electrode,
The pixel electrode, the provided on the planarization layer, and is electrically connected to the drain electrode through an opening provided in the planarization layer,
The drain electrode is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the insulating layer ,
A display device , wherein the first opening is inside the second opening . In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
An insulating layer above the active layer, a barrier layer on the insulating layer, a drain electrode on the barrier layer, and a planarization layer on the drain electrode;
The pixel electrode, the provided on the planarization layer, and is electrically connected to the drain electrode through an opening provided in the planarization layer,
The drain electrode is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the insulating layer,
The display device, wherein the barrier layer covers an upper surface of the insulating layer and a side surface of the second opening provided in the insulating layer. 3. The display device according to claim 1, wherein a light emitter is provided on the pixel electrode, and a cross section of the drain electrode has a tapered shape. According to claim 3 or claim 4, display upper surface of the planarization layer is characterized by being covered with the silicon nitride film. In any one of claims 1 to 6, wherein the pixel electrode is a display device characterized by comprising the oxide conductive film. In any one of claims 1 to 6, wherein the pixel electrode is a display device which comprises a metal film. In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
A barrier layer above the active layer, a planarizing layer on the barrier layer, and an electrode having a laminated structure on the planarizing layer;
The electrode of the laminated structure has a portion is removed to expose the first metal film portion of both said second metal film a stacked structure of first metal film and the second metal film and including,
The electrode having the stacked structure is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer ,
A display device , wherein the first opening is inside the second opening . In a display device including a transistor provided on a substrate surface and a pixel electrode electrically connected to the transistor,
The transistor has an active layer formed of a semiconductor, a gate insulating film in contact with the active layer, a gate electrode opposed to the active layer through the gate insulating film,
A planarizing layer above the active layer, a barrier layer on the planarizing layer, and an electrode having a laminated structure on the barrier layer;
The electrode of the laminated structure has a portion is removed to expose the first metal film portion of both said second metal film a stacked structure of first metal film and the second metal film and including,
The electrode having the stacked structure is electrically connected to the active layer through a first opening provided in the gate insulating film and the barrier layer and a second opening provided in the planarization layer,
The barrier layer is displayed, characterized in that covers the side surface of the second opening provided on the upper surface and the planarizing layer of the planarization layer device. According to claim 9 or claim 10, comprising a light emitter in contact over the portion where the first metal film is exposed electrodes of the laminated structure, the said light emitter second metal layer is in contact, the second A display device, wherein an angle formed between a surface of the second metal film in contact with the light emitter and an upper surface of the second metal film is an obtuse angle. The display device according to claim 11 , wherein a thickness of the light emitter is smaller than a thickness of the second metal film. In any one of claims 1 to 8, a display device characterized by having a resin film on the pixel electrode. 13. The display device according to claim 9, further comprising a resin film over the electrode having the stacked structure. The display device according to claim 13 , wherein a side surface of the resin film has a curvature . 16. The display device according to claim 13 , wherein the resin film covers the first opening and the second opening. In any one of claims 1 to 16, wherein the barrier layer is a display device which is a silicon nitride film. In any one of claims 1 to 17, wherein the planarization layer, a display device, characterized in that the inorganic insulating film formed by spin coating. In any one of claims 1 to 17, wherein the planarization layer, a display device, characterized in that the inorganic insulating film having a flattened by polishing. An electronic apparatus comprising the display device according to any one of claims 1 to 19 in a display unit. A mobile phone using the display device according to any one of claims 1 to 19 as a display unit.

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