JP2001195016A - Electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic device whose reliability and color reproducibility are high. SOLUTION: This device is provided with a pixel structure in which an FET for switching 201 and an FET for current control 202 are formed on a single crystal semiconductor substrate 11 and an EL(electroluminescent) element 203 is connected electrically to the FET for current control 202. Since the variation of characteristics among pixels of FETs 202 is extremely small, a picture having high color reproducibilty can be obtained in this device. Moreover, the electronic device whose reliability is high is obtained by applying a hot carrier measure to the FET 202.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device having an element in which a light-emitting material is interposed between electrodes, and an electric appliance using the electronic device for a display unit (display or monitor). In particular, EL (Electro Luminescence)
The present invention relates to an electronic device using a light-emitting material (hereinafter, referred to as an EL material) which can be obtained.

[0002] EL materials that can be used in the present invention include all luminescent materials that emit light (phosphorescence and / or fluorescence) via singlet excitation or triplet excitation or both.

[0003]

2. Description of the Related Art In recent years, an electronic device (hereinafter, referred to as an EL display device) using a light-emitting element (hereinafter, referred to as an EL element) utilizing the EL phenomenon of a light-emitting material has been developed. E
Since the L display device is a display device using a light emitting element, it does not require a backlight such as a liquid crystal display and has a wide viewing angle, and thus has attracted attention as a display portion of a portable device used outdoors.

There are two types of EL display devices, a passive type (simple matrix type) and an active type (active matrix type), both of which are being actively developed. In particular, an active matrix type EL display device has attracted attention at present. In addition, the EL material serving as the light emitting layer that emits EL includes an organic EL material and an inorganic EL material.
The L material is classified into a low molecular (monomer) organic EL material and a high molecular (polymer) organic EL material. In particular, polymer-based organic EL materials that are easier to handle and have higher heat resistance than low-molecular-weight organic EL materials have attracted attention. Light emitting devices using organic EL materials have been
(Organic Light Emitting Diodes).

An active matrix EL display device is
A feature is that a field effect transistor (hereinafter, referred to as FET) is provided for each pixel forming a pixel portion, and the amount of current flowing through the EL element is controlled by the FET. However, FET
If the electric characteristics of the pixels vary from pixel to pixel, the emission characteristics of the EL elements provided in each pixel also vary.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide an electronic device in which the luminous characteristics of EL elements are less varied between pixels and have high color reproducibility. And Another object is to provide a highly reliable electronic device. Another object is to provide an electric appliance using the electronic device as a display portion.

Another object of the present invention is to provide a process for reducing the manufacturing cost of the electronic device having high color reproducibility.

[0008]

According to the present invention, a single-crystal semiconductor substrate is used as a substrate and an FET formed on the single-crystal semiconductor substrate is used so that variations in the electrical characteristics of the FET between pixels are minimized. To form an electronic device. In addition, since a single crystal semiconductor substrate having a thickness enough to form an FET does not transmit light, an EL element is formed so that a cathode is directly connected to the FET.

Furthermore, a plurality of FETs are formed in one pixel, and the structure is optimized according to the role of each FET, thereby obtaining a highly reliable electronic device. Specifically, n is used as a switching element and a current control element.
A feature is that a channel type FET is used and the arrangement of the LDD regions is different between the two.

Further, in the present invention, the manufacturing cost of the electronic device is reduced, that is, the cost of the electronic device is reduced by using a process of forming a plurality of electronic devices from a large substrate. At that time, the process is characterized in that a process capable of diverting the existing liquid crystal line is used, and the capital investment is minimized, thereby significantly reducing the manufacturing cost.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view of a pixel portion of an EL display device according to the present invention, and FIG.
FIG. 2B is a top view, and FIG. 2B is a circuit configuration thereof. Actually, a plurality of pixels are arranged in a matrix to form a pixel portion (image display portion). 1 and 2 are denoted by the same reference numerals, so it is better to refer to both drawings as appropriate. Although two pixels are shown in the top view of FIG. 2, both have the same structure.

In FIG. 1, reference numeral 11 denotes a single crystal semiconductor substrate;
Reference numeral 12 denotes an insulating film for separating the elements (hereinafter, referred to as a field insulating film). The substrate 11 may be a single crystal silicon substrate or a single crystal silicon germanium substrate, and may be a P-type substrate or an N-type substrate.

Here, two FETs are formed in a pixel. 201 is an FE functioning as a switching element
T (hereinafter referred to as switching FET), 202 is E
The FET functions as a current control element that controls the amount of current flowing to the L element (hereinafter, referred to as a current control FET), and both are formed of n-channel FETs.

An n-channel FET is advantageous in that it can be formed with a smaller area than a p-channel FET when the same amount of current flows. In a pixel portion of a high-definition EL display device, since the size of one pixel is extremely small, about tens of μm square, the use of an n-channel FET can provide a design margin.

Also, p-channel FETs have the advantage that hot carrier injection hardly causes a problem and the off-current value is low. Examples of using them as switching FETs and current control FETs have already been reported. I have. However, in the present invention, the problem of hot carrier injection is solved even in an n-channel FET by arranging the LDD regions, and all the FETs in all the pixels can be made n-channel FETs.

However, in the present invention, it is not necessary to limit the switching FET and the current control FET to n-channel FETs, and it is also possible to use p-channel FETs for both or any one of them.

The switching FET 201 includes a source region 13, a drain region 14, LDD regions 15a to 15f,
High concentration impurity regions 16a and 16b and channel formation region 1
7a to 17c, gate insulating film 18, gate electrodes 19a to 1
9c, a first interlayer insulating film 20, a source wiring 21 and a drain wiring 22. The source region 13, the drain region 14, the LDD regions 15a to 15f, and the high-concentration impurity regions 16a and 16b are formed by adding an element belonging to Group 15 of the periodic table to the single crystal semiconductor substrate 11.

Further, as shown in FIG.
Reference numerals a to 19c denote a part of the gate wiring 211, and a portion where the gate wiring 211 overlaps a channel formation region of the FET is particularly called a gate electrode. Here, a double-gate FET having two channel formation regions is formed.
Of course, not only a double gate structure but also a so-called multi-gate structure (a structure having two or more channel forming regions connected in series) such as a triple gate structure may be used.

The multi-gate structure is extremely effective in reducing the off-current value. In the present invention, a switching element having a low off-current value is realized by using the switching FET 201 of the pixel with a multi-gate structure. Further, in the switching FET 201, the LDD regions 15a to 15f are provided so as not to overlap the gate electrodes 19a to 19c with the gate insulating film 18 interposed therebetween. Such a structure is very effective in reducing the off-current value.

It is more preferable to provide an offset region (a region having the same composition as that of the channel formation region and to which a gate voltage is not applied) between the channel formation region and the LDD region in order to reduce the off-current value. In the case of a multi-gate structure including two or more gate electrodes, a high-concentration impurity region provided between channel formation regions is effective in reducing an off-current value.

When the FET having the multi-gate structure is used as the switching FET 201 of the pixel, the off-current value can be sufficiently reduced. That is, a low off-current value means that the voltage applied to the gate of the current control FET can be held for a longer time, and a capacitor for holding the potential as shown in FIG. 2 of JP-A-10-189252 is used. There is an advantage that the gate voltage of the current control FET can be maintained until the next writing period even if the gate voltage is reduced or omitted.

Next, the current controlling FET 202 comprises a source region 31, a drain region 32, an LDD region 33 and a channel forming region 34, a gate insulating film 18, and a gate electrode 3.
5, the first interlayer insulating film 20, the source wiring 36 and the drain wiring 37 are formed. The gate electrode 35 has a single gate structure, but may have a multi-gate structure.

The drain of the switching FET 201 is connected to the gate of the current control FET 202. Specifically, the gate electrode 35 of the current control FET 202 is electrically connected to the drain region 14 of the switching FET 201 via the drain wiring 22. The source wiring 36 is a current supply line (also referred to as a power supply line) 21.
2 (see FIG. 2A).

The current control FET 202 is an EL element 203
Is an element for controlling the amount of current injected into the
Considering the deterioration of the L element, it is not preferable to flow too much current. Therefore, it is preferable to design the channel length (L) to be long so that an excessive current does not flow through the current control FET 202. Desirably, it is 0.5 to 2 μA (preferably 1 to 1.5 μA) per pixel.

Based on the above, as shown in FIG. 6, the channel length of the switching FET is set to L1 (where L1
1 = L1a + L1b + L1c), the channel width is W1,
The channel length of the current control FET is L2 and the channel width is W
2, W1 is 0.1 to 5 μm (typically 0.5 μm).
２2 μm) and W2 is 0.5 to 10 μm (typically 2 to 5 μm).
μm). L1 is 0.2 to 18
μm (typically 2 to 15 μm), L2 is 1 to 50 μm
(Typically 10 to 30 μm). However, the present invention is not limited to the above numerical values.

The length (width) of the LDD region formed in the switching FET 201 is 0.5 to 3.5 μm.
Typically, the thickness may be 2.0 to 2.5 μm.

In the EL display device shown in FIG. 1, an LDD region 33 is provided between a drain region 31 and a channel forming region 34 in a current control FET 202.
Further, it is characterized in that the LDD region 33 overlaps the gate electrode 35 with the gate insulating film 18 interposed therebetween.

The current control FET 202 is connected to the EL element 20
In order to supply a current for causing the light emitting device 3 to emit light, it is preferable to take measures against deterioration due to hot carrier injection as shown in FIG. The arrangement of the LDD region 33 in FIG. 1 is a structure as a measure against deterioration due to hot carrier injection. Note that it is also effective to make the LDD region overlap a part of the gate electrode in order to suppress the off current value. In this case, a region overlapping the gate electrode suppresses hot carrier injection, and a region not overlapping the gate electrode prevents an off-current value. Since the current control FET 202 always flows in the same direction in which carriers (here, electrons) flow, providing the LDD region 33 only on the drain region 31 side is sufficient as a measure against hot carriers.

At this time, the length of the LDD region overlapping the gate electrode is 0.1 to 3 μm (preferably 0.3 to 1.5 μm).
m). LD that does not overlap with the gate electrode
When the D region is provided, its length is 1.0 to 3.5 μm.
(Preferably 1.5 to 2.0 μm).

Also, a parasitic capacitance (also referred to as a gate capacitance) formed between the gate electrode and the active layer overlapping the gate electrode with the gate insulating film interposed therebetween is used to positively hold a potential (charge holding). It can also be used as a capacitor.

In this embodiment, the LDD region 33 shown in FIG.
Forming the gate electrode 35 and the active layer (in particular, LDD).
The gate capacitance between the gate electrode and the region 33) is increased, and the gate capacitance is used as a capacitor for holding a potential as shown in FIG. 2 of JP-A-10-189252. Of course,
Although a separate capacitor may be formed, the structure as in this embodiment eliminates the need for a capacitor for holding the potential.

In particular, when the EL display device of the present invention is operated by a digital driving method, the capacitor for holding the potential needs to be very small. For example, the capacity can be reduced to about 1/5 and further about 1/10 as compared with the analog driving method. The specific numerical value cannot be unconditionally shown because it depends on the performance of the switching FET and the current control FET. However, a value of 5 to 30 fF (femtofarad) is sufficient.

Further, as shown in FIG.
If the structure of T is a multi-gate structure having a small off-current value, the capacitance required for the capacitor for holding the potential is further reduced.

In this embodiment, the current control FET 20
2 has a single gate structure, but a plurality of FEs are shown.
A multi-gate structure in which T is connected in series may be used. Further, a structure may be employed in which a plurality of FETs are connected in parallel to substantially divide the channel forming region into a plurality of portions so that heat can be radiated with high efficiency. Such a structure is effective as a measure against deterioration due to heat.

Next, reference numeral 38 denotes a first passivation film having a thickness of 10 nm to 1 μm (preferably 200 to 50 μm).
0 nm). As a material, an insulating film containing silicon (in particular, a silicon nitride oxide film or a silicon nitride film is preferable) can be used. Also, the first passivation film 3
It is effective to give the heat dissipation effect to 8.

A second interlayer insulating film (flattening film) 39 is formed on the first passivation film 38 to flatten a step formed by the FET. As the second interlayer insulating film 39, an organic resin film is preferable, and polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like is preferably used. Of course, if sufficient planarization is possible, an inorganic film may be used.

It is very important to flatten the step caused by the FET with the second interlayer insulating film 39. Since an EL layer formed later is extremely thin, poor light emission may be caused by the presence of a step. Therefore, it is desirable that the EL layer be flattened before forming the pixel electrode so that the EL layer can be formed as flat as possible.

Reference numeral 40 denotes a pixel electrode (cathode of an EL element) made of a conductive film having high reflectivity and a small work function;
After making a contact hole (opening) in the second interlayer insulating film 39 and the first passivation film 38, the drain wiring 37 of the current control FET 202 is formed in the formed opening.
It is formed so that it may be connected to. It is preferable to use a low-resistance conductive film such as an aluminum alloy or a copper alloy as the pixel electrode 40. Of course, a stacked structure with another conductive film may be employed.

Next, an insulating film 41 is formed so as to cover an end (corner) of the pixel electrode 40. This is because if an organic EL material such as a light emitting layer is formed at the end of the pixel electrode 40, it may be intensively deteriorated due to electric field concentration. The insulating film 41 is provided so as to fill a gap between pixels (between pixel electrodes).

Next, an EL material is formed as the light emitting layer 42. Either an inorganic EL material or an organic EL material may be used as the EL material, but an organic EL material having a low driving voltage is preferable. As the organic EL material, a low molecular (monomer) organic EL material or a high molecular (polymer) organic EL material is used.
Either of the organic EL materials may be used.

As the monomer organic EL material, Alq ₃ (tris-8-quinolilite-aluminum) and DSA (distyrylarylene derivative) are typically known, but any known material may be used. .

As the polymer organic EL material,
Examples thereof include polyparaphenylene vinylene (PPV), polyvinyl carbazole (PVK), and polyfluorene. Of course, any known material may be used.
Specifically, cyanopolyphenylenevinylene may be used for the red light emitting layer, polyphenylenevinylene may be used for the green light emitting layer, and polyphenylenevinylene or polyalkylphenylene may be used for the blue light emitting layer. The film thickness is 30 to 150 nm (preferably 40 to 10 nm).
0 nm).

Also, a fluorescent substance (typically,
Coumarin 6, rubrene, Nile Red, DCM, quinacridone, etc.) can be added to transfer the luminescent center to the fluorescent substance to obtain the desired luminescence. Any known fluorescent substance may be used.

When a monomer organic EL material is used for the light emitting layer 42, the light emitting layer 42 may be formed by a vacuum evaporation method. When a polymer organic EL material is used, a spin coating method, a printing method, an inkjet method, or a dispensing method may be used. However, when forming a film of the polymer organic EL material, it is desirable to set the processing atmosphere to a dry inert atmosphere with as little moisture as possible. In the case of the present embodiment, the polymer organic EL material is formed by spin coating.

Although a polymer organic EL material is formed under normal pressure, the organic EL material is easily deteriorated by the presence of moisture or oxygen. Therefore, it is necessary to eliminate such factors as much as possible when forming the organic EL material. There is. For example, a dry nitrogen atmosphere, a dry argon atmosphere, or the like is preferable. For this purpose, it is desirable that the light emitting layer forming apparatus is installed in a clean booth filled with an inert gas and the light emitting layer is formed in that atmosphere.

After forming the light emitting layer 42 as described above, the hole injection layer 43 is formed next. Hole injection layer 43
As TPD (triphenylamine derivative), Cu
Monomer organic materials such as Pc (copper phthalocyanine), m-MTDATA (starburst amine) or PE
DOT (polythiophene), PAni (polyaniline)
And the like. Of course, an inorganic material may be used. The film thickness is 3 to 20 nm (preferably 5 to 1 nm).
5 nm).

However, the above example is an example of an organic material that can be used as the light emitting layer or the hole injection layer of the present invention, and it is not necessary to limit to this. Although the combination of the light emitting layer and the hole injection layer is shown here, a hole transport layer, an electron injection layer, an electron transport layer, a hole blocking layer, or an electron blocking layer may be combined.

An anode 44 made of a transparent conductive film is provided on the hole injection layer 43. In the case of the present embodiment, the light emitting layer 43
The anode must be translucent (transparent) because the light generated in step (1) is emitted in a direction away from the FET. As the transparent conductive film, a compound of indium oxide and tin oxide or a compound of indium oxide and zinc oxide can be used; however, it is possible to form after forming a light-emitting layer or a hole-injecting layer with low heat resistance. A material that can form a film at a temperature as low as possible is preferable.

When the anode 44 is formed, the EL element 2
03 is completed. Note that the EL element 203 here is
It refers to a capacitor formed by the pixel electrode (cathode) 40, the light emitting layer 42, the hole injection layer 43, and the anode 44. As shown in FIG. 2, since the pixel electrode 40 substantially matches the area of the pixel,
The whole pixel functions as an EL element. Therefore, the efficiency of light emission is extremely high, and a bright image can be displayed.

Incidentally, in the present embodiment, a second passivation film 45 is further provided on the anode 44. As the second passivation film 45, a silicon nitride film or a silicon nitride oxide film is preferable. The purpose of this is to shut off the EL element from the outside, and has both the meaning of preventing the organic EL material from being deteriorated due to oxidation and the effect of suppressing outgassing from the organic EL material. Thereby, the reliability of the EL display device is improved.

Further, the EL display device of the present invention has a pixel portion composed of pixels having a structure as shown in FIG. 1, and FETs having different structures are arranged according to the role in the pixel. Switching FET with sufficiently low off-current value
In addition, a current control FET resistant to hot carrier injection can be formed in the same pixel, and an EL display device having high reliability and capable of displaying a good image (high operating performance) can be obtained.

In addition, since all conventionally known IC and LSI technologies can be used for manufacturing FETs, it is possible to manufacture FETs with very little variation in electrical characteristics. Accordingly, it is possible to manufacture an EL display device in which variation in light emission characteristics of the EL element between pixels is small and color reproducibility is high.

Embodiment 1 FIG. 3 shows an embodiment of the present invention.
This will be described with reference to FIG. Here, a method for simultaneously manufacturing FETs of a pixel portion and a driving circuit portion provided therearound is described. However, for the sake of simplicity, a CMOS circuit, which is a basic unit for the drive circuit, is illustrated.

First, as shown in FIG. 3A, a field insulating film 302 made of silicon oxide is formed on a P-type single crystal silicon substrate 300 by a known LOCOS method (selective oxidation method).
To form Then, an n-type impurity element (hereinafter, referred to as an n-type impurity element) is added, and the n-well 302 is added.
To form Note that an element belonging to Group 15 of the periodic table, typically, phosphorus or arsenic may be used as the n-type impurity element.

Next, as shown in FIG. 3B, a protective film 303 made of a silicon oxide film is formed to a thickness of 130 nm. This thickness is between 100 and 200 nm (preferably 130
１７０170 nm). Further, any other insulating film containing silicon may be used. This protective film 303
Is provided to prevent the single crystal silicon film from being exposed to plasma when adding an impurity and to enable fine concentration control.

Then, a resist mask 304a is formed thereon.
To 304 c, and an n-type impurity element is added via the protective film 303. In this embodiment, the phosphine (P
Phosphorus is added at a concentration of 1 × 10 ¹⁸ atoms / cm ³ using a plasma doping method in which H ₃ ) is not plasma-excited without mass separation. Of course, an ion implantation method for performing mass separation may be used.

In the n-type impurity regions 305 and 306 formed in this step, the n-type impurity element contains 2 × 10 ^{16 to} 5 × 10 ^16.
× 10 ¹⁹ atoms / cm ³ (typically 5 × 10 ^{17 to} 5 × 10
^The dose is adjusted so as to be contained at a concentration of ¹⁸ atoms / cm ³ ).

Next, as shown in FIG. 3C, the resist masks 304a to 304c and the protective film 303 are removed, and a thermal oxidation process is performed to form a gate insulating film 307. At this time, activation of the added n-type impurity element is performed at the same time. The oxidation time and oxidation temperature may be adjusted so that the thermal oxide film has a thickness of 30 to 80 nm (preferably 40 to 60 nm).

By this step, n-type impurity regions 305, 3
A boundary portion (junction portion) between the end portion 06 and the region around the n-type impurity regions 305 and 306 to which the n-type impurity element is not added becomes clear. This will later become FE
When T is completed, it means that the LDD region and the channel forming region can form a very good junction.

Next, as shown in FIG.
A conductive film having a thickness of 400 nm is formed and patterned to form gate electrodes 308 to 312. The gate electrode may be formed of a single-layer conductive film, but is preferably a stacked film of two or three layers as necessary. As a material for the gate electrode, any known conductive film can be used. However, fine processing is possible, specifically 2μm
Materials that can be patterned to the following line widths are preferred.

Typically, tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W),
A film made of an element selected from chromium (Cr) and silicon (Si), a nitride film of the above element (typically, a tantalum nitride film, a tungsten nitride film, a titanium nitride film), or an alloy combining the above elements Membrane (typically Mo-W
Alloy, a Mo—Ta alloy), or a silicide film of the above element (typically, a tungsten silicide film or a titanium silicide film) can be used. Of course, they may be used as a single layer or stacked.

In this embodiment, a 30 nm thick tungsten nitride (WN) film and a 370 nm thick tungsten (W)
A laminated film composed of a film is used. This may be formed by a sputtering method. When an inert gas such as Xe or Ne is added as a sputtering gas, the film can be prevented from peeling due to stress.

At this time, the gate electrodes 309 and 312 are formed so as to overlap a part of the n-type impurity regions 305 and 306 with the gate insulating film 311 interposed therebetween. This overlapped portion is an LDD for suppressing hot carrier injection.
Area.

Next, as shown in FIG. 4A, an n-type impurity element (phosphorus in this embodiment) is added in a self-aligned manner using the gate electrodes 308 to 312 as a mask. The n-type impurity regions 3 are formed in the impurity regions 313 to 319 thus formed.
1/2, 1/10 of 05, 306 (typically 1/3 to
Adjust so that phosphorus is added at a concentration of 1/4). Specifically, a concentration of 1 × 10 ^{16 to} 5 × 10 ¹⁸ atoms / cm ³ (typically, 3 × 10 ^{17 to} 3 × 10 ¹⁸ atoms / cm ³ ) is preferable.

Next, as shown in FIG. 4B, resist masks 320a to 320c are formed, and an n-type impurity element (phosphorus in this embodiment) is added to thereby form impurity regions 321 to 321 containing phosphorus at a high concentration. 327 are formed. Also here, the ion doping method using phosphine (PH ₃ ) is performed, and the phosphorus concentration in this region is 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ (typically 2 × 10 ^{20 to} 5 × 10 ^20). atoms / cm ³ ).

In this step, the source region or the drain region of the n-channel FET is formed. In the switching FET, a part of the n-type impurity regions 316 to 318 formed in the step of FIG. This remaining region corresponds to the LDD regions 15a to 15f of the switching FET in FIG.

Next, as shown in FIG. 4C, the resist masks 320a to 320c are removed, and a new resist mask 328 is formed. Then, a p-type impurity element (boron in this embodiment) is added to form impurity regions 329 and 330 containing boron at a high concentration. Here, diborane (B
3 × 10 ²⁰ to 3 × by ion doping using ₂ H ₆ )
10 ²¹ atoms / cm ³ (typically 5 × 10 ²⁰ to 1 × 10 ²¹ a
Add boron to a concentration of toms / cm ³ ).

It should be noted that phosphorus is already added to the impurity regions 329 and 330 at a concentration of 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ³ , and the boron added here is at least three times as large as that. It is added at a concentration. Therefore, the n-type impurity region formed in advance is completely inverted to P-type and functions as a P-type impurity region.

Next, after removing the resist mask 328, the n-type or p-type impurity element added at each concentration is activated. As the activation means, a furnace annealing method, a laser annealing method, or a lamp annealing method can be used. In this embodiment, heat treatment is performed at 800 ° C. for one hour in a nitrogen atmosphere in an electric furnace.

Before the activation, the gate electrode 3
08 to 312 as a mask, the gate insulating film 307 is removed in a self-aligned manner, and a well-known salicide process is performed.
May be formed in the source region and the drain region. At this time, the heat treatment step for forming the silicide layer may be combined with the activation.

Next, as shown in FIG. 4D, a first interlayer insulating film 331 is formed. As the first interlayer insulating film 331, an insulating film containing silicon may be used as a single layer or a laminated film in which the insulating films are combined. The film thickness is 40
The thickness may be 0 nm to 1.5 μm. In this embodiment, 20
A structure in which an 800-nm-thick silicon oxide film is stacked over a 0-nm-thick silicon nitride oxide film.

Further, in an atmosphere containing 3 to 100% hydrogen, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours to perform a hydrogenation treatment. This step is a step of terminating dangling bonds of semiconductors with thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

The hydrogenation process is performed in the first interlayer insulating film 331.
May be inserted during formation. That is, after a 200-nm-thick silicon nitride oxide film is formed, the hydrogenation treatment is performed as described above, and then, the remaining 800-nm-thick silicon oxide film may be formed.

Next, a contact hole is formed in the first interlayer insulating film 331, and source wirings 332 to 335 are formed.
Drain wirings 336 to 338 are formed. In this embodiment, this electrode is a laminated film having a three-layer structure in which a Ti film is continuously formed by sputtering, a 100 nm thick Ti film, a 300 nm thick aluminum film containing Ti, and a 150 nm thick Ti film. Of course, other conductive films may be used.

Next, 50 to 500 nm (typically 20 to 500 nm)
The first passivation film 33 with a thickness of
9 is formed. In this embodiment, the first passivation film 3
As 39, a 300-nm-thick silicon nitride oxide film is used. This may be replaced by a silicon nitride film. Note that it is effective to perform plasma treatment using a gas containing hydrogen such as H ₂ or NH ₃ before forming the silicon nitride oxide film. Hydrogen excited by this pretreatment is supplied to the first interlayer insulating film 331 and is subjected to a heat treatment, whereby the quality of the first passivation film 339 is improved. At the same time,
Since the hydrogen added to the first interlayer insulating film 331 diffuses to the lower layer side, the active layer can be effectively hydrogenated.

Next, as shown in FIG. 5A, a second interlayer insulating film 340 made of an organic resin is formed. As the organic resin, polyimide, polyamide, acrylic, BCB (benzocyclobutene), or the like can be used. In particular, since the second interlayer insulating film 340 has a strong meaning of flattening, acrylic having excellent flatness is preferable. In this embodiment, the FET
The acrylic film is formed to a thickness that can sufficiently flatten the step formed by the above. The thickness is preferably 1 to 5 μm (more preferably 2 to 4 μm).

Next, a contact hole reaching the drain wiring 338 is formed in the second interlayer insulating film 340 and the first passivation film 339, and a pixel electrode 341 is formed.
In this embodiment, a 300 nm-thick aluminum alloy film (an aluminum film containing 1 wt% titanium) is formed as the pixel electrode 341.

Next, as shown in FIG.
Form 2 The insulating film 342 may be formed by patterning an insulating film containing silicon or an organic resin film having a thickness of 100 to 300 nm. The insulating film 342 is formed so as to fill a space between pixels (between pixel electrodes). The insulating film 342 is provided so that an organic EL material such as a light-emitting layer to be formed next does not cover an end portion of the pixel electrode 341.

Next, the light emitting layer 343 is formed by spin coating. Specifically, an organic EL to be a light emitting layer 343
The material is applied by dissolving it in a solvent such as chloroform, dichloromethane, xylene, toluene, tetrahydrofuran and the like, followed by heat treatment to evaporate the solvent. Thus, a film (light emitting layer) made of the organic EL material is formed. In this embodiment, polyphenylene vinylene is formed to a thickness of 50 nm as a light emitting layer that emits green light. In addition, 1,2-dichloromethane was used as a solvent, and 80
A heat treatment is performed for 1 minute on a hot plate at 150 ° C. to volatilize.

Next, a hole injection layer 344 is formed to a thickness of 20 nm. In this embodiment, as the hole injection layer 344, polythiophene (PEDOT) is applied as an aqueous solution by spin coating, and heat treatment is performed on a hot plate at 100 to 150 ° C. for 1 to 5 minutes to evaporate water. In this case, since polyphenylene vinylene is not soluble in water, the hole injection layer 344 can be formed without dissolving the light-emitting layer 343.

It is also possible to use another polymer organic material or monomer organic material for the hole injection layer 344. When a monomer-based organic material is used, it may be formed by an evaporation method. Further, an inorganic material can be used.

In this embodiment, the light emitting layer and the hole injection layer have a two-layer structure. In addition, a hole transport layer, an electron injection layer,
An electron transport layer or the like may be provided. Various examples of such combinations have already been reported, and any of these configurations may be used.

After forming the light emitting layer 343 and the hole injection layer 344, an anode 345 made of a transparent conductive film is formed to a thickness of 120 nm. In this embodiment, 10 to 10 indium oxide is used.
A transparent conductive film to which 20 wt% of zinc oxide is added is used.
It is preferable that the film be formed by a vapor deposition method at room temperature so as not to deteriorate the light emitting layer 343 and the hole injection layer 344.

After forming the anode 345, plasma CVD
A second passivation film 346 made of a silicon nitride oxide film is formed to a thickness of 300 nm by a method. At this time, it is necessary to pay attention to the film formation temperature. In order to lower the deposition temperature, a remote plasma CVD method is preferably used.

Thus, an active matrix substrate having a structure as shown in FIG. 5B is completed. The insulating film 34
It is effective to continuously process the steps from the formation of No. 2 to the formation of the passivation film 346 by using a multi-chamber type (or in-line type) thin film forming apparatus without opening to the atmosphere.

By the way, the active matrix substrate of this embodiment exhibits extremely high reliability by arranging the FET having the optimum structure not only in the pixel portion but also in the drive circuit portion, and the operating characteristics can be improved.

First, an FET having a structure in which hot carrier injection is reduced so as not to reduce the operation speed as much as possible,
N-channel type FE of a CMOS circuit forming a drive circuit section
Used as T205. Note that the driving circuit here includes a shift register, a buffer, a level shifter, a latch, a sampling circuit (a sample and hold circuit),
A D / A converter and the like are included.

In the case of the present embodiment, as shown in FIG. 5B, the n-channel type FET 205 has a source region 355,
The semiconductor device includes a drain region 356, an LDD region 357, and a channel formation region 358. The LDD region 357 overlaps with the gate electrode 309 with the gate insulating film 307 interposed therebetween. This structure is the same as that of the current control FET 202.

The reason why the LDD region is formed only on the drain region side is to avoid lowering the operation speed.
In addition, the n-channel FET 205 does not need to care much about the off-current value, and it is better to emphasize the operation speed. Therefore, it is desirable that the LDD region 357 be completely overlapped with the gate electrode and the resistance component be reduced as much as possible.

Also, a p-channel type FET of a CMOS circuit
206 includes a source region 329, a drain region 330, and a channel formation region 359. In this case, since the deterioration due to the hot carrier injection is hardly noticeable, the LD
The D region does not have to be provided, but can be provided.

Note that when actually completed up to FIG. 5B, a protective film (laminate film, ultraviolet curable resin film, etc.) with high airtightness and low degassing so as not to be further exposed to the outside air, It is preferable to package (enclose) with a sealing material. At this time, if the inside of the sealing material is filled with an inert gas, an inert solid or an inert liquid, or a hygroscopic material (for example, barium oxide) is arranged inside, the reliability of the EL element is improved.

When the airtightness is improved by processing such as packaging, a connector (flexible printed circuit: FPC) for connecting a terminal routed from an element or a circuit formed on the substrate to an external signal terminal. To complete an electronic device using the EL element. Note that the electronic device in this specification includes a connector for inputting a signal from the outside and an integrated circuit connected to the connector.

FIG. 7 shows an example of a circuit configuration of the EL display device of this embodiment. Note that this embodiment shows a circuit configuration for performing digital driving. In this embodiment, the source side driver circuit 701, the pixel portion 708, and the gate side driver circuit 709
have. Note that in this specification, a drive circuit portion is a general term including a source-side drive circuit and a gate-side drive circuit.

In this embodiment, a multi-gate n-channel FET is used as a switching FET in the pixel portion 708.
The switching FET is disposed at the intersection of a gate line connected to the gate side drive circuit 709 and a source line connected to the source side drive circuit 701. The drain of the switching FET is electrically connected to the gate of the current control FET.

The source driver circuit 701 includes a shift register 702, a buffer 703, a latch (A) 704, a buffer 705, a latch (B) 706, and a buffer 707. In the case of analog drive, latch (A),
A sampling circuit (sample and hold circuit) may be provided instead of (B). Also, the gate side drive circuit 7
09 is provided with a shift register 710 and a buffer 711.

Although not shown, a gate-side drive circuit may be further provided on the side opposite to the gate-side drive circuit 709 with the pixel portion 708 interposed therebetween. In this case, both have the same structure and share a gate line, and a structure is adopted in which, even if one of them is broken, a gate signal is sent from the remaining one to operate the pixel portion normally.

The above configuration can be easily realized by fabricating the FET according to the fabrication steps shown in FIGS. In this embodiment, only the configuration of the pixel portion and the driving circuit portion is shown. However, according to the manufacturing process of this embodiment, other logic such as a signal division circuit, a D / A converter, an operational amplifier, and a γ correction circuit are also provided. It is considered that a circuit can be formed over the same substrate and a memory, a microprocessor, and the like can be formed.

FIG. 8 shows the EL display device of this embodiment after the steps up to the encapsulation step for protecting the EL element.
This will be described using (A) and (B). It should be noted that the reference numerals used in FIG.

FIG. 8A is a top view showing a state in which the steps up to enclosing the EL element have been performed. 701 shown by a dotted line is a source side driver circuit, 708 is a pixel portion, and 709 is a gate side driver circuit. 801 is a cover material, and 802 is a first material.
A sealing material 803 is a second sealing material, and a filler (not shown) is provided between the inner cover material 801 surrounded by the first sealing material 802 and the active matrix substrate.

Reference numeral 804 denotes a connection line for transmitting signals input to the source side drive circuit 701 and the gate side drive circuit 709, and an FPC 80 serving as an external input terminal.
5 receives a video signal and a clock signal.

Here, FIG. 8B is a cross-sectional view corresponding to a cross section taken along line AA ′ of FIG. FIG.
(A) and (B) use the same reference numerals for the same parts.

As shown in FIG. 8B, a pixel portion 708 and a gate side driving circuit 70 are provided on a single crystal silicon substrate 806.
9 is formed, and the pixel portion 708 is a current control FET.
202 and the pixel electrode 3 electrically connected to its drain
It is formed by a plurality of pixels including 41. The gate driver circuit 709 is a CMOS in which the n-channel FET 205 and the p-channel FET 206 are complementarily combined.
It is formed using a circuit.

The pixel electrode 341 functions as a cathode of the EL element. Further, an insulating film 342 is provided on both ends of the pixel electrode 341.
Is formed, and a light emitting layer 343 and a hole injection layer 344 are further formed. Further, an anode 345 of the EL element is provided thereon.
A second passivation film 346 is formed.

In the case of this embodiment, the anode 345 also functions as a common wiring for all pixels, and
It is electrically connected to the PC 805. Further, the elements included in the pixel portion 708 and the gate driver circuit 709 are all covered with the second passivation film 346. Although the second passivation film 346 can be omitted, it is preferable to provide the second passivation film 346 in order to block each element from the outside.

Next, the first sealing material 802 is formed with a dispenser or the like, and spacers (not shown) are scattered and the cover material 801 is bonded. The spacers are scattered to secure a distance between the active matrix substrate and the cover member 801. Then, a filler 807 is filled in the first sealant 802 by a vacuum injection method or the like. In the above process, the technology used in the cell assembly process of the liquid crystal display can be used as it is. The first sealing material 80
As 2, it is preferable to use a photocurable resin.
As long as the heat resistance of the L layer permits, a thermosetting resin may be used. Further, it is desirable that the first sealant 802 be a material that does not transmit moisture and oxygen as much as possible. Further, a desiccant may be added inside the first sealant 802.

The filler 807 provided so as to cover the EL element also functions as an adhesive for bonding the cover 801. As the filler 807, polyimide, acrylic, PVC (polyvinyl chloride), epoxy resin, silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used.

It is preferable to provide a desiccant (not shown) inside the filler 807 since the moisture absorbing effect can be maintained. At this time, the desiccant may be added to the filler, or may be enclosed in the filler. It is also effective to use a hygroscopic material for the spacer (not shown). However, in the case of this embodiment, since light is emitted to the side where the filler 807 is provided, it is necessary to use a translucent filler.

In this embodiment, as the cover member 801, a glass plate, a quartz plate, a plastic plate, FRP (Fibe
(Rglass-Reinforced Plastics) plate, PVF (polyvinyl fluoride) film, mylar film, polyester film or acrylic film can be used. In the case of this embodiment, the cover member 801 must be translucent as well as the filler.

Next, using the filler 807, the cover material 80 is formed.
1 after bonding, the side surface (exposed surface) of the first sealing material 802
The second sealing material 803 is provided so as to cover. The same material as the first sealant 802 can be used for the second sealant 803.

By encapsulating the EL element in the filler 807 using the above-described method, the EL element can be completely shut off from the outside, and the EL element such as moisture or oxygen can be blocked from the outside.
Invasion of a substance which promotes deterioration of the layer due to oxidation can be prevented. Therefore, a highly reliable EL display device can be manufactured.

[Embodiment 2] In this embodiment, FIG. 9 shows an example in which a pixel having a structure different from that of the circuit diagram shown in FIG. 2B is used. In this embodiment, 901 is a source wiring of the switching FET 902, 903 is a gate wiring of the switching FET 902, 904 is a current control FET, 905 is a capacitor, 906 and 908 are current supply lines, and 907 is an EL element. .

In the case of this embodiment, the current control FET
A capacitor 90 for holding the potential of the gate 904
Used as 5. Therefore, since the capacitor 905 is not substantially formed in the pixel, it is shown by a dotted line.

FIG. 9A shows an example in which the current supply line 906 is shared between two pixels. That is, the feature is that two pixels are formed so as to be line-symmetric with respect to the current supply line 906. In this case, the number of current supply lines can be reduced, so that the pixel portion can have higher definition.

FIG. 9B shows an example in which the current supply line 908 is provided in parallel with the gate wiring 903. Note that in FIG. 9B, the current supply line 908 and the gate wiring 90
3 is provided so as not to overlap, but if both are formed in different layers, they may be provided so as to overlap with an insulating film interposed therebetween. In this case, the current supply line 908 and the gate wiring 903 can share an occupied area, so that the pixel portion can have higher definition.

FIG. 9C shows that the current supply line 908 is connected to the gate wirings 903a and 903b similarly to the structure of FIG. 9B.
, And two pixels are connected to the current supply line 90.
It is characterized in that it is formed so as to be line-symmetric with respect to 8. It is also effective to provide the current supply line 908 so as to overlap with either the gate wiring 903a or 903b. In this case, the number of current supply lines can be reduced, so that the pixel portion can have higher definition.

Note that the structure of this embodiment can be used as the pixel structure of the EL display device shown in Embodiment 1.

[Embodiment 3] In this embodiment, an example in which the element structure of the current control FET 202 shown in FIG. 1 is different will be described with reference to FIG. Specifically, LD
An example is shown in which the arrangement of the D region is different. FIG.
The same parts as those of the current control FET 202 shown in FIG.

The current control FET 20 shown in FIG.
2A is an LD from the current control FET 202 shown in FIG.
This is an example in which the D region 33 is omitted. In the case of the structure shown in FIG. 1, since the switching FET 201 has a triple gate structure, the off-current value is extremely small. Further, if a digital drive method is used, the capacitor for holding the potential of the gate of the current control FET 202A is very small. Only the capacity is needed.

Therefore, as shown in FIG. 10A of this embodiment, the current control FET 20 can be sufficiently provided only by the gate capacitance formed between the gate electrode 35 and the drain region 32.
It is possible to hold the potential of the 2A gate.

Next, the current control FE shown in FIG.
T202B is an example in which the gate electrode 35 overlaps a part of the LDD region 51 with the gate insulating film interposed therebetween. In this case, a portion of the LDD region 51 that does not overlap with the gate electrode 35 functions as a resistor, and thus has an effect of reducing an off-current value. That is, with the structure in FIG. 10B, it is possible to simultaneously suppress deterioration due to hot carrier injection and reduce the off-current value.

Next, the current control FE shown in FIG.
T202C is an example in which the LDD region 51 illustrated in FIG. 10B is provided not only on the source region 31 side but also on the drain region 32 side. In this embodiment, the LDD region 52 is used. Such a structure is effective when the direction in which electrons flow is switched (the source region and the drain region are reversed) as in a sampling circuit used in the analog driving method.

Therefore, the structure shown in FIG. 10C can be used for a switching FET. Also in that case, it is possible to simultaneously suppress deterioration due to hot carrier injection and reduce the off-current value.

Next, the current control FE shown in FIG.
T202D is an example in which the LDD region 33 shown in FIG. 1 is provided on both the source region 31 side and the drain region 32 side. In this embodiment, the LDD region 53 is used. Such a structure is effective when the direction in which electrons flow is switched, such as a sampling circuit used in an analog drive system.

The configuration of this embodiment is the same as that of the first embodiment.
Can be replaced with the current control FET 202,
It is also possible to combine with the second embodiment.

[Embodiment 4] In this embodiment, the EL of the present invention is used.
A case where a plurality of display devices are manufactured using a large substrate (large wafer) will be described. 11 to 13 for the description.
The top view shown in FIG. AA 'is shown in each top view.
And a cross-sectional view taken along line BB 'is also shown.

FIG. 11A shows a state in which a sealing material is formed on the active matrix substrate manufactured according to the first embodiment. Reference numeral 61 denotes an active matrix substrate.
Seal members 62 are provided at a plurality of locations. Also, the first
The sealing material 62 is formed while securing the opening 63.

The first sealing material 62 may be a material to which a filler (bar-shaped spacer) is added. Further, spherical spacers 64 are scattered all over the active matrix substrate 61. Spraying of the spacer 64 may be performed before or after the formation of the first sealant 62. In any case, the distance between the active matrix substrate 61 and the cover material thereon can be secured by the filler (not shown) or the spacer 64.

It is to be noted that providing the spacer 64 with hygroscopicity is effective in suppressing the deterioration of the EL element.
It is desirable that the spacer 64 be made of a material that transmits light emitted from the light emitting layer.

The area 65 surrounded by the sealing material 62 includes a pixel portion and a drive circuit portion. In this specification, a portion including the pixel portion and the driving circuit portion is referred to as an active matrix portion. That is, the active matrix substrate 6
Reference numeral 1 is formed by forming a plurality of active matrix portions each composed of a combination of a pixel portion and a drive circuit portion on one large substrate.

FIG. 11B shows a state in which a cover material 66 is adhered to the active matrix substrate 61. In this specification, a cell including the active matrix substrate 61, the first sealing material 62, and the cover material 66 is referred to as an active matrix cell.

For the above-mentioned bonding, a process similar to the liquid crystal cell assembling process may be used. Also, the cover material 66
May use a transparent substrate (or a transparent film) having the same area as the active matrix substrate 61. Therefore, FIG.
In the state 1 (B), it is used as a cover material common to all the active matrix portions.

After the cover member 66 is attached, the active matrix cells are divided. In this embodiment, a scriber is used to divide the active matrix substrate 61 and the cover member 66. A scriber is a device that cuts a substrate by forming a thin groove (scribe groove) in a substrate and then applying an impact to the scribe groove to generate a crack along the scribe groove.

A dicer is also known as a device for dividing a substrate. A dicer is a device that rotates a hard cutter (also called a dicing saw) at a high speed and applies it to a substrate to divide the substrate. However, when using a dicer, water is sprayed on a dicing saw to prevent heat generation and scattering of abrasive powder. Therefore, when an EL display device is manufactured, it is desirable to use a scriber that does not need to use water.

The order of forming the scribe grooves in the active matrix substrate 61 and the cover material 66 is as follows. First, the scribe grooves 67a are formed in the direction of arrow (a),
A scribe groove 67b is formed in the direction of (b). At this time,
The scribe groove passing near the opening 63 is the first sealing material 62.
Is formed to be cut. By doing so, the opening 63 appears on the end face of the active matrix cell, and the subsequent filling material injection step becomes easy.

After the scribe grooves are formed in this way, the scribe grooves are subjected to impact with an elastic bar such as a silicone resin to generate cracks, and the active matrix substrate 61 is formed.
And the cover member 66 is divided.

FIG. 12A shows a state after the first division, which is divided into active matrix cells 68 and 69 including two active matrix portions. Next, a filling material 70 is formed in a space formed by the active matrix substrate 61, the first sealing material 62 and the cover material 66 by a vacuum injection method.
Inject. Since the vacuum injection method is well known as a liquid crystal injection technique, the description is omitted. At this time, the filler 70
Has a viscosity of preferably 3 to 15 cp. A filler having such a viscosity may be selected, or may be diluted with a solvent or the like to obtain a desired viscosity. Further, a vacuum injection method may be performed in a state where a desiccant is added to the filler.

Thus, the filler 70 is filled as shown in FIG. In this embodiment, a method is shown in which a plurality of active matrix cells are filled with the filler 70 at one time. However, such a method is used when manufacturing a small EL display device having a diagonal of about 0.5 to 1 inch. It is suitable. On the other hand, when manufacturing a large EL display device having a diagonal of about 5 to 30 inches, the filler 70 may be filled after dividing into active matrix cells one by one.

After filling the filler 70 as described above, the filler 70 is cured to further increase the adhesion between the active matrix substrate 61 and the cover 66. If the filler 70 is an ultraviolet curable resin, it is irradiated with ultraviolet light, and if the filler 70 is a thermosetting resin, it is heated. However, when using a thermosetting resin, it is necessary to pay attention to the heat resistance of the organic EL material.

Next, the active matrix substrate 61 is again activated.
Then, a scribe groove is formed in the cover member 66. First, the scribe groove 71a is formed in the direction of the arrow (a), and then the scribe groove 71b is formed in the direction of the arrow (b). At this time, after the division, the active matrix substrate 61
A scribe groove is formed so that the area of the cover member 66 is smaller than that of the above.

After the scribe grooves are formed in this manner, the scribe grooves are subjected to impact with an elastic bar such as a silicone resin to generate cracks, thereby causing the active matrix cell 72 to have a crack.
Divide into ~ 75. FIG. 13A shows a state after the second division. Further, each of the active matrix cells 72 to
An FPC 76 is attached to 75.

Finally, as shown in FIG. 13 (B), the second sealing material is covered so as to cover the end surfaces of the substrates of the active matrix cells 72 to 75 (the exposed surfaces of the first sealing material 62 or the filler 70) and the FPC 76. 77 is formed. The second sealing material 77 may be formed of an ultraviolet curable resin or the like which has little outgassing.

Through the above process, an EL display device as shown in FIG. 13B is completed. As described above, by performing this embodiment, a plurality of EL display devices can be manufactured from one substrate. For example, 620mm × 720mm
13 to 14 inch diagonal EL display devices
It is possible to manufacture four EL display devices each having a diagonal of 15 to 17 inches. Therefore, a significant improvement in throughput and a reduction in manufacturing cost can be achieved.

Note that the manufacturing process of the EL display device of this embodiment can be used to manufacture an EL display device having any of the structures of Embodiments 1 to 3.

[Embodiment 5] In this embodiment, an example in which the filler 70 is not used in Embodiment 4 will be described.
This embodiment is characterized in that, after the active matrix cell is placed under vacuum, a dry inert gas pressurized to 1 to 2 atm is sealed in a region surrounded by the first sealing material 62. As the inert gas, nitrogen or a rare gas (typically, argon, helium, or neon) may be used.

In this embodiment, the process of Embodiment 4 can be used as it is, except that the material to be vacuum-injected in Embodiment 4 is a gas. Therefore, the manufacturing process of the EL display device of this embodiment can be used for manufacturing an EL display device including any of the structures of Embodiments 1 to 3.

[Embodiment 6] In Embodiments 1 to 5, an EL display device has been described as an example. However, the present invention relates to an active matrix type electrochromic display (EC
D), Field emission display (FED)
Alternatively, it can be used for a liquid crystal display (LCD).

That is, the present invention can be applied to all electronic devices in which a light emitting element or a light receiving element is electrically connected to an FET.

[Embodiment 7] In the electronic device shown in FIG. 1, it is preferable that the first passivation film 38 be provided with a silicon nitride film or a silicon nitride oxide film.

With such a structure, the switching TFT 201 and the current control TFT 202 are covered with a silicon nitride film or a silicon oxynitride film, so that the intrusion of moisture and mobile ions from the outside can be effectively prevented. it can.

A silicon nitride film or a DLC (diamond-like carbon) film is provided between the second interlayer insulating film (flattening film) 39 and the pixel electrode 40, and a silicon nitride film or a DLC film is formed on the second passivation film 45. It is preferable to use

With such a structure, the EL element 203
Is sandwiched between silicon nitride films or DLC films,
Not only does it prevent moisture and mobile ions from entering from outside,
Intrusion of oxygen can also be effectively prevented. An organic material such as a light-emitting layer in an EL element is easily oxidized and deteriorated by oxygen. Therefore, the structure as in this embodiment can significantly improve reliability.

As described above, the reliability of the entire electronic device can be improved by taking both the measures for protecting the TFT and the measures for protecting the EL element.

The structure of this embodiment can be freely combined with any of the structures of the first to sixth embodiments. [Embodiment 8] An EL display device formed according to the present invention is of a self-luminous type, so that it has excellent visibility in a bright place and a wide viewing angle as compared with a liquid crystal display device. Therefore, it can be used as a display portion of various electric appliances. For example, in order to watch a TV broadcast or the like on a large screen, a display in which the EL display device of the present invention is incorporated in a housing as a display having a diagonal size of 30 inches or more (typically 40 inches or more) (hereinafter referred to as an EL display). It is good to use.

The EL display includes all information displays such as a display for a personal computer, a display for receiving a TV broadcast, and a display for displaying an advertisement. In addition, the EL display device of the present invention can be used as a display portion of various electric appliances.

Examples of such electric appliances of the present invention include a video camera, a digital camera, a goggle-type display (head-mounted display), a navigation system, a sound reproducing device (car audio, audio component, etc.), a notebook personal computer, a game Devices, personal digital assistants (mobile computers, mobile phones,
A portable game machine or an electronic book, etc.), an image reproducing device provided with a recording medium (specifically, a device provided with a display capable of reproducing a recording medium such as a digital versatile disk (DVD) and displaying its image), etc. Is mentioned. In particular, for a portable information terminal that is often viewed from an oblique direction, it is important to use an EL display device because a wide viewing angle is regarded as important. 14 and 15 show specific examples of these electric appliances.
Shown in

FIG. 14A shows an EL display.
A housing 2001, a support base 2002, a display portion 2003, and the like are included. The present invention can be used for the display portion 2003. E
Since the L display is a self-luminous type, it does not require a backlight and can be a display portion thinner than a liquid crystal display.

FIG. 14B shows a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, and an image receiving portion 210.
6 and so on. The EL display device of the present invention can be used for the display portion 2102.

FIG. 14C shows a part (right side) of an EL display of a head mounted type, which includes a main body 2201, a signal cable 2202, a head fixing band 2203, and a display unit 2.
204, an optical system 2205, an EL display device 2206, and the like. The present invention can be used for the EL display device 2206.

FIG. 14D shows an image reproducing apparatus (specifically, a DVD reproducing apparatus) provided with a recording medium.
1, recording medium (DVD or the like) 2302, operation switch 23
03, a display unit (a) 2304, a display unit (b) 2305, and the like. The display unit (a) mainly displays image information, and the display unit (b) mainly displays character information. The EL display device of the present invention can be used for these display units (a) and (b). Note that the image reproducing device provided with the recording medium includes a home game machine and the like.

FIG. 14E shows a portable computer, which includes a main body 2401, a camera section 2402, an image receiving section 2403, operation switches 2404, a display section 2405, and the like. The EL display device of the present invention can be used for the display portion 2405.

FIG. 14F shows a personal computer, which includes a main body 2501, a housing 2502, a display portion 2503,
A keyboard 2504 and the like are included. The EL display device of the present invention can be used for the display portion 2503.

If the emission luminance of the EL material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like and used for a front-type or rear-type projector.

Further, the above-mentioned electronic device can be connected to the Internet or C
Information distributed through an electronic communication line such as an ATV (cable television) is frequently displayed, and in particular, opportunities to display moving image information are increasing. Since the response speed of the EL material is very high, the EL display device is preferable for displaying a moving image. However, if the outline between pixels is blurred, the entire moving image is also blurred. Therefore, it is extremely effective to use the EL display device of the present invention for clearing the outline between pixels as a display portion of an electronic device.

In the EL display device, since the light emitting portion consumes power, it is desirable to display information so that the light emitting portion is reduced as much as possible. Therefore, when an EL display device is used for a portable information terminal, particularly a display portion mainly for character information such as a mobile phone or a sound reproducing device, the character information is formed by a light emitting portion with a non-light emitting portion as a background. It is desirable to drive.

FIG. 15A shows a mobile phone, which includes a main body 2601, an audio output unit 2602, and an audio input unit 260.
3, including a display unit 2604, operation switches 2605, and an antenna 2606. The EL display device of the present invention has a display section 260.
4 can be used. Note that the display portion 2604 can display power of the mobile phone by displaying white characters on a black background.

FIG. 15B shows an audio reproducing apparatus, specifically, a car audio system.
702, and operation switches 2703 and 2704. The EL display device of the present invention can be used for the display portion 2702. In this embodiment, the in-vehicle audio is shown, but the present invention may be applied to a portable or home-use audio reproducing apparatus. Note that the display portion 2704 can suppress power consumption by displaying white characters on a black background. This is particularly effective in a portable sound reproducing device.

As described above, the applicable range of the present invention is extremely wide, and the present invention can be used for electric appliances in various fields. Further, the electronic apparatus of this embodiment may use the electronic device having any of the configurations shown in Embodiments 1 to 7 for the display unit.

[0168]

According to the present invention, the FE having a small characteristic variation is provided.
A pixel using T is realized, and an electronic device with high color reproducibility with little variation in light emitting characteristics of light emitting elements between pixels can be obtained. In addition, a highly reliable electronic device can be obtained by arranging FETs having different structures according to roles in pixels.

Further, by using the electronic device of the present invention as a display portion, a high-performance and highly reliable electric appliance can be obtained.

[Brief description of the drawings]

FIG. 1 is a view showing a cross-sectional structure of a pixel portion of an electronic device.

FIG. 2 is a diagram showing a top structure and a configuration of a pixel portion.

FIG. 3 is a diagram illustrating a manufacturing process of an active matrix substrate.

FIG. 4 is a diagram showing a manufacturing process of an active matrix substrate.

FIG. 5 illustrates a manufacturing process of an active matrix substrate.

FIG. 6 is an enlarged view of a pixel portion.

FIG. 7 illustrates a circuit configuration of an EL display device.

FIG. 8 illustrates a cross-sectional structure of an EL display device.

FIG. 9 illustrates a circuit configuration of a pixel.

FIG. 10 is a diagram showing a cross-sectional structure of a current control FET.

FIG. 11 is a diagram showing a multi-paneling process of the EL display device.

FIG. 12 is a view showing a multi-panel removal process of the EL display device.

FIG. 13 is a view showing a multi-panel removal process of the EL display device.

FIG. 14 illustrates a specific example of an electronic device.

FIG. 15 illustrates a specific example of an electronic device.

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) // H05B 33/14 H01L 27/08 102D (72) Inventor Kazutaka Inukai 398 Hase, Atsugi-shi, Kanagawa Prefecture Handan Co., Ltd. Inside the Energy Laboratory (72) Inventor Mayumi Mizukami 398 Hase, Atsugi-shi, Kanagawa Japan Semiconductor Energy Laboratory

Claims (6)

[Claims] A second FET having a first FET and a gate electrode electrically connected to a drain wiring of the first FET;
A light-emitting element electrically connected to an ET and a drain wiring of the second FET, wherein the second FET is provided so as to partially or entirely overlap the gate electrode with a gate insulating film interposed therebetween. An electronic device comprising an LDD region made of a single crystal semiconductor. 2. A second FET having a first FET and a gate electrode electrically connected to a drain wiring of the first FET.
An ET and a light emitting element electrically connected to a drain wiring of the second FET; the first FET has a structure in which a plurality of FETs are connected in series; and the second FET has a gate. An electronic device including an LDD region formed of a single crystal semiconductor and provided so as to partially or entirely overlap with a gate electrode with an insulating film interposed therebetween. 3. An electronic device having a pixel portion and a drive circuit portion, wherein the drive circuit portion has an n-channel FET including an LDD region provided so as to overlap a gate electrode with a gate insulating film interposed therebetween. The pixel portion includes a first FET, a second FET, and the second FET.
The second FET has an LDD region made of a single crystal semiconductor provided so as to partially or entirely overlap the gate electrode with a gate insulating film interposed therebetween. An electronic device, comprising: 4. An electronic device having a pixel portion and a drive circuit portion, wherein the drive circuit portion has an n-channel FET including an LDD region provided so as to overlap a gate electrode with a gate insulating film interposed therebetween. The pixel portion includes a first FET, a second FET, and the second FET.
The first FET has a structure in which a plurality of FETs are connected in series, and the second FET has a gate electrode with a gate insulating film interposed therebetween. An electronic device including an LDD region formed of a single crystal semiconductor and provided so as to partially or entirely overlap with each other. 5. The semiconductor device according to claim 1, wherein the LDD region of the second FET has a size of 2 × 10 ^{16 to} 5 × 10 ^16.
An electronic device comprising an n-type impurity element in a concentration range of × 10 ¹⁹ atoms / cm ³ . 6. An electric appliance using the electronic device according to claim 1. Description: