JP4473520B2 - Solid-state imaging device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device capable of preventing image quality deterioration at the time of photographing a high-luminance subject and enabling high-speed transfer of signal charges, and a manufacturing method thereof.
[0002]
[Prior art]
In recent years, there has been a demand for higher image quality in imaging devices such as cameras, particularly digital still cameras. Therefore, for solid-state imaging devices, more pixels, lower power consumption for long-time use, and continuous shooting are required. There is a need for higher speeds to improve speed.
[0003]
Conventionally, a CCD (Charge Coupled Device) is mainly used as a solid-state imaging device constituting the imaging device. Hereinafter, a conventional solid-state imaging device will be described. FIG. 5 is a plan view showing an example of a schematic configuration of a conventional solid-state imaging device.
[0004]
As shown in FIG. 5, in the solid-state imaging device 70, a pixel unit (unit pixel) 73 including a light receiving unit (photodiode) 71 and a vertical transfer CCD 72 that reads a signal charge from the photodiode 71 and transfers it in the vertical direction. Are arranged two-dimensionally. Further, the solid-state imaging device 70 receives a signal charge transferred from the vertical transfer CCD 72 and transfers it in the horizontal direction, and is adjacent to the side of the horizontal transfer CCD 74 opposite to the pixel portion 73 and has unnecessary charges. A drain region (horizontal drain) 75 to be discharged and an amplifier 76 for converting the signal charge transferred from the horizontal transfer CCD 74 into a voltage are provided.
[0005]
The horizontal transfer CCD 74 receives a signal of a black level (optical black (OB)), a horizontal dummy portion 74 a including the final stage (HL), an effective pixel portion 74 b that receives the signal charges transferred from the vertical transfer CCD 72, and the like. And a horizontal OB portion 74c for receiving.
[0006]
The unnecessary charge is a charge caused by dark current or smear existing in the vertical transfer CCD 72 before performing normal imaging. Since these unnecessary charges impair the quality of the captured image, it is necessary to remove the unnecessary charges before the signal charges of the photodiode 71 are read out to the vertical transfer CCD 72. Therefore, the horizontal drain 75 is used to remove unnecessary charges in a short time. The horizontal drain 75 includes a general overflow barrier and an overflow drain, as described in, for example, Patent Document 1.
[0007]
By the way, when very strong light from the sun or the like enters a part of the pixel portion 73, an amount of signal charge proportional to the intensity of the light is generated. Since this signal charge cannot be discharged to the horizontal drain 75, the amount of signal charge transferred to the effective pixel portion 74b of the horizontal transfer CCD 74 is the charge capacity of the storage area (area sandwiched between potential barriers), that is, charge accumulation. May be larger than capacity. In this case, since the signal charge exceeds the barrier region (region where the potential barrier is formed) of the effective pixel portion 74b, the signal charge flows into the horizontal transfer CCD 74 for the OB reference signal, that is, the horizontal OB portion 74c. . For this reason, as a result of the OB reference signal fluctuating to the plus side, a phenomenon occurs in which the sensitivity (relative sensitivity) from the reference signal decreases and the image becomes dark. Therefore, conventionally, in order to increase the discharge time of the signal charge to the horizontal drain 75, the width of the horizontal transfer CCD 74 (the width in the direction perpendicular to the transfer direction of the signal charge) is widened. Specifically, the charge storage capability of the effective pixel portion 74b) is increased.
[0008]
Specifically, as shown in FIG. 5, the portions (the effective pixel portion 74b and the horizontal OB portion 74c) connected to the pixel portion 73 in the horizontal transfer CCD 74 all have the same width. On the other hand, the width of the portion (horizontal dummy portion 74 a) connected to the amplifier (floating diffusion amplifier) 76 in the horizontal transfer CCD 74 becomes narrow in the vicinity of the amplifier 76. In the horizontal dummy portion 74, if the width of the region other than the vicinity of the amplifier 76 is A, the width of the effective pixel portion 74b is B, and the width of the horizontal OB portion 74c is C, A = B = C.
[0009]
FIG. 6A is an enlarged plan view of the horizontal dummy portion 74a of the horizontal transfer CCD 74 in the conventional solid-state imaging device shown in FIG. 5, and FIG. 6B is a VI-VI line in FIG. It is sectional drawing. In FIG. 6B, the potential is shown together with the cross-sectional configuration of the horizontal dummy portion 74a.
[0010]
As shown in FIGS. 6A and 6B, the horizontal transfer CCD 74 is a two-phase (first phase electrode H1 and second phase electrode H2) drive type, and is formed on a semiconductor substrate (P type) 79. And a buried channel region (N-type) 80 serving as a signal charge transfer path, and a first layer polysilicon electrode 81 and a second layer polysilicon electrode 82 formed on the buried channel region 80. A two-layer superposed electrode. Here, a potential step is provided in each overlapping electrode that becomes H1 or H2. In FIG. 6B, the gate insulating film interposed between the buried channel region 80 and the electrodes 81 and 82 and the oxide film interposed between the electrode 81 and the electrode 82 are not shown. .
[0011]
Further, as shown in FIG. 6A, a floating diffusion 80a is connected to an end of the horizontal transfer CCD 74 (horizontal dummy portion 74a) on the final stage (HL) side through an output gate (OG). . Further, a reset drain 80b is connected to the floating diffusion 80a via a reset gate (RG).
[0012]
The operation of the horizontal transfer CCD 74 is as follows, for example. That is, for example, the signal charge accumulated in the final stage (HL) with H1 being High and H2 being Low is injected into the floating diffusion 80a when H1 is Low and H2 is changed to the High state. In addition, a voltage corresponding to the signal charge amount is output from the amplifier 76. At this time, the charge detection sensitivity is determined by the capacitance C, that is, the area of the floating diffusion 80a. As is apparent from a general relational expression of V = Q / C (V: voltage, Q: charge amount), the detection sensitivity can be increased as the capacitance C decreases. That is, in the conventional solid-state imaging device 70, the capacitance is reduced by reducing the area of the floating diffusion 80a, thereby increasing the charge detection sensitivity. As a result, in the horizontal transfer CCD 74, the charge storage capacity of the final stage (HL) is minimized.
[0013]
[Patent Document 1]
Japanese Patent Laid-Open No. 10-50975 (page 11, FIG. 11)
[0014]
[Problems to be solved by the invention]
However, in the conventional solid-state imaging device 70, since the width of the horizontal transfer CCD 74 is increased, the area of the horizontal transfer CCD 74 is increased, so that the terminal capacity is increased. For this reason, there is a problem in that power consumption increases as a result of an increase in current for driving the horizontal transfer CCD 74. In addition, there is a problem that high-speed driving becomes difficult due to an increase in the area of the horizontal transfer CCD 74, and there is a problem that power consumption further increases when the operating voltage is increased for high-speed driving.
[0015]
Further, as described above, since the charge storage capacity of the final stage (HL) of the horizontal transfer CCD 74 is the minimum, when a signal charge exceeding the capacity is sent to the final stage (HL), the overflowing charge Is postponed to the floating diffusion 80a, and as a result, the output voltage is modulated to cause an image abnormality. When the gate length is increased in order to increase the charge storage capacity in the final stage (HL), another problem that the signal charge transfer efficiency deteriorates occurs.
[0016]
In view of the above, the present invention achieves both low-voltage and high-speed signal transfer by a horizontal transfer CCD and an increase in the saturation charge amount of the horizontal transfer CCD in a multi-pixel solid-state imaging device composed of fine pixels. The purpose is to obtain a high-quality image.
[0017]
[Means to solve the problem]
In order to achieve the above object, a solid-state imaging device according to the present invention includes a light receiving unit arranged two-dimensionally, a vertical transfer CCD that reads signal charges from the light receiving unit and transfers them in the vertical direction, and a vertical transfer CCD. A horizontal transfer CCD that receives the signal charge transferred from the horizontal transfer CCD and transfers it in the horizontal direction. The charge storage capacity of the effective pixel portion that receives the signal charge from the vertical transfer CCD in the horizontal transfer CCD is the final stage of the horizontal transfer CCD. It is smaller than each of the charge storage capacity and the charge storage capacity of the OB horizontal transfer CCD unit that receives the black level signal.
[0018]
According to the solid-state imaging device of the present invention, the charge storage capacity of the effective pixel portion in the horizontal transfer CCD is smaller than the charge storage capacity of the final stage of the horizontal transfer CCD. That is, since the charge storage capacity at the final stage is not minimum in the horizontal transfer CCD, it is possible to prevent the charge from overflowing from the final stage and being forwarded to an output unit such as a floating diffusion. Accordingly, it is possible to suppress an image abnormality when shooting a high-luminance subject.
[0019]
Further, according to the solid-state imaging device of the present invention, the charge storage capacity of the effective pixel portion having the largest area among the horizontal transfer CCDs is reduced, so that the optimum design of the charge storage capacity of each part of the horizontal transfer CCD is performed. Thus, the area of the effective pixel portion can be minimized, that is, the area of the horizontal transfer CCD can be minimized. For this reason, the voltage for driving the horizontal transfer CCD at a high speed can be reduced, and the transfer efficiency of the signal charge at the time of the high speed driving can be improved.
[0020]
That is, according to the solid-state imaging device of the present invention, it is possible to achieve both low voltage and high speed signal transfer by the horizontal transfer CCD and increase of the saturation charge amount of the horizontal transfer CCD, so that a high quality image can be obtained. it can.
[0021]
In this specification, the charge storage capacity means the amount of charge that can be stored in a potential well sandwiched between potential barriers.
[0022]
In the solid-state imaging device of the present invention, it is preferable that the width of the effective pixel portion is narrower than the width of the horizontal transfer CCD final stage and the width of the OB horizontal transfer CCD portion.
[0023]
In this case, the effective pixel portion of the horizontal transfer CCD, that is, the horizontal transfer CCD portion that receives the signal charge from the vertical transfer CCD is narrower than the conventional one. The amount of charge remaining in the battery is reduced. For this reason, the amount of electric charge leaking from the effective pixel portion to the OB horizontal transfer CCD portion at the time of shooting a high-luminance subject is also reduced. Further, since the width of the OB horizontal transfer CCD section is wide, it is possible to reduce an area where charges leaked from the effective pixel section exist in the OB horizontal transfer CCD section. Therefore, since the fluctuation of the OB reference signal can be suppressed, the image abnormality caused by the fluctuation can be prevented.
[0024]
In this case, the drain region adjacent to the horizontal transfer CCD may be bent corresponding to the change in the width of the horizontal transfer CCD.
[0025]
The solid-state imaging device of the present invention further includes a drain region adjacent to the horizontal transfer CCD, and the width of the drain region adjacent to the OB horizontal transfer CCD unit is the drain adjacent to the horizontal transfer CCD other than the OB horizontal transfer CCD unit. It is preferably narrower than the width of the region.
[0026]
In this way, since the terminal capacitance can be further reduced, the voltage for driving the horizontal transfer CCD at a high speed can be further reduced and the transfer efficiency of the signal charge at the time of the high speed driving can be further improved.
[0027]
In the solid-state imaging device of the present invention, the potential barrier of the horizontal transfer CCD unit for OB is preferably higher than the potential barrier of the effective pixel unit and the potential barrier of the final stage of the horizontal transfer CCD.
[0028]
In this way, the charge storage capacity of the horizontal transfer CCD unit for OB can be surely made larger than the charge storage capacity of the effective pixel unit.
[0029]
In the first and second solid-state imaging device manufacturing methods according to the present invention, the potential barrier of the horizontal transfer CCD unit for OB is set higher than the potential barrier of the effective pixel unit and the potential barrier of the final stage. This is a method for manufacturing a solid-state imaging device. Specifically, the manufacturing method of the first solid-state imaging device includes a step of selectively introducing an impurity for increasing the potential barrier into the horizontal transfer CCD unit for OB. The second solid-state imaging device manufacturing method further includes a step of selectively introducing an impurity that lowers the potential barrier into a portion other than the horizontal transfer CCD portion for OB in the horizontal transfer CCD.
[0030]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
Hereinafter, a solid-state imaging device according to a first embodiment of the present invention will be described with reference to the drawings.
[0031]
FIG. 1 is a plan view illustrating an example of a schematic configuration of the solid-state imaging apparatus according to the first embodiment.
[0032]
As shown in FIG. 1, in the solid-state imaging device 10, a plurality of light receiving portions (photodiodes) 11 that photoelectrically convert incident light and accumulate electric charges are arranged in a two-dimensional manner. Also, a vertical transfer CCD 12 is provided for each column of photodiodes 11 to read out signal charges from the photodiodes 11 and transfer them in the vertical direction. That is, a pixel portion (unit pixel) 13 is configured by each photodiode 11 and the corresponding vertical transfer CCD 12. Further, the solid-state imaging device 10 receives a signal charge transferred from the vertical transfer CCD 12 and transfers it in the horizontal direction. The solid-state imaging device 10 is adjacent to the side of the horizontal transfer CCD 14 opposite to the pixel portion 13 and has unnecessary charges. A drain region (horizontal drain) 15 to be discharged and an amplifier (floating diffusion amplifier) 16 for converting the signal charge transferred from the horizontal transfer CCD 14 into a voltage are provided.
[0033]
FIG. 2 is a cross-sectional view showing a basic configuration of a CCD (vertical transfer CCD 12 and horizontal transfer CCD 14) used in the solid-state imaging device according to the first embodiment. Note that the solid-state imaging device of the present embodiment is a two-phase drive type.
[0034]
As shown in FIG. 2, a buried channel region 2 serving as a signal charge transfer path is provided on the surface of the semiconductor substrate 1. A plurality of first-layer polysilicon electrodes 4 are formed on the buried channel region 2 via a gate insulating film 3. A plurality of second layer polysilicon electrodes 5 are formed on the portion between the first layer polysilicon electrodes 4 in the buried channel region 2 via the gate insulating film 3. The upper part of the second layer polysilicon electrode 5 is formed so as to run over the side part of the first layer polysilicon electrode 4, and the first layer polysilicon electrode 4 and the second layer polysilicon electrode 5 An oxide film 6 is interposed therebetween.
[0035]
The horizontal transfer CCD 14 receives a signal of a black level (optical black (OB)), a horizontal dummy portion 14 a including the final stage (HL), an effective pixel portion 14 b that receives the signal charges transferred from the vertical transfer CCD 12, and the like. And a horizontal OB unit 14c for receiving. That is, the horizontal dummy portion 14 a is a portion that connects the effective pixel portion 14 b and the floating diffusion amplifier 16.
[0036]
As shown in FIG. 1, the feature of this embodiment is that the charge storage capacity of the effective pixel portion 14b is larger than the charge storage capacity of the horizontal transfer CCD final stage (HL) and the charge storage capacity of the horizontal OB portion 14c. It is small. Further, in the present embodiment, such a change in the charge storage capacity in the horizontal transfer CCD 14 is measured by changing the width of the effective pixel portion 14b (the width in the direction perpendicular to the signal charge transfer direction; hereinafter the same). This is realized by making it narrower than the width of the CCD last stage (HL) and the width of the horizontal OB portion 14c. Specifically, when the width (maximum width) of the last stage (HL) of the horizontal transfer CCD is A, the width of the effective pixel portion 14b is B, and the width of the horizontal OB portion 14c is C, B <A <C. Further, the horizontal drain 15 is formed so as to be bent corresponding to the change in the width of the horizontal transfer CCD 14.
[0037]
According to the first embodiment, since the width of the effective pixel portion 14b of the horizontal transfer CCD 14, that is, the horizontal transfer CCD portion that receives the signal charge from the vertical transfer CCD 12 is narrower than the conventional one, unnecessary charges are discharged to the horizontal drain 15. The amount of charge remaining in the effective pixel portion 14b later decreases. For this reason, the amount of electric charge that leaks from the effective pixel portion 14b to the horizontal OB portion 14c when shooting a high-luminance subject is also reduced. Further, since the horizontal OB portion 14c is wide, it is possible to reduce a region where charges leaked from the effective pixel portion 14b exist in the horizontal OB portion 14c. Therefore, since the fluctuation of the OB reference signal can be suppressed, the image abnormality caused by the fluctuation can be prevented.
[0038]
Further, according to the first embodiment, the charge storage capacity of the horizontal transfer CCD final stage (HL) is larger than the charge storage capacity of the effective pixel portion 14b. In other words, the charge storage capacity of the horizontal transfer CCD final stage (HL) is not minimum. Therefore, it is possible to reliably avoid the situation where the charge overflowing from the final stage (HL), which has been a problem in the past, is forwarded to, for example, the floating diffusion. Accordingly, it is possible to suppress an image abnormality when shooting a high-luminance subject.
[0039]
By the way, in general, the current required to drive the electrode terminal increases in proportion to the terminal capacitance, that is, the capacitance between the substrate and the gate electrode. For this reason, the area of the horizontal transfer CCD related to the terminal capacitance is substantially equal to the area of the horizontal transfer CCD unit (that is, the effective pixel unit) that receives signal charges. Therefore, if the area of the effective pixel portion is reduced, the driving current of the CCD can be reduced.
[0040]
On the other hand, according to the first embodiment, the charge storage capacity of the effective pixel portion 14b having the largest area in the horizontal transfer CCD 14 is reduced. For this reason, by optimizing the charge storage capacity of each part of the horizontal transfer CCD 14, the area of the horizontal transfer CCD 14 is minimized, in particular, the area of the effective pixel part 14b is minimized, that is, the drive current of the CCD is minimized. Can be planned. Specifically, in the first embodiment, the driving current of the CCD can be reduced to about half compared to the conventional case. In the first embodiment, the area of the horizontal OB portion 14c, that is, the horizontal transfer CCD portion for OB is increased. However, the horizontal OB portion 14c has 5 pixels out of the total pixels (for example, 1000 pixels) in the horizontal direction. % (For example, about 50 pixels). Therefore, the influence of the increase in the area of the horizontal OB portion 14c on the drive current of the CCD can be ignored.
[0041]
In the first embodiment, since the horizontal OB portion 14c is irrelevant to the transfer of signal charges, as shown in FIG. 1, the width of the horizontal drain 15 adjacent to the horizontal OB portion 14c is set to the horizontal OB portion 14c. Other than the horizontal transfer CCD 14 (specifically, the effective pixel portion 14b), the width may be narrower than the horizontal drain 15. In this case, since the terminal capacitance can be further reduced, the voltage for driving the horizontal transfer CCD 14 at a high speed can be further reduced and the transfer efficiency of the signal charge at the time of the high speed driving can be further improved.
[0042]
(Second Embodiment)
Hereinafter, a solid-state imaging device according to a second embodiment of the present invention will be described with reference to the drawings.
[0043]
FIG. 3A is a plan view illustrating an example of a schematic configuration of the solid-state imaging device according to the second embodiment. FIGS. 3B and 3C each show a cross-sectional configuration of the horizontal transfer CCD in the solid-state imaging device according to the second embodiment, and FIG. 3B is a cross-sectional view of the effective pixel portion (FIG. 3). 3A is a cross-sectional view taken along the line aa ′ of FIG. 3A, and FIG. 3C is a cross-sectional view of the horizontal OB portion (cross-sectional view taken along the line bb ′ of FIG. 3A).
[0044]
Since the configuration of the pixel unit in the solid-state imaging device according to the second embodiment is the same as that of the first embodiment shown in FIG. 1, the pixel unit is not shown in FIG. 3A to 3C, the other components of the solid-state imaging device are denoted by the same reference numerals as those in the first embodiment shown in FIG. 1 or FIG. In FIGS. 3B and 3C, the potential is shown together with the cross-sectional configuration of the horizontal transfer CCD.
[0045]
The features of this embodiment, that is, the differences from the first embodiment are as follows. That is, in the first embodiment, in order to make the charge storage capacity of the horizontal OB portion 14c larger than the charge storage capacity of the effective pixel portion 14b, the width of the horizontal OB portion 14c is larger than the width of the effective pixel portion 14b. (See FIG. 1). In contrast, in the present embodiment, as shown in FIGS. 3A to 3C, in order to make the charge storage capacity of the horizontal OB portion 14c larger than the charge storage capacity of the effective pixel portion 14b, horizontal OB is used. The potential barrier of the part 14c is set higher than the potential barrier of the effective pixel part 14b. In other words, by increasing the potential barrier of the horizontal OB portion 14c, the charge storage capacity of the horizontal OB portion 14c is increased without increasing the area of the horizontal OB portion 14c.
[0046]
As shown in FIGS. 3B and 3C, the horizontal transfer CCD 14 of this embodiment is a two-phase (first phase electrode H1 and second phase electrode H2) drive type, and includes a semiconductor substrate (P Type) 1 and a buried channel region (N type) 2 serving as a signal charge transfer path, and a first-layer polysilicon electrode 4 and a second-layer polysilicon formed on the buried channel region 2. A two-layer overlapping electrode formed of the silicon electrode 5. Here, a potential step is provided in each overlapping electrode that becomes H1 or H2. Specifically, a potential barrier is formed in the buried channel region 2 below each second layer polysilicon electrode 5. 3B and 3C, the gate insulating film 3 and the oxide film 6 are not shown (see FIG. 2).
[0047]
In the present embodiment, in order to make the potential barrier of the horizontal OB portion 14c higher than the potential barrier of the effective pixel portion 14b, an impurity (in the buried channel region 2 (N-type) of the horizontal OB portion 14c that raises the potential barrier ( P type impurities), for example, boron is selectively implanted.
[0048]
As described above, according to the second embodiment, the potential barrier of the horizontal OB portion 14c is made higher than the potential barrier of the effective pixel portion 14b, thereby increasing the charge storage capacity of the horizontal OB portion 14c. It can be surely made larger than the charge storage capacity. Therefore, the same effect as the first embodiment can be obtained.
[0049]
In the second embodiment, the introduction timing of impurities for adjusting the height of the potential barrier is not particularly limited. That is, after a predetermined potential barrier is formed by implanting impurities into the horizontal transfer CCD 14 other than the horizontal OB portion 14c, an impurity for increasing the potential barrier may be selectively introduced into the horizontal OB portion 14c, or The impurity introduction timing may be reversed.
[0050]
In the second embodiment, in order to make the charge storage capacity of the horizontal transfer CCD final stage (HL) larger than the charge storage capacity of the effective pixel unit 14b, the width of the horizontal transfer CCD final stage (HL) is set to an effective pixel. You may make it larger than the width | variety of the part 14b (refer FIG. 3). In this case, the horizontal drain 15 may be bent so as to correspond to the change in the width of the horizontal transfer CCD 14. In this case, the height of the potential barrier of the horizontal transfer CCD final stage (HL) may be the same as the height of the potential barrier of the effective pixel portion 14b.
[0051]
(Third embodiment)
Hereinafter, a solid-state imaging device according to a third embodiment of the present invention will be described with reference to the drawings.
[0052]
FIG. 4A is a plan view illustrating an example of a schematic configuration of a solid-state imaging apparatus according to the third embodiment. FIGS. 4B and 4C each show a cross-sectional configuration of the horizontal transfer CCD in the solid-state imaging device according to the third embodiment, and FIG. 4B is a cross-sectional view of the effective pixel portion (FIG. 4). 4 (a) is a cross-sectional view taken along the line aa ′ in FIG. 4A, and FIG. 4C is a cross-sectional view taken along the horizontal OB portion (cross-sectional view taken along the line bb ′ in FIG. 4A).
[0053]
Since the configuration of the pixel unit in the solid-state imaging device according to the third embodiment is the same as that of the first embodiment shown in FIG. 1, the pixel unit is not shown in FIG. 4A to 4C, the other constituent elements of the solid-state imaging device are denoted by the same reference numerals as those in the first embodiment shown in FIG. 1 or FIG. 4B and 4C show the potential together with the cross-sectional configuration of the horizontal transfer CCD.
[0054]
The features of this embodiment, that is, the differences from the first embodiment are as follows. That is, in the first embodiment, in order to make the charge storage capacity of the horizontal OB portion 14c larger than the charge storage capacity of the effective pixel portion 14b, the width of the horizontal OB portion 14c is larger than the width of the effective pixel portion 14b. did. On the other hand, in the present embodiment, as shown in FIGS. 4A to 4C, in order to make the charge storage capacity of the horizontal OB portion 14c larger than the charge storage capacity of the effective pixel portion 14b, horizontal OB is used. The potential barrier of the part 14c is set higher than the potential barrier of the effective pixel part 14b. In other words, by increasing the potential barrier of the horizontal OB portion 14c, the charge storage capacity of the horizontal OB portion 14c is increased without increasing the area of the horizontal OB portion 14c.
[0055]
As shown in FIGS. 4B and 4C, the horizontal transfer CCD 14 of this embodiment is a two-phase (first phase electrode H1 and second phase electrode H2) drive type, and includes a semiconductor substrate (P Type) 1 and a buried channel region (N type) 2 serving as a signal charge transfer path, and a first-layer polysilicon electrode 4 and a second-layer polysilicon formed on the buried channel region 2. A two-layer overlapping electrode formed of the silicon electrode 5. Here, a potential step is provided in each overlapping electrode that becomes H1 or H2. Specifically, a potential barrier is formed in the buried channel region 2 below each second layer polysilicon electrode 5. 4B and 4C, the illustration of the gate insulating film 3 and the oxide film 6 is omitted (see FIG. 2).
[0056]
In the present embodiment, in order to make the potential barrier of the horizontal OB portion 14c higher than the potential barrier of the effective pixel portion 14b, a potential barrier is provided in the embedded channel region 2 (N type) of the horizontal transfer CCD 14 other than the horizontal OB portion 14c. Impurities (N-type impurities) such as phosphorus or arsenic are implanted.
[0057]
As described above, according to the third embodiment, by setting the potential barrier of the horizontal OB portion 14c higher than the potential barrier of the effective pixel portion 14b, the charge storage capacity of the horizontal OB portion 14c is increased. It can be surely made larger than the charge storage capacity. Therefore, the same effect as the first embodiment can be obtained.
[0058]
In the third embodiment, the timing of introducing impurities for adjusting the height of the potential barrier is not particularly limited. That is, after a predetermined potential barrier is formed by implanting impurities into the horizontal OB portion 14c, impurities for lowering the potential barrier may be selectively introduced into the horizontal transfer CCD 14 other than the horizontal OB portion 14c, or respectively. The impurity introduction timing may be reversed.
[0059]
In the third embodiment, in order to make the charge storage capacity of the horizontal transfer CCD final stage (HL) larger than the charge storage capacity of the effective pixel unit 14b, the width of the horizontal transfer CCD final stage (HL) is set to an effective pixel. You may make it larger than the width | variety of the part 14b (refer FIG. 4). In this case, the horizontal drain 15 may be bent so as to correspond to the change in the width of the horizontal transfer CCD 14. Further, in this case, by introducing an impurity that lowers the potential barrier also in the horizontal transfer CCD final stage (HL), the height of the potential barrier of the horizontal transfer CCD final stage (HL) is set to the potential barrier of the effective pixel portion 14b. It may be the same as the height.
[0060]
In the first to third embodiments, the interline transfer type solid-state imaging device that performs photoelectric conversion using a photodiode has been described. However, the present invention is not limited to this. For example, it goes without saying that the present invention can be applied to, for example, a frame interline transfer solid-state image pickup device having a storage section below the image pickup region, or a frame transfer solid-state image pickup device that performs photoelectric conversion using a vertical CCD register.
[0061]
In the first to third embodiments, the N-type buried channel region 2 serving as a signal charge transfer path is provided on the surface portion of the P-type semiconductor substrate 1. A P-type buried channel region serving as a signal charge transfer path is provided on the surface portion of the semiconductor substrate, and each applied voltage in the two-phase (first phase electrode H1 and second phase electrode H2) drive type horizontal transfer CCD 14 is applied. The same effect can be obtained when the size of is reversed.
[0062]
In the first to third embodiments, the two-phase (first phase electrode H1 and second phase electrode H2) drive type horizontal transfer CCD 14 is used. Instead, for example, a single phase or three or more phases are used. Other types of horizontal transfer CCDs such as the drive type may be used.
[0063]
【The invention's effect】
According to the present invention, in the horizontal transfer CCD, the charge storage capacity of the final stage is larger than the charge storage capacity of the effective pixel section. Therefore, image abnormality can be suppressed. In addition, since the charge storage capacity of the effective pixel portion having the largest area in the horizontal transfer CCD is reduced, the area of the effective pixel portion can be minimized, that is, the area of the horizontal transfer CCD can be minimized. The voltage for driving the transfer CCD at a high speed can be reduced, and the signal charge transfer efficiency at the high speed drive can be improved. Therefore, according to the present invention, it is possible to achieve both low voltage and high speed signal transfer by the horizontal transfer CCD and increase of the saturation charge amount of the horizontal transfer CCD, so that a high quality image can be obtained.
[Brief description of the drawings]
FIG. 1 is a plan view illustrating an example of a schematic configuration of a solid-state imaging apparatus according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view showing a basic configuration of a CCD (vertical transfer CCD and horizontal transfer CCD) used in the solid-state imaging device according to the first embodiment of the present invention.
3A is a plan view showing an example of a schematic configuration of a solid-state imaging device according to a second embodiment of the present invention, and FIG. 3B is a solid-state imaging device according to the second embodiment of the present invention. FIG. 4 is a cross-sectional view of the effective pixel portion of the horizontal transfer CCD in FIG. 2 (cross-sectional view taken along line aa ′ in FIG. 2A), and FIG. It is sectional drawing (sectional drawing of the bb 'line of (a)) of a horizontal OB part.
4A is a plan view showing an example of a schematic configuration of a solid-state imaging apparatus according to a third embodiment of the present invention, and FIG. 4B is a solid-state imaging apparatus according to the third embodiment of the present invention. FIG. 6 is a cross-sectional view of the effective pixel portion of the horizontal transfer CCD in FIG. 3A (cross-sectional view taken along line aa ′ in FIG. 2A), and FIG. It is sectional drawing (sectional drawing of the bb 'line of (a)) of a horizontal OB part.
FIG. 5 is a plan view showing an example of a schematic configuration of a conventional solid-state imaging device.
6A is an enlarged plan view of a horizontal dummy portion of a horizontal transfer CCD in a conventional solid-state imaging device, and FIG. 6B is a cross-sectional view taken along line VI-VI in FIG.
[Explanation of symbols]
1 Semiconductor substrate
2 Embedded channel area
3 Gate insulation film
4 First layer polysilicon electrode
5 Second layer polysilicon electrode
6 Oxide film
10 Solid-state imaging device
11 Photodiode
12 Vertical transfer CCD
13 Pixel part
14 Horizontal transfer CCD
14a Horizontal dummy part
14b Effective pixel part
14c Horizontal OB section
15 Horizontal drain
16 amplifiers

Claims (7)

A light receiving section arranged two-dimensionally;
A vertical transfer CCD that reads out signal charges from the light receiving unit and transfers them in the vertical direction;
A horizontal transfer CCD that receives the signal charges transferred from the vertical transfer CCD and transfers them in the horizontal direction;
In the horizontal transfer CCD, the charge storage capacity of the effective pixel portion that receives the signal charge from the vertical transfer CCD is the charge storage capacity of the last stage of the horizontal transfer CCD and the horizontal transfer CCD portion for OB that receives the black level signal. A solid-state imaging device characterized by being smaller than each of the charge storage capacitors. 2. The solid-state imaging device according to claim 1, wherein a width of the effective pixel unit is narrower than a width of the final stage and a width of the horizontal transfer CCD unit for OB. A drain region adjacent to the horizontal transfer CCD;
The solid-state imaging device according to claim 2, wherein the drain region is formed so as to be bent corresponding to a change in the width of the horizontal transfer CCD. A drain region adjacent to the horizontal transfer CCD;
The width of the drain region adjacent to the horizontal transfer CCD unit for OB is narrower than the width of the drain region adjacent to the horizontal transfer CCD other than the horizontal transfer CCD unit for OB. The solid-state imaging device described. 2. The solid-state imaging device according to claim 1, wherein a potential barrier of the OB horizontal transfer CCD unit is higher than each of a potential barrier of the effective pixel unit and a potential barrier of the final stage. It is a manufacturing method of the solid-state imaging device according to claim 5,
A method of manufacturing a solid-state imaging device, comprising: a step of selectively introducing an impurity for increasing a potential barrier into the horizontal transfer CCD unit for OB. It is a manufacturing method of the solid-state imaging device according to claim 5,
A method of manufacturing a solid-state imaging device, comprising: a step of selectively introducing an impurity that lowers a potential barrier into a portion other than the horizontal transfer CCD portion for OB in the horizontal transfer CCD.

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