JP4458502B2 - Surface mount semiconductor device - Google Patents

Surface mount semiconductor device Download PDF

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JP4458502B2
JP4458502B2 JP2000215252A JP2000215252A JP4458502B2 JP 4458502 B2 JP4458502 B2 JP 4458502B2 JP 2000215252 A JP2000215252 A JP 2000215252A JP 2000215252 A JP2000215252 A JP 2000215252A JP 4458502 B2 JP4458502 B2 JP 4458502B2
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external terminal
semiconductor chip
semiconductor device
resin package
exposed
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JP2002033430A (en
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孝太郎 佐藤
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日本インター株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

【０００１】
本発明は、放熱性が良好で半導体チップに機械的ストレスを与えず、かつ、全体として小型化を実現した面実装型半導体装置に関するものである。
【０００２】
【従来の技術】
従来の面実装型半導体装置の構造例を図９に示す。
図において、１は面実装型半導体装置の全体を示し、中実角型の樹脂パッケージ２内に第１の外部端子３と第２の外部端子４を有している。
第１の外部端子３の内方端３ａ上には、例えばダイオード構造を有する半導体チップ１１が搭載固着されている。この半導体チップ１１の一方の主面（図９では上面）と第２の外部端子４の内方端４ａとは内部リード５により接続されている。
上記樹脂パッケージ２の側面から外部に導出した第１の外部端子３及び第２の外部端子４の外方端３ｂ，４ｂはクランク状に折り曲げられ、それら外方端３ｂ，４ｂの下面と樹脂パッケージ２の下面が略面一になるように形成されている。
【０００３】
次に、上記のような構造の面実装型半導体装置１の製造方法ついて、図１０を参照して説明する。
図１０において、６は上記面実装型半導体装置１に使用されるリードフレームを示し、このリードフレーム６は対向する一対のサイドフレーム７，８を有する。これらのサイドフレーム７，８の対向する位置から内方に互いに延びる第１リード９と第２リード１０が形成されている。また、一対のサイドフレーム７，８は所定間隔を置いて連結部１１により連結されている。
【０００４】
上記リードフレーム６の第１リード９上に半導体チップ１１を搭載・固着させた後、該半導体チップ１１の表面電極と第２リード１０内方端とを内部リード５により半田固着させる。
【０００５】
上記のように組み立てられたリードフレーム６を図示しないモールド金型に収め、半導体チップ１１の周囲を一定の範囲に亘って樹脂モールドし、図９に示したような樹脂パッケージ２を形成する。
その後、モールド金型から取り出したリードフレーム６は、所定の位置で切断する。この切断と同時に、あるいはその後のフォーミング加工により第１リード９及び第２リード１０の樹脂パッケージ２から外部に突出した部分に対してクラック状に折り曲げ加工を施し、図９に示したような外部端子３，４を有する面実装型半導体装置１を得る。
【０００６】
【発明が解決しようとする課題】
従来の面実装型半導体装置は上記のように構成されているので、概略、次のような解決すべき課題があった。
（１）面実装型半導体装置１の運転時における半導体チップ１１からの発熱の大部分は、樹脂パッケージ２から外部に導出された第１の外部端子３及び第２の外部端子４により放熱される。従って、放熱効果を上げるためには、該外部端子３，４を大きくする必要があり、面実装型半導体装置１全体の小型化の要請に十分応えることが困難であった。
（２）従来では面実装型半導体装置１の樹脂パッケージ２を形成後に、第１の外部リード３及び第２の外部リード４の外方端３ｂ，４ｂを折り曲げ加工するために、加工時の機械的ストレスが半導体チップ１１に加えないための方策が必要で、リード曲げ装置の複雑化やこの装置の運転時の管理を煩雑なものにしていた。
（３）面実装型半導体装置１の重心が樹脂パッケージ２の高さ方向に対して高くなるため、プリント基板等に搭載・固着させる場合に安定性が悪く、組立時の作業性が悪かった。
【０００７】
【発明の目的】
本発明は上記のような課題を解決すためになされたもので、放熱性に優れ、小型でかつプリント基板等に搭載・固着させる場合に安定性が良く、また、半導体チップに機械的ストレスを加えるおそれのない面実装型半導体装置を提供することを目的とするものである。
【０００８】
【課題を解決するための手段】
請求項１に記載の発明によれば、半導体チップ（１１）と、この半導体チップ（１１）の両電極にそれぞれ接続される第１の外部端子（２１）と、第２の外部端子（２２）とを備え、上記半導体チップ（１１）、第１の外部端子（２１）及び第２の外部端子（２２）の周囲が、第１の外部端子（２１）及び第２の外部端子の一部を露出させて樹脂パッケージ（２）で樹脂封止された面実装型半導体装置（２０）であって、
上記第１の外部端子（２１）は、その上面に半導体チップ（１１）の一方の主面が固着され、該第１の外部端子（２１）の下面は、前記樹脂パッケージ（２）の下面と同一になるように外部に露出し、
上記第２の外部端子（２２）は、上記半導体チップ（１１）及び第１の外部端子（２１）を覆うように略コ字状に形成され、該第２の外部端子（２２）の内側底部と上記半導体チップ（１１）の他方の主面とが固着され、該第２の外部端子（２２）両端の外方端（２２ｂ，２２ｃ）は、上記樹脂パッケージ（２）から外部に露出し、かつ、該樹脂パッケージ（２）の下面と面一に形成し、
前記第１の外部端子（２１）の中央部に半導体チップ（１１）側に向けて突き出る凸部（２１ａ）を設けたことを特徴する面実装型半導体装置（２０）が提供される。
請求項１に記載の面実装型半導体装置（２０）では、第１の外部端子（２１）が樹脂パッケージ（２）の下面と面一に配置され、該第１の外部端子（２１）上に半導体チップ（１１）が搭載・固着されるため、必然的に重心が樹脂パッケージ（２）の下部に位置することになる。また、樹脂パッケージ（２）内に配置される第２の外部端子（２２）は予めフォーミング加工されているため、半導体チップ（１１）に機械的ストレスを加えることがない。また、半導体チップ（１１）からの発熱は外部に下面が露出した第１の外部端子（２１）及び該半導体チップ（１１）を囲むように配置された第２の外部端子（２２）を介して行われるので、放熱性が良く、かつ、樹脂パッケージ（２）の高さを低く抑えられるので小型化が実現できる。
【０００９】
【実施例】
以下に、本発明の実施例を説明する。図１は本発明に関連する第１例を示す面実装型半導体装置の断面図である。図において、面実装型半導体装置２０は、平板状の第１の外部端子２１を有し、この外部端子２１は紙面の裏面方向に延びている。第１の外部端子２１の中央部に、例えばダイオード構造を有する半導体チップ１１が搭載・固着されている。上記の半導体チップ１１及び第１の外部端子２１を覆うように略コ字状に形成された第２の外部端子２２が配置されている。第２の外部端子２２の内方部２２ａの中央は、前記半導体チップ１１の表面電極、例えばアノード電極に固着される。
【００１０】
一方、互いにクランク状に折り曲げられた外方端２２ｂ，２２ｃは樹脂パッケージ２の外部に一部が導出されている。ここで、重要なことは第１の外部端子２１の下面と、第２の外部端子２２の外方端２２ｂ，２２ｃの下面が、樹脂パッケージ２の下面と面一に形成され、かつ、第１の外部端子２１の下面及び第２の外部端子２２の外方端２２ｂ，２２ｃの下面が外部に露出していることである。これらの露出面は、例えばプリント基板の導体パターン上に載せられ、該導体パターンに密着して半田固着されるためである。
【００１１】
次に、上記のような構造の面実装型半導体装置１の製造方法について、図２及び図３を参照して説明する。
まず、図２示すようなリードフレーム３０を使用する。このリードフレーム３０は、一対のサイドフレーム３１，３２を有し、このサイドフレーム３１，３２間にリード部３３が該リードフレーム３０の長手方向に沿って等間隔で形成されている。
【００１２】
上記のリード部３３には、プレス機械等により予め折り曲げ形成された略コ字状の凹部３４が形成されている。この凹部３４に半導体チップ１１を載置・固着させた後、板状のリード部材３５を、それぞれの凹部３４に載置・固定させた半導体チップ１１上に差し渡すようにして固着させる。
次に、図示を省略したモールド金型にリードフレーム３０を収め、所定の範囲の樹脂モールドを施し、樹脂パッケージ２を形成する。
【００１３】
その後、リードフレーム３０からサイドフレーム３１，３２の部分を切り離して図３に示すような個々の面実装型半導体装置２０を得る。
なお、図３は、図２のＡ−Ａ線に沿う断面図であり、図２と同一部分には同一符号を付してその詳しい説明は省略する。
【００１４】
上記のように構成された面実装型半導体装置１は、樹脂パッケージ２から外部に露出した第２の外部端子２２の外方端２２ｂ，２２ｃの両方で放熱されると共に、第１の外部端子２１の下面、すなわち、樹脂パッケージ２からの露出面を介して放熱されるため、著しく放熱効果が向上する。
【００１５】
また、板状の第１の外部端子２１上に半導体チップ１１を搭載し、かつ、第２の外部端子２２の外方端２２ｂ，２２ｃを樹脂パッケージ２の下面と面一になるように導出したので、重心を低くすることができる。このため、第１の外部端子２１の下面及び第２の外部端子２２の外方端２２ｂ，２２ｃの下面を、例えばプリント基板の導体パターン上に載置する場合に安定性が良く、半田付け作業等における作業性が著しく向上する。
【００１６】
さらに、樹脂パッケージ２の高さを低く抑えることができるため、面実装型半導体装置１全体の小型化を実現することができる。また、第２の外部端子２２が予め折り曲げ加工されているため、樹脂モールド後に半導体チップ１１に機械的ストレスを加えることがなく、従って電気特性への悪影響あるいは半導体チップ１１を損傷させるというようなおそれもない。
【００１７】
次に、本発明に関連する第２例を、図４を参照して説明する。この面実装型半導体装置２０の特徴は、第２の外部端子２２の立上り部２２ｄ，２２ｅの側面を樹脂パッケージ２から外部に露出するようにした点である。上記のように立上り部２２ｄ，２２ｅの側面を外部に露出させることにより半導体チップ１１からの発熱を一層効果的に放熱することができる。
【００１８】
図５は、本発明に関連する第３例を示し、この例では第２の外部端子２２の内方部２２ａの略中央に、半導体チップ１１に向かって突き出た凸部２２ｆを設けたものである。この例によれば、半導体チップ１１の一方の主面に形成された表面電極部分のみに凸部２２ｆを対応させて半田固着させることができる利点が生じる。
【００１９】
図６は、本発明の第１の実施例を示し、第１の外部端子２１の中央に半導体チップ１１に向かって突き出た凸部２１ａを設けたものである。この実施例によれば、上記第３例と同様に半導体チップ１１の他方の主面に形成された表面電極部分のみに凸部２１ａを対応させて半田固着させることができる利点が生じる。
【００２０】
図７は、本発明に関連する第４例を示し、第２の外部端子２２の内方部２２ａと半導体チップ１１との間に、銅（Ｃｕ）、あるいは銅にニッケル（Ｎｉ）メッキ等を施した材料からなる導電性部材２３を介在させたものである。この例によれば、半導体チップ１１からの発熱を、導電性部材２３及び第２の外部端子２２を介してさらに効果的に放熱できる利点が生じる。
【００２１】
図８は、本発明に関連する第５例を示し、この例では第１の外部端子２１と半導体チップ１１との間に上記第４例と同様の材料で形成した導電性部材２３を介在させたものである。この例によれば、半導体チップ１１からの発熱を導電性部材２３及び第１の外部端子２１を介してさらに効果的に放熱できる利点が生じる。
【００２２】
【発明の効果】
以上説明したように、本発明は第１の外部端子の下面及び第２の外部端子の外方端の下面を樹脂パッケージの下面と面一とし、かつ、外部に露出するように形成したので、放熱効果が良好となる。また、半導体チップを含めて各部材を樹脂パッケージの下部に位置するように配置したので、重心が低くなり、プリント基板等に載置した場合の安定性が向上する。さらに、樹脂パッケージの高さを低くすることができ、その結果、面実装型半導体装置の小型化を実現することができる。
また、樹脂モールド後に、外部端子の折り曲げ加工を施さないため、半導体チップに機械的ストレスを加えることがなく、特性の劣化等を生じさせることがないなど、総合的に優れた効果を奏するものである。
【図面の簡単な説明】
【図１】本発明に関連する第１例を示す面実装型半導体装置の断面図である。
【図２】本発明に関連する第１例の面実装型半導体装置を製造するためのリードフレーム及びそれに搭載される部品の斜視図である。
【図３】図２におけるＡ−Ａ線に沿う断面図である。
【図４】本発明に関連する第２例を示す断面図である。
【図５】本発明に関連する第３例を示す断面図である。
【図６】本発明の第１の実施例を示す断面図である。
【図７】本発明に関連する第４例を示す断面図である。
【図８】本発明に関連する第５例を示す断面図である。
【図９】従来のこの種の面実装型半導体装置の構造例を示す断面図である。
【図１０】上記従来の面実装型半導体装置に使用されるリードフレーム及びそれに搭載される部品の斜視図である。
【符号の説明】
２ 樹脂パッケージ
１１ 半導体チップ
２０ 面実装型半導体装置
２１ 第１の外部端子
２１ａ 凸部
２２ 第２の外部端子
２２ａ 内方部
２２ｂ 外方端
２２ｃ 外方端
２２ｄ 立上り部
２２ｅ 立上り部
２２ｆ 凸部
２３ 導電性部材[0001]
The present invention relates to a surface-mounting type semiconductor device that has good heat dissipation, does not give mechanical stress to a semiconductor chip, and has realized downsizing as a whole.
[0002]
[Prior art]
An example of the structure of a conventional surface mount semiconductor device is shown in FIG.
In the figure, reference numeral 1 denotes the entire surface mount semiconductor device, which has a first external terminal 3 and a second external terminal 4 in a solid square type resin package 2.
On the inner end 3 a of the first external terminal 3, for example, a semiconductor chip 11 having a diode structure is mounted and fixed. One main surface (upper surface in FIG. 9) of the semiconductor chip 11 and the inner end 4 a of the second external terminal 4 are connected by an internal lead 5.
The outer ends 3b and 4b of the first external terminal 3 and the second external terminal 4 led out from the side surface of the resin package 2 are bent in a crank shape, and the lower surface of the outer ends 3b and 4b and the resin package The lower surface of 2 is formed to be substantially flush.
[0003]
Next, a method for manufacturing the surface-mounted semiconductor device 1 having the above structure will be described with reference to FIG.
In FIG. 10, reference numeral 6 denotes a lead frame used in the surface mount semiconductor device 1, and the lead frame 6 has a pair of side frames 7 and 8 facing each other. A first lead 9 and a second lead 10 extending inward from the positions where these side frames 7 and 8 face each other are formed. The pair of side frames 7 and 8 are connected by a connecting portion 11 at a predetermined interval.
[0004]
After the semiconductor chip 11 is mounted and fixed on the first lead 9 of the lead frame 6, the surface electrode of the semiconductor chip 11 and the inner end of the second lead 10 are soldered and fixed by the internal lead 5.
[0005]
The lead frame 6 assembled as described above is housed in a mold die (not shown), and the periphery of the semiconductor chip 11 is resin-molded over a certain range to form the resin package 2 as shown in FIG.
Thereafter, the lead frame 6 taken out from the mold is cut at a predetermined position. At the same time as this cutting, or by subsequent forming, the portions of the first lead 9 and the second lead 10 that protrude to the outside from the resin package 2 are bent into a crack shape, and the external terminals as shown in FIG. A surface-mount type semiconductor device 1 having 3 and 4 is obtained.
[0006]
[Problems to be solved by the invention]
Since the conventional surface-mount type semiconductor device is configured as described above, there is a general problem to be solved as follows.
(1) Most of the heat generated from the semiconductor chip 11 during the operation of the surface-mount type semiconductor device 1 is radiated by the first external terminal 3 and the second external terminal 4 led out from the resin package 2 to the outside. . Therefore, in order to increase the heat dissipation effect, it is necessary to enlarge the external terminals 3 and 4, and it is difficult to sufficiently meet the demand for downsizing of the entire surface mount semiconductor device 1.
(2) Conventionally, after forming the resin package 2 of the surface mount type semiconductor device 1, the outer end 3b, 4b of the first external lead 3 and the second external lead 4 is bent to process the machine. Therefore, it is necessary to take measures to prevent the mechanical stress from being applied to the semiconductor chip 11, which complicates the lead bending apparatus and makes the management during operation of the apparatus complicated.
(3) Since the center of gravity of the surface-mounting semiconductor device 1 is higher than the height direction of the resin package 2, the stability is poor when mounting and fixing to a printed circuit board or the like, and the workability during assembly is poor.
[0007]
OBJECT OF THE INVENTION
The present invention has been made to solve the above-described problems, and has excellent heat dissipation, small size, good stability when mounted on a printed board or the like, and mechanical stress on a semiconductor chip. An object of the present invention is to provide a surface-mounting type semiconductor device that is not likely to be added.
[0008]
[Means for Solving the Problems]
According to the first aspect of the present invention, the semiconductor chip (11), the first external terminal (21) connected to both electrodes of the semiconductor chip (11), and the second external terminal (22), respectively. The periphery of the semiconductor chip (11), the first external terminal (21) and the second external terminal (22) is a part of the first external terminal (21) and the second external terminal. A surface-mount type semiconductor device (20) exposed and resin-sealed with a resin package (2),
One main surface of the semiconductor chip (11) is fixed to the upper surface of the first external terminal (21), and the lower surface of the first external terminal (21) is connected to the lower surface of the resin package (2). Exposed outside to be the same,
Said second external terminal (22) is formed on the semiconductor chip (11) and the first external terminal (21) so as to cover substantially U-shaped, the inner bottom portion of the second external terminal (22) And the other main surface of the semiconductor chip (11) are fixed, and the outer ends (22b, 22c) at both ends of the second external terminal (22) are exposed to the outside from the resin package (2), And formed flush with the lower surface of the resin package (2),
A surface-mount type semiconductor device (20) is provided in which a convex portion (21a) protruding toward the semiconductor chip (11) is provided at the center of the first external terminal (21).
In the surface-mount type semiconductor device (20) according to claim 1, the first external terminal (21) is disposed flush with the lower surface of the resin package (2), and is on the first external terminal (21). Since the semiconductor chip (11) is mounted and fixed, the center of gravity is necessarily positioned below the resin package (2). Further, since the second external terminal (22) disposed in the resin package (2) is formed in advance, no mechanical stress is applied to the semiconductor chip (11). Further, heat generated from the semiconductor chip (11) is transmitted through the first external terminal (21) whose lower surface is exposed to the outside and the second external terminal (22) disposed so as to surround the semiconductor chip (11). Since it is performed, heat dissipation is good and the height of the resin package (2) can be kept low, so that downsizing can be realized.
[0009]
【Example】
Examples of the present invention will be described below. FIG. 1 is a cross-sectional view of a surface mount semiconductor device showing a first example related to the present invention. In the figure, the surface-mount type semiconductor device 20 has a flat plate-like first external terminal 21, and the external terminal 21 extends in the rear surface direction of the paper surface. For example, a semiconductor chip 11 having a diode structure is mounted and fixed at the center of the first external terminal 21. A second external terminal 22 formed in a substantially U shape so as to cover the semiconductor chip 11 and the first external terminal 21 is disposed. The center of the inner portion 22a of the second external terminal 22 is fixed to the surface electrode of the semiconductor chip 11 , for example, the anode electrode.
[0010]
On the other hand, the outer ends 22 b and 22 c bent in a crank shape are partially led out of the resin package 2. Here, what is important is that the lower surface of the first external terminal 21 and the lower surfaces of the outer ends 22b and 22c of the second external terminal 22 are formed flush with the lower surface of the resin package 2, and the first The lower surface of the external terminal 21 and the lower surfaces of the outer ends 22b and 22c of the second external terminal 22 are exposed to the outside. This is because these exposed surfaces are placed on, for example, a conductor pattern of a printed circuit board, and are in close contact with the conductor pattern and fixed by soldering.
[0011]
Next, a method for manufacturing the surface mount semiconductor device 1 having the above structure will be described with reference to FIGS.
First, a lead frame 30 as shown in FIG. 2 is used. The lead frame 30 has a pair of side frames 31 and 32, and lead portions 33 are formed between the side frames 31 and 32 at equal intervals along the longitudinal direction of the lead frame 30.
[0012]
The lead portion 33 is formed with a substantially U-shaped concave portion 34 that is bent in advance by a press machine or the like. After the semiconductor chip 11 is placed and fixed in the recess 34, the plate-like lead member 35 is fixed so as to pass over the semiconductor chip 11 mounted and fixed in the respective recess 34.
Next, the lead frame 30 is placed in a mold die not shown, and a resin mold in a predetermined range is applied to form the resin package 2.
[0013]
Thereafter, the side frames 31 and 32 are separated from the lead frame 30 to obtain individual surface mount semiconductor devices 20 as shown in FIG.
FIG. 3 is a cross-sectional view taken along the line AA in FIG. 2. The same parts as those in FIG.
[0014]
The surface-mount type semiconductor device 1 configured as described above radiates heat at both the outer ends 22b and 22c of the second external terminal 22 exposed to the outside from the resin package 2, and the first external terminal 21. Since the heat is radiated through the lower surface, that is, the exposed surface from the resin package 2, the heat radiation effect is remarkably improved.
[0015]
Further, the semiconductor chip 11 is mounted on the plate-like first external terminal 21, and the outer ends 22 b and 22 c of the second external terminal 22 are led out to be flush with the lower surface of the resin package 2. Therefore, the center of gravity can be lowered. For this reason, when the lower surface of the first external terminal 21 and the lower surfaces of the outer ends 22b and 22c of the second external terminal 22 are placed on, for example, a conductor pattern of a printed circuit board, the stability is good and the soldering operation is performed. The workability in such as is significantly improved.
[0016]
Furthermore, since the height of the resin package 2 can be kept low, it is possible to reduce the size of the entire surface mount semiconductor device 1. Further, since the second external terminal 22 is bent in advance, mechanical stress is not applied to the semiconductor chip 11 after the resin molding, and therefore there is a risk of adversely affecting electrical characteristics or damaging the semiconductor chip 11. Nor.
[0017]
Next, a second example related to the present invention will be described with reference to FIG. The feature of this surface-mount type semiconductor device 20 is that the side surfaces of the rising portions 22d and 22e of the second external terminal 22 are exposed to the outside from the resin package 2. By exposing the side surfaces of the rising portions 22d and 22e to the outside as described above, the heat generated from the semiconductor chip 11 can be radiated more effectively.
[0018]
FIG. 5 shows a third example related to the present invention. In this example , a convex portion 22 f protruding toward the semiconductor chip 11 is provided at the approximate center of the inner portion 22 a of the second external terminal 22. is there. According to this example , there is an advantage that the convex portion 22f can be made to correspond to only the surface electrode portion formed on one main surface of the semiconductor chip 11 and soldered.
[0019]
6 shows a first embodiment of the present invention, is provided with a convex portion 21a protruding toward the semiconductor chip 11 to the center of the first external terminal 21. According to this embodiment, as in the third embodiment , there is an advantage that the convex portion 21a can be made to correspond to the surface electrode portion formed on the other main surface of the semiconductor chip 11 and soldered.
[0020]
FIG. 7 shows a fourth example related to the present invention. Copper (Cu) or nickel (Ni) plating or the like is applied between the inner portion 22a of the second external terminal 22 and the semiconductor chip 11. The conductive member 23 made of the applied material is interposed. According to this example , there is an advantage that heat generated from the semiconductor chip 11 can be radiated more effectively through the conductive member 23 and the second external terminal 22.
[0021]
FIG. 8 shows a fifth example related to the present invention. In this example , a conductive member 23 formed of the same material as that of the fourth example is interposed between the first external terminal 21 and the semiconductor chip 11. It is a thing. According to this example , there is an advantage that heat generated from the semiconductor chip 11 can be radiated more effectively through the conductive member 23 and the first external terminal 21.
[0022]
【The invention's effect】
As described above, the present invention is formed so that the lower surface of the first external terminal and the lower surface of the outer end of the second external terminal are flush with the lower surface of the resin package and exposed to the outside. The heat dissipation effect is improved. Further, since each member including the semiconductor chip is arranged so as to be positioned below the resin package, the center of gravity is lowered, and the stability when placed on a printed board or the like is improved. Furthermore, the height of the resin package can be reduced, and as a result, the surface mount semiconductor device can be miniaturized.
In addition, since the external terminals are not bent after the resin molding, the semiconductor chip does not apply mechanical stress and does not cause deterioration of characteristics, etc. is there.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a surface mount semiconductor device showing a first example related to the present invention.
FIG. 2 is a perspective view of a lead frame and components mounted thereon for manufacturing a surface-mount type semiconductor device of a first example related to the present invention.
3 is a cross-sectional view taken along line AA in FIG.
FIG. 4 is a cross-sectional view showing a second example related to the present invention.
FIG. 5 is a sectional view showing a third example related to the present invention.
FIG. 6 is a cross-sectional view showing a first embodiment of the present invention.
FIG. 7 is a sectional view showing a fourth example related to the present invention.
FIG. 8 is a cross-sectional view showing a fifth example related to the present invention.
FIG. 9 is a cross-sectional view showing an example of the structure of a conventional surface mount semiconductor device of this type.
FIG. 10 is a perspective view of a lead frame used in the conventional surface mount semiconductor device and components mounted thereon.
[Explanation of symbols]
2 Resin Package 11 Semiconductor Chip 20 Surface Mount Type Semiconductor Device 21 First External Terminal 21a Protruding Part 22 Second External Terminal 22a Inner Part 22b Outer End 22c Outer End 22d Rising Part 22e Rising Part 22f Convex Part 23 Conductivity Sexual member

Claims (5)

半導体チップ（１１）と、この半導体チップ（１１）の両電極にそれぞれ接続される第１の外部端子（２１）と、第２の外部端子（２２）とを備え、上記半導体チップ（１１）、第１の外部端子（２１）及び第２の外部端子（２２）の周囲が、第１の外部端子（２１）及び第２の外部端子の一部を露出させて樹脂パッケージ（２）で樹脂封止された面実装型半導体装置（２０）であって、
上記第１の外部端子（２１）は、その上面に半導体チップ（１１）の一方の主面が固着され、該第１の外部端子（２１）の下面は、前記樹脂パッケージ（２）の下面と同一になるように外部に露出し、
上記第２の外部端子（２２）は、上記半導体チップ（１１）及び第１の外部端子（２１）を覆うように略コ字状に形成され、該第２の外部端子（２２）の内側底部と上記半導体チップ（１１）の他方の主面とが固着され、該第２の外部端子（２２）両端の外方端（２２ｂ，２２ｃ）は、上記樹脂パッケージ（２）から外部に露出し、かつ、該樹脂パッケージ（２）の下面と面一に形成し、
前記第１の外部端子（２１）の中央部に半導体チップ（１１）側に向けて突き出る凸部（２１ａ）を設けたことを特徴する面実装型半導体装置（２０）。A semiconductor chip (11); a first external terminal (21) connected to both electrodes of the semiconductor chip (11); and a second external terminal (22), the semiconductor chip (11), Around the first external terminal (21) and the second external terminal (22), a part of the first external terminal (21) and the second external terminal is exposed, and the resin package (2) is used for resin sealing. A stopped surface mount semiconductor device (20),
One main surface of the semiconductor chip (11) is fixed to the upper surface of the first external terminal (21), and the lower surface of the first external terminal (21) is connected to the lower surface of the resin package (2). Exposed outside to be the same,
The second external terminal (22) is formed in a substantially U shape so as to cover the semiconductor chip (11) and the first external terminal (21), and an inner bottom portion of the second external terminal (22). And the other main surface of the semiconductor chip (11) are fixed, and the outer ends (22b, 22c) at both ends of the second external terminal (22) are exposed to the outside from the resin package (2), And formed flush with the lower surface of the resin package (2),
A surface-mount type semiconductor device (20), wherein a convex portion (21a) protruding toward the semiconductor chip (11) is provided at a central portion of the first external terminal (21). 前記第２の外部端子（２２）の立上り部（２２ｄ，２２ｅ）の側面が、前記樹脂パッケージ（２）から露出していることを特徴とする請求項１に記載の面実装型半導体装置（２０）。  The surface-mount type semiconductor device (20) according to claim 1, wherein the side surfaces of the rising portions (22d, 22e) of the second external terminal (22) are exposed from the resin package (2). ). 前記第２の外部端子（２２）の内方部（２２ａ）に、半導体チップ（１１）側に向けて突き出る凸部（２２ｆ）を設けたことを特徴する請求項１又は請求項２に記載の面実装型半導体装置（２０）。The convex part (22f) which protrudes toward the semiconductor chip (11) side was provided in the inward part (22a) of the said 2nd external terminal (22), The Claim 1 or Claim 2 characterized by the above-mentioned. Surface mount semiconductor device (20). 前記第２の外部端子（２２）の内方部（２２ａ）と半導体チップ（１１）との間に導電性部材（２３）を介在させたことを特徴とする請求項１又は請求項２に記載の面実装型半導体装置（２０）。The conductive member (23) is interposed between the inner part (22a) of the second external terminal (22) and the semiconductor chip (11), according to claim 1 or 2, Surface mount type semiconductor device (20). 前記第１の外部端子（２１）と半導体チップ（１１）との間に導電性部材（２３）を介在させたことを特徴とする請求項１又は請求項２に記載の面実装型半導体装置（２０）。The surface-mount type semiconductor device according to claim 1 or 2, wherein a conductive member (23) is interposed between the first external terminal (21) and the semiconductor chip (11). 20).
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