JP4446520B2 - ESD protection circuit - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a technology effective when applied to a semiconductor device, and further to a semiconductor integrated circuit composed of a GaAs HEMT (High Electron Mobility Transistor) and a MESFET (Metal Semiconductor Field Effect Transistor), for example, an optical transceiver for optical communication. The present invention relates to a technique useful for improving the reliability of various amplifiers and drivers.
[0002]
[Prior art]
Electrostatic discharge (ESD) is generated from other circuit parts and insulators of equipment in which a semiconductor device is arranged, and a human body handling the semiconductor device, and causes destruction and damage of the semiconductor device. ESD is an important factor that affects the reliability of semiconductor devices, and it is desirable to sufficiently increase the breakdown voltage against ESD in order to ensure more stable operation.
[0003]
Amplifying FETs located at the input section are particularly susceptible to damage from such ESD. This damage is generally considered to be a thermal breakdown, and when ESD is applied, a current flows through the electrode metal-semiconductor junction, which causes a sudden rise in temperature and a decrease in junction resistance, resulting in thermal runaway. It is considered that the joint is dissolved and destroyed.
[0004]
2. Description of the Related Art Conventionally, in order to protect a semiconductor device from ESD, a method is known in which a Zener diode or the like designed to operate at a predetermined voltage or higher is provided on the input side or output side of an amplifier circuit. FIG. 5 is a diagram showing a conventional electrostatic protection circuit, and shows a configuration for general input protection. Under normal driving voltage of the semiconductor device, the diode is closed. This diode operates when the voltage exceeds a predetermined voltage, and an excessive current generated by a voltage input more than necessary is bypassed to the plus side power source (Vdd) or minus side power source (Vss) to protect the internal circuit.
[0005]
[Problems to be solved by the invention]
Thin film stack structures of different types of semiconductors such as GaAs and AlGaAs and semiconductor thin film stack structures of different impurity concentrations play an essential role in realizing various devices such as high-speed transistors and high-performance lasers. In particular, various stacked FETs (HEMT, MESFET, etc.) that utilize high electron mobility of compound semiconductors typified by GaAs are high-speed components for configuring high-frequency semiconductor devices such as amplifiers and drivers for high-speed optical communications. This is extremely important as a semiconductor element.
[0006]
Even in such a high-frequency semiconductor device, it is naturally desirable to increase the withstand voltage against ESD in order to ensure more stable operation and improve reliability. Therefore, in the conventional semiconductor device, a method of adding a protective diode to the input / output side as described above has been proposed.
[0007]
However, it is difficult to manufacture a special ESD protection diode such as a Zener diode designed to operate at a predetermined voltage on the same wafer as a HEMT or MESFET device using a thin film laminated structure. Instead, it leads to a significant increase in process steps.
[0008]
Above all, if such a diode is simply added to a high-frequency semiconductor device for high-speed optical communication that operates in a wide band from low frequency to over a dozen GHz or more, it is necessary to design impedance matching and the like. At the same time, it becomes a limiting condition and a factor that extremely deteriorates the performance of the high-frequency semiconductor device.
[0009]
Therefore, conventionally, there is almost no method for effectively discharging and removing static electricity flowing from the outside while maintaining the performance of the high-frequency semiconductor device, and it has been extremely difficult to provide such a protection diode.
[0010]
In addition, even if the conventional method as shown in FIG. 5 is taken, it is very effective against ESD after the semiconductor device is placed in the equipment and connected to a power source or the like. The conventional method is effective only in a single direction of ESD polarity. For example, humans handle semiconductor devices before they are placed in equipment, and the input is negative between the input and the positive power supply (Vdd). When ESD occurs in the polarity, the ESD discharge path is not secured and the input FET may be destroyed, which is not satisfactory.
[0011]
[Means for Solving the Problems]
In the present invention, in order to solve the above problems, a cathode is connected to the input terminal between the input terminal of the high-frequency semiconductor device and the positive power supply terminal, and between the input terminal of the high-frequency semiconductor device and the negative power supply terminal. Thus, a diode is provided. This electrostatic protection circuit can improve the ESD withstand voltage in both positive and negative polarities without degrading the characteristics of the high-frequency element.
[0012]
There may be at least one diode to be connected, and a voltage value at which a current flows to the electrostatic protection circuit can be set by connecting a plurality of diodes in series. Accordingly, even if the absolute values of the positive and negative power supply voltages are different, arbitrary voltage values can be set by adjusting the number of diodes.
[0013]
Further, the input terminal of the high frequency semiconductor device and the cathode of the first diode are connected, a second diode is provided between the anode of the first diode and the positive power supply terminal, and the anode of the first diode A cathode of the second diode is connected, an anode of the second diode and a positive power supply terminal are connected, a third diode is provided between the anode of the first diode and the negative power supply terminal, Since the anode of the third diode and the cathode of the third diode are connected and the anode of the third diode and the negative power supply terminal are connected, an unnecessary capacitance is not connected to the input section. The degree of degradation of the characteristics is small, and at the same time, the ESD withstand voltage is improved in both positive and negative polarities.
[0014]
Further, the first to third diodes described above are configured by diodes in which one or more diodes are connected in series in the same polarity direction, so that the voltage value at which current flows can be freely set depending on the number of diodes. It can be set. Therefore, even if the absolute values of the positive and negative power supply voltages are different, arbitrary voltage values can be set by adjusting the number of diodes.
[0015]
In addition, by configuring the diode with a Schottky diode for level adjustment, it is possible to easily form an electrostatic protection circuit without adding unnecessary steps to the manufacturing process of the high-frequency element. The electrode width of the Schottky electrode of this level adjusting diode needs to be 50 μm or less, more preferably 30 μm or less, although it depends on the applied high frequency device.
[0016]
This electrostatic protection circuit is widely applicable to high-frequency semiconductor devices, but is suitable for use in power amplifiers and preamplifiers.
[0017]
Embodiment
The present invention provides a high-frequency semiconductor device that has sufficient withstand voltage against electrostatic discharge and has improved reliability while maintaining the performance of the high-frequency semiconductor device without changing the current high-frequency element manufacturing process. Is the purpose.
[0018]
Focusing on the ESD withstand voltage including the polarity of a single FET such as a GaAs HEMT element that constitutes a high-frequency semiconductor device, it can be manufactured without changing the current process while using conventional semiconductor integrated circuit components. By properly arranging the diode for bias adjustment (basically a so-called Schottky diode in which the source and drain of the HEMT element are short-circuited), while maintaining the performance of a high-frequency semiconductor device, ESD as a semiconductor device It improves the breakdown voltage.
[0019]
The inventors first tried an ESD test (based on EIAJ ED4701) to examine the ESD withstand voltage of a single HEMT device and a bias adjusting diode device. The HEMT device used is a GaAs / AlGaAs HEMT having a gate width of 100 μm and a gate length of 0.1 μm.
[0020]
The bias adjusting diode used was a Schottky electrode (anode electrode of the bias adjusting diode: corresponding to the gate electrode in the case of HEMT) having a thickness of 30 μm and 2 μm and connected in two stages in series.
[0021]
FIG. 3 is a schematic diagram showing a configuration between terminals of a HEMT element and a bias adjustment diode subjected to an ESD test. The test was conducted by performing an ESD withstand voltage test between the gate and source of (1) HEMT (between terminals 1 and 2 in FIG. 3, (1)). (2) An ESD withstand voltage test conducted between the cathode and anode of the bias adjustment diode (between terminals 3 and 4 in FIG. 3, (2)). (3) ESD withstand voltage test with the HEMT gate and the anode of the bias adjustment diode short-circuited and the source of the HEMT and the cathode of the bias adjustment diode short-circuited (between terminals 5 and 6 in FIG. 3, (3)) ). (4) ESD withstand voltage test of the HEMT gate and the bias adjustment diode short-circuited and the HEMT source and bias adjustment diode anode short-circuited (between terminals 7 and 8 in FIG. 3, (4)) ).
[0022]
As described above, a total of eight types of ESD withstand voltage tests including positive and negative polarities were performed on samples having a total of four types of inter-terminal configurations by actually fabricating the elements. In the test, a curve tracer is installed between the measurement terminals described above, and when a change is observed in the IV characteristics before and after ESD application, the semiconductor device is judged to be damaged, and the voltage changes to a lower voltage than that voltage. The voltage when no was observed was taken as the withstand voltage.
[0023]
As a result of the ESD test, the ESD withstand voltage test between the gate and the source of the HEMT in the above (1) was over several hundred volts when the gate had a positive polarity, but the gate was negative. At that time, it was very low, less than 100V. In addition, when the ESD withstand voltage test was performed between the cathode and the anode of the bias adjusting diode (2), the withstand voltage was 1000 V or more in the forward bias direction, but 100 V or less in the reverse bias.
[0024]
Furthermore, in the case of (3) HEMT and bias adjustment diode connected in parallel, the withstand voltage was 100V or less for both polarities, whereas in case of (4), the bias adjustment diode was in the forward bias direction. Was found to exhibit a very good withstand voltage characteristic of 1000 V or more and several hundred V or more even in the case of reverse bias.
[0025]
In both the HEMT and the bias adjustment diode, although the ESD withstand voltage is low in the reverse bias direction polarity in the Schottky junction formed between the gate electrode and the Schottky electrode and the semiconductor thin film, the ESD withstand voltage to some extent with forward bias It was found that When a reverse bias is applied to each element, current does not flow easily, and the junction is broken by the voltage of the ESD withstand voltage test. Since the forward bias is basically a condition for current flow, it is destroyed by excessive current. From the viewpoint of the polarity of the ESD withstand voltage, forward bias is stronger, and excessive current generated from ESD is generated by adopting a configuration in which the forward bias direction of HEMT and bias adjustment diode is reversed as in (4). It has been clarified that the withstand voltage in both polarities improves as a result.
[0026]
Previously, it was stated that the performance of the protective diode, which has been used in the past, when used in a high-frequency semiconductor device that operates at a frequency of more than a dozen GHz or more, greatly reduces its performance. Simulation was tried to show the sex. In order to improve the withstand voltage with respect to both polarities of ESD by the conventional method using the level adjusting diode, the configuration as shown in FIG. 6 is required.
[0027]
Here, in order to improve the ESD withstand voltage between the power source of the present invention, that is, the input, the positive power source, and the negative power source as described above, the configuration shown in FIG. . When many diodes are connected to the input portion, the capacitance increases, and the performance of the semiconductor device may deteriorate. Therefore, a configuration as shown in FIG. 2 can be adopted as an advanced version of the present invention.
[0028]
As a guideline for determining how the diode added to the input unit affects the performance of the semiconductor device, the input unit of the actual power amplifier circuit is used for bias adjustment of the configuration as shown in FIGS. A total of four types of simulations were performed: a circuit in which a diode is arranged and a circuit to which no bias adjusting diode is added, and the S-parameter, specifically, the input reflection characteristic (S11), was obtained for its frequency characteristics. FIG. 4 shows the simulation result. 4, (a) is the configuration shown in FIG. 6, (b) is the configuration shown in FIG. 1, (c) is the configuration shown in FIG. 2, and (d) is a configuration in which no bias adjustment diode is added. , Respectively.
[0029]
As can be seen from FIG. 4, there is almost no input reflection when the frequency is 1 GHz or less. However, it can be seen that in the frequency region of about 10 GHz, the input reflection characteristics vary greatly depending on the arrangement of the bias adjustment diodes. In the figure, (d) shows that there is no bias adjustment diode for ESD protection. In the conventional configuration shown in FIG. 6, the reflection of the input is large, and it is possible to easily know the performance degradation of the semiconductor device. It can be seen that the configuration shown in FIG. 1, which is the invention of the present application, exhibits an excellent characteristic with input reflection of −10 dB or less at 10 GHz. In addition, it can be seen that the configuration shown in FIG. 2 shows excellent input reflection characteristics comparable to those without the bias adjustment diode.
[0030]
The width of the Schottky electrode of the bias adjusting diode used in this simulation is 30 μm, and the input reflection characteristic is significantly deteriorated as the width is increased.
[0031]
Therefore, the bias adjusting diode used in the present invention needs to have a Schottky electrode width of 50 μm or less, preferably 30 μm or less.
[0032]
The inventors actually manufactured a high-frequency amplifier having the input protection circuit of the present invention shown in FIGS. 1 and 2 and demonstrated its effect. Below, the specific example is given and demonstrated in detail.
[0033]
<First specific example>
First, a high frequency power amplifying apparatus having a bias adjusting diode having a configuration as shown in FIG. 1 was manufactured. The power amplifier was designed to be driven by a single + 5V power supply and to have a center bias of + 2V. Since the bias adjustment diode starts to flow at a voltage of about 0.5 V, the bias adjustment diode has seven positive and five negative inputs so that it does not operate at a normal power supply voltage. The diodes were arranged in series. For comparison, an amplifying device having no diode was also manufactured in the same process and the same lot.
[0034]
The manufactured high frequency power amplifying device was probed by an on-wafer probing device, and the power amplifying device was actually driven by a single + 5V power source. The S parameter of the input / output terminal was measured with a network analyzer, and the power gain and the -3 dB band were measured.
[0035]
The maximum gain of the amplifier without the bias adjusting diode was 15.7 dB, and the bandwidth was 12.5 GHz. In addition, a device having a bias adjustment diode had a maximum gain of 14.9 dB and a bandwidth of 12.3 GHz, and no significant difference was observed in performance. However, as a result of the ESD withstand voltage test, the device without the bias adjustment diode was 100 V or less, whereas the device with the bias adjustment diode was greatly improved to 300 V or more. As described above, by applying the present invention shown in FIG. 1 to the high-frequency amplifier, it is possible to obtain an effect of improving the ESD withstand voltage by three times or more while maintaining the performance.
[0036]
<Second specific example>
In this specific example, a high-frequency preamplifier having a bias adjusting diode having the configuration shown in FIG. 1 was manufactured. The power supply used was + 3.3V and -2.0V, and 8 bias adjustment diodes were provided on the positive side and 5 on the negative side. As in the case of Example 3, for comparison, a preamplifier without this diode was manufactured in the same process and the same lot.
[0037]
The manufactured high-frequency preamplifier was actually mounted with a photodiode in front of the input, and the transimpedance was measured with an optical component analyzer.
[0038]
As a result, the transimpedance of the amplifier without the bias adjustment diode is 57.5 dBΩ, and the one with the bias adjustment diode is 55.7 dBΩ, and there are some differences depending on the presence or absence of the bias adjustment diode of the present invention. Although recognized, the performance did not change significantly. On the other hand, the ESD withstand voltage was about 100V in the device without the bias adjustment diode, whereas the device with the bias adjustment diode was 400V or more, and the application to the high frequency preamplifier of the present invention was There was a great effect on the breakdown voltage improvement.
[0039]
<Third specific example>
In this specific example, a high-frequency preamplifier having a bias adjusting diode having a configuration as shown in FIG. 2 was manufactured. The power supply used is the same as in Example 2, 2 power supplies of + 3.3V and -2.0V, and 8 bias adjustment diodes on the positive side and 5 bias adjustment diodes via one bias adjustment diode for the input. Was provided.
[0040]
The manufactured high-frequency preamplifier was actually mounted with a photodiode before input in the same manner as in Example 2, and the transimpedance was measured with an optical component analyzer.
[0041]
As a result, the transimpedance was 57.3 dBΩ, which was not inferior in terms of performance compared to the one without the bias adjustment diode. This is considered to be due to the fact that an extra capacitance is reduced as a result of the reduction in the number of diodes directly connected to the input, although one more bias adjustment diode is required as compared with the specific example 2.
[0042]
In addition, the ESD withstand voltage is 350 V or more, which has the effect of improving the ESD withstand voltage of the high frequency preamplifier without adding a bias adjusting diode to the input by three times or more.
[0043]
Furthermore, there was almost no difference in performance due to the presence or absence of a bias adjustment diode even for a large input of about 1 mA in terms of input current from a photodiode.
[0044]
In the case of a high-frequency preamplifier, the input bias swings to the plus side at the time of large input, but by adopting the configuration as shown in FIG. 2, the bias adjusting diode connected directly to the input absorbs the swing of the input bias. In addition, the bias adjustment diode between the input and the negative power supply is in a reverse bias state with respect to the positive side of the input, and the bias adjustment diode does not operate with a normal drive power supply. . Thus, it can be seen that there is an effect of improving the ESD withstand voltage while maintaining the performance of the high-frequency preamplifier even at the time of large input.
[0045]
【The invention's effect】
As described above in detail, according to the present invention, it can be expected that the ESD withstand voltage can be improved without deteriorating the characteristics of the high frequency device.
[0046]
[Explanation of usage]
The invention made by the inventors has been specifically described based on the embodiment. However, the invention of the present application is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.
[0047]
In the above description, the invention can be used mainly as an input protection circuit for a GaAs-based semiconductor device that constitutes a transmission / reception device for optical communication, which is the field of use behind which the invention is based, in particular, a device operating in the tens of GHz band. And it is suitable for the high frequency element which used HEMT, especially for the input part of a high frequency amplifier.
[Brief description of the drawings]
FIG. 1 is a diagram for explaining the first invention of the present application. FIG. 2 is a diagram for explaining the second invention of the present application. FIG. 3 shows a configuration between terminals of a HEMT element subjected to an ESD test and a bias adjusting diode. Schematic diagram [Fig. 4] Input reflection characteristics of amplifier circuit using each diode configuration [Fig. 5] Conventional electrostatic protection circuit [Fig. 6] Conventional electrostatic protection circuit with ESD resistance against both polarities

Claims (6)

 An input terminal of the high-frequency semiconductor device and a cathode of the first diode are connected, a second diode is provided between the anode of the first diode and a positive power supply terminal, and the anode of the first diode The cathode of the second diode is connected, the anode of the second diode and the positive power supply terminal are connected, and a third diode is connected between the anode of the first diode and the negative power supply terminal. An electrostatic protection circuit comprising: an anode of the first diode and a cathode of the third diode; and an anode of the third diode and the negative power supply terminal connected to each other. 2. The electrostatic protection circuit according to claim 1 , wherein the second and third diodes are constituted by diodes in which one or a plurality of diodes are connected in series in the same polarity direction. 3. The electrostatic protection circuit according to claim 1, wherein the diode is a Schottky diode for level adjustment. 4. The electrostatic protection circuit according to claim 3 , wherein an electrode width of the Schottky electrode of the level adjusting diode is 50 μm or less. ESD protection circuit in which the high-frequency semiconductor device according claims 1 to 4, characterized in that a power amplifier. ESD protection circuit, wherein the high-frequency semiconductor device according claims 1 to 4 is preamplifier device.

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