JP4443397B2 - Optical semiconductor element, optical semiconductor device, and method of manufacturing optical semiconductor element - Google Patents

Description

  The present invention relates to an optical semiconductor element, an optical semiconductor device, and a method for manufacturing an optical semiconductor element suitable for reducing the thickness and size of a package.

Conventionally, as described in Patent Document 1, surface-mounted light-emitting diodes are usually bonded with a resin after bonding a light-emitting element on a substrate and securing conduction with the substrate by wire bonding or bumps. It is packaged.
For example, when electrical connection is performed by one wire bonding, as shown in FIGS. 11A and 11B, the pn junction surface J is disposed on the upper side, and one electrode pattern 1 is formed on the upper surface. The light emitting element 2 is bonded and fixed with solder or the like (not shown) on one wiring pattern 3A of the substrate 4 on which the pair of wiring patterns 3A and 3B is formed, and is electrically connected to the lower surface side of the light emitting element 2.

  Further, the electrode pattern 1 of the light emitting element 2 and the other wiring pattern 3B of the substrate 4 are connected by wire bonding with a wire 5 such as an Au fine wire. In this state, the light emitting element 2 is sealed with a transparent sealing resin portion 6 to be packaged.

  When electrical connection is made by two wire bondings, as shown in FIGS. 12A and 12B, the pn junction surface J is arranged on the upper surface side, and the pair of electrode patterns 1A and 1B are formed on the upper surface. The formed light emitting element 12 is bonded and fixed with solder or the like (not shown) on one wiring pattern 3A of the substrate 4 on which the pair of wiring patterns 3A and 3B is formed, and is electrically connected to the lower surface side of the light emitting element 12. Connecting. Note that one of the pair of electrode patterns 1 </ b> A and 1 </ b> B is a p-side electrode of the light-emitting element 12, and the other is an n-side electrode of the light-emitting element 12. Furthermore, one electrode pattern 1A on the light emitting element 12 and one wiring pattern 3A on the substrate 4 are connected by wire bonding with one wire 5A, and the other electrode pattern 1B on the light emitting element 12 is connected with the other wire 5B. And the other wiring pattern 3B of the substrate 4 are connected by wire bonding.

  Further, as shown in FIGS. 13A and 13B, when the electrical connection is made by the bumps 8 without using wire bonding, the light emitting element 12 shown in FIG. One electrode pattern 1A is disposed on one wiring pattern 3A of the substrate 4 on the lower side, and the other electrode pattern 1B is disposed on the other wiring pattern 3B, and each of them is bonded and fixed with bumps 8. Thus, the light emitting element 12 and the wiring patterns 3A and 3B are electrically connected.

Japanese Unexamined Patent Publication No. 2004-193451 (second page, FIG. 1 and FIG. 6)

In the above-described conventional electrical connection, when wire bonding is used, the height of the sealing resin portion 6 can be reduced only to the extent that the wires 5, 5A, 5B are not exposed, and it is difficult to make the entire package thin. Met. Moreover, since it is necessary to provide a space for wire bonding in the electrode on the upper surface, there is a problem that light is blocked by a large electrode. Furthermore, since the wires 5, 5 </ b> A, 5 </ b> B are arranged on the upper surface side, there is a disadvantage that the wires 5, 5 </ b> A, 5 </ b> B block light.
In addition, when the bump 8 is used, it is possible to reduce the height of the sealing resin portion 6. However, the formation of the bump 8 is costly, and the mounting is time-consuming for face-down bonding. There was an inconvenience that it was difficult.

  The present invention has been made in view of the above-described problems. An optical semiconductor element, an optical semiconductor device, and a low-cost optical semiconductor element that can electrically connect electrodes without using wires or bumps, can efficiently emit or receive light, and An object of the present invention is to provide a method for manufacturing an optical semiconductor element.

  The present invention employs the following configuration in order to solve the above problems. That is, the optical semiconductor element of the present invention includes a substantially rectangular element body formed by laminating a p-type semiconductor layer and an n-type semiconductor layer, and a region where at least one corner of the element body is chamfered or notched. The p-type semiconductor layer or the n-type semiconductor layer is provided with a corner electrode that is electrically connected to other layers in an insulated state.

  That is, in this optical semiconductor element, the corner electrode is formed in the chamfered region or the cutout region of the corner of the element body. Therefore, when mounting on the substrate, the electrode on the substrate and the corner electrode are soldered. By bonding and conducting with a conductive adhesive such as paste or Ag paste, wire bonding can be eliminated. Therefore, the height of the sealing resin portion can be kept low during packaging, and light blocking by the wire can be eliminated. Since the electrodes are arranged not at the top surface but at the corners, it is possible to avoid as much as possible that the electrodes block the light during light emission or light reception, and the light emission area or light reception area can be ensured to the maximum. Furthermore, by providing electrodes at the corners, visual inspection after mounting becomes easy. In addition, bumps are not required, and by mounting and conducting with a substrate with a conductive adhesive such as solder paste or Ag paste, it can be easily mounted with a small number of steps and at a low cost. Can do. Thus, according to the present invention, when packaged, the overall thickness and size can be reduced at low cost, and efficient light emission or light reception can be obtained.

  In the optical semiconductor element of the present invention, the corner electrode has a first corner electrode electrically connected to one of the p-type semiconductor layer and the n-type semiconductor layer in an insulated state from the other layer, and p The second corner electrode, which is electrically conductive with the other layer in an insulated state, is formed on the other of the n-type semiconductor layer and the n-type semiconductor layer. That is, in this optical semiconductor element, an insulating substrate such as a sapphire substrate is formed by electrically connecting the p-type semiconductor layer and the n-type semiconductor layer with the first corner electrode and the second corner electrode. Even when used as a growth substrate for an optical semiconductor element, it is possible to obtain electrical continuity between the p-type semiconductor layer and the n-type semiconductor layer without using wires.

  Furthermore, the optical semiconductor element of the present invention is characterized in that the corner electrodes are formed at a pair of corners arranged at diagonal positions of the element body. In other words, in this optical semiconductor element, the corner electrodes are formed at the corners of the diagonal position, so that the directivity of light emission or light reception is less biased, and adhesion to the mounting substrate is also performed at both ends at the diagonal positions. As a result, a well-balanced and high adhesive strength can be obtained.

  The optical semiconductor element of the present invention is characterized in that the corner electrodes are formed at a pair of corner portions arranged on both sides of one side surface of the element body. That is, in this optical semiconductor element, the corner electrodes are arranged on both sides of one side surface. Therefore, when performing side mounting using the one side surface as an adhesive surface to the mounting substrate, the solder paste is formed over the entire pair of corner electrodes. It is possible to bond with a conductive adhesive such as Ag paste or Ag paste, and high adhesive strength can be obtained.

An optical semiconductor device of the present invention includes a substrate on which a pair of wiring patterns is formed, the optical semiconductor element of the present invention bonded on the pair of wiring patterns, a sealing resin portion covering the periphery of the optical semiconductor element, The corner electrode and the wiring pattern corresponding to the corner electrode are bonded with a conductive adhesive material.
In this optical semiconductor device, the corner electrode and the wiring pattern are bonded with a conductive adhesive material, and the optical semiconductor element of the present invention is mounted on the substrate. Light-emitting diodes, photodiodes, and the like that are thin and small packaged can be obtained at low cost.

  The method for producing an optical semiconductor device of the present invention includes a step of forming a plurality of through holes or recesses in a semiconductor wafer formed by laminating a p-type semiconductor layer and an n-type semiconductor layer, and a p-type semiconductor on the inner surface of the through holes or recesses. A step of forming a corner electrode that is electrically insulated from other layers on the layer or the n-type semiconductor layer, and dicing the semiconductor wafer in a lattice shape by arranging a through hole or a recess at the intersection of the dicing lines And a step of dividing the chip into substantially rectangular chips.

  In this method of manufacturing an optical semiconductor element, through holes or recesses formed in advance in the state of a semiconductor wafer are placed at the intersection of dicing lines and diced, so that the corners of four optical semiconductor elements can be obtained with one through hole or recess. The partial electrodes can be formed simultaneously. Therefore, the number of processes is reduced, and the optical semiconductor element of the present invention can be easily manufactured at low cost.

The present invention has the following effects.
That is, according to the optical semiconductor device of the present invention, the corner electrode is formed in the notched region or the chamfered region of the corner portion of the device body, so that wire bonding and bumps are not necessary, and the entire body when packaged. As described above, it is possible to reduce the thickness and size at low cost and to obtain efficient light emission or light reception because the corner electrode does not block light. Therefore, according to the optical semiconductor device of the present invention on which this optical semiconductor element is mounted, a thin, small, high-brightness light-emitting diode, a photodiode with high light receiving sensitivity, and the like can be obtained at low cost, and the mounting space is small or It can be mounted on a device having a thin casing.
In addition, according to the method for manufacturing an optical semiconductor element according to the present invention, the corner electrode is efficiently formed by dicing a through hole or a recess formed in advance in the state of a semiconductor wafer at the intersection of dicing lines. Thus, the optical semiconductor element of the present invention can be manufactured at low cost, and productivity can be improved.

  A first embodiment of an optical semiconductor element, an optical semiconductor device, and an optical semiconductor element manufacturing method according to the present invention will be described below with reference to FIG.

As shown in FIG. 1A, the optical semiconductor device of the present embodiment is an infrared light emitting diode, for example, and includes a substrate 14 on which a p-side wiring pattern 13A and an n-side wiring pattern 13B are formed, and the substrate 14. A light emitting element (optical semiconductor element) 22 bonded with a conductive adhesive material (not shown) such as solder or Ag paste, and a sealing resin portion 6 covering the periphery of the light emitting element 22 are provided.
The substrate 14 is an insulating substrate such as a substantially rectangular parallelepiped glass epoxy substrate, a BT resin substrate, a ceramic substrate, or a metal core substrate. Further, the p-side wiring pattern 13A and the n-side wiring pattern 13B are formed over the front and back surfaces through the side surfaces as electrodes for conduction with the light emitting element 22 and mounting on an external substrate such as a motherboard.

  The light-emitting element 22 is, for example, an infrared light-emitting diode element of a GaAs-based semiconductor element, and as shown in FIG. The semiconductor layer 16 is grown in this order to form a substantially rectangular parallelepiped element body 20 having a pn junction surface J on the upper surface side, and an n-type semiconductor layer 16 formed in a region where one corner of the element body 20 is chamfered. This layer has an n-side corner electrode 18 (second corner electrode) that is electrically conductive in an insulated state.

The light emitting element 22 has a p-side electrode pattern 11A and an n-side electrode pattern 11B formed on the lower surface corresponding to the p-side wiring pattern 13A and the n-side wiring pattern 13B.
The light emitting element 22 includes a substrate 14 by arranging the p-side electrode pattern 11A and the n-side electrode pattern 11B on the p-side wiring pattern 13A and the n-side wiring pattern 13B and bonding them with solder or Ag paste (not shown). Implemented above.

The n-side corner electrode 18 extends over and under the light emitting element 22 and electrically connects the n-type semiconductor layer 16 and the n-side electrode pattern 11B. The n-side corner electrode 18 is formed by applying a metal film to a region where the corner is chamfered via an insulating film 19 such as SiO ₂ . That is, the n-side corner electrode 18 is electrically insulated from the p-type semiconductor layer 15 and the p-type semiconductor substrate 17 by the insulating film 19. The n-side corner electrode 18 has one end reaching the upper surface electrode 10 formed on the upper surface and the other end reaching the n-side electrode pattern 11B on the lower surface. The p-side electrode pattern 11 </ b> A is directly formed on the lower surface of the p-type semiconductor substrate 17.

The sealing resin portion 6 has a substantially rectangular parallelepiped shape, and is formed of a resin material such as epoxy or silicone that is transparent with respect to the emission wavelength of the light emitting element 22.
The p-type semiconductor layer 15 and the n-type semiconductor layer 16 are not a single layer but a layer composed of a plurality of semiconductor layers having different compositions and impurity concentrations.

  As described above, in the present embodiment, the n-side corner electrode 18 is formed in the chamfered region of the corner of the element body 20, and therefore when mounted on the substrate 14, the n-side electrode pattern 11B on the substrate 14 By bonding and conducting the n-side corner electrode 18 with solder paste, Ag paste, or the like, wire bonding can be eliminated. Accordingly, the height of the sealing resin portion 6 can be kept low during packaging, and light blocking by the wire can be eliminated. Since the electrodes are arranged not at the upper surface but at the corners, it is possible to prevent the electrodes from blocking light during light emission as much as possible, and to ensure the maximum light emitting area.

  Furthermore, by providing electrodes at the corners, visual inspection after mounting becomes easy. In addition, bumps are not required, and by bonding and conduction with the substrate 14 with solder paste, Ag paste, or the like, it is possible to easily mount with fewer steps and low cost, and to achieve downsizing. Thus, according to the present invention, when packaged, the overall thickness and size can be reduced at low cost, and efficient light emission can be obtained.

  Next, a second embodiment according to the present invention will be described with reference to FIG. In the following description of each embodiment, the same constituent elements described in the above embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  The difference between the second embodiment and the first embodiment is that in the first embodiment, the n-type semiconductor layer 16 and the n-side wiring pattern 13B are electrically connected by only one n-side corner electrode 18. On the other hand, in the light emitting element (optical semiconductor element) 32 of the second embodiment, as shown in FIGS. 2A and 2B, the n-type semiconductor layer 16 and the n side are formed by two n side corner electrodes 18. The electrical connection with the wiring pattern 13B is performed. That is, in the light emitting element 32 of the second embodiment, the n-side corner electrodes 18 are respectively formed at a pair of corner portions arranged on both sides of one side surface of the element body 30. In FIG. 2A, the p-side electrode pattern 11A and the p-side wiring pattern 13A are not shown, but they are positioned opposite to the one side where the n-side corner electrode 18 is formed on both sides. It is arranged on the lower surface on the side surface side.

In the present embodiment, since two n-side corner electrodes 18 are provided, a higher adhesive strength than that of a single n-side corner electrode 18 can be obtained.
A light emitting element (optical semiconductor element) 42 shown in FIG. 2C shows another example in the second embodiment. That is, in the light emitting element 42, the n-side corner electrode 18 is formed at the corner of the element body 40 at the diagonal position. In this light emitting element 42, since the n-side corner electrode 18 is formed at the corner of the diagonal position, the directivity of light emission is less biased, and adhesion to the substrate 14 is also performed at both ends at the diagonal position. Therefore, a well-balanced and high adhesive strength can be obtained.

  Next, a third embodiment according to the present invention will be described with reference to FIG.

  The difference between the third embodiment and the second embodiment is that, in the second embodiment, the two n-side corner electrodes 18 both electrically connect the n-type semiconductor layer 16 and the n-side wiring pattern 13B. In contrast, in the third embodiment, as shown in FIGS. 3A and 3B, the p-side corner electrode (first corner electrode) formed on the light emitting element (optical semiconductor element) 52 is formed. The pair of corner electrodes 28 and the n-side corner electrode (second corner electrode) 18 are electrically connected to the p-side wiring pattern 13A and the n-side wiring pattern 13B. In the light emitting device 32 of the second embodiment, each layer is grown on the p-type semiconductor substrate 17, whereas in the light emitting device 52 of the third embodiment, p is formed on the insulating substrate 37 such as a sapphire substrate. Another difference is that an element body 50 in which the type semiconductor layer 15 and the n-type semiconductor layer 16 are grown in this order is employed.

That is, in the third embodiment, the p-side corner electrode 28 that electrically connects the p-type semiconductor layer 15 and the p-side electrode pattern 11A to the light emitting element 52 while being insulated from other layers, and the n-type semiconductor. An n-side corner electrode 18 is formed which electrically connects the layer 16 and the n-side electrode pattern 11B to each other in an insulated state. Similar to the n-side corner electrode 18, the p-side corner electrode 28 extends over the light emitting element 52 and electrically connects the p-type semiconductor layer 15 and the p-side electrode pattern 11 </ b> A. That is, the p-side corner electrode 28 is electrically insulated from the n-type semiconductor layer 16 by the insulating film 19. Further, the p-side corner electrode 28 is formed by applying a metal film to a region where the corner is chamfered via an insulating film 19 such as SiO ₂ . One end of the p-side corner electrode 28 reaches the p-side upper surface electrode 10A formed on the upper surface, and the other end reaches the p-side electrode pattern 11A on the lower surface.

  Further, the p-side electrode pattern 11A and the n-side electrode pattern 11B and the p-side wiring pattern 13A and the n-side wiring pattern 13B are bonded and electrically connected by solder or Ag paste (not shown).

  The n-type semiconductor layer 16 disposed on the upper surface has an n-side upper surface electrode 10B formed on the surface, and a part of the p-type semiconductor layer 15 is exposed as shown in FIG. It is patterned and removed by etching. A p-side upper surface electrode 10 </ b> A is formed on the exposed surface of the p-type semiconductor layer 15. The p-side upper surface electrode 10 </ b> A and the n-side upper surface electrode 10 </ b> B are formed with a minimum area where sufficient electrical continuity can be obtained, and are respectively disposed on the upper surface corners of the element body 50.

  In the present embodiment, the p-side corner electrode 28 and the n-side corner electrode 18 are respectively used for the p-type semiconductor layer 15 and the n-type semiconductor layer 16 and the p-side electrode pattern 11A and the n-side electrode pattern 11B. Even when the insulating substrate 37 such as a sapphire substrate is used as a growth substrate for the light emitting element 52, the upper p-type semiconductor layer 15 and the n-type semiconductor layer 16 can be connected to each other without using wire bonding. Can be obtained.

  In addition, the light emitting element (optical semiconductor element) 62 shown in FIG. 3C shows another example in the third embodiment. That is, in the light emitting element 62, the n-side corner electrode 18 and the p-side corner electrode 28 are formed at the corners of the element body 60 at diagonal positions. In the light emitting element 60, since the n-side corner electrode 18 and the p-side corner electrode 28 are formed at the corners opposite to each other, the direction of light emission is the same as in other examples of the second embodiment. Since the bias is less and the adhesion to the substrate 14 is performed at both ends at the diagonal positions, a well-balanced and high adhesion strength can be obtained.

  Next, a fourth embodiment according to the present invention will be described with reference to FIG.

The difference between the fourth embodiment and the third embodiment is that, in the third embodiment, the p-side corner electrode 28 and the n-side corner electrode 18 are formed in a region where the corner of the light emitting element 52 is chamfered. On the other hand, in the fourth embodiment, as shown in FIGS. 4A and 4B, the light-emitting element (optical semiconductor element) 72 is formed in the p-type semiconductor layer 15 in the region where the corners of the element body 70 are notched. In addition, a p-side corner electrode 38 that is electrically connected to other layers in an insulated state, and an n-side corner electrode 48 that is electrically connected to the n-type semiconductor layer 16 in an insulated state are provided. It is a point that has.
Further, in the third embodiment, the insulating substrate 37 is bonded to the substrate 14 side, whereas in the fourth embodiment, the p-type semiconductor substrate 17 that is transparent to the emission wavelength is used and opposite to the substrate 14. Another difference is that the p-type semiconductor substrate 17 is disposed on the side, that is, the upper surface side, and the pn junction surface J is disposed on the substrate 14 side.

That is, in the present embodiment, the p-side corner electrode 38 and the n-side corner electrode 48 are provided in the region where the corner portion of the element body 70 is notched, and are bonded with the pn junction surface J side being the lower surface. The p-side corner electrode 38 and the n-side corner electrode 48 do not interfere with the light emitted through the p-type semiconductor substrate 17, and more efficient light extraction is possible.
A light emitting element (optical semiconductor element) 82 shown in FIG. 4C shows another example in the fourth embodiment. That is, in this light emitting element 82, the n-side corner electrode 48 and the p-side corner electrode 38 are formed at the corners of the diagonal position of the element body 80, and is the same as in the other examples of the third embodiment. In addition, a well-balanced and high adhesive strength can be obtained.

  Next, a fifth embodiment according to the present invention will be described with reference to FIG.

  The difference between the fifth embodiment and the third embodiment is that in the third embodiment, the pn junction surface J and the upper surface of the substrate 14 are made parallel to each other so as to emit light in a direction perpendicular to the upper surface of the substrate 14. On the other hand, in the fifth embodiment, the pn junction surface J is set perpendicular to the upper surface of the substrate 14 so that light is emitted toward the side of the substrate 14 as shown in FIG. The p-side corner electrode 28 and the n-side corner electrode 18 are bonded to the substrate 14 with the side surfaces disposed on both sides as adhesive surfaces. The light emitting element 52 is bonded to the substrate 14 with solder paste H over the entire length of the p-side corner electrode 28 and the n-side corner electrode 18. The periphery of the light emitting element 52 is sealed with an epoxy resin or silicone resin (not shown) that is transparent to the emission wavelength.

  In this embodiment, since the light emitting element 52 is mounted on the side surface with the side surface where the p-side corner electrode 28 and the n-side corner electrode 18 are arranged on both sides as the adhesive surface, the solder is covered over the entire length of the pair of corner electrodes. By bonding with the paste H, high adhesion strength can be obtained at the same time as conducting to the wiring pattern. Therefore, a thin light emitting diode with side emission can be obtained, which is suitable for mounting in a narrow area, for example, for a liquid crystal backlight of a mobile phone. Instead of the solder paste H, an Ag paste may be used.

  Next, a method for manufacturing an optical semiconductor device according to the present invention will be described with reference to FIGS.

First, when the light emitting element 22 of the first embodiment shown in FIG. 1B is manufactured, as shown in FIG. 6A, a semiconductor in which a p-type semiconductor layer 15 and an n-type semiconductor layer 16 are grown. A plurality of through holes S are formed in the wafer W in advance. The through hole S is formed by etching, laser processing, machining by a drill, or the like. The through hole S is formed at a position where the dicing line L intersects when dicing is performed later. However, the through hole S is formed so as to correspond to only one corner of the light emitting element 22 among the intersection positions of the dicing line L. Next, in this semiconductor wafer W state, an n-side corner electrode 18 is formed on the inner surface of the through-hole S and is electrically connected to the p-type semiconductor layer 15 or the n-type semiconductor layer 16 while being insulated from other layers. To do. At this time, an insulating film 19 such as SiO ₂ is first formed on the inner surface of the through hole S, and a metal film is formed thereon by electroless plating or the like to form the n-side corner electrode 18.

Further, the upper surface electrode 10 is formed at a predetermined position on the upper surface of the semiconductor wafer W by patterning. Further, the p-side electrode pattern 11A and the n-side electrode pattern 11B are formed at predetermined positions on the lower surface of the semiconductor wafer W by patterning.
Next, as shown in FIG. 6B, the semiconductor wafer W is diced into a lattice shape so that the through holes S are located at the intersections of the dicing lines L, and as shown in FIG. Then, the light emitting element 22 is manufactured by dividing the chip into substantially rectangular chips.

  In this way, a plurality of through holes S are formed in advance in the state of the semiconductor wafer W, and these through holes S are arranged at the intersections of the dicing lines L so that dicing is performed, so that four light emitting elements can be formed with one through hole S. Twenty-two n-side corner electrodes 18 can be formed simultaneously. Therefore, the number of processes is reduced, and the light emitting element 22 can be easily manufactured at low cost.

  Next, when manufacturing the light emitting element 32 and the light emitting element 42 of the second embodiment shown in FIGS. 2B and 2C, the manufacturing process of the light emitting element 22 is almost the same as that described above, but FIG. As shown in (a), (b), (c) and FIGS. 8 (a), (b), and (c), the arrangement of the through holes S to be formed is different. That is, when the light emitting element 32 is manufactured, as shown in FIGS. 7A, 7B, and 7C, the through hole S is located on both sides of one side surface of the light emitting element 32 at the intersection position of the dicing line L. It is formed so as to correspond to a pair of corners located at. When the light emitting element 42 is manufactured, as shown in FIGS. 8A, 8 </ b> B, and 8 </ b> C, the through hole S is located at the diagonal position of the light emitting element 42 in the crossing position of the dicing line L. It is formed so as to correspond to a pair of corners.

Next, when manufacturing the light emitting device 72 of the fourth embodiment shown in FIG. 4B, the manufacturing method of the light emitting device 22 shown in FIG. 1B is different from that shown in FIG. b) As shown in (c), not the through hole S but the concave portion U is formed at the intersection of the dicing lines L. The concave portion U is formed by etching, laser processing, machining by a drill or the like, similar to the through hole S, but is formed by processing up to the middle of the p-type semiconductor substrate 17 without penetrating the semiconductor wafer W. .
Moreover, when producing the light emitting element 82 which is another example of 4th Embodiment shown to (c) of FIG. 4, as shown to (a) (b) (c) of FIG. 10, the recessed part U to form is formed. Is formed so as to correspond to a pair of corners of the diagonal position of the light emitting element 82 among the intersecting positions of the dicing line L.

The technical scope of the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.
In each of the above embodiments, an infrared LED (light emitting diode) is employed as the optical semiconductor element mounted on the substrate 14, but an LED having another wavelength, for example, a blue LED, a red LED, or a green LED may be employed. Alternatively, a blue LED may be employed as the light emitting element, the light emitting element may be sealed with a resin containing a YAG phosphor, and a white LED that converts blue light into white light using a resin containing a YAG phosphor may be used.
Further, the optical semiconductor element may be applied not only to an LED but also to an LD (semiconductor laser) or a PD (photodiode).

It is sectional drawing and perspective view which show the optical semiconductor device and optical semiconductor element of 1st Embodiment which concern on this invention. It is sectional drawing and a perspective view which show the optical semiconductor device of 2nd Embodiment which concerns on this invention, an optical semiconductor element, and another example. It is sectional drawing and perspective view which show the optical semiconductor device of 3rd Embodiment which concerns on this invention, an optical semiconductor element, and another example. It is sectional drawing and perspective view which show the optical semiconductor device of 3rd Embodiment which concerns on this invention, an optical semiconductor element, and another example. It is a perspective view which shows the optical semiconductor device of 4th Embodiment concerning this invention. It is a principal part perspective view which shows the manufacturing method about the light emitting element which concerns on 1st Embodiment in order of a process. It is a principal part perspective view which shows the manufacturing method about the light emitting element which concerns on 2nd Embodiment in process order. It is a principal part perspective view which shows the manufacturing method in order of process about the other example of the light emitting element which concerns on 2nd Embodiment. It is a principal part perspective view which shows the manufacturing method about the light emitting element which concerns on 3rd Embodiment in process order. It is a principal part perspective view which shows the manufacturing method in order of process about the other example of the light emitting element which concerns on 3rd Embodiment. In the prior art example which concerns on this invention, it is sectional drawing which shows the light emitting diode using one wire, and a perspective view which shows a light emitting element. In the prior art example which concerns on this invention, it is sectional drawing which shows the light emitting diode using two wires, and a perspective view which shows a light emitting element. In the prior art example which concerns on this invention, it is sectional drawing which shows the light emitting diode using bump, and a perspective view which shows a light emitting element.

Explanation of symbols

  6 ... Sealing resin portion, 11A ... p-side electrode pattern, 11B ... n-side electrode pattern, 2, 12, 22, 32, 42, 52, 62, 72, 82 ... light emitting element (optical semiconductor element), 13A ... p Side wiring pattern, 13B ... n-side wiring pattern, 14 ... substrate, 15 ... p-type semiconductor layer, 16 ... n-type semiconductor layer, 18, 48 ... n-side corner electrode (second corner electrode), 20, 30 , 40, 50, 60, 70, 80 ... element body, 28, 38 ... p-side corner electrode (first corner electrode), J ... pn junction surface, L ... dicing line, S ... through hole, U ... Recess, W ... Semiconductor wafer

Claims (6)

And a p-type semiconductor layer and the n-type semiconductor layer is laminated on a semiconductor substrate or an insulating substrate, a substantially straight square-like element body comprising an electrode on the upper and lower surfaces,
The p-type semiconductor layer or the n-type semiconductor layer and the lower electrode are electrically connected to each other by extending in the vertical direction in a region where at least one of the corners extending over the element body is chamfered. The p-type semiconductor layer or the n-type semiconductor layer is formed with a corner electrode that is electrically insulated from other layers and is an optical semiconductor element. A first corner electrode electrically connected to one of the p-type semiconductor layer and the n-type semiconductor layer in an insulated state from the other layer;
2. The light according to claim 1, further comprising: a second corner electrode that is electrically insulated from the other layer of the p-type semiconductor layer and the n-type semiconductor layer and is electrically insulated from the other layers. Semiconductor element. 3. The optical semiconductor element according to claim 1, wherein the corner electrode is formed at a pair of upper and lower corner portions arranged at diagonal positions of the element body. 3. The optical semiconductor element according to claim 1, wherein the corner electrode is formed on a pair of upper and lower corner portions arranged on both sides of one side surface of the element body. A substrate on which a pair of wiring patterns are formed;
The optical semiconductor element according to any one of claims 1 to 4, which is bonded onto the pair of wiring patterns;
A sealing resin portion covering the periphery of the optical semiconductor element,
The optical semiconductor device, wherein the corner electrode and the wiring pattern corresponding to the corner electrode are bonded with a conductive adhesive material. It is a manufacturing method of the optical semiconductor element according to any one of claims 1 to 5,
Forming a plurality of through holes in a semiconductor wafer in which a p-type semiconductor layer and an n-type semiconductor layer are laminated on a semiconductor substrate or an insulating substrate;
Forming a corner electrode electrically connected to the p-type semiconductor layer or the n-type semiconductor layer on the inner surface of the through hole in an insulated state from the other layers;
Method for manufacturing an optical semiconductor element characterized by and a step of dividing the arranged into chips substantially straight square by dicing the semiconductor wafer into a lattice shape at intersections through holes dicing line.

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