JP4439758B2 - Control circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention provides a control circuit for a plasma display panel (hereinafter also referred to as “PDP”). On the road In particular, the present invention relates to a technique for reducing the difference between the desired number of times of light emission and the actual number of times of light emission.
[0002]
[Prior art]
FIG. 13 is a timing chart for explaining the PDP driving method according to the first prior art. This driving method is applied to an AC type PDP having a row electrode pair X, Y and a column electrode W. FIG. 13 shows drive waveforms for one drive unit period. One drive unit period corresponds to one subfield period in the subfield gray scale method. As shown in FIG. 13, one drive unit period (that is, one subfield period) includes a reset period, an address period, and a sustain period.
[0003]
In the reset period, by applying the priming pulse 24P, a discharge (priming discharge) for discharging all discharge cells regardless of the display history is formed. The priming discharge has the effect of generating a space charge in all the discharge cells, thereby increasing the probability of the subsequent discharge and making the wall charge in all the discharge cells uniform (erase effect).
[0004]
Depending on the driving method, prior to the priming discharge, discharge is generated only in the discharge cells that are in the lighting state (ON state) in the preceding driving unit period, and the wall charge state is set to the non-lighting state (OFF state). There is a driving method for performing discharge (erasing discharge) to align with the discharge cells. There is also a driving method in which only erasing discharge is performed without performing priming discharge. Further, there is a driving method in which priming discharge and erasing discharge are switched every driving unit period. Here, these driving methods are referred to as a “reset period”.
[0005]
In the address period, a discharge cell is selected in a matrix manner by a combination of the row electrode Y and the column electrode W, and an address discharge is formed in a predetermined discharge cell. By selecting whether the address discharge is formed or not, the ON state and the OFF state of each discharge cell are defined. Specifically, the scan pulse 21P is sequentially applied to the row electrodes Y1 to Yn and the address pulse 22P is selectively applied to the column electrode W, thereby generating an address discharge in the discharge cells to be turned on. .
[0006]
In the sustain period, sustain pulses 23P of the voltage Vs (same waveform) are alternately applied to the row electrode X and the row electrode Y (alternatively). As a result, the sustain discharge is generated only in the discharge cells defined in the ON state in the previous address period. The number of times the sustain pulse 23P is applied (hereinafter also referred to as “sustain repetition number”) is defined for each subfield period, and the emission intensity (or luminance) in the subfield period is determined by the number of sustain repetitions. The driving in one subfield period is completed by the above series of operations.
[0007]
In the driving method according to the first prior art, the sustain pulse 23P having the same waveform is repeated in the sustain period (hereinafter, this repeat period is referred to as “sustain repeat period.” In the drive method of FIG. 13, the sustain repeat period and the sustain period are repeated. However, in order to stabilize the operation, there is a driving method in which auxiliary pulses or pulse groups are provided before and after the sustain repetition period (hereinafter referred to as a driving method according to the second prior art). An example of the driving method according to the second prior art is shown in the timing chart of FIG. The timing chart is disclosed in Japanese Patent Laid-Open No. 11-143422. In the driving method of FIG. 14, the auxiliary pulse (group) 26P having a relatively wide pulse width is applied before and after the sustain repetition period (sustain period) in which the sustain pulse 23P having a relatively narrow pulse width is repeated.
[0008]
In the PDP, gradation control is mainly performed by a method called a subfield gradation method. In the subfield gray scale method, one field period is divided into a plurality of subfield periods, and the emission intensity in each subfield period is set to a predetermined value. As the driving waveform in each subfield period, the waveform of the driving method according to the first or second conventional technique (see FIG. 13 or FIG. 14) can be used. Further, the emission intensity (or luminance) in each subfield period is controlled by the number of repetitions of the sustain pulse in the sustain repetition period as described above. If one field period is composed of s subfield periods, a maximum of 2 s power levels can be expressed.
[0009]
The luminance level of the PDP, that is, the light emission luminance at a certain gradation (for example, the maximum gradation) increases in proportion to the number of sustain repetitions per second (hereinafter also referred to as “average maintenance frequency”). That is, the luminance level can be controlled by changing the average maintenance frequency.
[0010]
Now, the discharge power consumed by the display discharge of the PDP increases as the amount of light emitted from the PDP increases. At this time, the amount of light emitted from the PDP is proportional to {(display rate) × (luminance level)}. Note that the display rate is obtained by integrating the gradation levels in each discharge cell for all the discharge cells and expressing the maximum value as 1. Since the display rate varies depending on the displayed image, the discharge power varies depending on the image, and the power increases as the display rate increases.
[0011]
In order to suppress the maximum power consumption of the PDP to a certain level regardless of the display rate, an APC (Automatic Power Control) method may be used. In the APC method, when the display rate is high, the discharge power is suppressed to a certain level or lower by reducing the luminance level or the gradation level of the entire screen approximately in inverse proportion to the display rate. The luminance level can be controlled by the average maintenance frequency as described above. The APC method or a similar method is disclosed in, for example, Japanese Patent Application Laid-Open No. 3-238497 (Japanese Patent No. 3002490) and Japanese Patent Application Laid-Open No. 2000-259110.
[0012]
An example of a circuit for controlling the luminance level by the APC method is disclosed in, for example, Japanese Patent Application Laid-Open No. 7-140928 (Japanese Patent No. 2856241). In the control circuit, the number of sustain repetitions in each subfield period corresponding to each luminance level is stored in a ROM (read only memory). The control circuit reads out the number of maintenance repetitions according to the power consumption from the ROM, and controls the number of maintenance repetitions according to the value.
[0013]
An example of a control method for repeatedly generating the same waveform when the number of repetitions of maintenance is designated is disclosed in, for example, Japanese Patent Laid-Open No. 4-284491 (Japanese Patent No. 2728571). In such a control method, waveform control data of a waveform having a non-repetitive period and a predetermined unit waveform in a period composed of a repetitive cycle are stored, and the waveform is controlled by the ROM control means in a sustain repetitive period.
[0014]
[Problems to be solved by the invention]
As described above, in the driving methods according to the first and second prior arts, the gradation is controlled by the subfield gradation method, and the luminance level is controlled by controlling the average sustain frequency.
[0015]
However, in particular, when the average maintenance frequency is low and the gradation level is low, there is a problem that a deviation occurs between the desired gradation and the actual light emission intensity, resulting in deterioration of gradation characteristics. For this reason, in the driving method according to the related art, problems in display quality such as a smooth gradation expression and a false contour may occur.
[0016]
Such a decrease in gradation characteristics is caused by the occurrence of display light emission in the discharge cells even outside the sustain repetition period. Here, the display light emission refers to light emission that is defined in the ON state by the address operation in the address period and that occurs only in the specified discharge cells.
[0017]
The above problem will be described with reference to FIG. The timing chart in FIG. 15 shows that the number of pulses of the first auxiliary pulse group before the sustain repetition period (or the sustain period) in FIG. 14 described above is 3, and the second number after the sustain repetition period. This corresponds to the case where the number of pulses in the auxiliary pulse group is two. Note that when the erase pulse 25P is used in the reset period, light emission by the erase pulse 25P occurs only in the discharge cells that have generated display light emission in the sustain period preceding the reset period, and is thus observed as display light emission. Therefore, here, for convenience of explanation, one drive unit period starts from the address period and extends to the reset period.
[0018]
In this case, display light emission is observed by applying the address pulse 21P in the address period, the auxiliary pulses 261P, 262P, 264P, 265P and the erasing pulse 25P in the first and second auxiliary pulse groups in addition to the sustain repetition period. .
[0019]
However, as shown in FIG. 15, since the address pulse 21P and the first auxiliary pulse 261P of the first auxiliary pulse group are applied in a state where the wall charge is still small, the display emission by these pulses 21P and 261P is maintained. Weaker than sustain discharge by pulse 23P. For this reason, here, the light emission intensity of the weak display light emission is treated as half that of the display light emission by the sustain pulse 23P, and the light emission intensity of other pulses that cause the display light emission is treated as equivalent to that by the sustain pulse 23P. In this case, the intensity of display light emission other than the sustain repetition period, that is, the minimum light emission intensity in one drive unit period (or one subfield period) corresponds to six sustain pulses.
[0020]
Here, one field period is divided into eight subfield periods (subfield periods SF1 to SF8), and the ratio of the emission intensity in each subfield period is expressed as follows:
Msf (1): Msf (2): Msf (3): Msf (4): Msf (5): Msf (6): Msf (7): Msf (8) = 1: 2: 4: 8: 16: 32: 64: 128
Consider the case of setting. Hereinafter, the emission intensity ratio Msf (i) in each subfield period is also referred to as “weight” in each subfield period. In the following description, “(i)” in Msf (i) or the like may be omitted.
[0021]
Assuming that the average sustain frequency (number of sustain repetitions per second) is fsus [kHz] and the field frequency is fv, the maximum number of times of light emission Np in one field period is
Np = INT (fsus × 2 / fv) (Formula 1)
It is expressed. INT (a) is a function that rounds off the numerical value a.
[0022]
Further, the desired number of light emission times Npd (i) in the i-th subfield period SFi is:
Npd (i) = INT (Np × Msf (i) / ΣMsf) (Expression 2)
It becomes. Note that ΣMsf is the total from Msf (1) to Msf (8). FIG. 16 shows a desirable value of the display light emission number Npd in each of the subfield periods SF1 to SF8.
[0023]
However, as described above, in the driving method of FIG. 15, the minimum emission intensity in one driving unit period (or one subfield period) corresponds to six sustain pulses. That is, the number of times of light emission in one drive unit period cannot be reduced to less than 6 in terms of display light emission by the sustain pulse. In addition, since the number of times of display light emission during the period in the sustain repetition period (hereinafter also referred to as “sustain repetition period”) is two, the minimum resolution of the display light emission number is 2. Accordingly, a deviation may occur between the desired number of light emission times Npd and the actual light emission number of times Npr. FIG. 17 shows a diagram for explaining this shift, and FIG. 18 shows the actual number of times of display light emission Npr in each of the subfield periods SF1 to SF8.
[0024]
As can be seen from a comparison between FIG. 16 and FIG. 18, when the average sustain frequency fsus is low (for example, when fsus = 10 kHz), the actual number of times of light emission in the subfield periods (for example, subfield periods SF1 and SF2) with low weights. Npr is greatly deviated from the desired number of times of light emission Npd.
[0025]
As described above, in the driving methods according to the first and second prior arts, the weight ratio of each subfield period deviates from a desired value, so that the gradation characteristics are deteriorated and smooth gradation expression cannot be performed. Problems in display quality such as the occurrence of contours occur.
[0026]
In order to solve this problem, Japanese Patent Application Laid-Open No. 11-65517 discloses a driving method in which all discharges except for simultaneous address discharge and charge erasing discharge are counted as discharges for gradation display. According to this driving method, for example, only the address discharge and the erase discharge are performed in the subfield period in which the lowest gradation is displayed, so that the number of times of light emission is only two. In this way, the weight ratio of each subfield period can be brought close to a desired value.
[0027]
However, if the subfield period for displaying the lowest gray scale is determined to be composed of, for example, only the address discharge and the erasing discharge, the sustain frequency cannot be changed when the APC method is performed. There is a point.
[0028]
The present invention has been made in view of the above points, and reduces the difference between the desired number of times of light emission and the actual number of times of light emission, so that smooth gradation expression and false contour reduction effect can be achieved without depending on the repetition frequency. Obtained control times for PDP The road The purpose is to provide.
[0029]
[Means for Solving the Problems]
The control circuit according to claim 1 is a control circuit for controlling a driver for a plasma display panel, wherein the plasma display panel includes a plurality of discharge cells, and the control circuit includes a plurality of discharge cells. A first signal element corresponding to a first waveform applied to the plurality of discharge cells when setting an ON state / OFF state, and a second waveform corresponding to a second waveform forming a non-repetitive waveform together with the first waveform. A storage unit for storing a signal element and a third signal element corresponding to a third waveform forming a repetitive unit; obtaining the first to third signal elements from the storage unit; A drive waveform control unit that generates a drive waveform control signal for causing the display panel driver to generate the drive waveform control unit, wherein the drive waveform control unit is configured to store the first to the first from the storage unit. Upon acquiring the signal component, controls the number of repetitions at the time of acquiring the second signal component of the acquisition / non acquired and the third signal-element for obtaining / non acquisition and repeated The third waveform includes a plurality of waveforms, the third signal element includes a plurality of signal elements corresponding to the plurality of waveforms, and the driving waveform control unit determines the number of repetitions of the third signal element. Control the number of repetitions of each of the signal elements as a unit To do.
[0032]
Claim 2 The control circuit according to claim 1 is a control circuit that controls a driver for a plasma display panel, wherein the plasma display panel includes a plurality of discharge cells, and the control circuit includes a non-repetitive waveform corresponding to a non-repetitive waveform. A storage unit for storing a signal element for use and a plurality of repetitive waveform signal elements corresponding to a plurality of waveforms forming a repetitive unit; and the non-repeated waveform signal element and the plurality of repetitive waveform signal elements from the storage And a drive waveform control unit that generates a drive waveform control signal for causing the plasma display panel driver to generate a series of drive waveforms, and the drive waveform control unit receives the non-repetition from the storage unit. In obtaining the waveform signal element and the plurality of repetitive waveform signal elements, the plurality of repetitive waveform signals Controlling each of the number of repetitions of said plurality of repetitive waveform signal elements the number of repetitions in acquiring repeatedly a plurality of signal components for repetitive waveform as a unit to control the acquisition / non acquisition of the unit.
[0041]
DETAILED DESCRIPTION OF THE INVENTION
<Embodiment 1>
<Configuration of plasma display device>
FIG. 1 is a block diagram for explaining a plasma display device 50 according to the first embodiment. The plasma display device 50 is roughly divided into a plasma display panel (hereinafter also referred to as “PDP”) 51 and a drive device 52 that drives the PDP 51. First, the structure of the PDP 51 will be described.
[0042]
<PDP structure>
FIG. 2 shows a schematic perspective view for explaining the PDP 51. The PDP 51 is a surface discharge type AC PDP, and a PDP having such a structure is disclosed in, for example, Japanese Patent Laid-Open Nos. 7-140922 and 7-287548.
[0043]
The PDP 51 includes a front glass substrate 102 that forms a display surface, and a rear glass substrate 103 that is disposed to face the front glass substrate 102 with a discharge space 111 interposed therebetween. On the surface of the front glass substrate 102 on the discharge space 111 side, a strip-shaped electrode 104a and an electrode 105a that are paired with each other are each formed to be extended by n. In FIG. 2, for convenience of illustration, the electrodes 104a and 105a are shown one by one. The electrodes 104a and 105a that are paired with each other are arranged via a discharge gap DG. The electrodes 104a and 105a have a function of inducing discharge. In order to extract more visible light, transparent electrodes are used as the electrodes 104a and 105a. Hereinafter, the electrodes 104a and 105a are also referred to as transparent electrodes 104a and 105a. The electrodes 104a and 105a may be formed of the same material as metal (auxiliary) electrodes (also referred to as mother electrodes or bus electrodes) 104b and 105b described later.
[0044]
Metal (auxiliary) electrodes 104b and 105b are formed to extend along the transparent electrodes 104a and 105a on the transparent electrodes 104a and 105a. The metal electrodes 104b and 105b have a lower impedance than the transparent electrodes 104a and 105a, and play a role of supplying a current from the driving device 52 (see FIG. 1).
[0045]
An electrode composed of the transparent electrode 104a and the metal electrode 104b is referred to as a (row) electrode (or sustain electrode) X, and an electrode composed of the transparent electrode 105a and the metal electrode 105b is referred to as a (row) electrode (or scan electrode) Y. The electrodes X and Y may be composed of only the electrodes 104a and 105a. In the following description, when distinguishing n electrodes X and n electrodes Y, they are referred to as electrode X1, electrode X2,..., Electrode Xn and electrode Y1, electrode Y2,.
[0046]
A dielectric layer 106 and a protective film 107 are formed in this order so as to cover the electrodes X and Y. The protective film 107 is formed by vapor deposition of MgO (magnesium oxide). The dielectric layer 106 and the protective film 107 are collectively referred to as a dielectric layer 106A.
[0047]
On the other hand, on the surface of the rear glass substrate 103 on the discharge space 111 side, m strip-shaped (column) electrodes (or address electrodes or write electrodes) W are orthogonal to the electrodes X and Y (so that they cross three-dimensionally). ) Extension formed. In FIG. 2, three electrodes W are shown for convenience of illustration. In the following description, when distinguishing m electrodes W, they are referred to as electrode W1, electrode W2,..., Electrode Wm.
[0048]
Partitions or (barrier) ribs 110 are formed between adjacent electrodes W so as to extend in parallel with the column electrodes W. The barrier 110 serves to separate a plurality of discharge cells (described later) arranged in the extending direction of the electrodes X and Y from each other, and also serves as a support for supporting the PDP 51 so as not to be crushed by atmospheric pressure.
[0049]
A phosphor layer 109 is formed on the inner surface of a substantially U-shaped groove formed by the partition wall 110 and the rear glass substrate 103 so as to cover the electrode W. Specifically, the phosphor layers 109R, 109G, and 109B for red, green, and blue emission colors are formed for each of the substantially U-shaped grooves. For example, the phosphor layer 109R, the phosphor layer 109G, and the fluorescence layer The body layers 109B are arranged in the order of the PDP 51.
[0050]
The front glass substrate 102 and the back glass substrate 103 having the above-described configuration are sealed to each other, and a Ne—Xe mixed gas or a He—Xe mixed gas is present in the discharge space 111 between the front glass substrate 102 and the back glass substrate 103. Or the like is enclosed at a pressure lower than atmospheric pressure.
[0051]
In the PDP 51, each (three-dimensional) intersection of the row electrode pair X, Y and the column electrode W corresponds to a discharge cell or a light emitting cell C (see FIG. 1). That is, FIG. 2 shows three discharge cells, and in the entire PDP 51, the discharge cells C are arranged in a matrix. At this time, a plurality of discharge cells C belong to each electrode X. Similarly, a plurality of discharge cells C belong to each electrode Y, and a plurality of discharge cells C belong to each electrode W. Yes.
[0052]
<Configuration of drive device>
Returning to FIG. 1, the driving device 52 of the plasma display device 50 will be described. The drive device 52 includes a control circuit 40, a power supply circuit 41, a Y driver 14, an X driver 15, and a W driver 18.
[0053]
The control circuit 40 receives the image data (or a signal corresponding to the image data) D, the vertical synchronization signal Vsync, and other data and signals, generates drive waveform control signals Sy, Sx, Sw based on these, and outputs them To do. More specific operation or processing of the control circuit 40 will be described later. The power supply circuit 41 supplies various voltages or power to the Y driver 14, the X driver 15, and the W driver 18.
[0054]
The drivers 14, 15 and 18 are configured to include a switch element such as an FET or IGBT, an integrated circuit in which a plurality of switch elements are formed, and the like. The drivers 14, 15, and 18 receive the drive waveform control signals Sy, Sx, and Sw from the control circuit 40, and perform the ON / OFF control of each switch element according to the drive waveform control signals Sy, Sx, and Sw, thereby driving waveforms. Alternatively, a voltage waveform is generated and the drive waveform is output to the electrodes X1 to Xn, Y1 to Yn, and W1 to Wm of the PDP 51.
[0055]
Specifically, the Y driver 14 includes a Y common driver 14a and a Y individual driver 14b. The Y common driver 14a is connected to the electrodes Y1 to Yn of the PDP 51 via the Y individual driver 14b. The Y common driver 14a generates a drive waveform common to the electrodes Y1 to Yn according to the drive waveform control signal Sy. The drive waveform generated by the Y common driver 14a is input to the Y individual driver 14b, and the Y individual driver 14b performs control for individually applying the drive waveform to each electrode Y according to the drive waveform control signal Sy. The Y individual driver 14b is mainly composed of a dedicated IC called a scan driver IC.
[0056]
The X driver 15 has the same configuration as that of the Y common driver 14a (for this reason, the X driver 15 is hereinafter also referred to as the X common driver 15), and is commonly connected to the electrodes X1 to Xn of the PDP 51. The X driver 15 generates a drive waveform common to the electrodes X1 to Xn according to the drive waveform control signal Sx, and applies this to the electrodes X1 to Xn in common.
[0057]
The W driver 18 includes a W common driver 18a similar to the Y common driver 14a and a W individual driver 18b similar to the Y individual driver 14b. The W common driver 18a is connected to the electrodes W1 to Wm of the PDP 51 via the W individual driver 18b. The W common driver 18a generates a drive waveform common to the electrodes W1 to Wm according to the drive waveform control signal Sw. The drive waveform generated by the W common driver 18a is input to the W individual driver 18b, and the W individual driver 18b performs control for individually applying the drive waveform to each electrode W according to the drive waveform control signal Sw. The W individual driver 18b is mainly configured by a dedicated IC called a data driver IC. Note that the W driver 18 may be composed of only the W individual driver 18b.
[0058]
With this configuration, in the driving device 52, the control circuit 41 generates the drive waveform control signals Sy, Sx, Sw, and controls the drivers 14, 15, 18 with the drive waveform control signals Sy, Sx, Sw. The drivers 14, 15, 18 generate drive waveforms or voltage waveforms according to the drive waveform control signals Sy, Sx, Sw and output them to the PDP 51. Thereby, an image or the like is displayed on the PDP 51.
[0059]
<PDP driving method>
Next, a method for driving the PDP 51 in the plasma display device 50 will be described. FIG. 3 is a diagram for explaining an example of a basic driving waveform applied to the driving method. FIG. 3 shows the light emission waveform for one drive unit period UN together with the drive waveform or voltage waveform applied to the electrodes X, Y, and W. One drive unit period UN corresponds to one subfield period SF in the subfield gray scale method, and the subfield gray scale method is used in the present drive method. Here, in order to make the explanation easy to understand, driving waveforms applied to the electrodes X, Y, and W in FIG. 3 are shown as an example of a basic waveform diagram in the same manner as those in FIG. Thus, the difference in the driving method of both PDP 51 or the generation method of the driving waveform becomes clear. A driving method or driving waveform of the PDP 51 will be described with reference to FIGS.
[0060]
One drive unit period UN or one subfield period SF is roughly divided into an address period AD, a sustain period ST, and a reset period RE. Here, the sustain period ST is a first auxiliary period ST1, a sustain repetition period ST0, and a second auxiliary period ST2. Is included. Here, rectangular waves are used for pulses 21, 22, 261, 262, 23, 263, and 25 described later.
[0061]
First, in the address period AD, the scan pulse 21 is sequentially applied to the n electrodes Y, and each electrode pair X, Y or each scan line is selected (scanned) in order. At this time, an address pulse (or write pulse) 22 of voltage Va is applied to each electrode W or not, corresponding to the image data D of each discharge cell C belonging to the selected electrode pair X, Y. Note that a predetermined voltage is applied to the electrode X during scanning of each electrode pair X, Y.
[0062]
An address discharge (or address discharge) is formed in the discharge cell C (one or more) to which the address pulse 22 is applied, and the discharge cell C is caused by wall charges (or wall voltage) formed by the address discharge. It is set (defined) in the ON state (writing is performed on the discharge cell C). That is, in the address period AD, the ON / OFF state of the discharge cell C is set by the formation / non-formation of the address discharge.
[0063]
In the sustain period ST subsequent to the address period AD, the sustain pulse is generated only in the discharge cell C set to the ON state in the previous address period AD by the sustain pulse 23 and the auxiliary pulses 261, 262, and 263.
[0064]
Specifically, in the first auxiliary period ST1 following the address period AD, the auxiliary pulse 261 is applied to the electrode Y, then the auxiliary pulse 262 is applied to the electrode X, and then the auxiliary pulse 262 is applied to the electrode Y. . The auxiliary pulses 261 and 262 have a voltage Vs and have a wider pulse width than a sustain pulse 23 described later, and the auxiliary pulse 261 has a wider pulse width than the auxiliary pulse 262. The auxiliary pulses 261 and 262 stably generate the subsequent discharge (sustain discharge in FIG. 3) by increasing the wall charge formed by the address discharge, in other words, stabilizing the ON state (starting discharge in FIG. 3). ) Note that the voltage Va is applied to the electrode W during the sustain period ST.
[0065]
In the sustain repetition period ST0 subsequent to the first auxiliary period ST1, the sustain pulse 23 of the voltage Vs is alternately (alternatively) applied to the electrodes X and Y. At this time, one period of AC application (drive waveform), specifically, the period of the sustain pulse 23 applied to the electrode X and the sustain pulse 23 applied to the electrode Y applied in succession (sequentially) Waveform) is referred to as a sustain repetition period or a repetition unit STC. That is, in the sustain repetition period ST0, the repetition unit STC is repeated Nsf times defined for each subfield period SF.
[0066]
Thereafter, in the second auxiliary period ST2 following the sustain repetition period ST0, the auxiliary pulse 263 is sequentially applied to the electrodes X and Y. The auxiliary pulse 263 has the same voltage and pulse width as the auxiliary pulse 262. The auxiliary pulse 263 increases the wall charge decreased by the previous discharge (sustain discharge in FIG. 3), and stably generates the subsequent erase discharge.
[0067]
In the reset period RE following the sustain period ST, the erase pulse 25 is applied to the electrode X. The erase pulse 25 has a narrower pulse width than the sustain pulse 23 (so-called narrow erase pulse). The erasing pulse 25 erases the wall charges by forming an erasing discharge only in the discharge cell C in which the sustain discharge has occurred in the previous sustain period ST, that is, turned on in the address period AD. The erase pulse 25 sets (defines) the discharge cells C in the ON state to turn off all the discharge cells C, so that the erase pulse 25 completes the operation for one drive unit period UN.
[0068]
In the reset period RE, the priming discharge may be performed after the erasing discharge, or the erasing discharge and the priming discharge may be switched every driving unit period UN. The priming discharge is formed by applying a rectangular wave to the electrodes X and W, for example.
[0069]
In such a driving method, the discharge due to the address discharge and the first auxiliary pulse 261 in the first auxiliary period ST1 is a discharge performed with a small amount of wall charges, and the sustain discharge due to the sustain pulse 23 and the auxiliary pulses 262 and 263 It is weak compared. For this reason, the light emission intensity (or light emission luminance) of the discharge by the address discharge and the auxiliary pulse 261 is treated as ½ of the light emission intensity of the sustain discharge by the sustain pulse 23 and the auxiliary pulses 262 and 263. Further, the emission intensity of the erasing discharge by the erasing pulse 25 is treated as equivalent to the sustaining discharge.
[0070]
<Drive Waveform Generation Method and PDP Drive Method>
Next, a method of generating the drive waveform in FIG. 3 will be described with reference to FIGS.
[0071]
First, the waveform in the sustain repetition period ST0 is composed of repetitions of the repetition unit STC, while the waveforms other than the sustain repetition period ST0 in one drive unit period UN have no repetition as a whole. In this way, a series of drive waveforms can be classified into a repetitive waveform and a non-repetitive non-repetitive waveform.
[0072]
Further, in the above driving method, the discharge cell C emits light when the address discharge, the sustain discharge and the erase discharge are formed. In the following, light emission that is set to the ON state during the address period AD and that occurs only in the set discharge cell C is also referred to as “display light emission”. At this time, in the one drive unit period UN of FIG. 3, each series of drive waveforms applied to the electrodes X, Y, W in the one drive unit period UN can be classified as follows.
[0073]
First classification CL1: A period in which display light emission is performed by repeatedly applying the same waveform. Specifically, the first classification CL1 includes a sustain repetition period ST0 (inner waveform). It can be understood that the waveform of the constant voltage (here, voltage Va) is repeated on the electrode W in the sustain repetition period ST0.
[0074]
Second classification CL2: A period in which display light emission is performed without repeatedly applying the same waveform. However, a period essential for completing the operation of one drive unit period UN is excluded. Specifically, the second classification CL2 includes a period (inner waveform) and a second auxiliary period ST2 (inner waveform) after the first auxiliary pulse 261 falls in the first auxiliary period ST1, and the reset period. Does not include RE (internal waveform).
[0075]
Third classification CL3: a period not related to display light emission and a period during which display light emission is performed, which is a period essential for completing the operation of one drive unit period UN. That is, the third classification CL3 corresponds to a period other than the first and second classifications CL1 and CL2, and the period (inner waveform) until the auxiliary pulse 262 is raised in the address period AD and the first auxiliary period ST1. It includes a reset period RE (within each waveform).
[0076]
As described above, the address period AD is a period for setting ON / OFF states of the plurality of discharge cells C belonging to the electrode pairs X and Y. Further, since the auxiliary pulse 261 stabilizes the ON state set by the address discharge, it can be regarded as a pulse for setting the discharge cell C to the ON state. The erase pulse 25 generates display light emission, but sets the discharge cell C in the ON state to the OFF state. Accordingly, the third classification CL3 includes a period (inner waveform) for setting the ON state / OFF state of each of the plurality of discharge cells C.
[0077]
Further, the first to third classifications CL1 to CL3 are further divided into blocks B1 to B5. At this time, it divides | segments so that different classification | category CL1-CL3 may become mutually different blocks B1-B5. In addition, the waveform is divided so that the same (continuous) voltage state (here, X = 0V, Y = 0V, W = Va) is obtained at the boundary between successive blocks.
[0078]
First, one cycle of repetition in the first classification CL1, that is, a repetition unit STC (internal waveform) is defined as a block B3.
[0079]
Next, the period (inner waveform) classified into the second classification CL2 is divided so that the number of light emission in each block is the same as the number of light emission in the block B3. In the driving method of FIG. 3, the display light emission in each of the two second classifications CL2 is twice and is equal to the number of light emission in the block B3. Therefore, here, the first light emission in the first auxiliary period ST1 is not divided. A period (inner waveform) after the fall of the auxiliary pulse 261 is defined as a block B2, and a second auxiliary period ST2 (inner waveform) is defined as a block B4.
[0080]
Further, regarding the third classification CL3, the period (inner waveform) before the auxiliary pulse 262 is raised in the address period AD and the first auxiliary period ST1 is collectively defined as a block B1, and the reset period RE (inside Waveform) is defined as block B5. Note that, due to the configuration of the control circuit 40, the third classification CL3 may be divided into a plurality of blocks.
[0081]
According to such division, each series of drive waveforms applied to the electrodes X, Y, and W is classified into the following first to third waveforms, respectively. That is, the generic name of the waveforms in the blocks B1 and B5 of the third classification CL3 corresponds to the first waveform applied to the plurality of discharge cells C when setting the ON state / OFF state of each of the plurality of discharge cells C. The waveform in block B2 forms a non-repetitive waveform together with the waveform in block B1, and the waveform in block B4 forms a non-repetitive waveform together with the waveform in block B5. Each corresponds to the second waveform. That is, in the drive waveform generation method according to the first embodiment, the series of drive waveforms includes two second waveforms. The waveform in the repeat unit STC corresponds to the third waveform. As for the third waveform, the entire waveform in the repetition unit STC can be regarded as one waveform, and the waveform from the rising to the falling of the sustain pulse 23 and the waveform of the constant voltage (0 V in this case) are two. It can also be understood as including two waveforms.
[0082]
Next, FIG. 4 is a diagram for explaining the relationship between the number of executions of each of the blocks B1 to B5 and light emission. FIG. 4 shows a desirable light emission number Npd, light emission intensity level Lv, the number of executions of each of the blocks B1 to B5, and the actual light emission number Npr from the left column. In FIG. 4, the block whose execution count is 0 is skipped without being used in the configuration of one drive unit period UN, and the next (right column) block is immediately executed.
[0083]
By the way, the display unit emits light twice in the repeating unit STC, so that the resolution of the number of light emission becomes 2. Therefore, the desired number of times of light emission Npd is divided into two, and each division is referred to as a light emission intensity level Lv. Specifically, the desired number of times of light emission Npd = 1, 2 is called the light emission intensity level Lv = 1, and the desired number of times of light emission Npd = 3,4 is called the light emission intensity level Lv = 2. That is, with k being a positive integer, the desired number of emission times Npd = k × 2-1, k × 2 is referred to as the emission intensity level Lv = k. In the drive waveform generation method according to the first embodiment, the number of executions of each of the blocks B1 to B5 is defined for each value of the light emission intensity level Lv.
[0084]
Note that the emission intensity level Lv (i) in the i-th subfield period SFi is similar to Equation 2 described above.
Lv (i) = INT (Np × Msf (i) / ΣMsf / 2) (Formula 3)
It can be expressed as.
[0085]
As shown in FIG. 4, at the lowest emission intensity level Lv = 1, only block B1 and block B5 are executed in this order (first waveform generation step). At the next lowest emission intensity level Lv = 2, block B2 is added to the case of emission intensity level Lv = 1 (in other words, the second waveform generation step is added), and blocks B1, B2, and B5 are changed to this. Run in order. At this time, the block B4 may be executed instead of the block B2. Then, at the light emission intensity Lv = 3, the block B4 is added to the case of the light emission intensity level Lv = 2 (in other words, the second waveform generation step is added), and the blocks B1, B2, B4, B5 are changed to this. Run in order. In addition, when there are a plurality of blocks B2 and B4, each time the value of the light emission intensity level Lv increases, one block B2 or one block B4 is added.
[0086]
In this way, when the blocks B2 and B4 are added and all the blocks B2 and B4 are executed in one drive unit period UN (one subfield period SF) at the emission intensity level Lv = h, the emission intensity level At Lv = h + 1, in addition to the configuration at the light emission intensity level Lv = h, the block B3 (in other words, the third waveform generation step) is executed once. Specifically, in the case of FIGS. 3 and 4, with respect to the light emission intensity level Lv = 3, the block B3 is added at the light emission intensity level Lv = 4, and the blocks B1, B2, B3, B4, and B5 are executed in this order. . Thereafter, the number of executions of the block B3 is increased by 1 each time the light emission intensity level Lv increases, and at the light emission intensity level Lv = h + j, the block B3 is moved j times between the blocks B2 and B4 in addition to the structure of the light emission intensity Lv = h. repeat.
[0087]
That is, in the drive waveform generation method according to the first embodiment, the drive device 52 (see FIG. 1) uses the first to third waveform generation steps described above to execute / do not execute the second waveform generation step. By controlling the execution / non-execution of the third waveform generation step and the number of executions at the time of execution, a series of drive waveforms applied to each electrode X, Y, W within one drive unit period UN (see FIG. 3) ) Is generated. At this time, a series of drive waveforms is generated using at least the first waveform generation step.
[0088]
According to such a drive waveform generation method, the actual number of times of light emission can be calculated as follows. First, the address discharge in the block B1, the sustain discharge by the auxiliary pulse 261, and the erasing discharge in the block B5 generate light regardless of the light emission intensity level Lv. In other words, these three light emissions are not controlled by the execution / non-execution and the number of executions of the blocks B2 to B4. At this time, as described above, the light emission intensity of the sustain discharge by the address discharge and the auxiliary pulse 261 is treated as half of the light emission intensity of the sustain discharge by the sustain pulse 23, and the light emission intensity of the erasing discharge is equivalent to the sustain discharge. deal with. Therefore, uncontrolled emission corresponds to two sustain pulses 23 (that is, one repetition unit STC).
[0089]
A value obtained by adding the number of times of light emission for which the execution / non-execution of the blocks B2 to B4 and the number of executions are controlled to the light emission for the two sustain pulses is the actual light emission number Npr. As shown in FIG. 4, according to the drive waveform generation method according to the first embodiment, the difference between the actual light emission number Npr and the desired light emission number Npd can be suppressed to at most one. This one-time difference is caused by a limitation due to the resolution of the number of times of light emission.
[0090]
As described above, in the drive waveform generation method according to the first embodiment, the execution / non-execution of (two) second waveform generation steps and the execution / non-execution of the third waveform generation step and the execution time are performed. A series of drive waveforms are generated by controlling the number of executions. For this reason, when the drive device 52 generates such a drive waveform and drives the PDP 51 with the drive waveform, the non-repetitive waveform in the drive waveform is not controlled (in other words, the second waveform generation step). When the execution / non-execution is not controlled) and when the execution / non-execution of the block B3 (in other words, the third waveform generation step) and the execution number at the time of execution are not controlled, the desired number of light emission times Npd and the actual Deviation from the number of times of light emission Npr can be reduced. That is, no matter what value the desired number of times of light emission Npd is set, light emission corresponding to that value can be performed. Accordingly, smooth gradation expression can be achieved and false contours can be reduced.
[0091]
At this time, when the average maintenance frequency (specifically, the number of repetitions of the repetition unit STC per second) is low (or when the number of execution times of the third waveform generation step is small), the above-described deviation can be significantly reduced. it can. For this reason, the luminance level (specifically, the emission luminance at a certain gradation (for example, the maximum gradation)) or the average sustain frequency according to the setting condition of the brightness of the entire surface of the PDP 51 or the brightness of the entire screen (or the setting condition of the entire brightness). Even in the case of changing automatically or as desired, the weight ratio between the subfield periods SF can be kept constant. That is, smooth gradation expression and false contour reduction effect can be obtained without depending on the frequency.
[0092]
Here, the setting conditions of the overall brightness of the PDP 51 are, for example, setting conditions based on the display rate in the PDP 51 by the so-called APC (Automatic Power Control) method, or the observer (or user) adjusts the brightness of the entire screen as desired. Including the setting conditions of the case.
[0093]
In the APC method, the execution / non-execution of the second waveform generation step, the execution / non-execution of the third waveform generation step, and the number of executions at the time of execution are set according to the display rate in the PDP 51. It can be implemented. According to the APC method, it is possible to automatically adjust the overall brightness of the PDP 51 based on the display rate and suppress an increase in power consumption. Note that the display rate is obtained by integrating the gradation levels in each discharge cell for all the discharge cells and expressing the maximum value as 1. The observer can also change and adjust the overall brightness of the PDP 51 by executing / not executing the second waveform generation step, executing / not executing the third waveform generation step, and the number of executions and control at the time of execution. is there.
[0094]
<Configuration of control circuit>
FIG. 5 shows a configuration (block diagram) of the control circuit 40 for executing the drive waveform generation method described above. As shown in FIG. 5, the control circuit 40 includes a drive waveform control unit 401, a signal element storage unit 402, and an image data rearrangement unit 403.
[0095]
The image data rearrangement unit 403 includes a memory write control unit 403A, a frame memory 403B, and a memory read control unit 403C. The image data rearrangement unit 403 acquires the image data D, and rearranges the data so that it is output in order of the subfield period for each driver IC, for example, so as to correspond to the drive waveform in the PDP 51 and the specifications of the drivers 14, 15, 18. And stored in the frame memory 403B. Further, the rearranged image data is read out from the frame memory 403B by timing synchronization from the drive waveform control unit 401 and sent to the drivers 14, 15, and 18 together with the drive waveform control signals Sy, Sx, and Sw.
[0096]
FIG. 6 shows a diagram for explaining the signal element storage unit 402. As shown in FIG. 6, the signal element storage unit 402 stores elements (hereinafter also referred to as “signal elements”) F1 to F5 of the drive waveform control signals corresponding to the waveforms of the blocks B1 to B5 described above. Therefore, the signal element storage unit 402 stores the first to third signal elements corresponding to the first to third waveforms.
[0097]
The signal element storage unit 402 can be configured by various memories such as a ROM, a RAM, a flash memory, or the like, or by a logic circuit, and the signal elements F1 to F5 are stored, for example, in areas in the memory.
[0098]
For example, the signal element storage unit 402 divides the waveform of the drive waveform control signal for each unit time and stores the waveform for each unit time in one address of the memory, or the waveform for each unit time sequentially The waveform elements F1 to F5 are stored by a method of configuring a sequential circuit that is output to the above, or a method of storing the timing of the portion where the waveform state changes and the waveform of the changed portion. . That is, the signal element storage unit 402 only needs to store information that can (re) configure the waveform elements F1 to F5, and various storage methods can be applied.
[0099]
Returning to FIG. 5, the drive waveform control unit 401 includes sequence program data 401A, a signal generation control unit 401B, a signal generation unit 401C, a light emission intensity table 401D, and a display rate detection unit 401E.
[0100]
FIG. 7 is a diagram for explaining the sequence program data 401A. As shown in FIG. 7, the sequence program data 401A describes the association and execution order of numbers of subfield periods, blocks, and classifications.
[0101]
FIG. 8 is a diagram for explaining the emission intensity table 401D. As shown in FIG. 8, the light emission intensity table 401D is a desirable number of light emission times Npd (1) to Npd (8) in each subfield period SF1 to SF8 at each display rate dr (in other words, the value of the light emission intensity Lv. 4) is an LUT (Look Up Table).
[0102]
For example, in the case of the APC method, as the display rate dr increases, the desired number of times of emission Npd (1) to Npd (8) is suppressed (the emission intensity level Lv), and accordingly, the emission intensity in one field period (that is, the emission intensity level Lv). (Brightness level) is suppressed. As described above, according to the APC method, an increase in power consumption can be suppressed.
[0103]
Further, for example, by providing a light emission intensity table 401D for each stage according to the stage of the overall brightness of the PDP 51 (for example, 10 stages), the observer can change and adjust the overall brightness of the PDP 51 as desired by selecting the above stage. It is.
[0104]
The display rate detection unit 401E acquires the image data D of the display image, and obtains and outputs the display rate dr in the display image.
[0105]
The drive waveform control unit 401 (more specifically, the signal generation control unit 401B) receives an external vertical synchronization signal Vsync or the like, and generates the drive waveform control signals Sy, Sx, and Sw using the signal Vsync or the like as a trigger. Begin.
[0106]
First, the signal generation control unit 401B acquires the display rate dr from the display rate detection unit 401E. Then, the signal generation control unit 401B refers to the light emission intensity table 401D and acquires the desired number of times of light emission Npd (1) to Npd (8) in each of the subfield periods SF1 to SF8 corresponding to the acquired display rate dr.
[0107]
At this time, a predetermined emission intensity table 401D corresponding to the overall luminance level selected / set by the observer is referred to. In the plasma display device 50, the observer can select and input the overall luminance level from the input device (including the remote control device) of the plasma display device 50, for example. Is given to the signal generation control unit 401B.
[0108]
Note that without using the light emission intensity table 401D, the signal generation control unit 401B calculates the light emission intensity Lv from the luminance level and the weight of the subfield period based on the above-described equation 3 (the desired number of light emission times Npd (1)). -Npd (8)) may be acquired.
[0109]
Further, the signal generation control unit 401B multiplies the desired number of times of emission Npd (1) to Npd (8) acquired from one emission table 401D or from Expression 3 by a predetermined coefficient according to the setting condition of the overall luminance of the PDP 51, The value of the multiplication result may be acquired as the desired number of light emission times Npd (1) to Npd (8). In this case, the memory capacity or circuit scale for the light emission intensity table can be reduced as compared with the structure in which the light emission intensity table 401D for each stage of the overall luminance is provided.
[0110]
Then, the signal generation control unit 401B transmits to the signal element storage unit 402 a signal S401B that instructs to output the signal element F1 corresponding to the waveform in the block B1 in the subfield period SF1 according to the sequence program data 401A. When receiving the signal S401B, the signal element storage unit 402 outputs the instructed signal element F1 to the signal generation unit 401C.
[0111]
Next, the signal generation control unit 401B controls the signal element storage unit 402 as necessary to cause the signal generation unit 401C to output the signal element F2 corresponding to the waveform in the block B2 in the subfield period SF1. That is, the signal generation control unit 401B generates a signal based on the acquired desired number of times of emission Npd (and / or emission intensity level Lv) and the relationship between the desired number of times of emission Npd in FIG. Whether or not the element F2 is read out to the signal generation unit 401C is determined. At this time, the signal generation control unit 401B skips the reading process of the signal element F2 when the reading of the signal element F2 is unnecessary.
[0112]
As described above, the signal generation control unit 401B may be provided with a conversion function between the desired number of light emission times Npd (and / or light emission intensity level Lv) in FIG. 4 and the number of execution times of each of the blocks B1 to B5. For example, a light emission intensity / execution number conversion table 401F (indicated by a broken line in FIG. 5) describing the contents of FIG. 4 is provided in the drive waveform control unit 401, and the signal generation control unit 401B performs the light emission intensity / execution number conversion table. 401F may be referred to.
[0113]
Similarly, the signal generation control unit 401B executes or skips reading out each of the signal elements F3 to F5 based on the acquired number of emission times Npd and the relationship of FIG.
[0114]
In this way, the signal generation unit 401C and thus the drive waveform control unit 401 obtains the necessary signal elements among the signal elements F1 to F5. Then, the signal generation unit 401C connects the acquired signal elements to generate and output drive waveform control signals Sy, Sx, Sw for the subfield period SF1. Similarly, the drive waveform control unit 401 generates and outputs drive waveform control signals Sy, Sx, Sw for the subfield periods SF2 to SF8.
[0115]
If the signal elements F1 to F5 are stored as waveforms for each unit time for each memory address, they can be output as they are or simply through a buffer or flip-flop circuit.
[0116]
At this time, when the drive waveform control unit 401 acquires the first to third signal elements corresponding to the above first to third waveforms from the signal element storage unit 402, the control circuit 40 accordingly The drive waveform control signals Sy, Sx, and Sw are generated by controlling the acquisition / non-acquisition, the acquisition / non-acquisition of the third signal element, and the number of repetitions when repeatedly acquiring. As a result, the driving device 52 (see FIG. 1) realizes the above-described driving waveform generation method, and provides smooth gradation expression and false contour reduction effect.
[0117]
Further, since the control circuit 40 divides the non-repetitive waveform into the first and second waveforms and stores the first and second signal elements corresponding to them in the signal element storage unit 402, Compared with the configuration storing each signal element corresponding to each of only the first waveform, the memory capacity or scale can be reduced. Further, since the control circuit 40 stores the third signal element corresponding to the third waveform constituting the repetition unit in the signal element storage unit 402, the entire sustain repetition period ST0 is made one drive waveform (without division). The memory capacity can be made smaller than the configuration in which a plurality of signal elements corresponding to the one drive waveform are stored. That is, the control circuit 40 can generate the drive waveform control signals Sy, Sx, Sw with a smaller circuit scale.
[0118]
<Embodiment 2>
In the driving method according to the first embodiment, as shown in FIG. 3, the repeating unit STC of the sustain repetition period ST0 is defined as one cycle (drive waveform) of alternating application between the electrodes X and Y, and The repetition unit STC is set as one block B3. In the second embodiment, a driving method or a driving waveform generation method in the case where the repeating unit STC is further divided will be described.
[0119]
FIG. 9 shows an example of a basic driving waveform applied to the driving method according to the second embodiment. FIG. 9 shows a series of drive waveforms or voltage waveforms applied to the electrodes X, Y, W for one drive unit period UN.
[0120]
The drive waveforms for the electrodes X, Y, and W in FIG. 9 do not have the second auxiliary period ST2 in FIG. 3 described above, and a reset period RE is provided next to the sustain repetition period ST0. Further, in the reset period RE according to the second embodiment, the erase pulse 25B is applied to the electrode X instead of the rectangular narrow pulse 25 in FIG. 3, and then the erase pulses 25C and 25D are sequentially applied to the electrode Y. Applied.
[0121]
As the erase pulses 25B, 25C, and 25D, pulses (blunt pulses) having a waveform (blunt waveform) in which the voltage gradually changes are used. Here, the dull pulse means a waveform having a slower rise time than the discharge delay time, and the dull pulse includes a waveform in which the voltage changes linearly (ramp waveform), an exponential waveform generated by the CR time constant circuit, and the like. . FIG. 9 shows a ramp waveform as an example of the blunt pulse. The erase pulses 25B and 25C change in the direction in which the voltage increases, and the erase pulse 25C changes in the direction in which the voltage decreases.
[0122]
In the drive waveform of FIG. 9, the waveforms in the address period AD, the first auxiliary period ST1, and the sustain repetition period ST0 are the same as those in FIG.
[0123]
In particular, in the drive waveform according to the second embodiment, the repeat unit STC, in other words, the block B3 in FIG. 3, the block B3a including one sustain pulse 23 to the electrode X, and the sustain pulse 23 to the electrode Y are provided. The block is divided into one block B3b. That is, the blocks B3a and B3b correspond to a half cycle of the repeating unit STC.
[0124]
At this time, the waveform (third waveform) in the repeat unit STC can be regarded as including two waveforms, a waveform from the rising edge to the falling edge of the sustain pulse 23 and a constant voltage (here, 0 V) waveform. it can. Correspondingly, the above-mentioned two waveforms are generated by sequentially executing respective waveform generation steps.
[0125]
The blocks B3a and B3b are alternately provided, and the repeat unit STC is executed r / 2 (r is an integer of 0 or more) times in the sustain repetition period ST0. For this reason, unlike the first embodiment, the sustain repetition period ST0 may end with the block B3a in the drive waveform according to the second embodiment. When the sustain repetition period ST0 ends in the block B3a, the number of execution times of the above-described two waveform generation steps is different.
[0126]
Furthermore, in the drive waveform according to the second embodiment, the second classification CL2 (inner waveform) is set so that the number of light emission in each block is the same as the number of light emission in each block B3a, B3b, in other words, FIG. The inside block B2 is divided into blocks B2a and B2b. Specifically, the block B2a includes one auxiliary pulse 262 to the electrode X, and the block B2b includes one auxiliary pulse 262 to the electrode Y. At this time, similarly to the waveform in the repeat unit STC, for example, the waveform in the second classification CL2 corresponding to the block B2 is a waveform from the rising edge to the falling edge of the auxiliary pulse 262, and a waveform of a constant voltage (here, 0V). It can be understood that these two waveforms (or two second waveforms) are included.
[0127]
Next, FIG. 10 shows a diagram for explaining the relationship between the number of executions of each block B1, B2a, B2b, B3a, B3b, and B5 and light emission. FIG. 10 corresponds to FIG. 4 and shows the desired number of times of emission Npd, emission intensity level Lv, the number of executions of each block B1, B2a, B2b, B3a, B3b, and B5 and the actual number of times of emission Npr from the left column. Note that light emission by the blunt pulses 25B, 25C, and 25D in the block B5 is very weak and is not counted as the number of times of light emission.
[0128]
In FIG. 10, a block whose execution count is 0 indicates that it is skipped without being executed in one drive unit period UN. Regarding the notation of the number of execution times of the blocks B3a and B3b, for example, “1/2” indicates that only the block B3a is executed, and “2/2” indicates that the block B3a and the block B3b are executed in this order. "3/2" indicates that the block B3a, the block B3b, and the block B3a are executed in this order. Further, for example, “2k / 2” indicates that the blocks B3a and B3b are alternately executed k times (that is, the repeat unit STC is executed k times), and “2k / 2 + 1” indicates that the blocks B3a and B3b are alternately executed. This indicates that the process is executed k times and the block B3a is executed once.
[0129]
As shown in FIG. 10, at the lowest emission intensity level Lv = 1, only the block B1 and the block B5 are executed in this order. At the next lowest emission intensity level Lv = 2, block B2a is added when emission intensity level Lv = 1, and blocks B1, B2a, and B5 are executed in this order. When the emission intensity Lv = 3, the block B2b is added when the emission intensity level Lv = 2, and the blocks B1, B2a, B2b, and B5 are executed in this order. Further, at the light emission intensity Lv = 4, the block B3a is added when the light emission intensity level Lv = 3, and the blocks B1, B2a, B2b, B3a, B5 are executed in this order. Further, at the light emission intensity Lv = 5, the block B3b is added when the light emission intensity level Lv = 4, and the blocks B1, B2a, B2b, B3a, B3b, B5 are executed in this order. Further, at the light emission intensity Lv = 6, the block B3a is added when the light emission intensity level Lv = 5, and the blocks B1, B2a, B2b, B3a, B3b, B3a, B5 are executed in this order. Similarly, when the emission intensity Lv ≧ 7, each time the emission intensity level Lv increases by 1, the block B3a or the block B3b is added one by one so that the blocks B3a and B3b are executed alternately.
[0130]
By the way, the polarity of the wall charges at the time of starting the erase operation differs depending on whether the block executed at the end of the sustain repetition period ST0 is the block B3a or the block B3b. However, according to the blunt pulses 25B, 25C, 25D, the wall charge amount after the pulse application can be made constant regardless of the wall charge state at the start of the pulse application, so according to the erase pulses 225B, 25C, 25D. Even if the sustain repetition period ST0 ends in either of the blocks B3a and B3b, the wall charges can be erased. In other words, since the rectangular erase pulse 25 (see FIG. 3) is applied to the electrode X in the drive waveform according to the first embodiment, the sustain pulse period ST0 is terminated by applying the sustain pulse 23 to the electrode Y. The repeating unit STC is one repeating unit.
[0131]
If the wall charges have different polarities, the intensity of the erasing discharge is different when a rectangular erasing pulse is used, but the intensity of light emitted by the blunt pulses 25B, 25C, and 25D is very weak, so that the luminance linearity can be maintained.
[0132]
The driving waveform generation method according to the second embodiment can basically be realized by the driving device 52 of FIG. For example, in the control circuit 40 of FIG. 5, the signal elements corresponding to the blocks B1, B2a, B2b, B3a, B3b, B5 are stored in the signal element storage unit 402 (see FIG. 6), and the drive waveform control unit 401 10 may be configured to control the execution / non-execution and the number of executions of the waveform generation step in each block B1, B2a, B2b, B3a, B3b, B5 according to the relationship in FIG.
[0133]
Thus, in the drive waveform generation method and control circuit 40 according to the second embodiment, the waveform generation step in each block B1, B2a, B2b, B3a, B3b, B5 is executed / not executed according to the relationship in FIG. Control execution and number of executions. In particular, since the repetition unit STC is executed with each waveform (each generation step) in the blocks B3a and B3b as one unit, it is possible to generate, for example, a waveform of ½ period of the repetition unit STC. For this reason, compared with the case of Embodiment 1 which does not divide the repeating unit STC, the resolution of gradation can be improved. Accordingly, it is possible to further reduce the difference between the desired number of light emission times and the Npd actual light emission number Npr. As a result, the brightness level according to the setting conditions of the overall brightness of the PDP 51 (including setting conditions based on the display rate in the PDP 51 by the APC method, setting conditions when the observer adjusts the brightness of the entire screen, etc.) Even when the average maintenance frequency changes, the weight ratio between the subfield periods SF can be kept constant with higher accuracy. That is, smooth gradation expression and false contour reduction effect can be obtained without depending on the frequency.
[0134]
The drive waveform generation method described above can also be understood as follows. That is, as described above, the series of drive waveforms in FIG. 9 can be classified into a repetitive waveform in the sustain repetition period ST0 and a non-repetitive waveform having no repetition other than the sustain repetition period ST0. Therefore, using the step of generating the non-repetitive waveform and a plurality of steps for sequentially generating both waveforms in the blocks B3a and B3b (which form a repetition unit STC), each of the plurality of steps is executed as one unit. By controlling the non-execution and the number of executions at the time of execution, the series of drive waveforms in FIG. 9 can be generated.
[0135]
The signal element storage unit 402 (see FIG. 5) stores non-repetitive waveform signal elements corresponding to non-repetitive waveforms and repetitive waveform signal elements corresponding to respective waveforms in the blocks B3a and B3b. Thus, the control circuit 40 (see FIG. 5) can generate the drive waveform control signals Sy, Sx, Sw by executing the drive waveform generation method in the same manner as described above. Even in such a case, the signal element storage unit 402 stores a plurality of repetitive waveform signal elements corresponding to a plurality of waveforms constituting a repetitive unit, as in the case of the first embodiment. The size of the signal element storage unit 402, and hence the size of the control circuit 40, can be smaller than the configuration in which a plurality of signal elements corresponding to the driving waveform are stored.
[0136]
<Modification 1 of Embodiments 1 and 2>
FIG. 11 shows a basic drive waveform (repetition unit STC) of the PDP according to the first modification. The waveforms in FIG. 11 and FIG. 12 described later are proposed in Japanese Patent Application No. 2000-34876 by the same inventor as the present application.
[0137]
The drive waveform of FIG. 11 is applicable when the PDP 51 is driven by grouping (multiple) electrodes Y into two. Here, it is assumed that the electrodes Y1, Y2 belong to different groups, and FIG. 11 shows the drive waveforms of the electrodes Y1, Y2, X and the light emission waveforms P1, P2 of the discharge cells C belonging to the electrodes Y1, Y2. . For the sake of explanation, it is assumed that each discharge cell C belonging to each electrode Y1, Y2 is set to the ON state in the address period AD (see FIG. 3).
[0138]
In the repeating unit STC shown in FIG. 11, sustain pulses 233a and 235a are sequentially applied to the electrode Y1, sustain pulses 233b and 235b are sequentially applied to the electrode Y2, and sustain pulses 234 and 236 are sequentially applied to the electrode X. (Both are rectangular pulses). At this time, sustain pulse 233a, sustain pulse 233b, and sustain pulse 234 are raised in this order and lowered in this order. Next, sustain pulse 235b, sustain pulse 235a, and sustain pulse 236 are raised in this order and lowered in this order.
[0139]
With such a pulse application, as shown in the light emission waveform P1, each discharge cell C belonging to the electrode Y1 emits display light when the sustain pulses 233a and 235a rise and fall (thus, a total of 4 times). Similarly, as shown in the light emission waveform P2, each discharge cell C belonging to the electrode Y2 emits display light when the sustain pulses 233b and 235b rise and fall (thus, a total of 4 times).
[0140]
The repetition unit STC shown in FIG. 11 is applicable to the drive waveform (see FIG. 3) according to the first embodiment. Further, for example, the repeat unit STC (inner waveform) is divided into two blocks (inner waveforms) by dividing the sustain pulse 233a, 233b, 234 as a boundary at the time point when all of the sustain pulses 233a, 233b, 234 fall. R / 2 period of the waveform (1) can be applied to the drive waveform (see FIG. 9) according to the second embodiment.
[0141]
FIG. 12 shows another basic drive waveform (for repeat unit STC) of the PDP according to the first modification.
[0142]
The drive waveform of FIG. 12 can be applied to the case where the PDP 51 is driven by grouping (multiple) electrodes Y into three. Here, it is assumed that the electrodes Y1, Y2, and Y3 belong to different groups. FIG. 12 shows the drive waveforms of the electrodes Y1, Y2, Y3, and X and the light emission waveforms P1 and P1 of the discharge cells C belonging to the electrodes Y1, Y2, and Y3. P2 and P3 are illustrated. For the sake of explanation, it is assumed that each discharge cell C belonging to each electrode Y1, Y2, Y3 is set to the ON state in the address period AD (see FIG. 3).
[0143]
In the repeating unit STC shown in FIG. 12, sustain pulses 233a, 235a, 237a are sequentially applied to the electrode Y1, sustain pulses 233b, 235b, 237b are sequentially applied to the electrode Y2, and sustain pulses 233c, 235c, 237c is sequentially applied, and sustain pulses 234, 236, and 238 are sequentially applied to the electrode X (both are rectangular pulses). At this time, sustain pulse 233a, sustain pulse 233b, sustain pulse 233c, and sustain pulse 234 are raised in this order and lowered in this order. Next, sustain pulse 235b, sustain pulse 235c, sustain pulse 235a, and sustain pulse 236 are raised in this order and lowered in this order. Further, sustain pulse 237c, sustain pulse 237a, sustain pulse 237b, and sustain pulse 238 are raised in this order and lowered in this order.
[0144]
According to such pulse application, each discharge cell C belonging to the electrode Y1 emits display light at the rise and fall of each sustain pulse 233a, 235a, 237a (thus, a total of 6 times) as shown in the light emission waveform P1. Arise. Similarly, as shown in the light emission waveform P2, each discharge cell C belonging to the electrode Y2 emits display light when the sustain pulses 233b, 235b, and 237b rise and fall (thus a total of 6 times). Similarly, as shown in the light emission waveform P3, each discharge cell C belonging to the electrode Y3 emits display light when the sustain pulses 233c, 235c, and 237c rise and fall (accordingly, a total of 6 times).
[0145]
The repetition unit STC shown in FIG. 12 is applicable to the drive waveform (see FIG. 3) according to the first embodiment. Further, for example, the recurring unit STC (inner waveform) is defined with the boundary when the sustain pulses 233a, 233b, 233c, and 234 all fall and when all the sustain pulses 235a, 235b, 235c, and 236 fall. By dividing the block into three blocks (three waveforms), the r / 3 period of the repetition unit STC (inner waveform) can be applied to the drive waveform (see FIG. 9) according to the second embodiment.
[0146]
As described above, sustain pulses 233a, 233b, 234, 235a, 235b, and 236 in FIG. 11 are applied at different timings, and sustain pulses 233a, 233b, 233c, 234, 235a, 235b, and 235c in FIG. , 236, 237a, 237b, 237c, and 238 are applied at different timings. At this time, for example, even if the waveform in the repeating unit STC is not composed of waveforms having the same shape as in the waveform applied to the electrode Y1 in FIG. 11 or the waveform applied to the electrode Y1 in FIG. In other words, even if the divided waveforms do not have the same shape, the repeat unit STC is q (q is an integer of 2 or more) while maintaining the continuity of the drive waveform (specifically, voltage) between the blocks. The repetition unit STC can be executed in r / q cycles. At this time, the gradation resolution can be increased to q times that in the case where the resolution is not divided.
[0147]
【The invention's effect】
According to the first aspect of the invention, the drive waveform control unit obtains / non-obtains the second signal element and obtains / non-acquires the third signal element when obtaining the first to third signal elements from the storage unit. And the number of repetitions when repeatedly acquiring is controlled. For this reason, it is compared with the case where the control circuit is used to drive the plasma display panel via a driver, and the acquisition / non-acquisition of the second signal element and the acquisition / non-acquisition of the third signal element and the number of repetitions are not controlled. Thus, it is possible to reduce the difference between the desired number of times of light emission and the actual number of times of light emission. Accordingly, smooth gradation expression can be achieved and false contours can be reduced. At this time, when the repetition frequency of the repetition unit is low (or when the number of repetitions of the repetition unit is small), the shift can be remarkably reduced, and smooth gradation expression and false contour can be achieved without depending on the repetition frequency. Can be reduced. Further, the waveform without repetition is divided into the first and second waveforms, and the storage unit stores the first and second signal elements corresponding to the first and second waveforms, and the third signal element is Since it corresponds to the third waveform constituting the repetitive unit, the size of the storage unit and hence the size of the control circuit can be reduced.
[0148]
Claim 1 According to the invention, the third waveform (which forms a repeating unit) includes a plurality of waveforms, the third signal element includes a plurality of signal elements corresponding to the plurality of waveforms, and the drive waveform control unit includes the third signal. Since the number of repetitions of the element is controlled in units of the number of repetitions of each of the signal elements, for example, a waveform that is ½ of the repetition unit can be generated. For this reason, compared with the case where the said repeating unit is not divided | segmented, the resolution of a gradation can be improved. Accordingly, it is possible to further reduce the difference between the desired number of times of light emission and the actual number of times of light emission.
[0150]
Claim 2 According to the invention, the drive waveform control unit controls acquisition / non-acquisition of a plurality of repetitive waveform signal elements (corresponding to a plurality of waveforms constituting a repetitive unit) and repeats a plurality of repetitive waveform signal elements. The drive waveform control signal is generated by controlling the number of repetitions in the acquisition in units of the number of repetitions of the plurality of repetitive waveform signal elements. For this reason, by driving the plasma display panel via a driver using the control circuit, it is possible to increase the resolution of gradation compared to the case where the repeating unit is not divided. Accordingly, it is possible to reduce the difference between the desired number of light emission times and the actual number of light emission times. In addition, since the storage unit stores a plurality of repetitive waveform signal elements corresponding to a plurality of waveforms constituting a repetitive unit, the size of the storage unit and hence the size of the control circuit can be reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram for explaining a plasma display device according to a first embodiment.
FIG. 2 is a schematic perspective view for explaining the PDP according to the first embodiment.
FIG. 3 is a diagram for explaining basic drive waveforms of the PDP according to the first embodiment.
4 is a diagram for explaining a relationship between the number of execution times of each block and light emission in the PDP driving method according to Embodiment 1. FIG.
FIG. 5 is a block diagram for explaining a control circuit according to the first embodiment;
FIG. 6 is a diagram for explaining a signal element storage unit of the control circuit according to the first embodiment.
FIG. 7 is a diagram for explaining sequence program data of the control circuit according to the first embodiment.
FIG. 8 is a diagram for explaining a light emission intensity table of the control circuit according to the first embodiment.
FIG. 9 is a diagram for explaining basic drive waveforms of the PDP according to the second embodiment.
10 is a diagram for explaining the relationship between the number of execution times of each block and light emission in the PDP driving method according to Embodiment 2. FIG.
FIG. 11 is a diagram for explaining basic drive waveforms of a PDP according to a first modification of the first and second embodiments.
12 is a diagram for explaining another basic drive waveform of the PDP according to the first modification of the first and second embodiments. FIG.
FIG. 13 is a timing chart for explaining a PDP driving method according to the first prior art.
FIG. 14 is a timing chart for explaining a driving method of the PDP according to the second prior art.
FIG. 15 is a timing chart for explaining a problem of a conventional PDP driving method.
16 is a diagram for explaining a desirable number of times of light emission in the driving method of FIG.
FIG. 17 is a diagram for explaining a deviation between a desired number of light emission times and an actual light emission number in the driving method of FIG.
18 is a diagram for explaining the actual number of times of light emission in the driving method of FIG.
[Explanation of symbols]
14, 15, 18 driver, 40 control circuit, 50 plasma display device, 51 PDP, 52 drive device, 401 drive waveform control unit, 401A sequence program data, 401B signal generation control unit, 401C signal generation unit, 401D emission intensity table, 401E Display rate detection unit, 401F Light emission intensity / execution number conversion table, 402 Signal element storage unit (storage unit), AD address period, B1-B5, B2a, B2b, B3a, B3b block, C discharge cell, CL1-CL3 classification , F1 to F5 signal elements, RE reset period, ST sustain period, ST0 first auxiliary period, ST1 sustain repetition period, ST2 second auxiliary period, STC repetition unit, Sx, Sy, Sw drive waveform control signal, dr display rate.

Claims (2)

A control circuit for controlling a driver for a plasma display panel,
The plasma display panel includes a plurality of discharge cells,
The control circuit includes:
A first signal element corresponding to a first waveform applied to the plurality of discharge cells when setting an ON state / OFF state of each of the plurality of discharge cells, and a first signal element that forms a non-repetitive waveform together with the first waveform. A storage unit for storing a second signal element corresponding to two waveforms and a third signal element corresponding to a third waveform forming a repetition unit;
A drive waveform control unit for acquiring the first to third signal elements from the storage unit and generating a drive waveform control signal for causing the plasma display panel driver to generate a series of drive waveforms;
The drive waveform controller is
Controlling the acquisition / non-acquisition of the second signal element, the acquisition / non-acquisition of the third signal element, and the number of repetitions when repeatedly acquiring the first to third signal elements from the storage unit And
The third waveform includes a plurality of waveforms;
The third signal element includes a plurality of signal elements corresponding to the plurality of waveforms;
The drive waveform control unit controls the number of repetitions of the third signal element in units of the number of repetitions of the plurality of signal elements ;
Control circuit. A control circuit for controlling a driver for a plasma display panel,
The plasma display panel includes a plurality of discharge cells,
The control circuit includes:
A storage unit for storing a non-repetitive waveform signal element corresponding to a non-repetitive waveform and a plurality of repetitive waveform signal elements corresponding to a plurality of waveforms constituting a repetition unit;
A drive waveform for acquiring the non-repetitive waveform signal element and the plurality of repetitive waveform signal elements from the storage unit and generating a drive waveform control signal for causing the plasma display panel driver to generate a series of drive waveforms. A control unit,
The drive waveform controller is
When acquiring the non-repetitive waveform signal element and the plurality of repetitive waveform signal elements from the storage unit, the acquisition unit determines whether or not to acquire the plurality of repetitive waveform signal elements, and the plurality of repetitive waveform signal elements. Controlling the number of repetitions when repeatedly acquiring the number of repetitions of each of the plurality of repetitive waveform signal elements as a unit,
Control circuit.

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