JP4430848B2 - Light emitting device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a semiconductor optical integrated device.Light emitting device comprisingAbout.
[0002]
[Prior art]
A semiconductor optical integrated device is used to generate an optical signal for optical communication. The semiconductor optical integrated device includes a light emitting element portion that generates light and a light modulation element portion for modulating light from the light emitting element portion.
[0003]
[Problems to be solved by the invention]
The inventor is engaged in the development of a semiconductor optical integrated device. According to the inventor's research, in the semiconductor optical integrated device, chirping occurs in the optical signal due to the change in the refractive index of the electroabsorption (EA) type modulation device section. Chirping caused by the light modulation element section causes signal degradation when this optical signal propagates through the optical transmission line.
[0004]
The inventor has also found that the return light from the light emitting end face also causes signal deterioration. According to the inventor's research, it is clear that the influence of this return light may be caused by both negative chirping and positive chirping depending on the phase conditions of both end faces of the light modulation element portion and the light emitting element portion. became.
[0005]
While dynamic negative chirping causes pulse compression, static negative and positive chirping causes pulse signal degradation. Therefore, what is needed is to reduce the effects of static chirping of the return light.
[0006]
  Accordingly, an object of the present invention is to provide a semiconductor optical integrated device capable of reducing the influence of static chirping of return light.Light emitting device comprisingIt was decided to provide.
[0007]
[Means for Solving the Problems]
  One aspect of the present invention relates to a light-emitting device capable of reducing the influence of static chirping. The light emitting device includes a semiconductor optical integrated device having first and second end faces, and a power source for providing a DC bias control signal for changing the phase of the return light reflected by the first end face.
  The semiconductor optical integrated device includes first and second end faces, a light emitting element portion, a light modulation element portion, first to third electrodes, and a control element portion. The first electrode is provided for the light emitting element portion. The second electrode is provided to receive a modulation signal. The third electrode is provided to receive a control signal. The light emitting element portion includes a III-V semiconductor layer provided between the first end face and the second end face and capable of generating light in response to electric power applied to the first electrode. The light modulation element portion is provided between the light emitting element portion and the first end surface,modulationA III-V semiconductor layer capable of modulating light from the light emitting element portion in response to a signal is provided. The control element unit includes a III-V semiconductor layer that is provided between the light emitting element unit and the first end surface, and whose refractive index changes in response to a control signal. The light emitting element part is a DFB laser,The III-V semiconductor layers of the control element section, light modulation element section, and light emitting element section have different MQW structures.The MQW structure of the control element unit is configured so that the refractive index can be changed by the QCSE effect at the wavelength of the light generated in the light emitting element unit, and the control element at the wavelength of the light generated in the light emitting element unit The voltage dependence of the light absorption coefficient in the MQW structure of the part is smaller than the voltage dependence of the light absorption coefficient in the active layer of the light modulation element part. In the III-V semiconductor layer of the control element part, the phase of the return light from the first end face to the light emitting element part is changed by the change in the refractive index in response to the control signal.
[0008]
This semiconductor optical integrated device may have a configuration in which the control element portion is located between the light emitting element portion and the light modulation element portion. The semiconductor optical integrated device of this form can have first and second separation element portions. The first separation element unit is disposed between the control element unit and the light modulation element unit, and enables element separation of these element units. The second separation element portion is disposed between the control element portion and the light emitting element portion, and enables element separation of these element portions.
[0009]
The semiconductor optical integrated device may have a configuration in which the control element unit is located between the first end surface and the light modulation element unit. The semiconductor optical integrated device of this form can have first and second separation element portions. The first separation element unit is disposed between the control element unit and the light modulation element unit, and enables element separation of these element units. The second separation element portion is disposed between the light modulation element portion and the light emitting element portion, and enables element separation of these element portions.
[0010]
In the semiconductor optical integrated device, the control element unit is configured to include a first conductivity type semiconductor layer and a second conductivity type semiconductor layer. The III-V semiconductor layer of the control element unit is provided between the first conductivity type III-V semiconductor layer and the second conductivity type III-V semiconductor layer.
[0011]
  In the semiconductor optical integrated device, the III-V semiconductor layer of the control element section has an MQW structure, and the III-V semiconductor layer of the light emitting element section has an MQW structure,The III-V semiconductor layer of the light modulation element portion has an MQW structure. The MQW structures of the III-V semiconductor layers of the control element portion, the light modulation element portion, and the light emitting element portion can be different from each other.
[0012]
  The light emitting device may further comprise another power source that provides the modulation signal. In addition to the DC bias, the power supply provides a drive signal that is shifted by π from the phase of the modulation signal.
[0013]
  The light emitting device can further include another power source for biasing the light emitting element portion in the forward direction.
[0014]
In the semiconductor optical integrated device, the MQW structure of the control element unit can be configured such that the refractive index can be changed by the QCSE effect at the wavelength of the light generated in the light emitting element unit.
[0015]
Another aspect of the present invention relates to a semiconductor optical integrated device. The semiconductor optical integrated device includes first and second end faces, a light emitting element portion, a light modulation element portion, first to third electrodes, and phase changing means. The phase changing means is provided so as to change the phase of the reflected light component of the light from the semiconductor light emitting unit reflected at the first end face in response to the control signal. The phase changing means operates so as to change the phase of the return light from the first end face toward the light emitting element portion by changing the refractive index in response to the control signal.
[0016]
The semiconductor optical integrated device of the above aspect may further include a window region through which light provided from the first end surface passes.
[0017]
In the semiconductor optical integrated device of the above aspect, the light emitting element portion may have a first conductivity type semiconductor layer and a second conductivity type semiconductor layer. The III-V semiconductor layer of the light emitting element portion is provided between the first conductivity type III-V semiconductor layer and the second conductivity type III-V semiconductor layer. In the semiconductor optical integrated device, the light emitting device portion may further include a diffraction grating. The diffraction grating is provided so as to be optically coupled to the III-V semiconductor layer of the light emitting element portion.
[0018]
In the semiconductor optical integrated device of the above aspect, the light modulation element portion has a first conductivity type semiconductor layer and a second conductivity type semiconductor layer. The III-V semiconductor layer of the light modulation element portion is provided between the first conductivity type III-V semiconductor layer and the second conductivity type III-V semiconductor layer.
[0019]
A light emitting device includes a semiconductor optical integrated device of the above form, a power source that provides light emission power to the first electrode, a power source that provides a modulation signal to the second electrode, and a variable power source connected to the third electrode. Is provided.
[0020]
The above and other objects, features, and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments of the present invention, which proceeds with reference to the accompanying drawings.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
The present invention will be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which: Wherever possible, the same reference numbers will be used to identify the same elements in the drawings.
[0022]
(First embodiment)
FIG. 1 is a perspective view showing a semiconductor optical integrated device according to the first embodiment. FIG. 2 is a cross-sectional view taken along line II. The semiconductor optical integrated device according to the first embodiment will be described with reference to FIGS. The semiconductor optical integrated device 1a includes a semiconductor light emitting element portion 2a, a semiconductor modulation element portion 2b, and a semiconductor control element portion 2c. The semiconductor optical integrated device 1a has a pair of end faces 3a and 3b. The semiconductor light emitting element part 2a, the semiconductor modulation element part 2b, and the phase change element part 2c are provided between the end face 3a and the end face 3b. The semiconductor modulation element portion 2b is located between the semiconductor light emitting element portion 2a and the semiconductor control element portion 2c. Between the semiconductor light emitting element part 2a and the semiconductor modulation element part 2b, the first separation element part 2d is located. Between the semiconductor modulation element part 2b and the semiconductor control element part 2c, the second separation element part 2e is located. A window element portion 2f is provided between the semiconductor control element portion 2c and the end face 3a. The semiconductor light emitting element portion 2a is coupled to the semiconductor modulation element portion 2b via the first separation element portion 2d. The semiconductor modulation element portion 2b is coupled to the phase change element portion 2c via the second separation element portion 2e. The semiconductor light emitting element portion 2a can generate light having a predetermined wavelength. The semiconductor modulation element part 2b can modulate the light received from the semiconductor light emitting element part 2a. The semiconductor control element part 2c can change the phase of the return light reflected on the end surface 3a. The first separation element portion 2d is provided so as to increase the separation resistance between the semiconductor light emitting element portion 2a and the semiconductor modulation element portion 2b. The second separation element portion 2e is provided so as to increase the separation resistance between the semiconductor modulation element portion 2b and the semiconductor control element portion 2c. The semiconductor light emitting element portion 2a, the semiconductor modulation element portion 2b, the separation element portion 2c, the first separation element portion 2d, and the second separation element portion 2e are provided on a semiconductor substrate 4 such as an n-type InP semiconductor substrate.
[0023]
The semiconductor light emitting element unit 2 a includes a semiconductor mesa unit 12. The semiconductor mesa unit 12 includes an active layer 6, an n-type semiconductor layer 8 such as an n-type cladding layer, and a p-type semiconductor layer 10 such as a p-type cladding layer. The active layer 6 is provided on the main surface 4 a of the substrate 4. The active layer 6 includes a III-V compound semiconductor. The active layer 6 is provided between the n-type semiconductor layer 8 including the III-V compound semiconductor and the p-type semiconductor layer 10 including the III-V compound semiconductor. The n-type semiconductor unit 8 and the p-type semiconductor layer 10 are provided on the substrate 4. The active layer 6 may be formed of a single semiconductor layer, and may include an SQW structure or an MQW structure, but is not limited thereto.
[0024]
Further, an n-type semiconductor layer 7 such as an n-type light guide layer is provided between the active layer 6 and the n-type semiconductor layer 8. A p-type semiconductor layer 9 such as a p-type light guide layer is provided between the active layer 6 and the p-type semiconductor layer 10. Since the refractive index of the active layer 6, the n-type semiconductor layer 7 and the p-type semiconductor layer 9 is larger than the refractive index of the n-type semiconductor layer 8 and the p-type semiconductor layer 10, these semiconductor layers 6 to 10 have the optical waveguide 12a. Constitute. The n-type semiconductor layer 7 and the p-type semiconductor layer 9 function to confine carriers in the active layer.
[0025]
The semiconductor mesa portion 12 has current confinement portions 12b on both side surfaces of the optical waveguide 12a. The current confinement portion 12b includes a semiconductor layer 14 having a larger specific resistance than the semiconductor layer of the optical waveguide 12a. An n-type semiconductor layer 16 having a conductivity type different from that of the p-type semiconductor layer 10 is provided on the semiconductor layer 14. The semiconductor layer 16 functions to trap holes that conduct through the semiconductor layer 14. With such a structure, the current confinement portion 12b functions to guide current to the optical waveguide 12a.
[0026]
The semiconductor mesa unit 12 includes a p-type semiconductor layer 20 provided on the optical waveguide 12a and the current confinement unit 12b. The p-type semiconductor layer 20 functions as a second cladding layer. The semiconductor mesa unit 12 further includes a contact layer 22 on the p-type semiconductor layer 20.
[0027]
Further, the semiconductor light emitting element portion 2 a has a recess 18 provided so as to form the semiconductor mesa portion 12. The recess 18 passes through the semiconductor layers 14, 16, 20 and 22 and reaches the substrate 4. An embedded portion may be provided in the recess 18. The embedded portion can be formed of, for example, a polyimide resin, but is not limited to this.
[0028]
The semiconductor light emitting element portion 2 a includes an ohmic electrode 28 provided on the semiconductor mesa portion 12. Electrode 28 is provided for the anode. The semiconductor light emitting element portion 2a includes an insulating silicon inorganic compound layer 26 such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film between the electrode 28 and the semiconductor layer. The insulating layer 26 has an opening that communicates with the contact layer 22. The electrode 28 is electrically connected to the contact layer 22 through this opening. The semiconductor light emitting element portion 2 a includes an ohmic electrode 32 provided on the back surface 4 b of the substrate 4. The electrode 32 is provided for the cathode all over the back surface 4b.
[0029]
The following are illustrated as preferred examples.
Active layer 6: GaInAsP layer (film thickness 115 nanometers)
n-type semiconductor layer 7: GaInAsP layer (film thickness 800 nanometers)
n-type semiconductor layer 8: InP layer (film thickness 550 nm)
p-type semiconductor layer 9: GaInAsP layer (film thickness 800 nm)
p-type semiconductor layer 10: InP layer (film thickness 200 nanometers)
High-resistance semiconductor layer 14: Fe-doped InP layer (thickness 1000 nm)
n-type hole trap layer 16: InP layer (thickness 1000 nm)
Second p-type semiconductor layer 20: InP layer (thickness 200 nm)
p-type contact layer 22: GaInAs layer (film thickness 500 nanometers)
Inorganic insulating film layer 26: silicon nitride layer (thickness 350 nanometers)
In the present embodiment, the semiconductor modulation element portion 2b includes a semiconductor mesa portion 52 having the same structure as the semiconductor control element portion 2c.
[0030]
In the semiconductor modulation element portion 2b, the semiconductor mesa portion 52 includes an active layer 46, an n-type semiconductor layer 48 such as an n-type cladding layer, and a p-type semiconductor layer 50 such as a p-type cladding layer. The active layer 46 is provided on the main surface 4 a of the substrate 4. The active layer 46 includes a III-V compound semiconductor. The active layer 46 is provided between the n-type semiconductor layer 48 including the III-V compound semiconductor and the p-type semiconductor layer 50 including the III-V compound semiconductor. The n-type semiconductor unit 48 and the p-type semiconductor layer 50 are provided on the substrate 4. The active layer 46 may be formed of a single semiconductor layer, and may include an SQW structure or an MQW structure, but is not limited thereto.
[0031]
Further, an n-type semiconductor layer 47 such as an n-type light guide layer is provided between the active layer 46 and the n-type semiconductor layer 48. A p-type semiconductor layer 49 such as a p-type light guide layer is provided between the active layer 46 and the p-type semiconductor layer 50. Since the refractive index of the active layer 46, the n-type semiconductor layer 47, and the p-type semiconductor layer 49 is larger than the refractive index of the n-type semiconductor layer 48 and the p-type semiconductor layer 50, these semiconductor layers 46 to 50 have the optical waveguide 52a. Constitute.
[0032]
The semiconductor mesa portion 52 has an electrical insulating portion 52b having the same structure as the electrical insulating portion 12b on the side surface of the optical waveguide 52a. The electrical insulating portion 52b includes the semiconductor layer 14 having a higher specific resistance than the semiconductor layer of the optical waveguide 52a. An n-type semiconductor layer 16 is provided on the semiconductor layer 14. In the semiconductor modulation element portion 2b, the optical waveguide 52a is sandwiched between electrical insulating portions 52b having the same structure as that of the current confinement portion 12b, like the optical waveguide 12a.
[0033]
Further, the semiconductor modulation element portion 2 b has a recess 18 provided so as to form the semiconductor mesa portion 52. The recess 18 passes through the semiconductor layers 14, 16, 20, 54, and 56 and reaches the substrate 4. An embedded portion may be provided in the recess 18 in the same manner as the semiconductor light emitting element portion 2a.
[0034]
The semiconductor mesa unit 52 includes the p-type semiconductor layer 20 provided on the optical waveguide 52a and the electrical insulating unit 52b. The p-type semiconductor layer 20 functions as a second cladding layer. The semiconductor mesa unit 52 further includes a contact layer 54 for the semiconductor modulation element unit 2 b on the p-type semiconductor layer 20.
[0035]
The semiconductor modulation element unit 2 b includes an ohmic electrode 58 provided on the semiconductor mesa unit 52. The electrode 58 is provided for the anode. The semiconductor modulation element portion 2b includes an insulating layer 26 such as an insulating silicon inorganic compound layer between the electrode 58 and the semiconductor layer. The inorganic insulating layer 26 has an opening that leads to the contact layer 54 that is separated from the contact layer 22. The electrode 58 is electrically connected to the contact layer 54 through this opening. The semiconductor modulation element portion 2 b includes an ohmic electrode 32 provided on the back surface 4 b of the substrate 4. The semiconductor modulation element portion 2b includes an ohmic electrode 32 shared with the semiconductor light emitting element 2a. The electrode 32 can be used as a cathode of the semiconductor modulation element portion 2b.
[0036]
The semiconductor control element unit 2 c includes an ohmic electrode 60 provided on the semiconductor mesa unit 52. The electrode 60 is provided for the anode. The semiconductor control element portion 2c includes an inorganic insulating layer 26 such as a silicon-based insulating inorganic compound layer between the electrode 60 and the semiconductor layer. The inorganic insulating layer 26 has an opening that leads to the contact layer 56 that is separated from the contact layer 54. The electrode 60 is electrically connected to the contact layer 56 through this opening. The semiconductor control element unit 2c includes an ohmic electrode 32 shared with the semiconductor light emitting element 2a. The electrode 32 can be used as a cathode of the semiconductor control element unit 2c.
[0037]
  The following are illustrated as preferred examples.
  Active layer 6: GaInAsP layer (thickness 150 nm)
  Undoped semiconductor layer 47:((Film thickness 10 nanometers)
  n-type semiconductor layer 48: InP layer (film thickness 550 nanometers)
  Undoped semiconductor layer 49: GaInAsP layer (film thickness 10 nanometers)
  p-type semiconductor layer 50: InP layer (thickness: 200 nm)
  p-type contact layer 54: GaInAs layer (film thickness 500 nanometers)
  p-type contact layer 56: GaInAs layer (film thickness 500 nanometers)
  In the semiconductor optical integrated device 1a, the active layer 46 is sandwiched between the n-type semiconductor layer 48 and the p-type semiconductor layer 50, and the photoluminescence wavelength of the active layer 46 is slightly smaller than the photoluminescence wavelength of the active layer 6 ( When the active layer 46 is composed of a single semiconductor layer, the band gap of the active layer 46 is larger than the band gap of the active layer 6). The photoluminescence wavelength difference between the active layer 6 and the active layer 46 is about 40 nanometers or more and 60 nanometers or less. This element structure is suitable for the semiconductor modulation element unit 2b to operate as an electroabsorption type modulation element, and the semiconductor control element unit 2c changes the refractive index due to the QCSE effect at the wavelength of light generated in the semiconductor light emitting element unit. It is suitable for operating as a possible phase modulation element.
[0038]
Referring to FIG. 1, the separation element portion 2d serves to electrically separate the semiconductor light emitting element portion 2a from the semiconductor modulation element portion 2b. For this reason, in the separation element portion 2d, the contact layer is removed and a separation portion 62a is formed. In the separation part 62 a, a recess is formed so that the contact layer 22 can be separated from the contact layer 54. This structure prevents the semiconductor light emitting element portion 2a from being electrically connected to the semiconductor modulation element portion 2b through the contact layer. The separation element portion 2e functions to electrically separate the semiconductor modulation element portion 2b from the semiconductor control element portion 2c. For this reason, in the separation element portion 2e, the contact layer is removed and a separation portion 62b is formed. In the separation part 62 b, a recess is formed so that the contact layer 54 can be separated from the contact layer 56. With this structure, the semiconductor modulation element portion 2b is prevented from being electrically connected to the semiconductor control element portion 2c through the contact layer. The structure for element isolation is not limited to the structure of this embodiment. In the present embodiment, the structure of the optical waveguide of the separation element portions 2d and 2e is the same as that of the semiconductor light emitting element portion 2a or the semiconductor modulation element portion 2b, but the present invention is not limited to this.
[0039]
The semiconductor light emitting element portion 2 a can include a diffraction grating 34 formed at the boundary between the semiconductor layer 9 and the semiconductor layer 10. The diffraction grating 34 is configured by periodically changing the shape of the interface between the semiconductor substrate 9 and the semiconductor layer 10. The diffraction grating 34 is provided so as to be optically coupled to the active layer 6. With this configuration, the semiconductor light emitting element portion 2a is suitable for operating as a distributed feedback semiconductor laser element.
[0040]
The optical waveguide 52a of the semiconductor modulation element portion 2b, the semiconductor control element portion 2c, and the separation element portion 2e is abutted at the boundary surface 64 against the optical waveguide 12a of the semiconductor light emitting element portion 2a and the separation element portion 2d. Thus, the optical waveguide 12a is optically coupled to the optical waveguide 52a.
[0041]
The semiconductor optical integrated device 1a includes a window element portion 2f having a window region 30 for adjusting the spread of emitted light. The window region 30 is provided between the end of the semiconductor mesa portion 52 and the end face 3a, and is made of the same semiconductor material as that of the current confinement portion 12b.
[0042]
FIG. 3 is a schematic diagram showing a semiconductor optical integrated device and a power source. In FIG. 3, a low reflection film 5a having a relatively low reflectance at the emission wavelength is provided on the end face 3a. For example, the reflectance of the low reflection film 5a is 0.1% or less. The end face 3b is provided with a highly reflective film 5b having a relatively high reflectance at the emission wavelength. For example, the reflectance of the highly reflective film 5b is 80% to 95%.
[0043]
The semiconductor light emitting element portion 2a is forward-biased by a power source 70. The semiconductor modulation element portion 2 b is biased in the reverse direction by the power source 72. The power source 72 provides a drive signal modulated in accordance with an external signal to the semiconductor modulation element unit 2b. With this structure, the semiconductor modulation element unit 2 b modulates light continuously provided from the semiconductor light emitting element unit 2 a in response to the external signal 74. The semiconductor control element unit 2 c is biased in the reverse direction by the power supply 76. The power supply 76 provides a control signal corresponding to the external signal 78 to the semiconductor control element unit 2c. In the semiconductor control element portion 2c, the refractive index of the active layer portion changes in response to this control signal. Due to this change in refractive index, the phase of the return light R from the end face 3a is changed to a desired value, and then returned to the light emitting element portion 2a. This reduces static chirping.
[0044]
Subsequently, the operation principle of the semiconductor optical integrated device 1a according to the first embodiment will be described. In the following description, the semiconductor optical integrated device for comparison includes a semiconductor light emitting element portion 2a and a semiconductor modulation element portion 2b. In the semiconductor optical integrated device for comparison, chirping can be reduced as compared with the semiconductor light emitting device of the direct modulation type. However, according to the experiments by the inventors, slight chirping was observed even in the semiconductor optical integrated device having such a structure. According to the inventor's understanding, this chirping includes dynamic chirping and static chirping. Dynamic chirping is caused by a change in the refractive index of the semiconductor modulation element portion. Static chirping is caused by the fact that the resonant wavelength in the semiconductor light emitting element portion varies due to the return light from the end face of the semiconductor optical integrated device. More specifically, when an electrical signal is applied to the semiconductor modulation element portion to switch the semiconductor modulation element portion, the phase and intensity of the return light from the end face of the semiconductor modulation element portion changes. When the return light is incident on the semiconductor light emitting element portion, the resonance wavelength of the laser light changes. Since this chirping occurs even when the optical modulation signal does not change (when the optical modulation signal is stationary), the inventor has called static chirping.
[0045]
In order to reduce this chirping, it has been considered effective to make the reflectance at the end face of the semiconductor modulation element portion as small as possible. However, according to the inventors' investigation, it has been found that the change in the resonance wavelength of the laser light in the semiconductor light emitting element portion can be reduced by adjusting the phase of the return light from the light emitting end face.
[0046]
The inventor used the method of the computer experiment for this examination. The reason for using this method is that the effect of static chirping can be examined separately from the effect of dynamic chirping. By this method, it is possible to obtain an influence that the return light from the end face of the semiconductor modulation element portion has on the oscillation state of the semiconductor light emitting element portion.
[0047]
FIG. It is a schematic diagram which shows the model of a computer experiment. In this model, the α parameter and the carrier density in the semiconductor modulation element portion are constant. The model includes an EA modulator and a DFB-LD element. The EA modulator uses a 10 Gbps NRZ pattern signal (τ_rise= Τ_fall= 30 psec). The transmittance (ON) of the EA modulator is −3 dB, and the transmittance (OFF) is −13 dB. A DC current of 75 mA flows through the DFB-LD element. The separation resistance between the EA modulator and the DFB-LD element is 5 kΩ. On the end face of the DFB-LD element, the reflectance R_DFBIs 80% and the phase φ_DFBIs zero.
[0048]
FIG. 5 is a diagram showing the results of a computer experiment. In FIG. 5, the reflectance at the end face of the EA modulator is the resonance frequency deviation (deviation from the Bragg condition) at 1.0% and 0.1%, mirror loss (cm^-1), And the phase φ at the end face of the EA modulator_MODShows the relationship. FIG. 6 shows resonance frequency shift and phase φ._MODIt is a graph which shows the relationship. FIG. 6 shows the reflectance R_MOD= Shows the result at 0.1%.
[0049]
According to these results, the deviation of the resonance frequency is about 2 GHz at the maximum in the change of the oscillation frequency, and the phase φ_MODIt became clear that it changed. Therefore, phase φ_MODBy adjusting this, the shift in resonance frequency (hereinafter referred to as chirping 1) can be reduced.
[0050]
According to the inventor's study, when return light is incident on the semiconductor light emitting element portion, the carrier density in the semiconductor light emitting element portion changes. Due to this change, the refractive index of the semiconductor light emitting element portion changes. Therefore, the resonance frequency also changes (hereinafter referred to as chirping 2) due to this refractive index change. Therefore, in order to reduce static chirping, it is necessary to reduce the sum of chirping 1 and chirping 2.
[0051]
  FIG. 7A is a graph showing transient characteristics of chirping 1 caused by a predetermined drive signal. The horizontal axis indicates time, and the vertical axis indicates chirping 1. FIG. 7B is a graph showing the transient characteristics of chirping 2 caused by a predetermined drive signal. The horizontal axis indicates time, and the vertical axis indicates chirping 2. FIG. 7C is a graph showing the transient characteristic of the chirping sum generated by a predetermined drive signal. The horizontal axis indicates time, and the vertical axis indicates the chirping sum. Characteristic lines A1, A2, A3, A4 are respectively phaseφ _MOD =The characteristics of 1.5π, 1.0π, 0.5π, and 0 (radian) are shown. The results of these numerical experiments indicate that the chirping sum is changed by adjusting the phase φMOD.
[0052]
FIG. 8A is a graph showing chirping 1 that occurs at a predetermined time by a predetermined driving signal. Horizontal axis is phase in radians_MODAnd the vertical axis represents chirping 1. Characteristic line C1₈₀₀Is the phase φ of chirping 1_MODThe chirping amount at time 800 nsec in FIG. 7A is shown. FIG. 8B is a graph showing chirping 2 that occurs at a predetermined time by a predetermined drive signal. Horizontal axis is phase in radians_MODThe vertical axis indicates chirping 1. Characteristic line C2_rise, C2_fall, C2₈₀₀Is the phase φ of chirping 2_MOD7 represents the rising edge and falling edge of the pulse in FIG. 7B and the amount of chirping at time 800 nsec. FIG. 8C is a graph showing a chirping sum generated at a predetermined time by a predetermined driving signal. The horizontal axis indicates the phase φ in radians, and the vertical axis indicates the chirping sum. Characteristic line C12₈₀₀, C12_maxIs the phase of the chirping sum φ_MOD, And the characteristic line C12₈₀₀Represents the chirping amount at the time of 800 nsec in FIG._maxRepresents the maximum value of the chirping amount on the time axis.
[0053]
According to the results of these numerical experiments, the phase φ_MODIt is shown that the chirping sum is changed by adjusting. Further, according to the result of the numerical experiment shown in FIG._MODIt is understood that the chirping sum can be reduced by adjusting.
[0054]
Therefore, the inventors have determined that the return light phase φ_MODAs a result, the inventors have come up with the idea of providing phase change means in a semiconductor optical integrated device. As the phase changing means, a semiconductor control element unit is exemplified.
[0055]
FIG. 9 is a graph showing the wavelength dependence of the light absorption coefficient and refractive index of the optical waveguide of the semiconductor modulation element portion 2b and the semiconductor control element portion 2c. The horizontal axis indicates the wavelength of light, and the vertical axis indicates the relative change in light absorption and the relative change in refractive index. The measured value represents a relative change when the voltage is changed from 0 volt to −1 volt. This change in refractive index is caused by the QCSE effect.
[0056]
According to this graph, it is understood that the light absorption coefficient and the refractive index can be changed by the voltage applied to the semiconductor modulation element portion 2b and the semiconductor control element portion 2c, respectively. The semiconductor control element portion 2c is used in a wavelength region where the light absorption coefficient does not change so much when a voltage is applied and the refractive index changes.
[0057]
(Second embodiment)
FIG. 10 is a schematic diagram showing a semiconductor optical integrated device and a power source. The semiconductor optical integrated device 1b includes a semiconductor light emitting device portion 2a, a semiconductor modulation device portion 2b, and a semiconductor control device portion 2c. The semiconductor light emitting element portion 2a, the semiconductor control element portion 2c, and the semiconductor modulation element portion 2b are sequentially arranged in a predetermined axial direction. In FIG. 10, a low reflection film having a relatively low reflectance at the emission wavelength is provided on the end face 3a, and a high reflection film having a relatively high reflectance at the emission wavelength is provided on the end face 3b. Is provided.
[0058]
The semiconductor light emitting element portion 2a is forward-biased by a power source 70. The semiconductor modulation element portion 2 b is biased in the reverse direction by the power source 72. The power source 72 is provided to the semiconductor modulation element unit 2b that provides a drive signal. The power source 72 also receives a drive signal 75a from the drive circuit 79 modulated in accordance with the external signal 73. With this structure, the semiconductor modulation element portion 2b modulates light continuously provided from the semiconductor light emitting element portion 2a in response to the external signal 75a. The semiconductor control element unit 2 c is biased in the reverse direction by the power supply 76. The power supply 77 receives the drive signal 75b from the drive circuit 79 modulated in accordance with the external signal 73. The power supply 77 provides a control signal corresponding to the drive signal 75b to the semiconductor control element unit 2c. In the semiconductor control element portion 2c, the refractive index of the active layer portion changes in response to the drive signal 75b. After the phase of the return light R from the end surface 3a is changed to a desired value due to the change in the refractive index, the light whose phase is changed returns to the light emitting element portion 2a. This reduces static chirping. The phase of the drive signal 75a is shifted by π from the phase of the drive signal 75b.
[0059]
(Third embodiment)
FIG. 11 is a schematic diagram showing a semiconductor optical integrated device according to another embodiment. In the semiconductor optical integrated device 1c, the semiconductor light emitting device portion 2a, the semiconductor modulation device portion 2b, and the semiconductor control device portion 2c are sequentially arranged in a predetermined axial direction. A separation element portion 2d is disposed between the semiconductor light emitting element portion 2a and the semiconductor modulation element portion 2b. A separation element portion 2e is disposed between the semiconductor modulation element portion 2b and the semiconductor control element portion 2c.
[0060]
In the present embodiment, each of the semiconductor light emitting element portion 2a, the semiconductor modulation element portion 2b, and the semiconductor control element portion 2c is composed of a plurality of different semiconductor layers. For example, the semiconductor control element unit 2c
Semiconductor modulation element portion 2b
Active layer 6a: GaInAsP layer (thickness 150 nm)
Undoped semiconductor layer 7a: GaInAsP layer (film thickness 10 nanometers)
n-type semiconductor layer 8a: InP layer (film thickness 550 nanometers)
Undoped semiconductor layer 9a: GaInAsP layer (film thickness 10 nanometers)
p-type semiconductor layer 10a: InP layer (film thickness 2100 nanometers)
Semiconductor control element part 2c
Active layer 6b: GaInAsP layer (thickness 150 nm)
n-type semiconductor layer 7b: GaInAsP layer (film thickness 10 nanometers)
n-type semiconductor layer 8b: InP layer (film thickness 550 nanometers)
p-type semiconductor layer 9b: GaInAsP layer (film thickness 10 nanometers)
p-type semiconductor layer 10b: InP layer (film thickness 2100 nanometers)
It becomes.
[0061]
In the semiconductor optical integrated device 1c, the active layer 6 of the semiconductor light emitting device portion 2a, the active layer 6a of the semiconductor light modulation device portion 2b, and the active layer 6b of the phase control device portion 2c have different MQW structures. The active layer 6 of the semiconductor light emitting element portion 2a has an MQW structure suitable for the signal light wavelength, and the active layer 6a of the semiconductor light modulation element portion 2b has an MQW structure suitable for modulation of the signal light. The active layer 6c of the phase control element unit 2c has an MQW structure suitable for phase adjustment of return light. In particular, the MQW structure of the phase control element portion 2c can be configured such that the refractive index can be changed by the QCSE effect at the wavelength of light generated in the semiconductor light emitting element portion 2a.
[0062]
FIG. 12 is a characteristic diagram showing the wavelength dependence of the change in optical absorptance and the change in refractive index in the active layer 6a of the semiconductor light modulation element unit 2b and the active layer 6b of the phase control element unit 2c. In the semiconductor optical integrated device 1c, the change in the optical absorptance of the active layer 6a of the semiconductor optical modulation element portion 2b and the change in the refractive index of the active layer 6b in the phase control element portion 2c can be determined independently. Referring to FIG. 12, the wavelength λ₁And λ₂The wavelength range of the range is a preferable range. In this wavelength region, the voltage dependency of the light absorption coefficient is relatively large in the active layer 6a of the semiconductor light modulation element portion 2b, and the voltage dependency of the refractive index is relatively large in the active layer 6b of the phase control element portion 2c. The voltage dependence of the absorption coefficient is relatively small.
[0063]
FIGS. 13A and 13B are schematic views showing a light-emitting device including a semiconductor optical integrated device and a bias source for this purpose. These drawings also show a bias application method for the semiconductor optical integrated device disclosed in this specification.
[0064]
Referring to FIG. 13A, a light emitting device 200a to which a DC bias application method is applied is shown. The light emitting device 200a includes the semiconductor optical integrated device 1, a DFB bias source 71a, an EA bias source 71b, and a phase change element bias source 71c. In this method, static control is performed, and the voltage to the phase change element unit can be adjusted so that chirping between “1” and “0” of the signal is minimized.
[0065]
Referring to FIG. 13 (b), there is shown a light emitting device 200b to which a method of applying a modulation signal in addition to DC bias application is applied. The light emitting device 200b includes the semiconductor optical integrated element 1, a DFB bias source 73a, an EA bias source 73b, and a phase change element bias source 73c. In this method, dynamic control is performed so that the applied voltage to the phase change element unit is synchronized with the modulation signal so that the “1” level chirping amount and the “0” level chirping amount are minimized. The direct current voltage and the modulation signal for the phase change element unit can be adjusted.
[0066]
(Fourth embodiment)
Another embodiment relates to a method of manufacturing a semiconductor optical integrated device. 14 (a), 14 (b), 15 (a), 15 (b), 16 (a), 16 (b), 17 (a), and 17 (b). A method for manufacturing a semiconductor optical integrated device will now be described.
[0067]
(First semiconductor multilayer film forming step)
Referring to FIG. 14A, an n-type InP buffer layer 80b is formed on an n-type InP substrate 80a. The n-type InP substrate 80a and the n-type InP buffer layer 80b constitute a substrate 82. The semiconductor substrate 82 includes a semiconductor light emitting element part region 82a, a semiconductor modulation element part region 82b, a phase control element part region 82c, and a window region 82d. These regions 82a to 82d are arranged along a predetermined axial direction. In the semiconductor light emitting element portion region 82a of the substrate 82, an n-type InP semiconductor film 84, a semiconductor active layer film 86, and a p-type InP semiconductor film 88 are sequentially grown epitaxially by, for example, metal organic chemical vapor deposition (OMVPE). ing. These semiconductor films are formed by forming a predetermined multilayer semiconductor film and a mask 90a (for example, an insulating silicon inorganic insulating film mask) on the entire surface of the buffer layer 80b, and then forming a semiconductor modulation element region 82b, a phase control element region 82c, and It is formed by selectively removing the multilayer film in the window region 82d. Prior to the formation of the semiconductor multilayer film, the semiconductor light emitting element region 82a is periodically formed with concave portions that function as the diffraction grating 92.
[0068]
(Second and third semiconductor multilayer film forming steps)
Referring to FIG. 14B, on the n-type InP buffer layer 80b, an n-type InP semiconductor film 83, a semiconductor active layer film 85, and a p-type InP semiconductor film 87 are epitaxially formed in order by, for example, the OMVPE method. The These semiconductor multilayer films are selectively formed in the semiconductor modulation element part region 82b, the phase control element part region 82c, and the window region 82d using the mask 90a. Thereafter, the mask 90a is removed.
[0069]
Next, a semiconductor multilayer film of the semiconductor modulation element part region 82b and the window region 82d is selected using a mask (for example, an insulating silicon inorganic compound film mask) 90b covering the semiconductor light emitting element part region 82a and the phase control element part region 82c. To remove. Next, the n-type InP semiconductor film 94, the semiconductor active layer film 96, and the p-type InP semiconductor film 98 are sequentially epitaxially formed on the n-type InP buffer layer 80b by, for example, the OMVPE method. These semiconductor multilayer films are selectively formed in the semiconductor modulation element region 82c and the window region 82d using the mask 90b. Thereafter, the mask 90b is removed.
[0070]
(Optical waveguide mesa formation process)
Referring to FIG. 15A, optical waveguide mesas 100a, 100b, and 100c are formed. In order to form the optical waveguide mesas 100a, 100b, and 100c, the waveguide mask 102 is formed. The mask 102 is a mask (for example, an insulating silicon inorganic compound film mask). The mask 102 extends in a predetermined direction from one end of the semiconductor multilayer film to a position away from the other end by a certain distance in order to form a window region 82d at one end of the optical waveguide mesa 100c. Using the mask 102, the semiconductor multilayer film formed in the semiconductor light emitting element part region 82a, the semiconductor modulation element part region 82b, the phase control element part region 82c, and the window region 82d is etched. This etching is performed by wet etching in the preferred embodiment. The etching solution is a bromomethanol solution. This etching is performed by the n-type InP semiconductor film 84, the semiconductor active layer film 86, the p-type InP semiconductor film 88, the n-type InP semiconductor film 83, the semiconductor active layer film 85, the p-type InP semiconductor film 87, and the n-type InP semiconductor film 94. The semiconductor active layer film 96 and the p-type InP semiconductor film 98 are removed until the substrate 82 is exposed. As a result of the etching process, the optical waveguide mesa 100a includes an n-type InP semiconductor layer (n-type cladding layer) 84a, a semiconductor active layer 86a, and a p-type InP semiconductor layer (p-type cladding layer) 88a. The optical waveguide mesa 100b includes an n-type InP semiconductor layer (n-type cladding layer) 83a, a semiconductor active layer 85a, and a p-type InP semiconductor layer (p-type cladding layer) 87a. The optical waveguide mesa 100c includes an n-type InP semiconductor layer (n-type cladding layer) 94a, a semiconductor active layer 96a, and a p-type InP semiconductor layer (p-type cladding layer) 98a.
[0071]
(Embedded semiconductor film formation process)
Referring to FIG. 15B, a high-resistance InP semiconductor film 104 and an n-type InP semiconductor film 106 are formed so as to embed the optical waveguide mesas 100a, 100b, and 100c. The semiconductor films 104 and 106 are selectively formed using the mask 102 in the semiconductor light emitting element part region 82a, the semiconductor modulation element part region 82b, the phase control element part region 82c, and the window region 82d. In the preferred embodiment, the semiconductor films 104 and 106 are formed by metal organic chemical vapor deposition (OMCVD). The high-resistance InP semiconductor film 104 is made of, for example, an Fe-doped InP semiconductor, and is formed so as to be in contact with the side surface of the optical waveguide mesa 100a and the side surfaces of the optical waveguide mesa 100b and the optical waveguide mesa 100c. The n-type InP semiconductor film is formed on the InP semiconductor film 104 and is in contact with the side surfaces of the p-type InP semiconductor layer 88a, the p-type InP semiconductor layer 87a, and the p-type InP semiconductor layer 98a. After the buried semiconductor portion is formed, the mask 102 is removed.
[0072]
In the optical waveguide mesa 100a, the n-type InP semiconductor film 106 is formed so as to function as a hole trap layer that captures holes that are conducted in the Fe-doped InP semiconductor, and the high-resistance InP semiconductor film 104 is In addition, it is configured to block electrons and guide current to the optical waveguide mesa 100a.
[0073]
(Contact semiconductor film formation process)
Referring to FIG. 16A, a p-type InP semiconductor film 110 and a p-type GaInAs semiconductor film 112 are formed on the optical waveguide mesas 100a, 100b and 100c and the embedded semiconductor portion. Since the p-type InP semiconductor film 110 is formed on the optical waveguide mesas 100a, 100b, and 100c, the boundary between the optical waveguide mesa 100a and the optical waveguide mesa 100b and the boundary between the optical waveguide mesa 100b and the optical waveguide mesa 100c. Covering. The p-type GaInAs semiconductor film 112 is also formed on the optical waveguide mesas 100a, 100b and 100c. The p-type GaInAs semiconductor film 112 is used as a contact layer for the semiconductor light emitting element part region 82a, the semiconductor modulation element part region 82b, and the phase control element part region 82c. Is removed.
[0074]
(Trench mask formation process)
Referring to FIG. 16A, a trench mask 114 is formed on the p-type InP semiconductor film 110 and the p-type GaInAs semiconductor film 112. The trench mask 114 extends in a predetermined direction, and is used to form a semiconductor mesa portion including the optical waveguide mesas 100a, 100b, and 100c.
[0075]
(Trench formation process)
Referring to FIG. 16B, a trench groove 116 is formed. The trench groove 116 is formed so as to penetrate the buried semiconductor portion 108, the p-type InP semiconductor film 110, and the p-type GaInAs semiconductor film 112 and reach the substrate 82. A semiconductor mesa portion 118 is formed by the trench groove 116. The semiconductor mesa portion 118 includes optical waveguide mesas 100a, 100b, 100c, a buried semiconductor portion 108a, a second cladding layer 110a, and a contact layer 112a. The semiconductor mesa unit 118 includes a semiconductor mesa unit 118a for the semiconductor light emitting element unit region 82a, a semiconductor mesa unit 118b for the semiconductor modulation element unit region 82b, and a semiconductor mesa unit 118c for the phase control element unit region 82c, a window. It consists of a mesa portion 118d for the region 82d. After forming the trench groove 116, the trench mask 114 is removed.
[0076]
(Ohmic electrode formation process)
As shown in FIG. 17A, the contact layers 112a in the two separation element part regions are etched to form contact layers 136a and 136b for the semiconductor light emitting element part, the semiconductor modulation element part, and the phase control element part, respectively. 136c is formed.
[0077]
After the contact layer is separated, an insulating silicon inorganic compound film 124 is formed. Next, an opening is formed in the insulating film 124 on the semiconductor mesa portion 118. These openings are used as contact holes reaching the contact layer for each element part.
[0078]
After the contact hole is formed, a positive resist mask is formed. The positive resist mask has a pattern for electrodes. After metal is deposited thereon, the positive resist mask is dissolved with a solvent using a lift-off method to form p ohmic electrodes 138a, 138b, 138c. An n ohmic electrode 140 is formed on the entire back surface of the substrate 82. Through these steps, the semiconductor optical integrated device 142 as shown in FIG. 17B is completed.
[0079]
While the principles of the invention have been illustrated and described in the preferred embodiment, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. Although the semiconductor element described above is made of a specific semiconductor material, it can be modified as necessary. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.
[0080]
【The invention's effect】
As described above, according to the present invention, a semiconductor optical integrated device capable of reducing the influence of static chirping of return light is provided.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a semiconductor optical integrated device according to a first embodiment.
FIG. 2 is a cross-sectional view taken along line II.
FIG. 3 is a schematic diagram showing a semiconductor optical integrated device and a power source.
FIG. It is a schematic diagram which shows the model of a computer experiment.
FIG. 5 is a drawing showing the results of a computer experiment.
FIG. 6 is a graph showing the results of a computer experiment at a reflectance of 0.1%.
7A is a graph showing chirping 1 caused by a predetermined drive signal, and FIG. 7B is a graph showing chirping 2 caused by a predetermined drive signal. (c) is a graph showing a chirping sum generated by a predetermined drive signal.
FIG. 8A is a graph showing chirping 1 that occurs at a predetermined time by a predetermined drive signal. FIG. 8B is a graph showing chirping 2 that occurs at a predetermined time by a predetermined drive signal. FIG. 8C is a graph showing a chirping sum generated at a predetermined time by a predetermined driving signal.
FIG. 9 is a graph showing the wavelength dependence of the change in the light absorption coefficient and the change in the refractive index of the optical waveguide of the semiconductor modulation element part and the semiconductor control element part.
FIG. 10 is a schematic diagram showing a semiconductor optical integrated device and a power source.
FIG. 11 is a schematic view showing a semiconductor optical integrated device according to another embodiment.
FIG. 12 is a characteristic diagram showing the wavelength dependence of the change in optical absorptance and the change in refractive index in the active layers of the semiconductor light modulation element part and the phase control element part.
FIGS. 13A and 13B are schematic diagrams illustrating a bias application method for a semiconductor optical integrated device. FIGS.
FIG. 14A is a perspective view showing a first semiconductor multilayer film formation step. FIG. 14B is a perspective view showing the second and third semiconductor multilayer film forming steps.
FIG. 15 (a) is a perspective view showing an optical waveguide mesa formation process; FIG. 15B is a perspective view showing the embedded semiconductor film forming step.
FIG. 16A is a perspective view showing a trench mask formation step. FIG. 16B is a perspective view showing a trench formation step.
FIG. 17 (a) is a perspective view showing an ohmic electrode forming step. FIG. 17B is a perspective view showing a completed product of the semiconductor optical integrated device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1a, 1b, 1c ... Semiconductor optical integrated element, 2a ... Semiconductor light emitting element part area | region, 2b ... Semiconductor modulation element part area | region, 2c ... Phase control element part area | region, 4 ... Semiconductor substrate, 6, 46 ... Active layer, 8, 10 , 48, 50 ... cladding layer, 12 ... semiconductor mesa, 14 ... buried semiconductor layer, 16 ... hole trap layer, 18 ... silicon-based inorganic insulating film, 20 ... cladding layer, 22, 54 ... contact layer, 28, 32 58 ... electrodes, 34 ... diffraction grating, 1b ... semiconductor optical integrated element, 152a ... semiconductor light emitting element part region, 152b ... semiconductor modulation element part region, 152c ... phase control element part region, 154 ... semiconductor substrate, 156,176 ... Active layer, 158, 160, 178 ... clad layer, 162 ... semiconductor mesa portion

Claims (8)

A light emitting device capable of reducing the influence of static chirping,
A semiconductor optical integrated device having first and second end faces, and a power source for providing a DC bias control signal for changing the phase of the return light reflected by the first end face,
The semiconductor optical integrated device further includes:
A first electrode;
A second electrode for receiving the modulation signal;
A third electrode for receiving the control signal;
A light emitting element portion having a III-V semiconductor layer provided between the first end face and the second end face and capable of generating light in response to electric power applied to the first electrode;
A light modulation element portion having a III-V semiconductor layer provided between the light emission element portion and the first end face and capable of modulating light from the light emission element portion in response to the modulation signal;
A control element unit having a III-V semiconductor layer provided between the light emitting element unit and the first end surface and having a refractive index that changes in response to the control signal;
The light emitting element unit is a DFB laser,
The control element unit, the light modulation element unit and the light emitting element unit III-V semiconductor layers have different MQW structures ,
The MQW structure of the control element unit is configured such that a refractive index can be changed by a QCSE effect at a wavelength of light generated in the light emitting element unit,
The voltage dependence of the light absorption coefficient in the MQW structure of the control element part is the voltage dependence of the light absorption coefficient in the III-V semiconductor layer of the light modulation element part at the wavelength of light generated in the light emitting element part. Light-emitting device smaller than the characteristics.   The light emitting device according to claim 1, wherein the control element unit is located between the light emitting element unit and the light modulation element unit. A separation element portion disposed between the control element portion and the light modulation element portion;
The light emitting device according to claim 2, further comprising another separation element unit disposed between the control element unit and the light emitting element unit.   The light emitting device according to claim 1, wherein the control element unit is located between the first end face and the light modulation element unit. A separation element portion disposed between the control element portion and the light modulation element portion;
The light emitting device according to claim 4, further comprising another separation element unit disposed between the light modulation element unit and the light emitting element unit. The control element unit has a first conductivity type semiconductor layer and a second conductivity type semiconductor layer,
The MQW structure of the control element unit is provided between the first conductive type III-V semiconductor layer and a second conductive type III-V semiconductor layer. The light-emitting device of description. Further comprising another power supply for providing the modulated signal;
The light-emitting device according to claim 1, wherein the power supply provides a drive signal shifted by π from the phase of the modulation signal in addition to the DC bias.   The light-emitting device according to claim 1, further comprising another power source for biasing the light-emitting element unit in a forward direction.

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