JP4417389B2 - デジタルロジックを利用した乱数発生装置及び方法 - Google Patents
デジタルロジックを利用した乱数発生装置及び方法 Download PDFInfo
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- JP4417389B2 JP4417389B2 JP2006546799A JP2006546799A JP4417389B2 JP 4417389 B2 JP4417389 B2 JP 4417389B2 JP 2006546799 A JP2006546799 A JP 2006546799A JP 2006546799 A JP2006546799 A JP 2006546799A JP 4417389 B2 JP4417389 B2 JP 4417389B2
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- 238000000034 method Methods 0.000 title claims description 34
- 230000002265 prevention Effects 0.000 claims description 27
- 238000005070 sampling Methods 0.000 claims description 13
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 10
- 230000000630 rising effect Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 10
- 230000003321 amplification Effects 0.000 description 1
- 230000000035 biogenic effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
- H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
- H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Manipulation Of Pulses (AREA)
Description
Claims (8)
- 内部に保存されたビット値を順次に移動させるシフトレジスタと、
前記シフトレジスタに保存されたビット値を所定の論理演算して生成したフィードバック信号を生成するフィードバック回路と、
前記シフトレジスタに入力されるランダム信号を外部信号として生成する外部信号生成回路と、
前記フィードバック信号及び前記外部信号を入力する入力論理回路と、
前記シフトレジスタのビット値及び前記外部信号の論理値を入力し、前記シフトレジスタのビット値及び前記外部信号の論理値がいずれも同じである場合、前記入力論理回路の出力値を前記シフトレジスタのビット値および前記外部信号の論理値から異ならせる値を、前記入力論理回路に出力する固定値防止回路と、を備え、
前記入力論理回路は、前記固定値防止回路の出力値をさらに入力し、前記フィードバック信号、前記外部信号および前記固定値防止回路の出力値を所定の論理演算して前記シフトレジスタに出力することを特徴とするデジタルロジックを利用した乱数発生装置。 - 前記固定値防止回路の出力は、論理値ハイであることを特徴とする請求項1に記載のデジタルロジックを利用した乱数発生装置。
- 前記ランダム信号は、発生源が異なる信号をサンプリングすることによって生成されることを特徴とする請求項1に記載のデジタルロジックを利用した乱数発生装置。
- 前記サンプリングは、信号のライジングエッジ及びフォーリングエッジでいずれも行われることを特徴とする請求項3に記載のデジタルロジックを利用した乱数発生装置。
- (a)シフトレジスタの内部に保存されたビット値を順次に移動させるステップと、
(b)前記シフトレジスタに保存されたビット値を所定の論理演算してフィードバック信号を生成するステップと、
(c)前記シフトレジスタに入力されるランダム信号を外部信号として生成するステップと、
(d)前記フィードバック信号及び外部信号を所定の論理演算して前記シフトレジスタに出力するステップと、を含み、
前記(d)ステップは、
前記シフトレジスタのビット値及び外部信号の論理値がいずれも同じである場合、前記シフトレジスタへの出力値および前記外部信号の論理値を前記シフトレジスタのビット値から異ならせる固定防止値を、前記フィードバック信号及び外部信号にさらに論理演算することを特徴とするデジタルロジックを利用した乱数発生方法。 - 前記固定防止値は、論理値ハイであることを特徴とする請求項5に記載のデジタルロジックを利用した乱数発生方法。
- 前記ランダム信号は、発生源が異なる信号をサンプリングすることによって生成されることを特徴とする請求項5に記載のデジタルロジックを利用した乱数発生方法。
- 前記サンプリングは、信号のライジングエッジ及びフォーリングエッジでいずれも行われることを特徴とする請求項7に記載のデジタルロジックを利用した乱数発生方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030095373A KR100576714B1 (ko) | 2003-12-23 | 2003-12-23 | 디지털 로직을 이용한 난수 발생 장치 및 방법 |
PCT/KR2004/001911 WO2005062523A1 (en) | 2003-12-23 | 2004-07-29 | Apparatus and method for generating random number using digital logic |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007520798A JP2007520798A (ja) | 2007-07-26 |
JP4417389B2 true JP4417389B2 (ja) | 2010-02-17 |
Family
ID=36791214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006546799A Expired - Fee Related JP4417389B2 (ja) | 2003-12-23 | 2004-07-29 | デジタルロジックを利用した乱数発生装置及び方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US20070150531A1 (ja) |
EP (1) | EP1698095A4 (ja) |
JP (1) | JP4417389B2 (ja) |
KR (1) | KR100576714B1 (ja) |
CN (1) | CN1914847B (ja) |
WO (1) | WO2005062523A1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8019802B2 (en) * | 2005-08-24 | 2011-09-13 | Qualcomm Incorporated | Cryptographically secure pseudo-random number generator |
US8312071B2 (en) * | 2008-04-11 | 2012-11-13 | International Business Machines Corporation | Method and structure for provably fair random number generator |
US8522065B2 (en) * | 2009-09-06 | 2013-08-27 | Percello Ltd. | Generating a random number in an existing system on chip |
CN102622205B (zh) * | 2012-03-09 | 2015-02-11 | 无锡华大国奇科技有限公司 | 随机数发生器 |
US9569176B2 (en) | 2014-10-30 | 2017-02-14 | Seagate Technology Llc | Deriving entropy from multiple sources having different trust levels |
KR101649996B1 (ko) | 2015-07-07 | 2016-08-23 | 동서대학교산학협력단 | 임계클럭조절형 랜덤 암호 발생기 |
US10536266B2 (en) | 2017-05-02 | 2020-01-14 | Seagate Technology Llc | Cryptographically securing entropy for later use |
US10541610B1 (en) * | 2018-08-21 | 2020-01-21 | Texas Instruments Incorporated | Spectral shaping of spread spectrum clocks/frequencies through post processing |
KR102217928B1 (ko) * | 2019-06-14 | 2021-02-19 | 광운대학교 산학협력단 | 랜덤 소수 생성 방법 및 그를 위한 장치 |
US11586418B2 (en) * | 2020-01-17 | 2023-02-21 | Macronix International Co., Ltd. | Random number generator, random number generating circuit, and random number generating method |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5001361A (en) * | 1988-05-13 | 1991-03-19 | Fujitsu Limited | Master-slave flip-flop circuit |
US5327365A (en) * | 1991-08-23 | 1994-07-05 | Fujitsu Limited | Generating system of random-number sequences for a parallel computer system |
US6061819A (en) * | 1997-12-29 | 2000-05-09 | Hewlett-Packard Company | Generation of reproducible random initial states in RTL simulators |
US6282181B1 (en) * | 1998-04-24 | 2001-08-28 | Ericsson Inc | Pseudorandom number sequence generation in radiocommunication systems |
US6560338B1 (en) * | 1998-08-28 | 2003-05-06 | Qualcomm Incorporated | Limiting delays associated with the generation of encryption stream ciphers |
US6240432B1 (en) * | 1998-12-28 | 2001-05-29 | Vanguard International Semiconductor Corporation | Enhanced random number generator |
US6125378A (en) * | 1999-01-13 | 2000-09-26 | Barbano; Paolo Emilio | Method and apparatus for generating families of code signals using multiscale shuffling |
GB2357610B (en) * | 1999-12-20 | 2004-04-28 | Mitsubishi Electric Inf Tech | Method and apparatus for generating numbers |
US6356112B1 (en) * | 2000-03-28 | 2002-03-12 | Translogic Technology, Inc. | Exclusive or/nor circuit |
US6687721B1 (en) * | 2000-03-31 | 2004-02-03 | Intel Corporation | Random number generator with entropy accumulation |
US7253717B2 (en) * | 2000-11-29 | 2007-08-07 | Mobile Technics Llc | Method and system for communicating with and tracking RFID transponders |
US6807553B2 (en) * | 2001-04-23 | 2004-10-19 | Safenet B.V. | Digital true random number generator circuit |
US20040049525A1 (en) * | 2002-09-06 | 2004-03-11 | Koninklijke Philips Electronics N.V. | Feedback random number generation method and system |
US7206797B2 (en) * | 2003-04-14 | 2007-04-17 | M-Systems Flash Disk Pioneers Ltd. | Random number slip and swap generators |
-
2003
- 2003-12-23 KR KR1020030095373A patent/KR100576714B1/ko not_active IP Right Cessation
-
2004
- 2004-07-29 CN CN2004800416030A patent/CN1914847B/zh not_active Expired - Fee Related
- 2004-07-29 JP JP2006546799A patent/JP4417389B2/ja not_active Expired - Fee Related
- 2004-07-29 EP EP04774229A patent/EP1698095A4/en not_active Withdrawn
- 2004-07-29 US US10/584,158 patent/US20070150531A1/en not_active Abandoned
- 2004-07-29 WO PCT/KR2004/001911 patent/WO2005062523A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
CN1914847B (zh) | 2010-04-28 |
CN1914847A (zh) | 2007-02-14 |
JP2007520798A (ja) | 2007-07-26 |
EP1698095A4 (en) | 2010-07-14 |
KR20050064096A (ko) | 2005-06-29 |
WO2005062523A1 (en) | 2005-07-07 |
US20070150531A1 (en) | 2007-06-28 |
EP1698095A1 (en) | 2006-09-06 |
KR100576714B1 (ko) | 2006-05-03 |
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