JP4406768B2 - Driving method of plasma display panel - Google Patents

Description

  The present invention relates to a method for driving a plasma display panel (PDP).

  While flat panel displays are becoming the mainstream of image display devices, more stable and high-quality display is desired. In plasma display panels, improvement of display discharge control is being sought.

  The driving method of the AC type plasma display panel uses a wall voltage generated by charging of a dielectric covering the display electrode pair for display. Among the cells in the screen, the wall voltage of the cell that should cause display discharge is set higher than the wall voltage of other cells, and then the appropriate sustain pulse (also called display pulse) is applied to all cells at the same time. Apply. The drive voltage is superimposed on the wall voltage by applying the sustain pulse. Display discharge occurs only in the cells whose cell voltage, which is the sum of the drive voltage and wall voltage, exceeds the discharge start voltage. Light emission due to display discharge is called “lighting”. By using the wall voltage, only the cells to be lit can be selectively lit.

  The sustain pulse is repeatedly applied by the number of times corresponding to the brightness to be displayed so that the polarity of the drive voltage is inverted every time. The application period is about several microseconds, and the light emission is continuous visually. When a display discharge is generated in response to the first application, the wall charge on the dielectric disappears once, and the reformation of the wall charge starts immediately. The polarity of the reshaped wall charge is the opposite. As the wall charges are re-formed, the cell voltage between the display electrodes drops and the display discharge ends. The end of the discharge means that the discharge current flowing through the display electrode is substantially 0 (zero). The driving voltage is continuously applied to the cell from the end of the display discharge to the trailing edge of the sustain pulse. The electrostatic attraction of space charge to the dielectric continues until the drive voltage is canceled by the increase in wall voltage. That is, after the end of the discharge, the re-formation of wall charges proceeds until the cell voltage becomes zero. Each sustain pulse has a role of generating a display discharge and regenerating an appropriate amount of wall charges necessary for the next display discharge.

  A typical sustain pulse waveform is a rectangular waveform. The amplitude of the sustain pulse having a rectangular wave shape, that is, the sustain voltage Vs is selected to a value within an allowable range determined by the discharge characteristics of the plasma display panel. If the sustain voltage Vs exceeds the upper limit close to the discharge start voltage Vf, discharge occurs even in a cell that should not be lit. Further, if the sustain voltage Vs is a value smaller than the lower limit value, the wall charge is not sufficiently re-formed, and therefore, the repetition of lighting becomes unstable.

  Various modifications have been proposed for the sustain pulse waveform. Japanese Patent Application Laid-Open No. 2002-72959 describes a step waveform in which the latter half of the amplitude is larger than the first half. According to this step waveform, a display discharge can be generated at a relatively low voltage, and a sufficient amount of wall charges can be formed. Japanese Patent Laid-Open No. 2003-29700 proposes a step waveform in which the amplitude of the leading edge portion is larger than the amplitude of other portions. According to this step waveform, the luminous efficiency can be increased.

Further, Japanese Patent Laid-Open No. 2001-125537 is a prior document related to the sustain pulse. This document discloses that a voltage having a polarity opposite to the sustain pulse is applied to the cell for a very short time of 100 nanoseconds or less immediately after the application of the sustain pulse in order to suppress the reactive current. This application of the opposite polarity voltage for a short time forcibly repels electrons and ions that are traveling from the discharge space toward the electrode at the trailing edge of the sustain pulse. The repelled electrons and ions remain in the discharge space as space charges.
JP 2002-72959 A JP 2003-29700 A JP 2001-125537 A

  There has been a problem that display discharge occurs earlier than the appropriate time due to the priming effect generated by the space charge in the cell at the time of application of the sustain pulse. The appropriate time is a predetermined period after the time when the applied voltage between the display electrodes, which rises in response to the start of pulse application, reaches the amplitude of the sustain pulse. If a display discharge occurs before the applied voltage reaches the sustain pulse amplitude, the discharge intensity is low, so that sufficient luminance cannot be obtained, and the re-formation of wall charges tends to be insufficient. In particular, when a sustain pulse having a step waveform with a large leading edge amplitude intended to improve luminous efficiency is applied as disclosed in JP-A-2003-29700, sufficient luminance cannot be obtained, resulting in a step waveform. The advantage is lost.

  An object of the present invention is to improve the controllability of the start time of display discharge.

  In the present invention, the space charge existing in the cell when the display discharge ends is intentionally reduced. Specifically, when driving a plasma display panel that generates a display discharge of the number of times corresponding to the brightness to be displayed only in the cells to be lit with selectively formed wall charges, the display is performed each time the display discharge is generated. Between the end of the discharge and the start of the next display discharge, a voltage is applied so that at least the cell to be lit does not generate a gas discharge. There is no restriction on the polarity of the applied voltage. When a voltage is applied to change the cell voltage after the cell voltage becomes zero due to the re-formation of the wall charge accompanying the display discharge, the space charge decreases due to electrostatic adsorption and charge coupling (neutralization).

  Considering the influence on the wall charge, it is desirable to apply a minimum voltage to make the space charge amount zero or close to it. Since cells with a higher frequency of display discharge are more likely to have space charge, dynamic voltage application that changes the value of the applied voltage or the application time in accordance with the display content is effective.

According to the present invention, since the influence of space charge is reduced, the controllability of the start time of display discharge is enhanced.

  An AC type plasma display panel having a screen composed of cells having a three-electrode surface discharge structure useful as a color display device is a preferred application target of the present invention.

  FIG. 1 is a configuration diagram of a display device according to the present invention. The display device 100 includes an AC type plasma display panel 1 having a color display surface and a drive unit 70 that controls light emission of a cell, and is used as a wall-mounted television receiver, a monitor of a computer system, and the like. The

  In the plasma display panel 1, a display electrode X and a display electrode Y constituting an electrode pair for generating a display discharge are arranged in parallel to each other, and address electrodes A are arranged so as to intersect the display electrodes X and Y. Yes. The display electrodes X and Y are row electrodes, and the address electrode A is a column electrode.

  The drive unit 70 includes a controller 71, a data conversion circuit 72, a power supply circuit 73, a display rate detection circuit 74, an X driver 75, a Y driver 76, and an A driver 77. The drive unit 70 receives frame data Df indicating luminance levels of three colors R, G, and B together with various synchronization signals from an external device such as a TV tuner or a computer. The frame data Df is temporarily stored in the frame memory in the data conversion circuit 72. The data conversion circuit 72 converts the frame data Df into subframe data Dsf for gradation display and sends it to the A driver 77. The subframe data Dsf is a set of 1-bit display data per cell, and the value of each bit indicates whether or not light emission of the cell in one corresponding subframe is required, strictly speaking, whether or not address discharge is required. The A driver 77 applies an address pulse to the address electrode A that communicates with the cell where address discharge is to occur, according to the subframe data Dsf. Application of a pulse to the electrode means that the electrode is temporarily biased to a predetermined potential. The controller 71 controls pulse application and transfer of subframe data Dsf. The power circuit 73 supplies power necessary for driving the plasma display panel 1 to each driver.

  The display rate detection circuit 74 detects “display rate α” for each subframe by counting bits indicating cells to be lit in the subframe data Dsf. The display rate α is a ratio of the number k of cells to be lit to the total number K of cells in the subframe (for example, lighting rate = k / K × 100 if it is a percentage). The display rate detection circuit 74 notifies the detected display rate α to the controller 71. The controller 71 switches the driving condition related to the display discharge according to the display rate α and increases / decreases the number of times the sustain pulse is applied. When switching the driving conditions, the correspondence between the display rate and the waveform stored in advance in the built-in memory 710 is referred to.

The outline of the driving sequence for the plasma display panel 1 in the display device 100 is as follows. In the display by the plasma display panel 1, in order to perform color reproduction by binary lighting control, as shown in FIG. 2, time-series frames F _k−2 , F _k−1 , F _k , F _{k + 1} ( Hereinafter, a predetermined number N of subframes SF ₁ , SF ₂ , SF ₃ , SF ₄ ,... SF _N−1 , SF _N (hereinafter, the subscript indicating the display order is omitted). Divide into That is, each frame F is replaced with a set of N subframes SF. The luminance weights W ₁ , W ₂ , W ₃ , W ₄ ,... W _N−1 , W _N are assigned to these subframes SF in order. These weights W ₁ , W ₂ , W ₃ , W ₄ ,... W _N−1 , W _N define the number of display discharges in each subframe SF. In FIG. 2, the subframe arrangement is in the order of weights, but other orders may be used. A frame period Tf, which is a frame transfer period, is divided into N subframe periods Tsf in accordance with such a frame configuration, and one subframe period Tsf is assigned to each subframe SF. Further, the subframe period Tsf is divided into a reset period TR for initializing wall charges, an address period TA for addressing, and a display period TS for maintaining lighting. While the length of the reset period TR and the address period TA is constant regardless of the weight, the length of the display period TS is longer as the weight is larger. Therefore, the length of the subframe period Tsf is longer as the weight of the corresponding subframe SF is larger. The order of the reset period TR, the address period TA, and the display period TS is the same in the N subframes SF. Wall charge initialization, addressing, and lighting maintenance are performed for each subframe.

  Of the above driving sequence, the lighting maintenance in the display period TS is deeply related to the present invention. In the lighting maintenance in which the display discharge is generated a number of times corresponding to the luminance weight, the voltage application unique to the present invention is performed to intentionally reduce the space charge existing in the cell when the display discharge ends. There are a plurality of modes of voltage application described below.

  It should be noted that, in the waveform illustration, unless there is a particular need, a common symbol is attached to a pulse having a common amplitude and pulse width without distinguishing the polarity of the pulse. In the following, the magnitude of the amplitude means the magnitude of the absolute value of the difference between the pulse base potential and the instantaneous value.

  FIG. 3 is a schematic diagram of drive voltage waveforms according to the first embodiment. In the figure, the subscript (1, n) of the reference symbol of the display electrode Y indicates the arrangement order of the corresponding row. The illustrated waveform is an example, and the amplitude, polarity, and timing can be variously changed. The pulse base potential is not limited to the ground potential, and may be an offset potential such as −Vs / 2.

  In the reset period TR of each subframe, negative and positive ramp waveform pulses are sequentially applied to all the display electrodes X so that a gradually increasing voltage is applied between the display electrodes of all the cells. A positive and negative ramp waveform pulse is sequentially applied to the electrode Y. The amplitudes of these ramp waveform pulses gradually increase at a sufficiently small change rate so that a minute discharge occurs. A combined voltage obtained by adding the amplitudes of the pulses applied to the display electrodes X and Y is applied to the cell. The minute discharge generated by the first application of the gradually increasing voltage generates an appropriate wall voltage having the same polarity in all the cells regardless of lighting / non-lighting in the previous subframe. The minute discharge generated by the second application of the gradually increasing voltage adjusts the wall voltage to a value corresponding to the difference between the discharge start voltage and the amplitude of the applied voltage.

  In the address period TA, wall charges necessary for maintaining lighting are formed only in the cells to be lit. In a state where all display electrodes X and all display electrodes Y are biased to a predetermined potential, a scan pulse Py is applied to one display electrode Y corresponding to the selected row every row selection period (scanning time for one row). . Simultaneously with the row selection, the address pulse Pa is applied only to the address electrode A corresponding to the selected cell in which the address discharge is to be generated. That is, the potential of the address electrode A is binary controlled based on the subframe data Dsf of the selected row. In the selected cell, a discharge is generated between the display electrode Y and the address electrode A, and this is used as a trigger to generate a surface discharge between the display electrodes. These series of discharges are address discharges.

  In the display period TS, as a basic operation, a sustain pulse Ps having a rectangular waveform with an amplitude Vs is alternately applied to the display electrode Y and the display electrode X. As a result, a pulse train in which the polarity is alternately switched is added between the display electrode X and the display electrode Y (hereinafter referred to as the XY electrode). By applying the sustain pulse Ps, a surface discharge is generated in a cell in which a predetermined wall charge remains. The number of times of applying the sustain pulse Ps corresponds to the weight of the subframe as described above. In synchronization with the application of the sustain pulse Ps, a rectangular waveform additional pulse Pe having a polarity opposite to that of the sustain pulse Ps is applied to the display electrode Y or the display electrode X to which the sustain pulse Ps is applied immediately after the application of the sustain pulse Ps. Apply. The amplitude of the additional pulse Pe is about 50 to 100 volts, which is lower than the amplitude Vs (150 to 180 volts) of the sustain pulse Ps. Also. The pulse width of the additional pulse Pe is about several hundred nanoseconds, which is shorter than the pulse width (2.5 to 3.5 microseconds) of the sustain pulse Ps.

  FIG. 4 is a waveform diagram illustrating the operation of voltage application according to the first embodiment. As described above, an AC drive waveform is applied between the XY electrodes by applying the sustain pulse Ps and the additional pulse Pe to the display electrodes X and Y. At the start of the display period TS, an appropriate amount of wall charges is formed in the cells to be lit by the previous addressing, so that a wall voltage is generated between the XY electrodes of the cells to be lit. When the sustain pulse Ps is applied, the cell voltage, which is the sum of the wall voltage and the applied voltage, rises all at once, and a display discharge 70 occurs between the XY electrodes. Each of the four peaks of the discharge current in the figure represents the display discharge 70. When the display discharge 70 occurs, the wall charge once disappears, and the wall charge begins to reform immediately. The polarity of the reshaped wall charge is the opposite. As the wall charge is re-formed, the cell voltage between the XY electrodes drops and the display discharge 70 ends. Even after the display discharge 70 is terminated, the re-formation of wall charges proceeds until the cell voltage becomes zero.

  On the other hand, a space charge is generated in the discharge space due to the ionization of the discharge gas accompanying the display discharge 70. Although the space charge decreases as the wall charge is reformed, the space charge remains even at the trailing edge of the sustain pulse Ps. When the additional pulse Pe is applied simultaneously with the end of the application of one sustain pulse Ps, the cell voltage that has been 0 until then temporarily rises. As a result, most of the space charges disappear due to electrostatic adsorption and neutralization. That is, the application of the additional pulse Pe forcibly reduces the space charge. In addition, it can prevent more reliably that unnecessary discharge arises by application of the additional pulse Pe by making the additional pulse Pe into an obtuse wave shape.

  Here, a period in which a voltage is applied to the cell so as not to cause a discharge after the end of the display discharge is referred to as an “erasing period”, and a voltage to be applied is referred to as an “erasing voltage”. By incorporating the erase period into the drive sequence, the time that can be allocated to the display discharge is shortened. Therefore, it is preferable that the length of the erase period is short. Also, increasing the erase voltage is not preferable because it increases power loss. On the other hand, when the amount of space charge that is priming particles is large, it is necessary to lengthen the erase period or increase the erase voltage. In general, when the display rate (also referred to as display load factor) is large, the supply of charges from neighboring cells leads to a state where there are many priming particles. There are few priming particles at the beginning of the display period, and the number of priming particles increases as the number of discharges increases. In consideration of these, it is useful to switch the length of the erase period or the erase voltage according to the display rate, and to switch the length of the erase period or the erase voltage between the first half and the second half of the display period. It is also useful to switch the erase voltage in accordance with the display discharge cycle so that only when the display discharge cycle is short, the erase voltage is increased to sufficiently reduce the space charge in a short time.

  Next, an example of switching between the erase period and the erase voltage will be described.

  Auto power control (APC) is associated with the erase period and erase voltage. Automatic power control takes advantage of the fact that even if the amount of light emitted from individual cells is small, the screen is bright, making the display as bright and easy to see as possible, and the power consumption in sustain does not exceed the allowable limit. It is a function to make it. With the automatic power control, the number of sustain pulses applied in the display of each subframe is the sum of the display ratios of the subframes of one frame so that the relative ratio of the luminance between the subframes is maintained at the relative ratio of the weights. Increase or decrease depending on Automatic power control is important for power saving and heat generation countermeasures.

  FIG. 5 shows an outline of automatic power control. When the display rate is smaller than a certain value (about 15% in the example), the automatic power control is not substantially performed, and the number of sustain pulses is the maximum number that can be applied within the time determined by the frame period. In this case, the length of the period necessary as the display period is the upper limit value Tmax. In FIG. 5A, the number of sustain pulses is represented by a sustain frequency. When the display rate is smaller than the certain value, the power consumption increases as the display rate increases. When the display rate is the constant value, the power consumption is the upper limit value Pmax of the allowable range. When the display rate exceeds the fixed value, the automatic power control function works, and the number of sustain pulses (sustain frequency) decreases as the display rate increases.

  FIG. 6 shows an example of the correspondence between the display rate and the pulse waveform. In the example, the display rate is divided into a range of less than 20% and a range of 20% or more. In the subframe where the display rate is less than 20%, the sustain pulse Ps is applied in the cycle Ts1, and the additional pulse Pe1 is applied following the application of each sustain pulse Ps. In a subframe with a display rate of 20% or more, the sustain pulse Ps is applied at the cycle Ts2, and the additional pulse Pe2 is applied subsequent to the application of each sustain pulse Ps. The period Ts1 and the period Ts2 are substantially display discharge periods. Since the period Ts1 is shorter than the period Ts2, the pulse width of the additional pulse Pe1 that determines the erasing period Te1 when the display rate is less than 20% is the pulse width of the additional pulse Pe2 that determines the erasing period Te2 when the display rate is 20% or more. The pulse width is also selected for a short time. The amplitude (erase voltage) Ve1 of the additional pulse Pe1 is larger than the amplitude (erase voltage) Ve2 of the additional pulse Pe2. That is, when the time margin is small, a relatively high erase voltage is applied to sufficiently reduce the space charge in a relatively short time, and when the time margin is large, a relatively low erase voltage is applied to It takes a long time to sufficiently reduce the space charge.

  The set value of the display rate range division is not limited to an example, and is a numerical value that should be appropriately changed according to the discharge characteristics of the plasma display panel to be driven. It is possible to further optimize the erase period and erase voltage by finely dividing the display rate range.

  FIG. 7 is a waveform diagram of an applied voltage according to the second embodiment. When the sustain pulse Ps is applied to the display electrode X in the display period TS, the additional pulse Pe is applied to the display electrode Y immediately after that. When the sustain pulse Ps is applied to the display electrode Y, the additional pulse Pe is applied to the display electrode X immediately after that. By controlling the electrode potential as described above, an AC drive waveform similar to that in the first embodiment can be provided between the XY electrodes.

  FIG. 8 is a waveform diagram of an applied voltage according to the third embodiment. In the third embodiment, erasing is performed between the address electrode A and the display electrode X (hereinafter referred to as “AX electrode”) and between the address electrode A and the display electrode Y (hereinafter referred to as “AY electrode”). It is an example of the form which applies a voltage.

  In the display period TS, a sustain pulse Psd having a step waveform is alternately applied to the display electrode X and the display electrode Y in order to cause display discharge. When the sustain pulse Psd is applied to the display electrode X, the additional pulse Pe is applied to the display electrode Y at a timing to match the trailing edges, and when the sustain pulse Psd is applied to the display electrode Y, the display is displayed at the timing to match the trailing edges. An additional pulse Pe is applied to the electrode X. The waveform of the sustain pulse Psd is a step waveform with a small amplitude at the rear end, and by applying the sustain pulse Psd and the application of the additional pulse Pe, a sustain pulse Ps having a rectangular waveform is added between the XY electrodes. . At this time, an additional pulse Pe that temporarily increases the cell voltage between these electrodes is applied between the AY electrodes or between the AX electrodes. The additional pulse Pe forcibly reduces the space charge.

  In the third embodiment, since no voltage application is performed between the XY electrodes to increase the cell voltage during the period from the end of the display discharge to the next application of the sustain pulse Ps, the wall charge amount between the XY electrodes changes. It has the advantage of being difficult to do.

  FIG. 9 is a waveform diagram of an applied voltage according to the fourth embodiment. Example 4 is also an example of a mode in which an erasing voltage is applied between the AX electrodes and between the AY electrodes by controlling the potentials of the display electrode X and the display electrode Y, as in Example 3.

  In the display period TS, a sustain pulse Psu having a step waveform is alternately applied to the display electrode X and the display electrode Y in order to cause display discharge. When the sustain pulse Psu is applied to the display electrode X, the additional pulse Pe is applied to the display electrode Y at the timing to match the trailing edges, and when the sustain pulse Psu is applied to the display electrode Y, the display is displayed at the timing to match the trailing edges. An additional pulse Pe is applied to the electrode X. The waveform of the sustain pulse Psu is a step waveform with a large amplitude at the rear end, and by applying the sustain pulse Psd and the application of the additional pulse Pe, a sustain pulse Ps having a rectangular waveform is added between the XY electrodes. . At this time, an additional pulse Pe that temporarily increases the cell voltage between these electrodes is applied between the AY electrodes or between the AX electrodes. The additional pulse Pe forcibly reduces the space charge.

  The fourth embodiment also has an advantage that the amount of wall charges between the XY electrodes hardly changes.

  FIG. 10 is a waveform diagram of an applied voltage according to the fifth embodiment. Example 5 is also an example of a mode in which an erasing voltage is applied between the AX electrodes and between the AY electrodes by controlling the potentials of the display electrodes X and Y as in Example 3.

In the display period TS, a sustain pulse Psu having a step waveform is alternately applied to the display electrode X and the display electrode Y in order to cause display discharge. At this time, the rear end portion of a certain sustain pulse Psu and the front end portion of the next sustain pulse Psu are overlapped in time.
In this case, at the rear end portion of the sustain pulse Psu, the display electrode to which the sustain pulse Psu is applied has a high impedance, and the electrode potential can be increased by capacitive coupling between the XY electrodes.

  FIG. 11 is a waveform diagram of an applied voltage according to the sixth embodiment. The sixth embodiment is an example in which an erasing voltage is applied between the AX electrodes and between the AY electrodes by controlling the potential of the address electrode A.

  In the display period TS, in order to generate a display discharge, a sustain pulse Ps having a rectangular waveform is alternately applied to the display electrode X and the display electrode Y. An additional pulse Pe is applied to the address electrode A at a timing at which each sustain pulse Ps and the trailing edges coincide with each other.

  FIG. 12 is a waveform diagram of an applied voltage according to the seventh embodiment. In the seventh embodiment, similarly to the sixth embodiment, an erasing voltage is applied between the AX electrodes and between the AY electrodes by controlling the potential of the address electrode A.

  In the display period TS, in order to generate a display discharge, a sustain pulse Ps having a rectangular waveform is alternately applied to the display electrode X and the display electrode Y. An additional pulse Pe is applied to the address electrode A at a timing at which the trailing edges coincide with the sustain pulses Ps. In the seventh and sixth embodiments, the polarity of the additional pulse Pe is opposite.

  FIG. 13 is a waveform diagram showing the operation of voltage application according to the eighth embodiment. Example 8 is an example in which the sustain pulse waveform is a step waveform having a large amplitude at the leading edge, which is advantageous for improving the light emission efficiency, and an erase voltage is applied between the XY electrodes by controlling the potentials of the display electrode X and the display electrode Y. It is.

  In the display period TS, a sustain pulse Psp having a step waveform having three portions having different amplitudes is alternately applied to the display electrode Y and the display electrode X. The waveform of the sustain pulse Psp is a step waveform in which the amplitude of the front part and the rear part is larger than the amplitude of the central part, and the amplitude difference between the rear part and the central part is smaller than the amplitude difference between the front part and the central part. It is. By applying the sustain pulse Psp, an AC driving waveform is given between the XY electrodes. At the start of the display period TS, an appropriate amount of wall charges is formed in the cells to be lit by the previous addressing, so that a wall voltage is generated between the XY electrodes of the cells to be lit. When the sustain pulse Psp is applied, the cell voltage, which is the sum of the wall voltage and the applied voltage, rises all at once, and a strong display discharge 71 occurs between the XY electrodes. Each of the four peaks of the discharge current in the figure represents the display discharge 71. When the display discharge 71 occurs, the wall charge once disappears, and the wall charge begins to be immediately reformed. The polarity of the reshaped wall charge is the opposite. As the wall charge is re-formed, the cell voltage between the XY electrodes drops and the display discharge 71 ends. Even after the display discharge 70 is terminated, the re-formation of wall charges proceeds until the cell voltage becomes zero.

  On the other hand, a space charge is generated in the discharge space due to the ionization of the discharge gas accompanying the display discharge 71. Although the space charge decreases as the wall charge is reformed, the space charge remains even at the trailing edge of the sustain pulse Psp. Since the amplitude of the rear portion of the sustain pulse Psp is larger than the amplitude of the central portion, when the rear portion is applied, the cell voltage that has been zero until then temporarily rises. As a result, most of the space charges disappear due to electrostatic adsorption and neutralization. That is, the rear portion of the sustain pulse Psp forcibly reduces the space charge. Note that by making the rear portion of the sustain pulse Psp obtuse, it is possible to more reliably prevent unnecessary discharge.

  FIG. 14 is a waveform diagram of an applied voltage according to the ninth embodiment. Example 9 is also an example in which an erasing voltage is applied between the XY electrodes by controlling the potentials of the display electrode X and the display electrode Y.

  In the display period TS, in order to generate a display discharge, a sustain pulse Pso having a step waveform with a large leading edge amplitude is alternately applied to the display electrode X and the display electrode Y. When the sustain pulse Pso is applied to the display electrode X, the additional pulse Pe is applied to the display electrode Y at the timing to match the trailing edges, and when the sustain pulse Pso is applied to the display electrode Y, the display is displayed at the timing to match the trailing edges. An additional pulse Pe is applied to the electrode X. The additional pulse Pe temporarily increases the cell voltage between the XY electrodes and forcibly reduces the space charge.

  FIG. 15 is a waveform diagram of an applied voltage according to the tenth embodiment. Example 10 is an example in which an erasing voltage is applied between the XY electrodes by controlling the potentials of the display electrode X and the display electrode Y in the same manner as in Example 1.

  In the display period TS, a sustain pulse Pso having a step waveform is alternately applied to the display electrode X and the display electrode Y in order to cause display discharge. When the sustain pulse Pso is applied to the display electrode X, the additional pulse Pe is applied to the display electrode X immediately after that. When the sustain pulse Pso is applied to the display electrode Y, the additional pulse Pe is applied to the display electrode Y immediately after that. Thereby, the space charge is forcibly reduced as in the first embodiment.

  FIG. 16 is a waveform diagram of an applied voltage according to the eleventh embodiment. In the fifteenth embodiment, as in the sixth embodiment, an erase voltage is applied between the AX electrodes and between the AY electrodes by controlling the potential of the address electrode A.

  In the display period TS, a sustain pulse Pso having a rectangular waveform is alternately applied to the display electrode X and the display electrode Y in order to generate display discharge. An additional pulse Pe is applied to the address electrode A at a timing at which each sustain pulse Pso and the trailing edges coincide with each other.

  The application of the present invention reduces the influence of space charge in the display period and increases the controllability of the start time of display discharge. Therefore, the present invention is useful for stabilizing the display of the plasma display panel. The present invention can be applied not only to the surface discharge type but also to a counter discharge type plasma display panel in which display electrodes are arranged on a front substrate and a rear substrate.

It is a block diagram of the display apparatus which concerns on this invention. It is a conceptual diagram of frame division. FIG. 4 is a schematic diagram of drive voltage waveforms according to the first embodiment. FIG. 6 is a waveform diagram illustrating an operation of voltage application according to the first embodiment. It is a figure which shows the outline | summary of automatic power control. It is a figure which shows an example of matching with a display rate and a pulse waveform. 6 is a waveform diagram of an applied voltage according to Example 2. FIG. 6 is a waveform diagram of an applied voltage according to Example 3. FIG. 6 is a waveform diagram of an applied voltage according to Example 4. FIG. 10 is a waveform diagram of an applied voltage according to Example 5. FIG. FIG. 10 is a waveform diagram of an applied voltage according to Example 6. FIG. 12 is a waveform diagram of an applied voltage according to Example 7. FIG. 10 is a waveform diagram showing the action of voltage application according to Example 8. FIG. 10 is a waveform diagram of an applied voltage according to Example 9. 12 is a waveform diagram of an applied voltage according to Example 10. FIG. It is a wave form diagram of the applied voltage which concerns on Example 11. FIG.

Explanation of symbols

1 Plasma display panel 70, 71 Display discharge X, Y Display electrode Ps, Psd, Psu, Psp, Pso Sustain pulse Pe Additional pulse (pulse)

Claims (6)

A method of driving a plasma display panel, which generates a display discharge a number of times according to the brightness to be displayed only in cells to be lit with selectively formed wall charges,
Each causing the display discharge, between the termination of the display discharge and the start of the next display discharge, to at least the cells to be lighted, have row voltage applied to reduce the space charge in the cell, In order to increase the decrease amount as the space charge immediately before the start of the display discharge increases, at least one of the application time and the applied voltage value in the voltage application is the ratio of the number of cells to be lit to the total number of cells or the cycle of the display discharge. A method for driving a plasma display panel, wherein the method is changed according to the method. In order to generate a display discharge in the cell, a sustain pulse is applied between the electrodes of the electrode pair, and immediately after that, as the voltage application, a pulse having a polarity opposite to that of the sustain pulse and smaller in amplitude than the sustain pulse is applied. the driving method of a plasma display panel according to claim 1 you, characterized in that applied between the electrode pair of the electrode. In order to generate a display discharge in the cell, a sustain pulse is applied between the electrodes of the electrode pair, and a pulse having a smaller amplitude and a shorter pulse width than the sustain pulse is applied as the voltage application. 2. The method of driving a plasma display panel according to claim 1, wherein the voltage is applied between the electrode pair and the address electrode so that the application timings overlap with each other . In order to generate a display discharge in the cell, a step waveform sustain pulse having three portions having different amplitudes is applied between the electrodes of the electrode pair as the voltage application, and the step waveform includes front and rear portions. 2. The method of driving a plasma display panel according to claim 1, wherein the amplitude of the waveform is larger than the amplitude of the central portion . In order to generate a display discharge in the cell, a sustain pulse having a step waveform having two parts having different amplitudes is applied between the electrodes of the electrode pair, and the amplitude of the front part is larger than the amplitude of the rear part. A large waveform,
Immediately after the application of the sustain pulse, as the voltage application, a pulse having a polarity opposite to that of the sustain pulse and having a smaller amplitude than a rear portion of the sustain pulse is applied between the electrodes of the electrode pair. The method for driving a plasma display panel according to claim 1 . In order to generate a display discharge in the cell, a sustain pulse having a step waveform having two parts having different amplitudes is applied between the electrodes of the electrode pair, and the amplitude of the front part is larger than the amplitude of the rear part. As the voltage application, a pulse having an amplitude smaller than that of the sustain pulse and a short pulse width is applied between the electrode pair and the address electrode so that the application timing overlaps with the rear portion of the sustain pulse. The method for driving a plasma display panel according to claim 1, wherein the method is applied between the electrodes .

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