JP4365165B2 - Ultrasonic diagnostic equipment - Google Patents

Description

  The present invention relates to an ultrasonic diagnostic apparatus, and more particularly to a new signal delay processing for a digital beam former.

  In the ultrasonic diagnostic apparatus, an ultrasonic beam is formed using an electronic delay processing technique, and the ultrasonic beam is electronically scanned. Specifically, a transmission beam is formed by setting a fixed delay relationship between a plurality of transmission signals at the time of transmission, and a reception beam is set by adding a fixed delay relationship to a plurality of reception signals at the time of reception. Is formed. When forming a transmission beam, a focus point is set at a predetermined depth, and the beam shape is controlled so that the ultrasonic wave is focused at the focus point. If necessary, a plurality of transmissions may be performed for a plurality of focus points having different depths on the same beam direction (transmission multistage focus). On the other hand, when forming a reception beam, reception dynamic focus is generally applied, that is, control for changing the reception focus point in real time according to a dynamic change in the depth of the reflection point is executed. In addition, a plurality of reception beams may be formed for one transmission beam. The transmission beam and the reception beam formed as described above are electronically steered in a one-dimensional or two-dimensional direction.

  In order to focus and steer the ultrasonic beam, the ultrasonic diagnostic apparatus is provided with a digital beam former (DBF) for transmission and reception. Hereinafter, a transmission beam former will be described as a representative.

  The beamformer for transmission includes, for example, a plurality of transmission signal generators that generate transmission signals for each channel, a plurality of delayers that adjust delay times or phases between the plurality of transmission signals, A plurality of amplifiers that amplify a plurality of transmission signals and supply the amplified signals to the plurality of vibration elements. Here, a delay time is set for each delay unit prior to transmission. Specifically, a memory for storing delay amount data is provided for each delay unit, and the delay amount data is loaded into the memory from the main control unit. Then, the transmission signal is delayed by counting the clock for the time corresponding to the delay amount from the start trigger. The clock frequency is usually fixed, but the clock frequency may be switched when the transmission frequency is switched.

  The reception beamformer basically adjusts the phase of each signal by counting the clocks in the same manner as the transmission beamformer.

JP 2000-33087 A

  Conventionally, as the number of channels increases, the number of circuits such as memories needs to be increased accordingly, so the size of the beam former also increases. This is contrary to the demand for miniaturization of the ultrasonic diagnostic apparatus.

  Patent Document 1 discloses an ultrasonic system in which a plurality of processors (corresponding to sub-delay circuits) are arranged in an ultrasonic probe, and a beam former (corresponding to a main delay circuit) is arranged in the apparatus main body. Has been. Here, each processor is arranged for each group of a plurality of vibration elements, and performs delay control within the group. The beamformer performs delay control between groups. Thus, the number of signal lines is reduced by the two-stage delay control. However, the method described in this document does not focus on separation of focus and steering.

  An object of the present invention is to simplify the configuration of an ultrasonic diagnostic apparatus and to reduce the amount of the apparatus.

  Another object of the present invention is to provide a new method of delay control for ultrasonic beam forming.

The present invention includes at least one delay unit that delays a signal sequence including a plurality of input signals in order to form an ultrasonic beam, and the delay unit is provided corresponding to the plurality of signals. A delay circuit having a delay array composed of a plurality of delay devices having a specific delay amount, delaying the signal sequence and outputting a delayed signal sequence, and a common supplied to the plurality of delay devices A variable clock circuit that determines an actual delay time corresponding to a specific delay amount of each delay device by changing a frequency of the clock signal. Thus, a specific delay amount function is constituted by a plurality of specific delay amounts possessed by the plurality of delay devices, and a fixed specific delay amount function is used even when the transmission / reception conditions are switched .

  According to the above configuration, the delay circuit has a delay array including a plurality of delay devices. The “specific delay amount” of each delay device corresponds to a “delay rate” or a “relative delay amount”. A common clock signal is supplied to a plurality of delay devices, and the “real delay time” (corresponding to “actual delay amount” or “absolute delay time”) in each delay device is determined by the frequency of the clock signal. . That is, in each delay device, the actual delay time is determined by the specific delay amount and the clock frequency. In a desirable mode, the specific delay amount in each delay unit is fixed, and the actual delay time of each delay unit is defined by the frequency of the clock signal. The actual delay time of each delay unit is changed by changing the frequency of the clock signal. Therefore, each actual delay time can be changed by changing the frequency of the common clock signal, which is convenient, and it is not necessary to reset delay data to each delay device each time the beam focus or beam steering is changed.

  In the above configuration, the delay unit is for transmission or reception, or for focus or steering. Preferably, the delay device operates in synchronization with the clock signal, and the operation speed of the delay device is changed according to the frequency of the clock signal. The delay device can be configured as, for example, a circuit in which a number of latch circuits corresponding to the specific delay time are connected in series, a circuit using a counter in which a fixed count value corresponding to the specific delay time is set, and the like. In the latter case, the set count value may be changed when the probe is replaced. Even in such a case, it is not necessary to change the delay data set in the counter at high speed and frequently in continuous transmission / reception.

  Preferably, the delay array has a specific delay amount function as a whole, and the specific delay amount of each delay device is set according to a position on the delay device array.

  The specific delay amount function is composed of a plurality of specific delay amounts possessed by a plurality of delay devices, and the specific delay amount given to each delay device is the position of the delay device on the delay device array (that is, the array vibration). The position of the corresponding vibration element on the child). The specific delay amount function is an original function for deriving the actual delay time characteristics, and various specific delay amount functions can be defined according to the use of the delay unit and transmission / reception conditions. May be selectively used.

  Preferably, each delay unit has a fixed configuration corresponding to a specific delay amount that the delay unit has. According to this configuration, each delay unit has a fixed configuration (circuit configuration), and the actual delay time exhibited by each delay unit is manipulated only by changing the frequency of the clock signal.

  Preferably, each of the delay elements operates in synchronization with the clock signal, and the operation speed of each of the delay elements is uniformly changed by changing the frequency of the clock signal. The delay time characteristic expands and contracts in the time axis direction.

  Assuming that the actual delay time characteristics as described above are expanded and contracted in the time axis direction, it is desirable to define the variable function of the specific delay amount function and the frequency of the clock signal so that the delay relationship is appropriate for various situations. .

  Preferably, the delay unit is a circuit for focusing the ultrasonic beam, the actual delay time characteristic is a curve or a curved surface, and the bending of the actual delay time characteristic is changed by changing the frequency of the clock signal. To do.

  A curve (in the case of a 1D array transducer) or a curved surface (in the case of a 2D array transducer) showing the actual delay time characteristic becomes, for example, an arc or a spherical surface with a constant curvature when the frequency of the clock signal becomes a predetermined frequency. When the frequency of the clock signal increases (or approaches it), it is linearly compressed in the time axis direction and approaches flat, and when the frequency of the clock signal decreases, it is stretched linearly in the time axis direction and the degree of concave becomes stronger. In order to improve the focus from a shallow part to a deep part, the transmission aperture and the reception aperture may be varied in conjunction with the focus point or the reception point depth.

  Preferably, the delay unit is a circuit for steering the ultrasonic beam, the actual delay time characteristic is a line or a plane, and the gradient of the actual delay time characteristic is changed by changing the frequency of the clock signal. .

  In the above configuration, the frequency of the clock signal is changed according to the beam deflection angle. Increasing the frequency of the clock signal reduces the slope of the line or plane showing the actual delay time characteristics, while decreasing the frequency of the clock signal increases the slope.

  Preferably, a focus delay unit for focusing the ultrasonic beam and a steering delay unit for steering the ultrasonic beam are provided as the delay unit, and the delay units are in a serial relationship.

  The clock variable delay unit described above can be used for focusing or steering, and can be used in both of them as in the above configuration. In that case, it is necessary to provide the clock signal individually for each. For example, when the directions of the transmission beam and the reception beam coincide with each other, a clock variable circuit for both transmission and reception may be provided.

  Preferably, an x-direction focus delay unit and a y-direction focus delay unit are provided as the delay units, and these delay units are in a serial relationship. Preferably, an x-direction steering delay unit and an x-direction steering delay unit are provided as the delay unit, and the delay units are in a serial relationship. According to this configuration, focus and steering can be adjusted independently in the x direction and the y direction.

  Preferably, the delay unit is a circuit for forming a transmission beam. Preferably, the delay unit is a circuit for forming a reception beam.

  Preferably, as the delay unit, a common focus delay unit and a plurality of steering delay units arranged in parallel downstream of the common focus delay unit are provided. According to this configuration, there is an advantage that the focus delay unit can be shared among a plurality of reception beams when performing parallel simultaneous reception.

  Preferably, the delay unit includes an arrangement inversion circuit that is provided in a preceding stage or a subsequent stage of the delay circuit and inverts the arrangement of the signal train. Preferably, an inversion control unit that operates the array inversion circuit when the polarity of the deflection angle of the ultrasonic beam changes is included.

  When steering is performed using the above delay unit, the gradient of the actual delay time characteristic can be changed by changing the frequency of the clock signal, but it is difficult to reverse the polarity of the gradient with the configuration as it is. Therefore, if the arrangement of the signal train is reversed, the beam can be deflected in both the positive angle direction and the negative angle direction.

  Preferably, the delay unit includes a bypass circuit that bypasses the signal sequence without passing through the delay circuit. Preferably, a bypass control unit that controls the bypass circuit to bypass the signal train when the deflection angle of the ultrasonic beam is zero.

  When steering is performed using the delay unit described above, the gradient can be made extremely small by increasing the frequency of the clock signal, but it is difficult to make the gradient completely zero with the configuration as it is. Therefore, a case where the deflection angle is zero by the bypass control is dealt with.

  Preferably, the delay unit is disposed in the ultrasonic probe. Since the delay unit can be made smaller than before and the number of signal lines can be reduced, the delay unit can be arranged in the ultrasonic probe, or the ultrasonic probe can be arranged even if it is arranged. There is no risk of unnecessarily bloating the tentacles.

  Desirably, it includes a plurality of transducer elements that transmit and receive ultrasonic waves, and includes an array transducer divided into a plurality of subarrays, and the delay unit is provided for each subarray. If a delay unit is provided for each subarray, the beam focus can be improved even if the depth of the focus point or the reception point (reception focus point) varies.

  As described above, according to the present invention, a new method of delay control for forming an ultrasonic beam can be provided. Further, according to the present invention, the configuration of the ultrasonic diagnostic apparatus can be simplified even if the transmission channel and the reception channel are increased, and the number of control signal lines can be reduced.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the drawings.

  FIG. 1 shows a preferred embodiment of an ultrasonic diagnostic apparatus according to the present invention, and FIG. 1 is a block diagram showing the overall configuration thereof.

  The ultrasonic diagnostic apparatus shown in FIG. 1 includes an array transducer 10, a transmission module 12, a reception module 14, an image processing unit 18, a display device 20, and a system control unit 16. This ultrasonic diagnostic apparatus further includes a signal processing unit and the like, which are not shown.

  The array transducer 10 is composed of a plurality of transducer elements, and ultrasonic waves are transmitted and received by the array transducer 10. An ultrasonic beam is formed in the array transducer 10 by the action of the transmission module 12 and the reception module 14 described later, and the ultrasonic beam is electronically scanned. Examples of the electronic scanning method include electronic sector scanning.

  In this embodiment, the array transducer 10 is a 1D array transducer, but the array transducer 10 may be a 2D array transducer or the like. The array transducer 10 is disposed in an ultrasonic probe case (not shown).

  The transmission module 12 functions as a transmission beam former, and includes a transmission trigger generator 22, a focus delay unit 24, a steering delay unit 26, and a pulsar unit 28. The focus delay unit 24 includes a focus delay circuit 30 and a variable clock circuit 32. Similarly, the steering delay unit 26 includes a steering delay circuit 34 and a variable clock circuit 36.

  The focus delay circuit 30 and the steering delay circuit 34 are constituted by a plurality of delay devices, and the input clock signal (the first clock signal output from the variable clock circuit 32 and the second clock output from the variable clock circuit 36). Signal) Each delay unit operates in synchronization. That is, the operating speed of each delay unit is determined by the frequency of the clock signal. Although the focus delay circuit 30 and the steering delay circuit 34 have a fixed configuration, the delay characteristics (actual delay time characteristics) of the clock delay circuit 30 and the steering delay circuit 34 can be changed according to the frequency of the input clock signal. it can.

  Accordingly, when the transmission trigger generator 22 generates a transmission trigger based on the timing signal output from the system control unit 16, a plurality of signal sequences subjected to focus delay processing in the focus delay circuit 30 are generated according to the transmission trigger. Then, the signal train is subjected to steering delay processing in the steering delay circuit 34, and the signal train subjected to such focus delay processing and steering delay processing is supplied to the pulsar unit 28. The pulsar unit 28 drives each signal constituting the signal sequence, thereby generating a drive signal sequence and supplying it to the array transducer 10. As a result, ultrasonic waves are radiated from the vibration elements constituting the array transducer 10, and a transmission beam is formed by the ultrasonic waves.

  On the other hand, the reception module 14 functions as a reception beam former, and includes an amplifier unit 40, an A / D conversion unit 42, a focus delay unit 44, steering delay units 46 and 48, and adders 58 and 64. .

  The focus delay unit 44 includes a focus delay circuit 50 and a variable clock circuit 52. The steering delay unit 46 includes a steering delay circuit 54 and a variable clock circuit 56. The steering delay unit 48 includes a steering delay circuit 60 and a variable clock circuit 62.

  In the present embodiment, each delay circuit 50, 54, 60 has a fixed configuration and operates in synchronization with the supplied clock signal in the same manner as the delay circuits 30, 34 described above. The operating speed is determined by the frequency of. The actual delay characteristic in each of the delay circuits 50, 54, 60 is changed depending on the frequency of the supplied clock signal. The operation of each delay circuit 50, 54, 56 will be described in detail later together with the operation of the delay circuits 30, 34 described above.

  In this embodiment, since two steering delay units 46 and 48 are provided after the focus delay unit 44, it is possible to simultaneously form two reception beams per reception. In this case, there is an advantage that the focus delay circuit 50, that is, the focus delay characteristic can be shared between the two reception beams. That is, since the focus delay characteristic and the steering delay characteristic are separated from each other in the transmission module 12 and the reception module 14, various advantages can be obtained by independently controlling the delay characteristics. This will be described later.

  In the reception module 14, when a signal string (a plurality of reception signals) is output from a plurality of vibration elements constituting the array transducer 10, the A / D conversion unit 42 is amplified after each signal is amplified by the amplifier unit 40. Is input. The A / D converter 42 converts each input signal from an analog signal format to a digital signal format.

  In the focus delay circuit 50, focus delay processing based on the frequency of the clock signal (third clock signal output from the variable clock circuit 52) is performed on the input signal sequence, and such delay processing is performed. The signal train is output in parallel to the steering delay circuit 54 and the steering delay circuit 60.

  The steering delay circuit 54 performs steering delay processing based on the frequency of the clock signal (fourth clock signal output from the variable clock circuit 56) on the input signal sequence to form the first reception beam. The delayed signal sequence is output. Similarly, the steering delay circuit 60 performs a steering delay process based on the frequency of the clock signal (the fifth clock signal output from the variable clock circuit 62) on the input signal sequence, and so on. A signal sequence after delay processing is output. The adder 58 adds the signal sequences that have been subjected to the focus delay process and the steering delay process, thereby generating a first phasing addition signal. Similarly, the adder 64 adds the signal sequences that have been subjected to the focus delay process and the steering delay process, thereby generating a second phasing addition signal.

  The system control unit 16 controls the operation of each component shown in FIG. 1, and in this embodiment, in particular, controls the frequency of the clock signal in the variable clock circuits 32, 36, 52, 56, and 62. Yes.

  In the present embodiment, it is not necessary to reset the delay data every time the transmission / reception conditions are switched in each of the delay circuits 30, 34, 50, 54, 60, and each delay circuit 30, 34, It is possible to easily and quickly change the delay characteristics of 50, 54, and 60. In addition, the number of control signals necessary for this can be greatly reduced.

  The signal after the phasing addition (echo data) output from the receiving module 14 is sent to the image processing unit 18 after undergoing necessary signal processing. The image processing unit 18 has a function such as a digital scan converter (DSC), and forms a two-dimensional image or a three-dimensional image based on the echo data. The image data thus formed is output to the display device 20, and an ultrasonic image is displayed on the display device 20.

  Next, the operation of the focus delay circuits 30, 50 and the operation of the steering delay circuits 34, 54, 60 shown in FIG. 1 will be described.

  FIG. 2 conceptually shows the operation of the focus delay circuits for transmission and reception. FIG. 3 conceptually shows the operation of the steering delay circuits for transmission and reception. Reference numeral 10 denotes an array transducer, reference numeral 70 denotes a center line thereof, and τ denotes a delay time.

  As shown in FIG. 2, in the present embodiment, the focus delay characteristic (focus actual delay time characteristic) can be changed in the focus delay circuit by changing the frequency of the clock signal input thereto. Reference numeral 72 indicates a case where the frequency of the clock signal is high, and reference numeral 74 indicates a case where the frequency of the clock signal is low. Reference numeral 76 represents the change width of the delay time associated with the change in the frequency of the clock signal at the end of the array transducer 10. As shown in FIG. 2, the focus delay circuit exhibits a concave delay characteristic when viewed from the lower side (biological side), and the curvature or time axis direction of the delay characteristic (the direction of the center line indicated by reference numeral 70). The expansion and contraction of can be changed. Specifically, the delay time does not vary so much even if the frequency of the clock signal changes near the center of the array transducer 10, but depends on the frequency of the clock signal near the end of the array transducer 10. The delay time varies greatly. As shown in FIG. 2, when the clock signal is lowered, the curvature of the delay characteristic is increased and a focus point can be formed closer to the array transducer 10, and on the other hand, when the clock signal frequency is increased, the delay is increased. As a result of the reduced curvature of the characteristic, the focus point can be moved further away from the array transducer 10.

  Incidentally, the delay characteristic depending on the frequency of the clock signal as shown in FIG. 2 is generated based on a specific delay amount function set over a plurality of delay devices, and such ratio By appropriately determining the delay amount function, the best focus characteristics can be freely determined, and by combining with variable aperture control, it is possible to form a good focus from a shallow part to a deep part.

  FIG. 3 shows the steering delay process as described above. When the frequency of the supplied clock signal is high, the line representing the delay characteristic approaches more horizontal as indicated by reference numeral 80, while when the frequency of the clock signal decreases, the delay characteristic is changed as indicated by reference numeral 78. The slope or slope of the representing line is greater. Therefore, the deflection angle of the beam can be freely varied depending on the level of the clock signal.

  Incidentally, also in the steering delay circuit, a specific delay amount function is set over the entire plurality of delay devices, as in the focus delay circuit. Each delay unit has a specific delay amount corresponding to its position. In the steering delay circuit, the actual delay characteristic is determined by the specific delay amount function and the frequency of the clock signal. Therefore, it is desirable that the specific delay amount function and the variable range of the clock frequency are appropriately determined according to the beam deflection angle range.

  Conventionally, the focus delay characteristic and the steering delay characteristic are not separated, and an ultrasonic beam is formed and scanned by a delay characteristic that integrates these delay characteristics. For example, by separating both the focus delay characteristic and the steering delay characteristic, for example, when the focus depth is the same, the same focus delay characteristic can be shared even when the beam orientation is different, and the same beam deflection angle is the same. In this case, there is an advantage that the same steering delay characteristic can be shared regardless of the depth of focus. Further, since the delay characteristic can be changed by changing the frequency of the clock signal as described above, there is an advantage that the control is simple and the amount of each circuit can be reduced.

  In the configuration of FIG. 1 already described, the focus delay circuit is designed as the front stage and the steering delay circuit as the rear stage in both the transmission module 12 and the reception module 14, but the relationship between them is reversed. Is also possible.

  FIG. 4 shows the synthesis of the focus delay characteristic and the steering delay characteristic. As shown in (A), a beam profile 86 converging to the focus F on the central axis is virtually formed by the focus delay characteristic 84, and on the other hand, as shown in (B), a constant angle is formed. When the tilted steering delay characteristic 88 is set, as a result of the synthesis of these two delay characteristics, a beam profile obtained by tilting the beam profile 86 shown in (A) by a certain angle is obtained as shown in (C). Is possible. Further, as shown in (B), if the steering delay characteristic slope is reversed while keeping the shape of the beam profile 86 as it is, the same beam profile is obtained in the opposite direction as shown in (D). It is possible to form an ultrasonic beam. Even in such a case, the same focus delay characteristic can be used, and there is no need to recalculate or reset the entire delay data.

  FIG. 5 shows a serial connection relationship of the focus delay circuit 90 and the steering delay circuit 94 that function as transmission or reception. In FIG. 5, a focus delay circuit 90 is provided at the front stage, and a steering delay circuit 94 is provided at the rear stage. On the other hand, in FIG. 6 described next, a steering delay circuit 94 is provided in the front stage, and a focus delay circuit 90 is provided in the rear stage. The principle of this embodiment is valid in any case. However, in the case where a plurality of reception beams are simultaneously formed in the reception module, it is desirable to provide the focus delay circuit 90 in the preceding stage and provide the plurality of steering delay circuits 94 in parallel in the subsequent stage as shown in FIG. Such a configuration has an advantage that the focus delay circuit 90 can be shared as described in FIG.

  In FIG. 5, when a plurality of transmission triggers are input to the focus delay circuit 90 at the same timing, the focus delay circuit 90 performs focus delay processing according to the frequency of the clock signal 91 as described above, that is, the clock. Each input signal is subjected to delay processing according to the delay characteristic depending on the frequency of the signal 91. As a result, a signal sequence having a curved arrangement as indicated by reference numeral 92 is generated.

  The signal sequence 92 is input to the steering delay circuit 94. The steering delay circuit 94 executes steering delay processing according to the frequency of the clock signal 95, that is, delay processing is performed on the input signal sequence based on the steering delay characteristic determined by the frequency of the clock signal 95. As a result, it is possible to obtain a signal string having an array that is inclined and curved in the oblique direction as indicated by reference numeral 96. When such a signal train is supplied to the array transducer, a focus point is formed at a predetermined depth on a certain deflected beam direction.

  Of course, the circuit configuration shown in FIG. 5 can be used for transmission or reception, and the frequency of the clock signal may be dynamically deflected during reception dynamic focus during reception. The same applies to the configuration shown in FIG. 6 or other drawings.

  In FIG. 6, as described above, the steering delay circuit 94 is provided in the front stage, and the focus delay circuit 90 is provided in the rear stage. When a plurality of transmission triggers are input to the steering delay circuit 94 at the same timing, the steering delay circuit 94 executes steering delay processing based on the frequency of the clock signal 95 input thereto, that is, the frequency of the clock signal 95 is increased. Delay processing for each signal is performed in accordance with the steering delay characteristic based on it. As a result, as shown by reference numeral 98, a signal string arranged linearly in an oblique direction is formed.

  Such a signal sequence 98 is input to the focus delay circuit 90. The focus delay circuit 90 performs focus delay processing based on the frequency of the clock signal 91 input thereto, that is, performs delay processing on each signal according to the focus delay characteristic based on the frequency of the clock signal 91. . As a result, as indicated by reference numeral 16, the signal sequence 98 arranged in the oblique direction is converted into a signal sequence 96 having an obliquely arranged arrangement. The signal train 96 shown in FIG. 6 has the same shape as the signal train 96 shown in FIG. That is, under the same operating conditions, the processing results are the same even if the front-rear relationship of the steering delay circuit 94 and the focus delay circuit 90 is switched. Therefore, it is desirable to determine the context between them according to various circumstances such as device design convenience or the necessity of simultaneous reception in multiple directions.

  FIG. 7 shows a specific configuration example of the focus delay circuit 30 shown in FIG. Here, the number of delay devices described below is an example, and more delay devices are actually used. Incidentally, the same configuration is adopted for the focus delay circuit 50 shown in FIG.

  In FIG. 7, the focus delay circuit 30 has a fixed delay array 100. The fixed delay array 100 is constituted by a plurality of delay elements 101 arranged in the direction in which the vibration elements are arranged, that is, in the i direction in FIG. For example, the same number of delay devices 101 as the number of transmission signals are provided. Each delay device 101 includes one or a plurality of latch circuits 104 arranged in the time axis direction, that is, in the j direction in FIG. 7, and the delay device 101 corresponds to a latch train. Each latch circuit 104 transfers input data to the next latch circuit every clock pulse in synchronization with the clock signal 106. Reference numeral 102 denotes the center in the i direction in the fixed delay array 100, and the number of latch circuits 104 constituting the delay device 101 is gradually increased from both in the + i direction and the -i direction. The change in the number corresponds to an arc, a hyperbola, a parabolic shape, or the like.

  As described above, the fixed delay array 100 is constituted by a large number of latch circuits 104, and the clock signals 106 defining the operation are supplied in parallel to the respective latch circuits 104. Further, since the number of latch circuits 104 included in the delay device 101 is gradually increased from the center to the end of the fixed delay array 100, the relative delay amount (specific delay amount) is gradually increased from the center to the end. Has been. The minimum delay time exhibited by each latch circuit 104 depends on the period of the clock signal 106, that is, corresponds to the time of one pulse.

  Therefore, when the frequency of the clock signal 106 becomes extremely high, the unit delay time exhibited by each latch circuit 104 becomes extremely small, and therefore the curvature of the focus delay characteristic exhibited as the entire focus delay circuit 30 becomes gradual, If an extremely high frequency is selected, the focus delay characteristic can be made closer to a flat one.

  Incidentally, the clock signal supplied to each delay circuit can be varied in the range of several MHz to several GHz, for example. In the focus delay circuit 30 shown in FIG. 7, as described with reference to FIG. 1, a transmission trigger is supplied to each delay device 101 in parallel.

  Note that the circuit configuration example shown in FIG. 7 (and the next FIG. 8) is for explaining the operation principle of the delay circuit, and the actual delay circuit has more delay devices 101. Therefore, it is possible to form a smoother curve with respect to the focus delay characteristic.

  FIG. 8 shows a specific configuration example of the steering delay circuit 34 shown in FIG. The steering delay circuit 34 receives the signal sequence output from the focus delay circuit 30 shown in FIG. The steering delay circuit 34 includes a fixed delay array 108, an array inversion circuit 110, and a bypass circuit 112.

  The fixed delay array 108 has a plurality of delay elements 109 arranged in the x direction, and each delay element 109 has a number of latch circuits 114 corresponding to the positions in the i direction. As shown in FIG. 8, the number of latch circuits 114 included in each delay unit 109 increases (or decreases) linearly with respect to the i direction. A clock signal 116 is supplied to each latch circuit 114 in parallel. Each latch circuit 114 operates in synchronization with the clock signal 116, that is, the latch time of each latch circuit 114, that is, the delay time corresponds to one cycle of the clock signal 116.

  The array inversion circuit 110 is a circuit that horizontally inverts the arrangement of the signal sequence output from the fixed delay array 108. For example, in the first case, the signal output from the uppermost delay unit 109 in FIG. As shown in (a), it is outputted to the position as it is, and in the second case, it is outputted to the position of the opposite end as shown in (e). As a result, even if the fixed delay array 108 has a delay characteristic that is inclined only in one direction, a characteristic in the direction opposite to the inclination can be selectively obtained. That is, as shown in FIGS. 4C and 4D, the direction in which the ultrasonic beam is deflected can be freely reversed.

  The bypass circuit 112 receives the signal string output from the array inversion circuit 110 and the signal string input to the fixed delay array 108, and the bypass circuit 112 selectively selects the two input signal strings. Output to. The bypass circuit 112 normally selects the signal sequence output from the array inversion circuit 110. However, when the beam deflection angle becomes completely zero, the signal sequence input to the fixed delay array 108 is selected. Is output. That is, even if an extremely high-speed clock signal 116 is supplied to the fixed delay array 108, a delay time difference is inevitably generated at both ends thereof. It is impossible. Therefore, the bypass circuit 112 realizes operating conditions when no deflection is performed.

  9 and 10 show another configuration example of the focus delay circuit 30 (and 50) shown in FIG.

  In FIG. 9, the focus delay circuit 30 has a fixed delay array 120 including a plurality of fixed counters 123 arranged in the x direction. A common clock signal 124 is supplied to each fixed counter 123. The fixed count value of each fixed counter 123 is gradually increased from the center 122 of the fixed delay array 120 to both the + i direction and the −i direction. In order to conceptually indicate the size of the fixed count value included in each counter 123, the length of each fixed counter 123 in the j direction is associated with the fixed count value. Actually, each fixed counter 123 is configured by the same circuit. This also applies to the configuration shown in FIG.

  In each fixed counter 123, a transmission trigger is given as a start pulse, the count of the clock signal 124 is started from the input of the start pulse, and when the fixed count value of each fixed counter 123 matches the actual count value, An output signal is output from each fixed counter 123. Therefore, by changing the frequency of the clock signal 124, the delay time exhibited by each fixed counter 123 can be changed, and the curvature of the delay characteristic curve of the fixed delay array 120 as a whole can be changed to the frequency of the clock signal 124. Can be controlled by.

  Incidentally, the count value of each fixed counter 123 is basically fixedly set. For example, when a probe is exchanged, a new fixed count value is reloaded to each fixed counter 123. Alternatively, such reload may be performed when necessary.

  Since the fixed delay array 120 shown in FIG. 9 has a symmetric configuration from the center 122 in both the −i direction and the + i direction, it is possible to reduce the circuit scale by half using the symmetry. is there. Such an example is shown in FIG.

  In FIG. 10, the focus delay circuit 30 includes a fixed delay array 120A and a branch circuit 126. The fixed delay array 120A corresponds to the fixed delay array 120 shown in FIG. Output signals from the plurality of fixed counters 123 are input to the branch circuit 126, and each signal is branched into two. As a result, as in the circuit configuration example shown in FIG. 9, it is possible to obtain a signal sequence to which a symmetrical delay time is given from the center. The configuration example shown in FIG. 10 has the advantage that the circuit scale can be halved.

  FIG. 11 shows another configuration example of the steering delay circuit 34 (and 54, 60) shown in FIG. The steering delay circuit 34 includes a fixed delay array 129 including a plurality of fixed counters 130 arranged in the x direction. Similarly to the circuit configuration example shown in FIG. 8, the fixed count value of each fixed counter 130 is determined according to the position in the i direction, that is, the fixed count value increases linearly according to the position in the i direction ( Or reduced). The common clock signal 132 is supplied to each fixed counter 130 as in the configuration example shown in FIGS. Therefore, each fixed counter 130 starts counting the clock signal 132 when an input signal is input, and outputs a signal when the actual count value matches the set fixed count value. In FIG. 11, the arrangement inversion circuit and the bypass circuit shown in FIG. 8 are not shown.

  7 to 11, specific examples of the configuration of the transmission focus delay circuit 30 and the steering delay circuit 34 have been described. However, regarding these configuration examples, a reception focus delay circuit and a steering delay circuit may be used. Basically the same can be adopted. However, in the focus delay circuit for reception, it is desirable to dynamically vary the clock signal in order to realize reception dynamic focus.

  In the embodiment described above, one focus delay circuit and one steering circuit are provided for the entire array transducer 10, but the array transducer 10 is divided into a plurality of groups A as shown in FIG. , B, and delay circuits 136, 138-1, and 138-2 may be provided for each group.

  That is, in FIG. 12, reference numeral 135 denotes a focus delay unit or a steering delay unit for transmission or reception, and the delay unit corresponds to the fact that the array transducer 10 is divided into two groups A and B. 135 is also divided into two parts A and B. A delay circuit 136 is provided for the A group, and delay circuits 138-1 and 138-2 are provided for the B group. Here, on the premise of the focus delay unit, a single delay circuit 138-1 and 138-2 are configured for the B group existing on both sides of the A group, and a variable clock circuit 142 is provided for that. Yes. A variable clock circuit 140 is provided for the delay circuit 136. These variable clock circuits 140 and 142 are circuits that generate a clock signal, as in the above-described variable clock circuit, and are circuits that can freely change the frequency of the clock signal.

  According to the above circuit configuration example, for example, different delay characteristics (curves) can be set at the center and both ends of the array transducer, so that the focus is not so good only by changing the frequency of the clock signal. There is an advantage that the focus can be improved even in a deep range. In particular, when combined with variable aperture control, there is an advantage that a good focus can be formed from the vicinity of the array transducer 14 to a deep position.

  Next, another embodiment capable of forming a three-dimensional data capture space using a 2D array transducer will be described with reference to FIGS.

  FIG. 13 conceptually shows the principle of this embodiment. In this embodiment as well, as in the embodiment shown in FIG. 1, focus delay processing and steering delay processing are separated, and the operating conditions of each delay circuit are changed depending on the frequency of the clock signal. Further, in this embodiment, a delay circuit is provided for each of the x direction and the y direction, that is, a focus delay circuit 144x for the x direction, a focus delay circuit 144y for the y direction, and a steering delay circuit for the x direction. A steering delay circuit 158y for 158x and y direction is provided. Reference numerals 148, 154, 162, and 166 represent clock signals supplied to the respective delay circuits. The operation of each delay circuit will be described below.

  In (A), the focus delay circuit 144x for the x direction exhibits a delay characteristic for focusing only in the x direction, as conceptually indicated by reference numeral 150x. Therefore, when the transmission trigger 146 is input to the focus delay circuit 144x, the focus delay characteristic 150x for the x direction depending on the frequency of the clock signal 148 is exhibited, and as a result, focusing is virtually performed only in the x direction. Beam 152 is formed. Actually, the reference numeral 152 represents a signal sequence corresponding to the virtual beam.

  Next, as shown in (B), the focus delay circuit 144y for the y direction exhibits a focus delay characteristic 150y in the y direction depending on the frequency of the clock signal 154. As a result, the input signal sequence 152 is focused in the y direction, and as a result, a virtual beam focused in both the x direction and the y direction (actually, the beam is applied to the beam). Corresponding signal sequence) 156 is generated.

  Next, as shown in (C), the steering delay circuit 158x for the x direction exhibits the steering characteristic 160x for the x direction depending on the frequency of the clock signal 162. Therefore, the input signal train 156 is steered in the x direction, and as a result, the beam 156 focused in the 2x direction and the y direction is deflected in the x direction by the action of the steering delay circuit 158x, A virtual beam (actually a corresponding signal sequence) is indicated by reference numeral 164.

  Next, as shown in (D), the steering delay circuit 158y for y direction exhibits a steering delay characteristic 160y for the y direction depending on the frequency of the input clock signal 166. As a result, the virtual beam 164 is deflected in the y direction, and such a deflected virtual beam (actually a corresponding signal sequence) 168 is formed. When such a signal sequence is supplied to the 2D array transducer, a beam as indicated by reference numeral 168 is actually formed.

  The action shown in FIG. 13 can be realized both in the formation of the transmission beam and in the formation of the reception beam.

  FIG. 14 shows a modification of the principle shown in FIG. Here, the actions shown in (B) and (C) are the same as those shown in FIG. In (A), the focus delay circuit 170 has a concave delay characteristic 172 that is hemispherical or close to it, and the expansion or contraction of the delay characteristic 172 in the curvature or time ratio direction is determined by the frequency of the clock signal 174. It has been. Therefore, when the transmission trigger 146 is input to the focus delay circuit 170, a virtual beam (actually a corresponding signal string) 176 focused in both the x direction and the y direction according to the delay characteristic 172 is generated. It is formed.

  In the method shown in FIG. 13, independent focusing is performed in both the x direction and the y direction. However, the method shown in FIG. 14 has an advantage that both the x direction and the y direction can be focused together.

  FIG. 15 shows a main configuration of an ultrasonic diagnostic apparatus according to another embodiment. In this embodiment, the array transducer 10 is configured as a 2D array transducer, and a sparse 2D array transducer is actually used. The array transducer 10 includes a plurality of transmitting elements 180, a plurality of transmitting / receiving elements 182 and a plurality of receiving elements 184 that are two-dimensionally arranged.

  Reference numeral 186 represents an electronic circuit board. In this embodiment, the electronic circuit board 186 and the array transducer 10 are arranged in an ultrasonic probe. This will be described later with reference to FIG.

  On the electronic circuit board 186, a focus delay circuit set 118 and a steering delay circuit set 190 are provided. The focus delay circuit set 118 and the steering delay circuit set 190 are both configured as one semiconductor circuit.

  Specifically, the focus delay circuit set 118 includes a focus delay circuit for the x direction and a focus delay circuit for the y direction. Specifically, the steering delay circuit set 190 includes a steering delay circuit for the x direction and a steering delay circuit for the y direction. Corresponding to these delay circuits, a clock signal group 192 is supplied from the apparatus main body side. The clock signal group 192 includes a focus clock signal 196 in the y direction and a focus clock signal 198 in the y direction. , The steering clock signal 200 in the x direction and the steering clock signal 202 in the Y direction. Reference numeral 194 indicates a transmission trigger supplied from the apparatus main body side.

  Reference numeral 192 denotes a pulsar unit, and the pulsar unit 192 includes a plurality of pulsars 194. When the focus delay circuit set 188 outputs a signal sequence subjected to the focusing process in the x direction and the y direction, a steering delay process in the x direction and the y direction is performed on the signal sequence in the steering delay circuit set 190, A signal sequence that is a result of the processing is input to the pulsar unit 192, whereby a plurality of drive signals (transmission signals) are generated. These drive signals are supplied to a plurality of transmitting elements 180 and a plurality of shared elements 182.

  On the other hand, received signals from the plurality of transmitting / receiving elements 182 are input to an amplifier 198 via a circuit 196 as a separation circuit or a protection circuit, and an amplified signal 202 is generated there. The reception signals output from the plurality of reception elements 184 are amplified by the amplifier 198 to generate the reception signal 202. These received signals 202 are output as a received signal group 200 to the apparatus main body side.

  FIG. 16 conceptually shows a configuration example of the probe in this embodiment. The array transducer 10 is provided in the probe case 202. A backing 206 is provided on the back side of the array transducer 10, and a matching layer 208 is provided on the front side of the array transducer 10. An electronic circuit board 212 is provided behind the array vibrator 10, and a flexible cable 210 is provided between the electronic circuit board 212 and the array vibrator 10. An electronic circuit 214 is mounted on the electronic circuit board 212, and the electronic circuit 214 includes the focus delay circuit set 188 and the steering delay circuit set 190 described above. Reference numeral 204 denotes a probe cable.

  Therefore, according to the embodiment shown in FIGS. 15 and 16, a circuit corresponding to the transmission module can be accommodated in the probe, and on the other hand, only a small number of control signals are sent to the probe from the apparatus main body side. Since the number of signal lines that make up the probe cable can be reduced and the circuit scale of each delay circuit set can be made extremely small, the quantity in the probe can be reduced and the probe itself can be downsized. Can do.

  FIG. 17 shows a modification of the configuration example shown in FIG. The array transducer 10 is configured as a 2D array transducer, and the 2D array transducer is divided into a central portion 222 and a peripheral portion 220 each including a plurality of vibration elements.

  A first focus delay circuit set 228 is provided corresponding to the central portion 222, and a second focus delay circuit set 236 is provided corresponding to the peripheral portion 220. These focus delay circuit sets 228 and 236 are composed of a focus delay circuit in the x direction and a focus delay circuit in the y direction. Since the focus delay process can be performed independently for each of the central part 222 and the peripheral part 220, there is an advantage that the focusing of the ultrasonic beam can be improved.

  A variable clock circuit set 230 is connected to the first focus delay circuit set 228, and a variable clock circuit set 238 is connected to the second focus delay circuit set 236. With these variable clock circuit sets 230 and 238, focusing in the x direction and y direction can be controlled independently for the central portion 222 and the peripheral portion 220.

  A steering delay circuit set 232 is provided at the subsequent stage of the first focus delay circuit set 228 and the second focus delay circuit set 236. The steering delay circuit set 232 includes an x-direction steering delay circuit and a y-direction steering delay circuit. The steering delay circuit set 232 is connected to a variable clock circuit set 234 for supplying a clock signal in each of the x direction and the y direction. Incidentally, when a plurality of reception beams are formed simultaneously, a plurality of steering delay circuit sets 232 may be provided.

  Therefore, according to the circuit configuration example shown in FIG. 17, since a plurality of areas are set on the array transducer 10 and the focus delay process can be performed independently for each area, better focusing can be realized. There are advantages.

  In the configuration example shown in FIG. 18, the steering delay circuit 34 and the variable clock circuit 36 are the same as the circuit configuration shown in FIG. 1, but the focus delay circuit 250 has the same circuit configuration as the conventional one. That is, if the delay characteristic control based on the frequency of the clock signal can be realized for at least one delay circuit, the above-described advantages can be obtained.

  The focus delay circuit 250 includes a plurality of delay circuits 252 and an example of the circuit configuration is shown in FIG. The focus delay table 254 stores delay data corresponding to the focus number 256, and when the focus number 256 is designated, the corresponding delay data is output. On the other hand, the counter 260 is supplied with a clock signal having a fixed frequency from the clock generation circuit 262. When the start pulse 258 is input to the counter 260, the counter 260 starts counting the clock signal from the input timing. When the count value of the counter 260 matches the delay data output from the focus delay table 254, it is determined by the decoder 264, and as a result, an output signal is generated.

  On the other hand, in FIG. 20, the steering delay circuit 54 and the variable clock circuit 56 are the same as the circuit configuration example shown in FIG. 1, but the focus delay circuit 264 has the same configuration as the conventional one.

  The focus delay circuit 264 has a plurality of delay circuits 266, and a configuration example of each delay circuit 266 is shown in FIG. A write pulse 286 from the clock generation circuit 282 is input to the FIFO memory 280, and received data 267 is stored in the FIFO memory 280 in accordance with the write pulse 286. Incidentally, a clock signal for sampling is output from the clock generation circuit 282 to the A / D converter provided in the previous stage.

  The clock generation circuit 282 generates a count pulse 284 as a clock signal, and the count pulse 284 is output to the counter 274. The counter 274 counts the count pulse 284 from the timing when the start pulse 276 is input, and outputs the count value to the decoder 278. The focus delay table 270 stores delay data associated with the focus number. When the focus number 272 is designated, the delay data is output from the focus delay table 270. The decoder 278 outputs a read pulse 290 to the FIFO memory 280 when the delay data and the count value of the counter match. As a result, the reception data 292 is output from the FIFO memory 280 at the timing when the read pulse 290 is input. This makes it possible to realize reception dynamic focus.

  As described above, even if the conventional delay circuit and the delay circuit specific to this embodiment are combined, it is possible to obtain an advantage in circuit configuration as long as at least one delay circuit specific to this embodiment is employed. . That is, there is an advantage that the control can be simplified and the quantity can be reduced.

  Incidentally, with respect to the focus delay table 254 shown in FIG. 19 or the focus delay table 270 shown in FIG. 21, even if the beam is steered, if the focus condition is the same, only one focus delay data is stored. Therefore, it is not necessary to store an extremely large amount of delay data for each combination of steering and focus conditions as in the prior art. For example, assuming that the data capacity required for reception dynamic focus is BM bytes, in the conventional apparatus configuration example, when the number of beams is BN and the number of parallel receptions is PN, the capacity of the entire focus delay table is DM ×. BN × PNbyte. On the other hand, according to the present embodiment, it is possible to realize dynamic focus if there is a capacity of only DMbyte, and there is an advantage that the capacity of the table can be reduced to 1 / (BN × PN) of the prior art. In particular, when scanning an ultrasonic beam in a three-dimensional space, the number of beams reaches several thousand, so that delay data for focusing and beam deflection is separated as described above by separating the delay control for focusing and beam deflection. Or there exists an advantage that control conditions can be decreased very much.

  In addition, according to the present embodiment, the delay circuit has a specific delay amount function as a whole, and various delay characteristics (actual delay time characteristics) having different curvatures or slopes depending on the frequency of the clock signal based on the function. Therefore, there is no need for cumbersome control such as frequent rewriting of delay data as in the prior art, and extremely simple control can be realized, and the circuit configuration for that purpose can be extremely small. . As a result, there is an advantage that a rational system can be constructed by arranging a certain electronic circuit in the probe as shown in FIG. A receiving module may be arranged in the probe in addition to the transmitting module as necessary. Although the 1D array transducer and the 2D array transducer are used in the above embodiment, for example, the above embodiment can also be adopted when a 1.5D array transducer is used.

1 is a block diagram showing a preferred embodiment of an ultrasonic diagnostic apparatus according to the present invention. It is a figure for demonstrating the effect | action of a focus delay circuit. It is a figure for demonstrating the effect | action of a steering delay circuit. It is a figure for demonstrating the result by a focus delay process and a steering delay process. It is a figure which shows the structural example which provided the focus delay circuit in the front | former stage, and provided the steering delay circuit in the back | latter stage. It is a figure which shows the structural example which provided the steering delay circuit in the front | former stage, and provided the focus delay circuit in the back | latter stage. It is a figure which shows the structural example of a focus delay circuit. It is a figure which shows the structural example of a steering delay circuit. It is a figure which shows the other structural example of a focus delay circuit. FIG. 10 is a diagram illustrating a configuration example in which the circuit configuration illustrated in FIG. 9 is further simplified. It is a figure which shows the other structural example of a steering delay circuit. FIG. 5 is a diagram showing a configuration in which an array transducer is divided into a plurality of groups and a delay circuit is provided for each group. It is a figure for demonstrating the effect | action of each delay circuit in the case of scanning an ultrasonic beam two-dimensionally. It is a figure which shows the modification of the system shown in FIG. It is a block diagram which shows the principal part structure which concerns on other embodiment. It is a figure for demonstrating the probe containing an electronic circuit board. It is a figure for demonstrating the focus delay process and steering process with respect to 2D array vibrator | oscillator. It is a figure which shows an example of the combination of the delay circuit intrinsic | native to this embodiment, and the conventional delay circuit. It is a figure which shows the structural example of the delay circuit shown in FIG. It is a figure which shows the other example of the combination of the delay circuit intrinsic | native to this embodiment, and the conventional delay circuit. FIG. 21 is a diagram illustrating a configuration example of a delay circuit illustrated in FIG. 20.

Explanation of symbols

  10 array transducer, 12 transmission module, 14 reception module, 16 system control unit, 18 image processing unit, 20 display unit, 24 transmission focus delay unit, 26 transmission steering delay unit, 44 reception focus delay unit, 46 1 steering delay unit for reception, 48 second steering delay unit for reception.

Claims (16)

Including at least one delay unit for delaying a signal sequence including a plurality of input signals to form an ultrasonic beam;
The delay unit is
A delay circuit that is provided corresponding to the plurality of signals and includes a delay array including a plurality of delay units having a specific delay amount, delay processing the signal sequence, and outputting a delay signal sequence;
A means for generating a common clock signal supplied to the plurality of delay devices, and by changing the frequency of the clock signal, corresponding to the specific delay amount that each of the delay devices has. A variable clock circuit that determines the actual delay time;
Only including,
A specific delay amount function is configured by a plurality of specific delay amounts included in the plurality of delay units, and a fixed specific delay amount function is used even when switching transmission / reception conditions.
An ultrasonic diagnostic apparatus. The apparatus of claim 1.
Before specific delay amount has SL each delayer, an ultrasonic diagnostic apparatus characterized in that it is set according to the position on the delay device array. The apparatus of claim 1.
Each of the delay devices has a fixed configuration corresponding to the specific delay amount of the delay device. The apparatus of claim 1.
Each of the delay elements operates in synchronization with the clock signal,
The ultrasonic diagnostic apparatus characterized in that the operating speed of each delay device is uniformly changed by changing the frequency of the clock signal, and thereby the actual delay time characteristics of the entire delay device array expand and contract in the time axis direction . The apparatus of claim 4.
The delay unit is a circuit for focusing the ultrasonic beam,
The actual delay time characteristic is a curve or a curved surface,
2. The ultrasonic diagnostic apparatus according to claim 1, wherein the curve of the actual delay time characteristic is changed by changing the frequency of the clock signal. The apparatus of claim 4.
The delay unit is a circuit for steering the ultrasonic beam,
The actual delay time characteristic is a line or a plane,
The ultrasonic diagnostic apparatus, wherein a gradient of the actual delay time characteristic is changed by changing the frequency of the clock signal. The apparatus of claim 1.
A focus delay unit for focusing the ultrasonic beam and a steering delay unit for steering the ultrasonic beam are provided as the delay unit, and the delay units are in a serial relationship. Ultrasound diagnostic device. The apparatus of claim 1.
As the delay unit, an x-direction focus delay unit and a y-direction focus delay unit are provided, and the delay units are in a serial relationship. The apparatus of claim 1.
As the delay unit, an x-direction steering delay unit and a y-direction steering delay unit are provided, and the delay units are in a serial relationship. The apparatus of claim 1.
The ultrasonic diagnostic apparatus, wherein the delay unit is a circuit for forming a transmission beam. The apparatus of claim 1.
The ultrasonic diagnostic apparatus, wherein the delay unit is a circuit for forming a reception beam. The apparatus of claim 11.
An ultrasonic diagnostic apparatus comprising: a common focus delay unit; and a plurality of steering delay units arranged in parallel downstream of the common focus delay unit as the delay unit. The apparatus of claim 1.
The ultrasonic diagnostic apparatus according to claim 1, wherein the delay unit includes an array inversion circuit that is provided before or after the delay circuit and inverts the array of the signal sequence. The apparatus of claim 1.
The ultrasonic diagnostic apparatus according to claim 1, wherein the delay unit includes a bypass circuit that bypasses the signal sequence without passing the signal sequence through the delay circuit. The apparatus of claim 1.
The ultrasonic diagnostic apparatus, wherein the delay unit is disposed in an ultrasonic probe. The apparatus of claim 1.
Consists of a plurality of vibration elements that transmit and receive ultrasonic waves, and includes an array transducer divided into a plurality of subarrays,
An ultrasonic diagnostic apparatus, wherein the delay unit is provided for each of the subarrays.

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