JP4351071B2 - Ata/sata複合コントローラ - Google Patents

Ata/sata複合コントローラ Download PDF

Info

Publication number
JP4351071B2
JP4351071B2 JP2003582653A JP2003582653A JP4351071B2 JP 4351071 B2 JP4351071 B2 JP 4351071B2 JP 2003582653 A JP2003582653 A JP 2003582653A JP 2003582653 A JP2003582653 A JP 2003582653A JP 4351071 B2 JP4351071 B2 JP 4351071B2
Authority
JP
Japan
Prior art keywords
storage device
parallel
ata
data transfer
sata
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003582653A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006508413A5 (enExample
JP2006508413A (ja
Inventor
ドレッシェル ヘンリー
バース フランク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10214700A external-priority patent/DE10214700B4/de
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2006508413A publication Critical patent/JP2006508413A/ja
Publication of JP2006508413A5 publication Critical patent/JP2006508413A5/ja
Application granted granted Critical
Publication of JP4351071B2 publication Critical patent/JP4351071B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Information Transfer Systems (AREA)
JP2003582653A 2002-04-03 2003-02-28 Ata/sata複合コントローラ Expired - Fee Related JP4351071B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10214700A DE10214700B4 (de) 2002-04-03 2002-04-03 Kombinierter ATA/SATA-Controller als integrierter Schaltkreischip und dazugehöriges Verfahren zum Betreiben
US10/259,710 US6922738B2 (en) 2002-04-03 2002-09-27 ATA/SATA combined controller
PCT/US2003/006258 WO2003085535A2 (en) 2002-04-03 2003-02-28 Ata/sata combined controller

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008292828A Division JP2009070401A (ja) 2002-04-03 2008-11-14 Ata/sata複合コントローラ

Publications (3)

Publication Number Publication Date
JP2006508413A JP2006508413A (ja) 2006-03-09
JP2006508413A5 JP2006508413A5 (enExample) 2006-09-21
JP4351071B2 true JP4351071B2 (ja) 2009-10-28

Family

ID=28792813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003582653A Expired - Fee Related JP4351071B2 (ja) 2002-04-03 2003-02-28 Ata/sata複合コントローラ

Country Status (5)

Country Link
EP (1) EP1537473A2 (enExample)
JP (1) JP4351071B2 (enExample)
CN (1) CN1650276B (enExample)
AU (1) AU2003217839A1 (enExample)
WO (1) WO2003085535A2 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7836211B2 (en) 2003-01-21 2010-11-16 Emulex Design And Manufacturing Corporation Shared input/output load-store architecture
US7617333B2 (en) 2003-01-21 2009-11-10 Nextio Inc. Fibre channel controller shareable by a plurality of operating system domains within a load-store architecture
US7493416B2 (en) 2003-01-21 2009-02-17 Nextio Inc. Fibre channel controller shareable by a plurality of operating system domains within a load-store architecture
US8032659B2 (en) 2003-01-21 2011-10-04 Nextio Inc. Method and apparatus for a shared I/O network interface controller
US7457906B2 (en) 2003-01-21 2008-11-25 Nextio, Inc. Method and apparatus for shared I/O in a load/store fabric
US7953074B2 (en) 2003-01-21 2011-05-31 Emulex Design And Manufacturing Corporation Apparatus and method for port polarity initialization in a shared I/O device
US8346884B2 (en) 2003-01-21 2013-01-01 Nextio Inc. Method and apparatus for a shared I/O network interface controller
US7219183B2 (en) 2003-01-21 2007-05-15 Nextio, Inc. Switching apparatus and method for providing shared I/O within a load-store fabric
US7512717B2 (en) 2003-01-21 2009-03-31 Nextio Inc. Fibre channel controller shareable by a plurality of operating system domains within a load-store architecture
US7664909B2 (en) 2003-04-18 2010-02-16 Nextio, Inc. Method and apparatus for a shared I/O serial ATA controller
US7188209B2 (en) 2003-04-18 2007-03-06 Nextio, Inc. Apparatus and method for sharing I/O endpoints within a load store fabric by encapsulation of domain information in transaction layer packets
US7502370B2 (en) 2003-01-21 2009-03-10 Nextio Inc. Network controller for obtaining a plurality of network port identifiers in response to load-store transactions from a corresponding plurality of operating system domains within a load-store architecture
US7698483B2 (en) 2003-01-21 2010-04-13 Nextio, Inc. Switching apparatus and method for link initialization in a shared I/O environment
US7174413B2 (en) 2003-01-21 2007-02-06 Nextio Inc. Switching apparatus and method for providing shared I/O within a load-store fabric
US7046668B2 (en) 2003-01-21 2006-05-16 Pettey Christopher J Method and apparatus for shared I/O in a load/store fabric
US8102843B2 (en) 2003-01-21 2012-01-24 Emulex Design And Manufacturing Corporation Switching apparatus and method for providing shared I/O within a load-store fabric
US7103064B2 (en) 2003-01-21 2006-09-05 Nextio Inc. Method and apparatus for shared I/O in a load/store fabric
US7917658B2 (en) 2003-01-21 2011-03-29 Emulex Design And Manufacturing Corporation Switching apparatus and method for link initialization in a shared I/O environment
JP4634049B2 (ja) * 2004-02-04 2011-02-16 株式会社日立製作所 ディスクアレイ装置における異常通知制御
JP2005222429A (ja) * 2004-02-09 2005-08-18 Hitachi Ltd ディスクアレイ装置における異種ディスク装置の管理方法
KR100640588B1 (ko) * 2004-09-24 2006-11-01 삼성전자주식회사 Sata 인터페이스와 ata 인터페이스를 선택적으로사용하는 비휘발성 메모리 저장 장치
US7568056B2 (en) * 2005-03-28 2009-07-28 Nvidia Corporation Host bus adapter that interfaces with host computer bus to multiple types of storage devices
US7603514B2 (en) * 2005-03-31 2009-10-13 Intel Corporation Method and apparatus for concurrent and independent data transfer on host controllers
KR100718813B1 (ko) * 2005-08-19 2007-05-18 (주)콜로써스 시리얼 에이티에이 외장형 스토리지 장치의 메인보드와인터페이스 카드의 연결구조
JP2008085986A (ja) 2006-08-30 2008-04-10 Ricoh Co Ltd データ変換装置と電子装置とデータ変換方法
CN101311906B (zh) * 2007-05-22 2011-09-28 鸿富锦精密工业(深圳)有限公司 Sata接口测试装置及测试方法
US8225019B2 (en) * 2008-09-22 2012-07-17 Micron Technology, Inc. SATA mass storage device emulation on a PCIe interface

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4539564A (en) * 1982-08-04 1985-09-03 Smithson G Ronald Electronically controlled interconnection system
JPH04346123A (ja) 1991-05-23 1992-12-02 Fujitsu Ltd データ転送装置

Also Published As

Publication number Publication date
EP1537473A2 (en) 2005-06-08
WO2003085535A2 (en) 2003-10-16
CN1650276A (zh) 2005-08-03
CN1650276B (zh) 2010-05-05
JP2006508413A (ja) 2006-03-09
AU2003217839A8 (en) 2003-10-20
AU2003217839A1 (en) 2003-10-20
WO2003085535A3 (en) 2005-04-14

Similar Documents

Publication Publication Date Title
JP4351071B2 (ja) Ata/sata複合コントローラ
JP2009070401A (ja) Ata/sata複合コントローラ
JP5085334B2 (ja) Usb・otgコントローラ
US6038624A (en) Real-time hardware master/slave re-initialization
US7225290B2 (en) ATA and SATA compliant controller
EP2517113B1 (en) Memory management system offering direct as well as managed access to local storage memory
JP2006508413A5 (enExample)
CN116431534B (zh) 数据访问方法、交换机和存储介质
US7603514B2 (en) Method and apparatus for concurrent and independent data transfer on host controllers
EP3382567B1 (en) Multiple storage devices implemented using a common connector
CN115061958B (zh) 一种硬盘识别方法、识别系统、存储介质和计算机设备
CN113190084B (zh) 一种支持多种位宽硬盘的硬盘背板连接方法及装置
US6851007B1 (en) Multi-channel interface controller for enabling a host to interface with one or more host devices
US6105101A (en) 16 bit bios interrupt calls under 32 bit protected mode application
JP2003186818A (ja) 集積化大量記憶部を具備するシステム用集積化ドライブ制御器
CN101354634B (zh) Ata端口接多路sata端口存储设备系统及控制方法
KR101118558B1 (ko) Usb otg 제어기
US7418539B2 (en) System and method for utilizing an external computing device to access storage inside an inactive computing device
CN114297982A (zh) 一种基于uvm的spi总线验证方法及系统
KR20010063912A (ko) 마스터 및 슬레이브 기능 변환장치
US7146440B1 (en) DMA acknowledge signal for an IDE device
US20150348651A1 (en) Multiple access test architecture for memory storage devices
CN117331883A (zh) 自主可控的用于实现磁盘RAID功能的SoC芯片系统
US20050050238A1 (en) Computer system for dynamically accessing externally connecting storage devices
KR20050112980A (ko) 휴대용컴퓨터 및 그 제어방법

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060227

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060802

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080626

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080715

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20081015

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20081022

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081114

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090721

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090723

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees