JP4320378B2 - Manufacturing method of semiconductor substrate - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor substrate.

  Conventionally, a method of growing a group III nitride semiconductor crystal on a metal nitride as a base substrate has been proposed (for example, see Patent Document 1).

In the technique of Patent Document 1, a nitride material having a lattice constant matching a semiconductor layer stacked thereon is used as a base substrate to be prepared.
Japanese Patent Laid-Open No. 9-237938

  However, in the technique disclosed in Patent Document 1, it is necessary to prepare a metal nitride single crystal as a base substrate. For example, when a single crystal of CrZrN is prepared as a base substrate, since the base substrate itself is expensive, there is a risk that the manufacturing cost of a semiconductor substrate (crystal layer) to be grown thereon increases.

  The objective of this invention is providing the manufacturing method of the semiconductor substrate which can reduce the manufacturing cost of a semiconductor substrate.

  The method for manufacturing a semiconductor substrate according to the first aspect of the present invention includes a preparation step of preparing a base substrate formed of Cr, and a (111) surface of a chromium nitride layer by nitriding the (110) surface of the base substrate. And a nitriding step for forming the structure.

  The semiconductor substrate manufacturing method according to the second aspect of the present invention includes a group III nitride semiconductor crystal layer on the chromium nitride layer, in addition to the features of the semiconductor substrate manufacturing method according to the first aspect of the present invention. The method further includes a crystal layer growth step for growing the crystal.

  The method for manufacturing a semiconductor substrate according to the third aspect of the present invention includes etching the underlying substrate and the chromium nitride layer in addition to the characteristics of the method for manufacturing a semiconductor substrate according to the first aspect or the second aspect of the present invention. And a separation step of separating the group III nitride semiconductor crystal from the base substrate.

  According to the present invention, the manufacturing cost of a semiconductor substrate can be reduced.

  A method for manufacturing a semiconductor substrate according to an embodiment of the present invention will be described with reference to FIGS. In the following, GaN as a group III nitride semiconductor will be described as an example of the crystal layer, but the same applies to other group III nitride semiconductors. Examples of other group III nitride semiconductors include AlGaN, InGaN, and AlInGaN. As will be described later, considering that the crystal layer is used as a free-standing substrate and applied to a diode or the like, the group III nitride semiconductor used as the material of the crystal layer is preferably GaN.

  1 and 2 are process cross-sectional views illustrating a method for manufacturing a semiconductor substrate according to an embodiment of the present invention.

  In the step (preparation step) shown in FIG. 1A, a base substrate 10 is prepared. The base substrate 10 is formed of a single crystal of Cr. Alternatively, at least the upper surface 10a of the base substrate 10 is a single crystal surface. The upper surface 10a of the base substrate 10 is a (110) plane of Cr crystals. The crystal of Cr has a body-centered cubic structure.

  Here, since the base substrate 10 is Cr, the cost in the preparation process (cost for preparing the base substrate) is reduced as compared with the case where the base substrate is a metal nitride. The thickness of the base substrate 10 is preferably about 100 μm.

  In addition, since the process of forming the Cr layer can be omitted compared to the case where the base substrate is a sapphire substrate, the process can be simplified. In addition, since the upper surface 10a of the base substrate 10 is a (110) plane of Cr crystals, a chromium nitride layer 30 described later can be suitably (111) oriented with respect to the upper surface 10a of the base substrate 10. became.

  In addition, it is preferable that the purity of Cr is 3N or more (99.9% or more). Although it is desirable that the amount of impurities is small, a purity of about 3N is sufficient for Cr.

In the step (nitriding step) shown in FIG. 1B, the base substrate 10 is transferred to an apparatus for growing GaN crystals. And the surface vicinity of the base substrate 10 is heat-nitrided in the reducing gas atmosphere containing nitrogen. The reducing gas containing nitrogen is preferably ammonia or hydrazine. At that time, the heating temperature is preferably 1000 ° C. or higher and 1300 ° C. or lower, more preferably 1040 ° C. or higher and 1300 ° C. or lower, further preferably 1060 ° C. or higher and 1300 ° C. or lower. By nitriding at a heating temperature of 1000 ° C. or higher and 1300 ° C. or lower, the (110) plane of the base substrate 10 is nitrided, and the chromium nitride layer 30 is formed. By nitriding at a heating temperature of 1040 ° C. or higher and 1300 ° C. or lower, the pit density on the surface 50a of the crystal layer 50 described later is reduced to a level of 10 ² to 10 ⁴ / cm ² . By nitriding at a heating temperature of 1060 ° C. or higher and 1300 ° C. or lower, the pit density on the surface 50a of the crystal layer 50 described later is reduced to a few / cm ² level. Nitriding at a heating temperature of 1300 ° C. or higher is not preferable because the chromium nitride layer 30 may be melted.

  Here, the total cost of the cost of the preparation process and the cost of the nitriding process is smaller than the cost of the base substrate preparing the metal nitride.

  The composition of the chromium nitride layer 30 is preferably CrN. The upper surface 30a of the chromium nitride layer 30 is formed substantially flat over substantially the entire surface. The upper surface 30a of the chromium nitride layer 30 needs to be in a crystalline state so that the group III nitride can be stacked. For this reason, although the average layer thickness of the chromium nitride layer 30 is set suitably, it is preferable that it is a value within the range of 10 nm or more and 100 nm or less. Here, the average layer thickness of the chromium nitride layer 30 can be obtained by measuring irregularities with a cross-sectional TEM, and is 1 of the average layer thickness of the region (metal Cr) in the vicinity of the surface of the base substrate 10 before nitriding. It was confirmed to correspond to 5 times.

  When the average layer thickness of the chromium nitride layer 30 is less than 10 nm, there is a risk of being affected (reacted) by the base substrate (metal) when the group III nitride is laminated. When the average layer thickness of the chromium nitride layer 30 exceeds 100 nm, the cost of the chromium nitride layer 30 may increase.

  At least the upper surface 10a of the base substrate 10 is a (110) plane of Cr crystals. That is, the lattice interval of the chromium nitride layer 30 (interval of black circles in the equilateral triangle portion shown in FIG. 3) is different from the lattice interval of the base substrate (metal Cr) 10 (interval of white circles shown in FIG. 3). Thereby, atoms (black circles shown in FIG. 3) constituting the chromium nitride are stably present at positions between Cr lattices (white circles shown in FIG. 3). Thereby, the chromium nitride layer 30 is in a state in which the pattern of the crystal lattice indicated by the black circles is repeatedly arranged, and is preferably (111) oriented with respect to the upper surface 10a of the base substrate 10. When the upper surface 30a of the chromium nitride layer 30 is (111) oriented, lattice mismatch (lattice mismatch) with a group III nitride (a buffer layer 40 and a crystal layer 50 described later) grown on the upper surface 30a is reduced. Group III nitrides can be stacked with good crystallinity.

  Note that since the lattice mismatch (lattice mismatch) between the group III nitride and Cr is large, the group III nitride is in a state of good crystallinity on the Cr (110) surface (the upper surface 10a of the base substrate 10). It is difficult to stack (buffer layer 40 and crystal layer 50).

  Further, the (111) plane that is the upper surface 30a of the chromium nitride layer 30 may be slightly inclined from the horizontal direction of the plane (direction parallel to the (111) plane). Thereby, the apparent interstitial distance (distance between the lattices when viewed from the direction perpendicular to the inclined surface) can be adjusted. For example, an inclined surface can be formed as the upper surface by polishing or cutting the chromium nitride layer 30. The inclination angle of the inclined surface may be about several degrees with respect to the direction parallel to the (111) plane. The inclined plane can reduce the apparent lattice mismatch (lattice mismatch) between the chromium nitride layer 30 and the group III nitride, and thus the group III nitride layer stacked on the chromium nitride layer 30. Has extremely few dislocations and the like. The direction of inclination of the inclined surface is not limited to one direction, and may include a plurality of directions.

  Alternatively, such an inclined surface may be formed on the upper surface 10 a of the base substrate (metal Cr) 10. However, if the inclination angle of the inclined surface is too large, the (111) surface of the chromium nitride cannot be generated, so it is necessary to set the value within a range in which the (111) surface of the chromium nitride can be formed. By nitriding the vicinity of the surface of the inclined surface, the upper surface of the chromium nitride layer is similarly inclined.

  Next, in the step shown in FIG. 2A, the base substrate temperature is lowered to 900 ° C., and the GaN buffer layer 40 is formed by the HVPE method. The film thickness of the buffer layer 40 is about 10 μm, for example.

  Here, the buffer layer 40 is formed on the upper surface 30 a ((111) plane) of the (111) -oriented chromium nitride layer 30. That is, since the upper surface 30a of the chromium nitride layer 30 is (111) oriented, lattice mismatch (lattice mismatch) with the buffer layer 40 grown thereon is reduced. Thereby, the buffer layer 40 can be laminated | stacked in a state with favorable crystallinity. That is, dislocations due to lattice mismatch are reduced in the buffer layer 40.

  In the step shown in FIG. 2B, the temperature of the base substrate is raised to 1040 ° C., and the GaN crystal layer 50 is grown. The film thickness of the crystal layer 50 during growth is, for example, about 10 μm.

  Since the crystal layer 50 is grown on the buffer layer 40 having good crystallinity as described above, the crystallinity of the crystal layer 50 is also good. That is, dislocations due to lattice mismatch are reduced in the crystal layer 50.

  In the step shown in FIG. 2C, the chromium nitride layer 30 is selectively etched using a chemical solution. At this time, the base substrate 10 may also be etched at the same time. The GaN substrate SB can be separated from the base substrate 10. That is, the GaN substrate SB can be obtained as a free-standing substrate. Here, the substrate SB includes the buffer layer 40 and the crystal layer 50.

  As described above, since the substrate SB is manufactured using the metal Cr as the base substrate, compared with the case where the metal nitride is used as the base substrate, the cost for obtaining the metal nitride (in the present invention, the preparation step and The cost of the nitriding step can be reduced. Thereby, the manufacturing cost of the semiconductor substrate (GaN substrate SB) can be reduced.

  Since the base substrate is made of metal (Cr), a desired pattern, unevenness, or the like can be set in advance on the surface in addition to the above description, and a freely designed semiconductor substrate can be manufactured.

Process sectional drawing which shows the manufacturing method of the semiconductor substrate which concerns on embodiment of this invention. Process sectional drawing which shows the manufacturing method of the semiconductor substrate which concerns on embodiment of this invention. The figure which shows the crystal orientation of a chromium nitride layer.

Explanation of symbols

10 Substrate 20 Cr layer 30 Chromium nitride layer 40 Buffer layer 50 Crystal layer

Claims (1)

A preparation step of preparing a base substrate formed of Cr;
A nitriding step of nitriding the (110) surface of the base substrate to form a (111) surface of a chromium nitride layer;
A crystal layer growth step of growing a group III nitride semiconductor crystal layer on the chromium nitride layer;
A separation step of etching the base substrate and the chromium nitride layer to separate the group III nitride semiconductor crystal from the base substrate;
A method for manufacturing a semiconductor substrate, comprising:

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