JP4316264B2 - Adhesive tape - Google Patents

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Publication number
JP4316264B2
JP4316264B2 JP2003068574A JP2003068574A JP4316264B2 JP 4316264 B2 JP4316264 B2 JP 4316264B2 JP 2003068574 A JP2003068574 A JP 2003068574A JP 2003068574 A JP2003068574 A JP 2003068574A JP 4316264 B2 JP4316264 B2 JP 4316264B2
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adhesive
base film
surface treatment
dicing
adhesive tape
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JP2004281561A (en
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智幸 青垣
義久 加納
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THE FURUKAW ELECTRIC CO., LTD.
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THE FURUKAW ELECTRIC CO., LTD.
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    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Dicing (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、基材フィルムの少なくとも片面に粘着剤層を設け、粘着剤層側に通常のセパレータを設けてなる粘接着テープに用いられる基材フィルムに関するものである。さらに詳しくはシリコンウェハ等の半導体装置を製造するにあたりウェハ等を固定し、ダイシングし、さらにリードフレームや半導体チップと重ね合わせるための接着工程に使用される半導体ウェハ用ダイシング−ダイボンド用粘接着テープに関するものである。
【０００２】
【従来の技術】
ＩＣなどの半導体装置の組立工程において、ウェハ等を固定し、ダイシングし、さらにリードフレームや半導体チップと重ね合わせるための接着工程に使用される、粘接着材層と基材フィルム層が剥離可能に構成される熱硬化性半導体ウェハ用ダイシング−ダイボンド用粘接着テープ（以下、ダイシング−ダイボンド用粘接着テープという）が種々提案されている（例えば、特許文献１及び２）。
上記特許文献に開示されている粘接着テープは、ダイシング後、チップ裏面に粘接着剤層を貼りつけた状態で基材フィルムから剥離し、リードフレーム等に接着した後加熱などにより硬化接着させるものであるため、粘接着剤層と基材フィルムとの間は剥離容易に積層されている。
一方、一般的に通常の粘着テープに用いられる基材フィルムは、粘着剤層の密着性を良好なものとするために、表面処理が行われている。具体的にはコロナ放電、低圧水銀灯等を用いた表面処理装置を利用し、照射されるエネルギーによって生成されるオゾンにより基材表面を酸化させて基材フィルムの表面改質を行うか、もしくは基材フィルム表面にプライマーと呼ばれる粘接着層との密着性を強固にするための材料を塗布する。
しかし、上記特許文献に記載されているダイシング−ダイボンド用粘接着テープはウェハ貼合部分となる粘接着剤層を基材フィルムから剥離容易とするためにこの表面改質を行わないのが特徴である。
【０００３】
そのため、ダイシング時にウェハの固定用として繰り返し用いられる治具（例えばダイシングフレーム）への粘接着剤層の粘接着剤の転着（粘接着剤の一部又は全部が被着体から完全に剥離せず被着体に残ることをいう）が発生する問題がある。また、粘接着剤の転着を防止するための対策として、転着防止を目的とした別の粘着テープを所定の形状に加工して貼り合わせる等の方法が挙げられるが、原料費、加工費ともにコストのかかるものであった。
【０００４】
【特許文献１】
特開平２−３２１８１号公報
【特許文献２】
特開平８−５３６５５号公報
【０００５】
【発明が解決しようとする課題】
したがって本発明は、ダイシングフレームを貼合する部分において、ダイシングフレームへの粘転着剤の転着がなく、かつ、ウェハ貼合部分においてチップの剥離時に、粘接着剤層と基材フイルム界面で剥離性が優れる、粘接着テープを提供することを目的とする。
【０００６】
【課題を解決するための手段】
上記問題を解決するために鋭意検討した結果、ウェハ貼合部分とダイシングフレーム貼合部分において、基材フィルムの表面処理を異なる条件とすることにより、ウェハ貼合部分についてはチップの剥離時に粘接着剤層と基材フィルム界面で剥離でき、かつダイシングフレーム部分では粘接着層とダイシングフレーム界面で剥離可能である粘接着テープを同一の粘接着剤層で構成することが可能であることを見出し、この知見に基づき本発明をなすに至った。
すなわち本発明は、
（１）基材フィルムの少なくとも片面に粘接着剤層を設け、粘接着剤層側にセパレータを設けてなる、半導体装置を製造する接着工程に使用される半導体ウェハダイシング−ダイボンド用粘接着テープであって、該粘接着剤は単一の層を構成しており、かつ粘接着剤を塗布する前に基材フィルムに表面処理を施してある部分と表面処理を施してない部分を設けることによりあらかじめ粘接着剤層と基材フィルムとの間の密着性の異なる部分を設けておき、その後粘接着剤を塗布してなり、ダイシング時にウェハが貼合される基材フィルムで表面処理を施していない部分では、ウェハ切断後のチップ剥離時に粘接着剤層と基材フィルムとの界面で剥離でき、ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分では、ダイシングフレーム剥離時に粘接着剤層とダイシングフレームとの界面で剥離可能としたことを特徴とする粘接着テープ、
（２）前記表面処理がコロナ処理、低圧水銀灯を用いた表面処理またはプライマー塗布による処理であることを特徴とする（１）項記載の粘接着テープ、
（３）（１）または（２）項に記載の粘接着テープにおいて、基材フィルムに表面処理を施してある部分と表面処理を施してない部分の代わりに、基材フィルムに表面処理を強く行った部分と表面処理を弱く行った部分をそれぞれ設けたことを特徴とする粘接着テープ、
（４）基材フィルムの少なくとも片面に粘接着剤層を設け、粘接着剤層側にセパレータを設けてなる、半導体装置を製造する接着工程に使用される半導体ウェハダイシング−ダイボンド用粘接着テープにおいて、該粘接着剤は単一の層を構成しており、該粘接着テープに使用される基材フィルムの粘接着剤と接する表面に基材フィルムの長さ方向に対し表面処理を施してある部分と、部分的かつ断続的に基材フィルムに表面処理を施していない部分を設け、ダイシング時にウェハが貼合される基材フィルムに表面処理を施していない部分では、ウェハ切断後のチップ剥離時に粘接着剤層と基材フィルムとの界面で剥離でき、ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分では、ダイシングフレーム剥離時に粘接着剤層とダイシングフレームとの界面で剥離可能としたことを特徴とする粘接着テープ、
（５）ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分と表面処理を施していない部分との境界である非表面処理部の外周の直径より、リング状のダイシングフレームの内径が大きく、ダイシングフレームの内側で、かつウェハの外側にも基材フィルムに表面処理を施してある部分が存在することを特徴とする（４）項記載の粘接着テープ、
（６）（４）または（５）項に記載の粘接着テープにおいて、基材フィルムに表面処理を施してある部分と表面処理を施してない部分の代わりに、基材フィルムに表面処理を強く行った部分と表面処理を弱く行った部分をそれぞれ設けたことを特徴とする粘接着テープ、および
（７）前記粘接着剤の破壊エネルギーが１００００Ｎ／ｍ以上であることを特徴とする（４）〜（６）のいずれか１項に記載の粘接着テープ
を提供するものである。
本発明で半導体装置とは、ＩＣ等、半導体チップをリードフレーム等の支持部材に接着し、樹脂封止したものなどをいう。
【０００７】
【発明の実施の形態】
本発明は、粘接着テープにおいて、粘接着剤を塗布する前に基材フィルムにあらかじめ粘接着剤層と基材フィルムとの間の密着性の異なる（表面処理の有無や、処理の程度などによる）部分を設けておき、その後粘接着剤層を塗布することで、ウェハ貼合部分については剥離時に前記テープの粘接着剤層と基材フィルムとの界面で剥離でき、かつダイシングフレーム部分では粘接着層とダイシングフレームとの界面で剥離可能とする粘接着テープ及びその製造方法に関するものである。
本発明は、粘接着テープに用いる基材フィルムの表面エネルギーを、ウェハを貼合する部分とダイシングフレームを貼合する部分で異なるようにする。このように表面エネルギーの異なるものとすることにより、ウェハ貼合部分では粘接着剤層と基材フィルムの界面で剥離可能であり、ダイシングフレーム貼合部分では粘接着剤層とダイシングフレームの界面での剥離が可能でかつダイシングフレームを汚染せず、作業性よく生産可能となる。
ここで表面エネルギーは表面と粘接着剤の接着性の尺度として用いる。表面エネルギーは、接着性を直接測定できるものではないが、粘着剤の分野においては表面エネルギーと接着性の関係は経験的に知られており、基材フィルムの表面エネルギーが低い程、粘接着性が低くなる。
【０００８】
本発明の具体的な実施の形態としては、粘接着テープに使用する基材フィルムにおいて、ウェハが貼合される部分の基材フィルム面を除いて粘接着剤層の密着性を付与する表面処理を施し、該基材フィルム上に粘接着剤層を形成することにより行われる。
図１にこのようにして得られた基材フィルム１の状態を示す。図中２が基材フィルム１上の非表面処理部、３は表面処理部である。３はウェハが貼合される部分を示し、４はダイシングフレームを貼合する部分（一点鎖線で示すリング状の部分）である。ダイシングフレームはＡのようにリング内側が表面処理部と非表面処理部の境界とぴったり一致していてもよいし、Ｂのように、リング内側の径が非表面処理部より大径で、表面処理部に乗っている態様でもよい。
一般に基材フィルムとして用いるポリエチレンなどのオレフィン系樹脂は、表面処理を施さない状態での表面エネルギーが約３０ｍＮ／ｍであり、粘接着剤層が容易に剥離できるものであるが、表面処理により５０ｍＮ／ｍ以上とすることが可能である。通常本発明においては基材フィルムに対し、表面処理していない場合に比べ、表面処理により表面エネルギーを１０mN／ｍ以上高くするのが好ましく、より好ましくは１５ｍＮ／ｍ〜２０ｍＮ／ｍだけ高くする。ダイシングフレームは、材質や表面処理により異なるが約４０ｍＮ／ｍであり、シリコンウェハは約６０ｍＮ／ｍであり、粘接着剤層は概ね４０〜８０ｍＮ／ｍである。表面エネルギーの評価としては、JIS K 6768:1999（プラスチック―フィルム及びシート―ぬれ張力試験方法）にて行うことができる。
【０００９】
一方、接着剤層と被着体との接着強さとしては、熱力学的接着仕事を求めることによりその指標とすることができる。熱力学的接着仕事Ｗａは下記の式で求められる。
Ｗａ＝２（γ1・γ２）0.5
（γ1：接着剤の表面エネルギー、γ２：被着体の表面エネルギー）
よって、基材フィルムに表面処理を施すことにより、基材フィルム／粘接着剤の熱力学的接着仕事がダイシングフレーム／粘接着剤の熱力学的接着仕事を上回るため、ダイシングフレームと粘接着剤の貼合面で剥離させることが可能となる。
【００１０】
図２に本発明のダイシング−ダイボンド粘接着テープの使用状態を断面図で模式的に示す。図中、１０がダイシング−ダイボンド用粘接着テープを示し、１１は図１に示すような、表面処理をしない部分を残した基材フィルム、１２は粘着剤層、１３はダイシングした半導体チップ群であり、前記の基材フィルム１１の非表面処理部に対応した位置に接着されている。１４はダイシング溝を示す。図中１５は、半導体チップ１３が下面に接着剤１２が付着して、基材フィルム１１から剥離してピック・アップされた半導体を示す。１６はダイシングフレームである。
【００１１】
本発明において、粘接着剤層と被着体の界面で剥離させるためには、粘接着剤の破壊エネルギーが、１００００Ｎ／ｍ以上であることが好ましく、１５０００Ｎ／ｍ以上であることがより好ましい。破壊エネルギーが低すぎると、剥離時に粘接着剤が凝集破壊してしまい、粘接着剤層の一部が被着体に残る場合があるからである。
この、粘接着剤の破壊エネルギーは、粘接着剤の引張試験（ＪＩＳ Ｚ０２３７−２０００）にて測定したデータを元に求めたものである。この方法において破断点まで伸張させたときに得られる曲線の積分値（曲線とベースラインに囲まれる面積に相当する）が粘接着剤の破壊エネルギーである。
また、基材フィルムの表面処理方法（易接着処理方法）としては、コロナ放電、低圧水銀灯等のエネルギー線を用いた表面処理装置を利用する方法が挙げられる。通常、基材フィルムの表面処理は、ロール状に巻かれたフィルムを一次元的に配置されたエネルギー線源に対して垂直方向に一定速度で繰り出して行うことで行われる。
【００１２】
本発明に用いられる基材フィルムへの表面処理法は、上記の方法を利用して行うことができるが、基材フィルムの特定の面がエネルギー線に曝されないように遮蔽物を設けることにより、表面処理を施さない部分を設ける方法によって行われる。
このような表面処理法としては、基材フィルムを部分的かつ基材フィルムの長さ方向に対して断続的に表面処理を施さない部分を設けることが可能であれば限定されるものではないが、具体例としては、基材フィルムを繰り出す速度と連動して遮蔽面積を変更可能な遮蔽物を設けてエネルギー線を遮蔽する方法や、基材フィルムを繰り出す速度と連動してエネルギー線が照射される面積を変更することにより行うこと等が挙げられる。
【００１３】
基材フィルムに表面処理がなされないように遮蔽する各部分の面積は、テープ加工時や貼合時のずれを考慮して、被着体であるシリコンウェハの外径より大きく、ダイシングフレームの切り抜き部分（内径）より小さくすることが好ましい。 なお、通常シリコンウェハ及びダイシングフレームの切抜き部分は円形であるが、表面処理の工程等簡略化等の理由により必ずしも円形である必要は無く、シリコンウェハに貼合する部分は上記の表面処理が施されておらず、ダイシングフレームに貼合する部分が表面処理されていれば、その形状、及び表面処理範囲は限定されない。
なお、基材フィルムの表面処理の有無については、目視で確認することができないので、例えば基材フィルム面に表面処理状態が確認できるようにマーキングを施すことができる。マーキング方法については、例えばインクジェットやレーザー等のマーキング装置を使用して、フィルムの繰り出しと遮蔽物の動きに連動して印字する方法などが挙げられる。このマーキングをもとに、シリコンウェハやダイシングフレームを所定の位置に貼合することが可能である。
【００１４】
なお本発明に用いる基材フィルムとして、表面を表面処理部と非表面処理部とに区分した例を示したが（図１参照）、表面処理してあっても、表面処理の程度により基材フィルム上に粘接着剤に対する密着性が他の部分より十分に低い部分が形成されていればよい。したがって２種類の表面処理部があり、両者の間の粘接着剤に対する密着性が異なるという態様でもよい。
本発明に用いられる基材フィルムとしては、公知のものを使用することができるが、カルボキシル基、水酸基等の極性基を有していないものが好適に用いられる。例えば、ポリエチレン、ポリプロピレン、エチレン−プロピレン共重合体、ポリブテンなどのα−オレフィンの単独重合体または共重合体、スチレン−エチレン−ブテンもしくはペンテン系共重合体等の熱可塑性エラストマーが挙げられ、これらの群から選ばれる2種以上が混合されたものもしくは複層化されたものでもよい。なお、複層で用いる場合には粘接着剤層と接触する部分が上記の樹脂から選ばれるものであればその他の層は上記樹脂に限定されるものではなく、上記樹脂とのアクリル酸共重合体やアイオノマー等極性基を有する樹脂、あるいはポリエチレンテレフタレート、ポリイミド、ポリカーボネート、ポリメタクリル酸メチル等のエンジニアリングプラスチック、またはポリウレタン、等を用いることができる。
基材フィルムの厚みは特に制限はないが、５０〜２００μｍが好ましく用いられる。
【００１５】
また、本発明に用いる粘接着剤については、
（１）エチルアクリレート、ブチルアクリレート、２−エチルヘキシルアクリレート、ラウリルアクリレートから１種類もしくは複数種と、アクリル酸もしくはメタクリル酸、２−ヒドロキシエチルアクリレートを主成分とした共重合体と、エチルアクリレート、ブチルアクリレート、２−エチルヘキシルアクリレート、ラウリルアクリレートから１種類もしくは複数種と、グリシジルメタクリレート、２−ヒドロキシエチルアクリレートを主成分とした共重合体の混合物もしくはそれらの架橋物
（２）エチルアクリレート、ブチルアクリレート、２−エチルヘキシルアクリレート、ラウリルアクリレートから１種類もしくは複数種と、アクリル酸、もしくはメタクリル酸、２−ヒドロキシエチルアクリレートを主成分とした共重合体と、エポキシ樹脂の混合物
など公知の粘接着剤が挙げられるが、上に挙げられる例に限定されるものではなが、前述のとおり粘接着剤の破壊エネルギーが１００００Ｎ／ｍ以上であることが好ましい。
粘接着剤層の乾燥時の厚さはチップのサイズ、チップの積層枚数などによって異なるが、好ましくは２〜５０μｍ、より好ましくは５〜３０μｍである。
【００１６】
また、放射線硬化性粘着剤を紫外線照射によって硬化させる場合には必要に応じて、光重合開始剤、例えばイソプロピルベンゾインエーテル、イソブチルベンゾインエーテル、ベンゾフェノン、ミヒラーズケトン、クロロチオキサントン、ドデシルチオキサントン、ジメチルチオキサントン、ジエチルチオキサントン、ベンジルジメチルケタール、α-ヒドロキシシクロヘキシルフェニルケトン、2-ヒドロキシメチルフェニルプロパン等を使用することができる。これら光重合開始剤の配合量はアクリル系共重合体１００重量部に対して０．０１〜５重量部が好ましい。
上記粘接着剤には、ダイボンド後の導電性、熱伝導性の付与を目的として金属製微粉末やその他導電性もしくは熱伝導性に優れる材料を添加することも可能である。
また、上記粘接着剤には、熱安定性向上を目的として金属酸化物やガラス等の微粉末を添加することも可能である。
【００１７】
本発明のダイシング−ダイボンド用粘接着テープは、ウェハ等を固定し、ダイシングし、さらにリードフレームや半導体チップと重ね合わせるための接着工程に使用される。
【００１８】
【実施例】
次に、本発明を実施例に基づき、更に詳細に説明する。尚、以下の各例中での特性は、次のように試験した。
（イ）粘接着剤の剥離性評価
後記の実施例及び比較例の粘接着テープ（２５０ｍｍ×３００ｍｍ）をダイシングフレーム（ディスコ製ＤＴＦ２−６−１）及び６インチシリコンウェハ＃２０００研磨面に貼合し、テープを２５ｍｍ幅に切断し、1時間放置後紫外線を照射した後、シリコンウェハ貼合面、ダイシングフレーム貼合面それぞれの剥離力を測定した。
なお、剥離力は剥離角度９０゜、剥離速度５０ｍｍ／ｍｉｎにて行った。紫外線照射量は高圧水銀灯で２００ｍＪ／ｃｍ２とした。
また、粘接着剤の被着体への転着の有無を目視にて確認した。
【００１９】
評価基準は次のとおりである。
（対シリコンウェハ面）
シリコンウェハに粘接着層剤が転写されたもの・・・・・・・○
シリコンウェハに粘接着層剤が転写されないもの・・・・・・×
（対ダイシングフレーム面）
ダイシングフレームに粘接着剤の糊残りがあったもの・・・×
ダイシングフレームに念接着剤の糊残りが無いもの・・・・○
（ロ）粘接着剤層の破壊エネルギー
粘接着剤層を基材フィルムから剥がし、２５ｍｍ幅×１００μｍ厚さ×１５０ｍｍ長さに加工し、高圧水銀灯で２００ｍＪ／ｃｍ２照射したサンプルについて、引張速度３００ｍｍ／ｍｉｎにて引張試験を行い、破壊エネルギーを測定した。
【００２０】
参考例１
（粘接着剤の調製）
粘接着剤１
エチルアクリレート、メタクリル酸、２−ヒドロキシエチルアクリレートがモル比で８０：５：１５からなる重量平均分子量２３万のアクリル系共重合体に２−イソシアネートエチルメタクリレートを２−ヒドロキシエチルアクリレートに対してモル比で６０％付加反応させた紫外線硬化性アクリル系共重合体１００重量部とエチルアクリレート、グリシジルメタクリレート、２−ヒドロキシエチルアクリレートがモル比で８０：１０：１０からなる重量平均分子量１４万のアクリル系共重合体に２−イソシアネートエチルメタクリレートを２−ヒドロキシエチルアクリレートに対してモル比で６０％付加反応させた紫外線硬化性アクリル系共重合体１００重量部を混合し、アクリル系粘接着剤を得た。この粘接着剤の破壊エネルギーは２２１５３Ｎ／ｍであった。
粘接着剤２
粘接着剤１のアクリル系粘接着剤１００質量部とエポキシ樹脂としてビスフェノールＡ型エポキシ樹脂（ジャパンエポキシレジン（株）製エピコート１００２）３００質量部を混合して粘接着剤を得た。この粘接着剤の破壊エネルギーは７４４０Ｎ／ｍであった。
【００２１】
参考例２
（基材フィルムの調製）
基材フィルム１
厚さ１００μｍの高密度ポリエチレン製基材フィルム（表面エネルギー３０ｍＮ／ｍ、２５０ｍｍ×３００ｍｍ）に直径１７０ｍｍ（6インチウェハを想定）のコロナ処理を施こされていない部分を設けるようにコロナ処理を行い作成した。このもののコロナ処理部の表面エネルギーは４５ｍＮ／ｍであった。
基材フィルム２
厚さ１００μｍの高密度ポリエチレン製基材フィルム（２５０ｍｍ×３００ｍｍ）全面にコロナ処理を施し表面エネルギー４５ｍＮ／ｍのフィルムを作成した。
基材フィルム３
基材フィルム１で用いた厚さ１００μｍの高密度ポリエチレン製基材フィルム（２５０ｍｍ×３００ｍｍ）にコロナ処理を施さず作成した。
【００２２】
実施例１
基材フィルム１に粘接着剤１を乾燥時の厚さ２０μｍになるよう塗工して粘接着テープを得た。
実施例２
基材フィルム１に粘接着剤２を乾燥時の厚さが２０μｍになるよう塗工して粘接着テープを得た。
比較例１
基材フィルム２に粘接着剤１を乾燥時の厚さ２０μｍになるよう塗工して粘接着テープを得た。
比較例２
基材フィルム２に粘接着剤２を乾燥時の厚さ２０μｍになるよう塗工して粘接着テープを得た。
比較例３
基材フィルム３に粘接着剤１を乾燥時の厚さ２０μｍになるよう塗工して粘接着テープを得た。
比較例４
基材フィルム３に粘接着剤２を乾燥時の厚さ２０μｍになるよう塗工して粘接着テープを得た。
前記の方法で各粘接着テープを試験し、その結果を下記表１に示した。
【００２３】
【表１】

Figure 0004316264
【００２４】
上記表１の結果より明らかなように、実施例はフラットフレームに粘接着剤の転着がなく剥離でき、シリコンウェハに転着させることができたが、比較例はフレーム、シリコンウェハともに転着したり、糊残りが見られ良好な結果を得ることができなかった。
【００２５】
【発明の効果】
本発明のダイシング−ダイボンド用粘接着テープは、ダイシングの際にはダイシングテープとして使用でき、マウントの際には接着剤として使用できるダイシング−ダイボンド用粘接着テープであって、ダイシングフレームを貼合する部分に転着防止層を設ける必要が無く、ピック・アップ時にはチップ裏面に粘接着剤層を転着して剥離できる。また本発明によれば、ダイシングフレームに粘接着剤が貼着しないテープを作業性良く提供することが可能となる。
【図面の簡単な説明】
【図１】本発明に用いられる基材フィルムの好ましい態様を示す斜視図である。
【図２】本発明の粘接着テープの使用状態を示す模式的断面図である。
【符号の説明】
１ 基材フィルム
２ 非表面処理部
３ 表面処理部
４ ダイシングフレーム貼合部
１０ ダイシング−ダイボンド用粘接着テープ
１１ 基材フィルム
１２ 粘接着剤層
１３ 半導体チップ
１４ ダイシング溝
１５ 半導体チップ＋粘接着剤層
１６ ダイシングフレーム[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a base film used for an adhesive tape in which a pressure-sensitive adhesive layer is provided on at least one side of a base film, and a normal separator is provided on the pressure-sensitive adhesive layer side. More specifically, in manufacturing a semiconductor device such as a silicon wafer, the wafer is fixed, diced, and further used in an adhering process for overlapping with a lead frame or a semiconductor chip. It is about.
[0002]
[Prior art]
In the assembly process of semiconductor devices such as ICs, the adhesive layer and base film layer can be peeled off, which is used in the bonding process for fixing wafers, dicing, and stacking with lead frames and semiconductor chips. Various thermosetting semiconductor wafer dicing-die bonding adhesive tapes (hereinafter referred to as dicing-die bonding adhesive tapes) have been proposed (for example, Patent Documents 1 and 2).
The adhesive tape disclosed in the above patent document is peeled off from the base film with the adhesive layer attached to the back of the chip after dicing, bonded to a lead frame, etc., and then cured by heating. Therefore, the adhesive layer and the base film are easily peeled and laminated.
On the other hand, a base film generally used for a normal pressure-sensitive adhesive tape is subjected to a surface treatment in order to improve the adhesiveness of the pressure-sensitive adhesive layer. Specifically, a surface treatment apparatus using a corona discharge, a low-pressure mercury lamp, or the like is used to oxidize the substrate surface by ozone generated by the irradiated energy to modify the surface of the substrate film, or A material for strengthening the adhesion with the adhesive layer called a primer is applied to the surface of the material film.
However, the dicing-die-bonding adhesive tape described in the above-mentioned patent document does not perform this surface modification in order to easily peel the adhesive layer that becomes the wafer bonding part from the base film. It is a feature.
[0003]
Therefore, transfer of the adhesive of the adhesive layer to a jig (for example, a dicing frame) repeatedly used for fixing the wafer during dicing (part or all of the adhesive is completely removed from the adherend) In other words, it does not peel off and remains on the adherend. In addition, as a measure for preventing the transfer of the adhesive, a method such as processing and sticking another pressure-sensitive adhesive tape for the purpose of preventing the transfer to a predetermined shape may be mentioned. Both costs were expensive.
[0004]
[Patent Document 1]
JP-A-2-32181 [Patent Document 2]
JP-A-8-53655 [0005]
[Problems to be solved by the invention]
Therefore, the present invention does not transfer the adhesive to the dicing frame at the portion where the dicing frame is bonded, and the adhesive layer and the substrate film interface when the chip is peeled off at the wafer bonding portion. An object of the present invention is to provide an adhesive tape having excellent peelability.
[0006]
[Means for Solving the Problems]
As a result of diligent studies to solve the above problems, the wafer bonding part and the dicing frame bonding part were subjected to surface treatment of the base film differently, so that the wafer bonding part was stuck to the chip during peeling. An adhesive tape that can be peeled off at the interface between the adhesive layer and the base film and can be peeled off at the interface between the adhesive layer and the dicing frame at the dicing frame portion can be composed of the same adhesive layer. Based on this finding, the present inventors have made the present invention.
That is, the present invention
(1) Semiconductor wafer dicing used in an adhesion process for manufacturing a semiconductor device, in which an adhesive layer is provided on at least one surface of a base film and a separator is provided on the adhesive layer side. Adhesive tape, wherein the adhesive forms a single layer, and the surface of the base film is not subjected to surface treatment before the adhesive is applied. By providing a part, a part with different adhesion between the adhesive layer and the base film is provided in advance, and then the adhesive is applied to the base material on which the wafer is bonded during dicing In the part where the film is not surface-treated, it can be peeled off at the interface between the adhesive layer and the base film at the time of chip peeling after wafer cutting, and the base film to which the dicing frame is bonded is subjected to surface treatment. In some parts, die Adhesive tape, wherein at the interface between the adhesive layer and the dicing frame during packaging frame stripping that was peelable,
(2) The adhesive tape according to (1), wherein the surface treatment is a corona treatment, a surface treatment using a low-pressure mercury lamp, or a treatment by primer application,
(3) In the adhesive tape according to (1) or (2), the base film is subjected to a surface treatment in place of the surface-treated portion and the surface-treated portion. An adhesive tape characterized by providing a portion that has been strongly applied and a portion that has been subjected to a weak surface treatment,
( 4 ) Adhesive layer for semiconductor wafer dicing used in an adhesion process for manufacturing a semiconductor device, in which an adhesive layer is provided on at least one surface of a base film and a separator is provided on the adhesive layer side. In the adhesive tape, the adhesive comprises a single layer, and the surface of the base film used for the adhesive tape is in contact with the adhesive of the base film in the length direction. In the part that has been subjected to the surface treatment and the part that has not been subjected to surface treatment on the base film partially and intermittently, in the part that has not been subjected to the surface treatment on the base film to which the wafer is bonded during dicing, When the chip is peeled after wafer cutting, it can be peeled off at the interface between the adhesive layer and the base film, and in the part where the surface treatment is applied to the base film to which the dicing frame is bonded, Adhesive tape, characterized in that the peelable at the interface between the adhesive layer and the dicing frame,
(5) From the diameter of the outer periphery of the non-surface-treated portion that is the boundary between the surface-treated portion and the surface-treated portion of the base film to which the dicing frame is bonded, the ring-shaped dicing frame The adhesive tape according to item (4), wherein the adhesive film has a large inner diameter, and there is a portion where the substrate film is subjected to surface treatment inside the dicing frame and outside the wafer,
(6) In the adhesive tape according to (4) or (5), the base film is subjected to a surface treatment in place of the surface-treated portion and the surface-treated portion. A pressure-sensitive adhesive tape characterized by providing a portion that has been strongly applied and a portion that has been subjected to a weak surface treatment, and
(7) The adhesive energy according to any one of (4) to (6), wherein the adhesive energy of the adhesive is 10,000 N / m or more.
Is to provide.
In the present invention, the semiconductor device refers to an IC or the like in which a semiconductor chip is bonded to a support member such as a lead frame and resin-sealed.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
In the adhesive tape of the present invention, before applying the adhesive, the adhesiveness between the adhesive layer and the substrate film is different in advance on the base film (with or without surface treatment, By providing a part), and then applying the adhesive layer, the wafer bonding part can be peeled off at the interface between the adhesive layer of the tape and the base film at the time of peeling, and The dicing frame portion relates to an adhesive tape that can be peeled off at the interface between the adhesive layer and the dicing frame and a method for manufacturing the adhesive tape.
In the present invention, the surface energy of the base film used for the adhesive tape is made different between the portion where the wafer is bonded and the portion where the dicing frame is bonded. By making the surface energy different in this way, the wafer bonding part can be peeled off at the interface between the adhesive layer and the base film, and the dicing frame bonding part is between the adhesive layer and the dicing frame. Separation at the interface is possible and the dicing frame is not contaminated, and production is possible with good workability.
Here, the surface energy is used as a measure of the adhesion between the surface and the adhesive. Although the surface energy cannot directly measure the adhesiveness, the relationship between the surface energy and the adhesiveness is empirically known in the field of pressure-sensitive adhesives. The lower the surface energy of the base film, the lower the adhesiveness. Low.
[0008]
As specific embodiment of this invention, in the base film used for an adhesive tape, the adhesiveness of an adhesive layer is provided except the base film surface of the part to which a wafer is bonded. A surface treatment is performed to form an adhesive layer on the substrate film.
FIG. 1 shows the state of the base film 1 thus obtained. In the figure, 2 is a non-surface treatment part on the substrate film 1, and 3 is a surface treatment part. 3 is a portion where the wafer is bonded, and 4 is a portion (ring-shaped portion indicated by a one-dot chain line) where the dicing frame is bonded. The dicing frame may have the inside of the ring exactly the same as the boundary between the surface treatment part and the non-surface treatment part as in A, or the diameter inside the ring is larger than the non-surface treatment part as in B, and the surface It may be an aspect riding on the processing unit.
In general, an olefin-based resin such as polyethylene used as a base film has a surface energy of about 30 mN / m in a state where the surface treatment is not performed, and the adhesive layer can be easily peeled off. It can be 50 mN / m or more. Usually, in the present invention, it is preferable to increase the surface energy by 10 mN / m or more by surface treatment, more preferably by 15 mN / m to 20 mN / m, compared to the case where the surface treatment is not performed. The dicing frame is approximately 40 mN / m, depending on the material and surface treatment, the silicon wafer is approximately 60 mN / m, and the adhesive layer is approximately 40 to 80 mN / m. The surface energy can be evaluated according to JIS K 6768: 1999 (Plastic-film and sheet-wetting tension test method).
[0009]
On the other hand, the bond strength between the adhesive layer and the adherend can be used as an index by determining the thermodynamic bonding work. The thermodynamic bonding work Wa is obtained by the following formula.
Wa = 2 (γ 1 · γ 2 ) 0.5
(Γ 1 : surface energy of adhesive, γ 2 : surface energy of adherend)
Therefore, by applying surface treatment to the base film, the thermodynamic bonding work of the base film / adhesive exceeds the thermodynamic bonding work of the dicing frame / adhesive, so It can be peeled off at the bonding surface of the adhesive.
[0010]
FIG. 2 schematically shows a use state of the dicing die-bonding adhesive tape of the present invention in a sectional view. In the figure, 10 is a dicing die-bonding adhesive tape, 11 is a base film that has not been subjected to surface treatment as shown in FIG. 1, 12 is an adhesive layer, and 13 is a diced semiconductor chip group. It is adhered at a position corresponding to the non-surface treatment part of the base film 11. Reference numeral 14 denotes a dicing groove. In the figure, reference numeral 15 denotes a semiconductor in which the semiconductor chip 13 is picked up by being peeled from the base film 11 with the adhesive 12 attached to the lower surface. Reference numeral 16 denotes a dicing frame.
[0011]
In the present invention, in order to peel at the interface between the adhesive layer and the adherend, the fracture energy of the adhesive is preferably 10,000 N / m or more, more preferably 15000 N / m or more. preferable. This is because if the fracture energy is too low, the adhesive will cohesively break during peeling, and part of the adhesive layer may remain on the adherend.
The destructive energy of the adhesive is obtained based on data measured by an adhesive tensile test (JIS Z0237-2000). The integral value (corresponding to the area surrounded by the curve and the base line) of the curve obtained when this method is extended to the breaking point is the fracture energy of the adhesive.
Moreover, as a surface treatment method (easy adhesion treatment method) of the base film, a method using a surface treatment apparatus using energy rays such as corona discharge and a low-pressure mercury lamp can be mentioned. Usually, the surface treatment of the base film is performed by feeding a film wound in a roll shape at a constant speed in a direction perpendicular to an energy ray source arranged one-dimensionally.
[0012]
The surface treatment method for the base film used in the present invention can be performed using the above method, but by providing a shield so that a specific surface of the base film is not exposed to energy rays, It is performed by a method of providing a portion not subjected to surface treatment.
Such a surface treatment method is not limited as long as it is possible to provide a part of the base film and a part that is not subjected to surface treatment intermittently in the length direction of the base film. As a specific example, a method of shielding an energy ray by providing a shield that can change the shielding area in conjunction with the speed of feeding out the base film, or an energy ray is irradiated in conjunction with the speed of feeding out the base film. This may be done by changing the area to be changed.
[0013]
The area of each part that is shielded so that surface treatment is not performed on the base film is larger than the outer diameter of the silicon wafer that is the adherend, taking into account the deviation during tape processing and bonding, and the dicing frame is cut out. It is preferable to make it smaller than the portion (inner diameter). Note that the cut-out portions of the silicon wafer and the dicing frame are usually circular, but they are not necessarily circular for reasons such as simplifying the surface treatment process, and the portion to be bonded to the silicon wafer is subjected to the surface treatment described above. If the part bonded to the dicing frame is surface-treated, the shape and the surface treatment range are not limited.
In addition, since it cannot confirm visually about the presence or absence of surface treatment of a base film, marking can be given so that a surface treatment state can be confirmed, for example on the base film surface. Examples of the marking method include a method of printing using a marking device such as an ink jet or a laser in conjunction with the feeding of the film and the movement of the shielding object. Based on this marking, it is possible to bond a silicon wafer or a dicing frame at a predetermined position.
[0014]
In addition, although the example which divided the surface into the surface treatment part and the non-surface treatment part was shown as a base film used for this invention (refer FIG. 1), even if it surface-treats, a base material depends on the grade of surface treatment. It is only necessary that a part having sufficiently lower adhesion to the adhesive than the other part is formed on the film. Therefore, there may be a mode in which there are two types of surface treatment portions and the adhesion between the two is different with respect to the adhesive.
As the base film used in the present invention, a known film can be used, but a film having no polar group such as a carboxyl group or a hydroxyl group is preferably used. Examples thereof include thermoplastic elastomers such as homopolymers or copolymers of α-olefins such as polyethylene, polypropylene, ethylene-propylene copolymer, polybutene, styrene-ethylene-butene or pentene copolymers, and the like. It may be a mixture of two or more selected from the group or a multilayer. In addition, when using in multiple layers, the other layer is not limited to the above resin as long as the portion in contact with the adhesive layer is selected from the above resins. Resins having a polar group such as a polymer or ionomer, engineering plastics such as polyethylene terephthalate, polyimide, polycarbonate, polymethyl methacrylate, or polyurethane can be used.
Although there is no restriction | limiting in particular in the thickness of a base film, 50-200 micrometers is used preferably.
[0015]
For the adhesive used in the present invention,
(1) One or more kinds of ethyl acrylate, butyl acrylate, 2-ethylhexyl acrylate, lauryl acrylate, a copolymer mainly composed of acrylic acid or methacrylic acid, 2-hydroxyethyl acrylate, ethyl acrylate, butyl acrylate , A mixture of one or more of 2-ethylhexyl acrylate and lauryl acrylate and a copolymer mainly composed of glycidyl methacrylate and 2-hydroxyethyl acrylate or a cross-linked product thereof (2) ethyl acrylate, butyl acrylate, 2- One or more of ethylhexyl acrylate and lauryl acrylate, a copolymer mainly composed of acrylic acid, methacrylic acid or 2-hydroxyethyl acrylate; Although known adhesives such as a mixture of xyresins are mentioned, it is not limited to the examples given above, but as described above, the breaking energy of the adhesive is preferably 10,000 N / m or more. .
The thickness of the adhesive layer upon drying varies depending on the chip size, the number of stacked chips, etc., but is preferably 2 to 50 μm, more preferably 5 to 30 μm.
[0016]
When the radiation curable adhesive is cured by ultraviolet irradiation, a photopolymerization initiator such as isopropyl benzoin ether, isobutyl benzoin ether, benzophenone, Michler's ketone, chlorothioxanthone, dodecyl thioxanthone, dimethyl thioxanthone, diethyl thioxanthone is optionally used. , Benzyldimethyl ketal, α-hydroxycyclohexyl phenyl ketone, 2-hydroxymethylphenylpropane, and the like can be used. The blending amount of these photopolymerization initiators is preferably 0.01 to 5 parts by weight with respect to 100 parts by weight of the acrylic copolymer.
It is also possible to add a metal fine powder or other materials having excellent conductivity or thermal conductivity to the above adhesive for the purpose of imparting electrical conductivity and thermal conductivity after die bonding.
Moreover, it is also possible to add fine powders, such as a metal oxide and glass, to the said adhesive agent for the purpose of heat stability improvement.
[0017]
The dicing-die-bonding adhesive tape of the present invention is used in an adhesion process for fixing a wafer or the like, dicing it, and superimposing it on a lead frame or semiconductor chip.
[0018]
【Example】
Next, the present invention will be described in more detail based on examples. The characteristics in each of the following examples were tested as follows.
(I) Evaluation of adhesive adhesive peelability Adhesive tapes (250 mm × 300 mm) of Examples and Comparative Examples described below were applied to a polishing surface of a dicing frame (DTF 2-6-1 manufactured by Disco) and a 6-inch silicon wafer # 2000. After bonding, the tape was cut to a width of 25 mm, and left for 1 hour, and then irradiated with ultraviolet rays. Then, the peel strengths of the silicon wafer bonding surface and the dicing frame bonding surface were measured.
The peeling force was a peeling angle of 90 ° and a peeling speed of 50 mm / min. The amount of ultraviolet irradiation was 200 mJ / cm 2 with a high-pressure mercury lamp.
In addition, the presence or absence of transfer of the adhesive to the adherend was visually confirmed.
[0019]
The evaluation criteria are as follows.
(To silicon wafer surface)
A silicon wafer with an adhesive layer transferred ...
The adhesive layer agent is not transferred to the silicon wafer ...
(To dicing frame surface)
Dicing frame with adhesive residue remaining ××
Dicing frame with no adhesive residue remaining ...
(B) Breaking energy of the adhesive layer The adhesive layer was peeled off from the base film, processed to 25 mm width x 100 µm thickness x 150 mm length, and subjected to tension for a sample irradiated with 200 mJ / cm 2 with a high-pressure mercury lamp. A tensile test was performed at a speed of 300 mm / min, and the fracture energy was measured.
[0020]
Reference example 1
(Preparation of adhesive)
Adhesive 1
Ethyl acrylate, methacrylic acid, and 2-hydroxyethyl acrylate are in a molar ratio of 80: 5: 15 and an acrylic copolymer having a weight average molecular weight of 230,000 is a molar ratio of 2-isocyanatoethyl methacrylate to 2-hydroxyethyl acrylate. An acrylic copolymer having a weight average molecular weight of 140,000 consisting of 100 parts by weight of an ultraviolet curable acrylic copolymer subjected to 60% addition reaction and 80:10:10 molar ratio of ethyl acrylate, glycidyl methacrylate and 2-hydroxyethyl acrylate. The polymer was mixed with 100 parts by weight of an ultraviolet curable acrylic copolymer obtained by addition reaction of 2-isocyanatoethyl methacrylate with a molar ratio of 2-isocyanatoethyl methacrylate to 2-hydroxyethyl acrylate to obtain an acrylic adhesive. . The breaking energy of this adhesive was 22153 N / m.
Adhesive 2
100 parts by mass of the acrylic adhesive of the adhesive 1 and 300 parts by mass of a bisphenol A type epoxy resin (Epicoat 1002 manufactured by Japan Epoxy Resin Co., Ltd.) as an epoxy resin were mixed to obtain an adhesive. The breaking energy of this adhesive was 7440 N / m.
[0021]
Reference example 2
(Preparation of base film)
Base film 1
Corona treatment is performed so as to provide a non-corona-treated portion with a diameter of 170 mm (assuming a 6-inch wafer) on a 100 μm-thick high-density polyethylene base film (surface energy 30 mN / m, 250 mm × 300 mm) Created. The surface energy of the corona treatment part of this was 45 mN / m.
Base film 2
A 100 μm-thick high-density polyethylene base film (250 mm × 300 mm) was subjected to corona treatment to produce a film with a surface energy of 45 mN / m.
Base film 3
The high-density polyethylene base film (250 mm × 300 mm) having a thickness of 100 μm used for the base film 1 was prepared without being subjected to corona treatment.
[0022]
Example 1
The base film 1 was coated with the adhesive 1 so as to have a thickness of 20 μm when dried, thereby obtaining an adhesive tape.
Example 2
The adhesive film 2 was applied to the base film 1 so that the thickness when dried was 20 μm to obtain an adhesive tape.
Comparative Example 1
An adhesive tape was obtained by applying the adhesive 1 to the base film 2 so as to have a thickness of 20 μm when dried.
Comparative Example 2
An adhesive tape was obtained by applying the adhesive 2 to the base film 2 so as to have a thickness of 20 μm when dried.
Comparative Example 3
The base film 3 was coated with the adhesive 1 so as to have a thickness of 20 μm when dried to obtain an adhesive tape.
Comparative Example 4
An adhesive tape was obtained by applying the adhesive 2 to the base film 3 so as to have a thickness of 20 μm when dried.
Each adhesive tape was tested by the above method, and the results are shown in Table 1 below.
[0023]
[Table 1]
Figure 0004316264
[0024]
As is clear from the results in Table 1 above, the examples were able to be peeled off without transfer of the adhesive to the flat frame and transferred to the silicon wafer. However, in the comparative example, both the frame and the silicon wafer were transferred. It was worn, and adhesive residue was seen, and good results could not be obtained.
[0025]
【The invention's effect】
The dicing die-bonding adhesive tape of the present invention is a dicing die-bonding adhesive tape that can be used as a dicing tape during dicing and can be used as an adhesive during mounting. There is no need to provide an anti-transfer layer at the mating portion, and an adhesive layer can be transferred to the back surface of the chip and peeled off during pick-up. Moreover, according to this invention, it becomes possible to provide the tape which does not stick an adhesive on a dicing frame with sufficient workability | operativity.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a preferred embodiment of a base film used in the present invention.
FIG. 2 is a schematic cross-sectional view showing a usage state of the adhesive tape of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Base film 2 Non-surface treatment part 3 Surface treatment part 4 Dicing frame bonding part 10 Dicing die-bonding adhesive tape 11 Base film 12 Adhesive layer 13 Semiconductor chip 14 Dicing groove 15 Semiconductor chip + adhesion Adhesive layer 16 Dicing frame

Claims (7)

基材フィルムの少なくとも片面に粘接着剤層を設け、粘接着剤層側にセパレータを設けてなる、半導体装置を製造する接着工程に使用される半導体ウェハダイシング−ダイボンド用粘接着テープであって、該粘接着剤は単一の層を構成しており、かつ粘接着剤を塗布する前に基材フィルムに表面処理を施してある部分と表面処理を施してない部分を設けることによりあらかじめ粘接着剤層と基材フィルムとの間の密着性の異なる部分を設けておき、その後粘接着剤を塗布してなり、ダイシング時にウェハが貼合される基材フィルムに表面処理を施していない部分では、ウェハ切断後のチップ剥離時に粘接着剤層と基材フィルムとの界面で剥離でき、ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分では、ダイシングフレーム剥離時に粘接着剤層とダイシングフレームとの界面で剥離可能としたことを特徴とする粘接着テープ。A semiconductor wafer dicing-adhesive tape for die bonding used in an adhesive process for manufacturing a semiconductor device, wherein an adhesive layer is provided on at least one surface of a base film and a separator is provided on the adhesive layer side. The adhesive forms a single layer, and before applying the adhesive, the base film is provided with a surface-treated portion and a surface-treated portion. By providing a part with different adhesion between the adhesive layer and the base film in advance, and then applying the adhesive, the surface on the base film to which the wafer is bonded during dicing In the untreated part, it can be peeled off at the interface between the adhesive layer and the base film at the time of chip peeling after wafer cutting, and in the part where the base film to which the dicing frame is bonded is subjected to surface treatment , Dicing Adhesive tape, characterized in that the peelable at the interface between the adhesive layer and the dicing frame when frame stripping. 前記表面処理がコロナ処理、低圧水銀灯を用いた表面処理またはプライマー塗布による処理であることを特徴とする請求項１記載の粘接着テープ。  2. The adhesive tape according to claim 1, wherein the surface treatment is a corona treatment, a surface treatment using a low-pressure mercury lamp, or a treatment by primer application. 請求項１または請求項２に記載の粘接着テープにおいて、基材フィルムに表面処理を施してある部分と表面処理を施してない部分の代わりに、基材フィルムに表面処理を強く行った部分と表面処理を弱く行った部分をそれぞれ設けたことを特徴とする粘接着テープ。  The adhesive tape according to claim 1 or 2, wherein the base film is subjected to a strong surface treatment in place of the surface-treated part and the surface-treated part. And an adhesive tape characterized by having a portion subjected to a weak surface treatment. 基材フィルムの少なくとも片面に粘接着剤層を設け、粘接着剤層側にセパレータを設けてなる、半導体装置を製造する接着工程に使用される半導体ウェハダイシング−ダイボンド用粘接着テープにおいて、該粘接着剤は単一の層を構成しており、該粘接着テープに使用される基材フィルムの粘接着剤と接する表面に基材フィルムの長さ方向に対し表面処理を施してある部分と、部分的かつ断続的に基材フィルムに表面処理を施していない部分を設け、ダイシング時にウェハが貼合される基材フィルムに表面処理を施していない部分では、ウェハ切断後のチップ剥離時に粘接着剤層と基材フィルムとの界面で剥離でき、ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分では、ダイシングフレーム剥離時に粘接着剤層とダイシングフレームとの界面で剥離可能としたことを特徴とする粘接着テープ。In a semiconductor wafer dicing-die-bonding adhesive tape for use in an adhesive process for manufacturing a semiconductor device, wherein an adhesive layer is provided on at least one surface of a base film and a separator is provided on the adhesive layer side. The adhesive constitutes a single layer, and the surface of the base film used for the adhesive tape is in contact with the adhesive of the base film in the length direction. After cutting the wafer, the part that has been applied and the part that has not been subjected to surface treatment on the base film partially and intermittently, and the part that has not been surface-treated on the base film to which the wafer is bonded during dicing At the part where the surface treatment is applied to the base film to which the dicing frame is bonded, the adhesive layer and the adhesive layer can be removed at the time of dicing frame peeling. Adhesive tape, characterized in that the peelable at the interface between the i single frame. ダイシングフレームが貼合される基材フィルムに表面処理を施してある部分と表面処理を施していない部分との境界である非表面処理部の外周の直径より、リング状のダイシングフレームの内径が大きく、ダイシングフレームの内側で、かつウェハの外側にも基材フィルムに表面処理を施してある部分が存在することを特徴とする請求項４記載の粘接着テープ。  The inner diameter of the ring-shaped dicing frame is larger than the diameter of the outer periphery of the non-surface-treated part that is the boundary between the part that has been surface-treated and the part that has not been surface-treated. 5. The pressure-sensitive adhesive tape according to claim 4, wherein a portion of the base film subjected to surface treatment is present inside the dicing frame and outside the wafer. 請求項４または請求項５に記載の粘接着テープにおいて、基材フィルムに表面処理を施してある部分と表面処理を施してない部分の代わりに、基材フィルムに表面処理を強く行った部分と表面処理を弱く行った部分をそれぞれ設けたことを特徴とする粘接着テープ。  6. The adhesive tape according to claim 4 or 5, wherein the base film is subjected to a strong surface treatment in place of the surface-treated part and the surface-treated part. And an adhesive tape characterized by having a portion subjected to a weak surface treatment. 前記粘接着剤の破壊エネルギーが１００００Ｎ／ｍ以上であることを特徴とする請求項４〜６のいずれか１項に記載の粘接着テープ。  The adhesive energy according to any one of claims 4 to 6, wherein the adhesive energy of the adhesive is 10,000 N / m or more.
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JP2007012670A (en) * 2005-06-28 2007-01-18 Furukawa Electric Co Ltd:The Pressure-sensitive adhesive tape
JP2007109808A (en) * 2005-10-12 2007-04-26 Furukawa Electric Co Ltd:The Adhesive tape for semiconductor wafer dicing die bond
JP2009065186A (en) * 2008-10-20 2009-03-26 Furukawa Electric Co Ltd:The Method of controlling adhesive power of base film of adhesive tape and base film for adhesive tape
JP5342256B2 (en) * 2009-02-04 2013-11-13 古河電気工業株式会社 Wafer processing film and method for manufacturing semiconductor device using wafer processing film
JP5899622B2 (en) * 2011-02-08 2016-04-06 日立化成株式会社 Adhesive sheet for semiconductor, method for producing adhesive sheet for semiconductor, semiconductor wafer, semiconductor device, and method for producing semiconductor device
JP2013106021A (en) * 2011-11-17 2013-05-30 Shin Etsu Polymer Co Ltd Method for manufacturing dicing frame

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