JP4304927B2 - Solid-state imaging device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device such as a CCD image sensor or a CMOS image sensor used in various imaging systems, and a manufacturing method thereof.
[0002]
[Prior art]
Conventionally, solid-state imaging devices such as CCD image sensors and CMOS image sensors have been provided.
FIG. 11 is a cross-sectional view showing an example of an element structure around a photoelectric conversion unit of a CCD image sensor.
In this CCD image sensor, a photodiode 16 serving as a photoelectric conversion unit, a charge transfer unit 18 and the like are provided in a P well region 14 provided on an N + layer 12 of a silicon substrate 10.
The photodiode 16 includes an upper P + region 16A and a lower N region 16B. Light received from the surface of the silicon substrate 10 is converted into electric charges and accumulated in the N region 16B.
[0003]
In addition, a charge transfer unit 18 including an N + region 18A is provided on one side of the photodiode 16, and a part of the N region 16B of the photodiode 16 and the N + region 18A of the charge transfer unit 18 are read units. 20 is connected.
In addition, an element isolation region 22 by a P + region is formed on the other side portion of the photodiode 16 to prevent charge leakage to adjacent pixels.
A transfer electrode 26 of the charge transfer unit 18 is disposed on the upper surface of the silicon substrate 10 via an insulating film 24A, and a light shielding film 28 is provided thereon via an insulating film 24B. It is opened corresponding to.
[0004]
FIG. 12 is a circuit diagram illustrating an example of a pixel circuit of a CMOS image sensor. In FIG. 12, four pixels are shown, but in actuality, it is assumed that a larger number of pixels are two-dimensionally arranged to form a pixel region.
This CMOS image sensor is provided with a photodiode 30 serving as one photoelectric conversion unit and four pixel transistors (MOS transistors) 32, 34, 36, and 38 for each pixel.
Further, outside the pixel region, a vertical shift register 40 and a horizontal shift register 42 that perform driving control of the pixel transistors 32, 34, 36, and 38 and perform a signal reading operation are provided.
[0005]
The read transistor 32 reads the signal charge generated by the photodiode 30 based on the read pulse and transfers it to a charge detection unit (FD; floating diffusion). The reset transistor 34 detects the charge based on the reset pulse. The potential of the part is reset to the power supply potential.
The amplifier transistor 36 functions as a charge-voltage conversion unit that inputs the potential of the charge detection unit to the gate and outputs a voltage signal corresponding to the potential, and the address transistor 38 corresponds based on the address pulse. The output signal of the amplifier transistor 36 is output to the signal line at the timing when the pixel row is selected.
The vertical shift register 40 and the horizontal shift register 42 output drive pulses for the transistors 32, 34, 36, and 38 at a predetermined timing to control the output operation of the pixel signal. By selecting a pixel row and selecting a pixel column by the horizontal shift register 42, each pixel signal is output from the vertical signal line 46 to the horizontal signal line 48 via the transistor 44 for each pixel column.
[0006]
[Problems to be solved by the invention]
In the CCD image sensor shown in FIG. 11 described above, the photoelectric conversion region (photodiode 16), the charge readout unit 20, and the charge transfer unit 18 are arranged on a two-dimensional plane. Cannot be arranged independently, and there is a problem that the arrangement space is restricted. In particular, since the charge readout unit 20 and the charge transfer unit 18 are adjacent to each other, the area of the photoelectric conversion unit cannot be increased, resulting in a decrease in saturation output and sensitivity.
[0007]
In the CMOS image sensor shown in FIG. 12 described above, each pixel transistor is arranged in a two-dimensional plane, and each transistor is connected by a three-dimensional multilayer wiring. There is a problem that it cannot be made large, and that the wiring on the photoelectric conversion unit obstructs light collection. Further, as shown in FIG. 12, there is a problem that the operation for reading out by performing the reset operation (global shutter operation) for all the pixels at the same time cannot be performed, and the accumulation time is different for each pixel (each pixel row).
[0008]
In view of such a situation, the present invention can form a photoelectric conversion unit and its reading element on different planes, and can improve the light receiving sensitivity, reduce noise, and improve functions such as global shutter operation. An object is to provide an element and a method for manufacturing the element.
[0009]
[Means for Solving the Problems]
To achieve the above object, the present invention provides an SOI substrate having an SOI insulating layer provided on one side of a first silicon substrate, a second silicon substrate bonded to the SOI insulating layer side of the SOI substrate, and the first silicon substrate. Alternatively, a photoelectric conversion unit that is provided on either one of the second silicon substrates and includes a first conductivity type region that performs photoelectric conversion and a second conductivity type region provided on a surface of the first conductivity type region ; A charge readout portion provided on the other of the first silicon substrate and the second silicon substrate, and a contact hole formed so as to penetrate the SOI insulating layer from the first silicon substrate to the second silicon substrate . located inside, it varies by generated charges by the photoelectric conversion unit, and a plug portion for transmitting the signal potential of the first conductive type region in the charge readout portion A, a part of the signal line between the insulating film by thermal oxidation of the silicon surface is formed on the inner peripheral portion of the contact hole, the capacitor formed by the insulating film the photoelectric conversion part and the charge reading unit And a transparent electrode is disposed on a surface of the second conductivity type region opposite to the first conductivity type region, and a potential lower than that of the first conductivity type region is applied to the transparent electrode. Thus, the charge photoelectrically converted by the photoelectric conversion unit is discharged to the transparent electrode.
Also, the present invention includes a SOI substrate provided with a SOI insulating layer on one surface of the first silicon substrate, and a second silicon substrate on which the bonded to SOI insulator layer side of the SOI substrate, the first silicon substrate or the second A photoelectric conversion unit provided on any one of the silicon substrates and having a first conductivity type region for performing photoelectric conversion and a second conductivity type region provided on a surface of the first conductivity type region; A charge readout portion provided on either one of the first silicon substrate and the second silicon substrate, and a contact hole formed so as to penetrate the SOI insulating layer from the first silicon substrate to the second silicon substrate. and varies with the charge generated by the photoelectric conversion unit, chromatic and a plug portion for transmitting the signal potential of the first conductivity type region of the photoelectric conversion part to the charge readout portion , Insulating film by thermal oxidation of the silicon surface is formed on the inner peripheral portion of the contact hole, a capacitor formed by the insulating film constitutes a part of the signal line between the electric charge readout portion and the photoelectric conversion portion A transparent electrode is disposed on the surface of the second conductivity type region opposite to the first conductivity type region, and a potential lower than that of the first conductivity type region is applied to the transparent electrode, A method of manufacturing a solid-state imaging device in which charges photoelectrically converted by the photoelectric conversion unit are discharged to the transparent electrode, and an SOI insulating layer is provided on one surface of the first silicon substrate to generate an SOI substrate. forming a step, a step of forming a photoelectric conversion unit in one of the first silicon substrate and the second silicon substrate, a charge reading part to the other of the first silicon substrate and the second silicon substrate That a step, a step of bonding a second silicon substrate to the SOI insulating layer side of the SOI substrate, forming a contact hole penetrating the SOI insulating layer over the second silicon substrate from the first silicon substrate, wherein After forming an insulating film by thermal oxidation of the silicon surface on the inner peripheral portion of the contact hole, the plug portion is formed in the contact hole, whereby the capacitor is connected to the signal line between the photoelectric conversion portion and the charge readout portion. And forming as a part of the structure.
[0010]
In the solid-state imaging device and the method of manufacturing the same according to the present invention, the photoelectric conversion unit and the charge readout unit are separately arranged on two silicon substrates arranged on both sides of the SOI insulating layer of the SOI substrate, and the contact hole penetrates the SOI insulating layer. more plug unit provided inside the varies by generated electric charges in the photoelectric conversion unit, and the signal potential of the first conductivity type region so as to transmit the electric charge readout portion.
For this reason, the photoelectric conversion unit and the reading element and the like can be formed on different planes, the aperture ratio of the photoelectric conversion unit can be improved, and the light receiving sensitivity can be improved and noise can be reduced.
Further, in the solid-state imaging device and the manufacturing method thereof according to the present invention, an insulating film is formed by thermal oxidation of the silicon surface on the inner peripheral portion of the contact hole, and the capacitor formed by this insulating film includes a photoelectric conversion unit, a charge readout unit, Part of the signal line between the two was configured.
For this reason, since the photoelectric conversion unit 70 and the potential transmission wiring (polysilicon plug 68) are insulated via a high-quality insulating film (thermal oxide film), a noise generation source represented by an interface state or the like is present. The structure is small and the amount of noise with respect to the signal charge is small.
Further, in the solid-state imaging device and the manufacturing method thereof according to the present invention, since an SOI substrate is used as a substrate on which each element of the photoelectric conversion unit and the charge readout unit is formed, a step of forming a well region or the like for forming each element Therefore, it is possible to provide a solid-state imaging device that is easy to manufacture, low power consumption, and suitable for high-speed operation.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of a solid-state imaging device and a method for manufacturing the same according to the present invention will be described below.
In the solid-state imaging device according to the present embodiment, the photoelectric conversion unit and the charge readout unit are stacked by using a SOI (Silicon On Insulator) substrate bonded to the element substrate, and the photoelectric conversion unit and the charge readout unit are incident on the light. The aperture ratio is improved by a structure laminated vertically to the direction.
In addition, a contact hole is formed in the bonded SOI substrate, an insulating film formed by thermal oxidation is formed on the inner peripheral end surface, a capacitor is formed using the insulating film, and the capacitor is formed as a part of the signal line. Use. Further, by using polysilicon as a wiring material, a high temperature SOI bonding process can be used.
In addition, by adopting a structure in which a transparent electrode is connected to the upper part of the photoelectric conversion unit, a global shutter operation can be realized, and surplus charges can be discharged.
Furthermore, the structure in which a capacitor is arranged in series between the photoelectric conversion unit and the charge-voltage conversion unit enables reduction in dark output.
[0012]
Hereinafter, specific embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram illustrating a pixel circuit of a solid-state imaging device according to an embodiment of the present invention. As shown in the figure, the solid-state imaging device of this example is a modification of the CMOS image sensor shown in FIG. 12, and the same components as those in FIG. The explanation is centered.
[0013]
In the CMOS image sensor of this example, the photoelectric conversion unit 70 is composed of a pair of diodes 70A and 70B whose anode sides are commonly connected, the cathode of one diode 70A is grounded, and the cathode of the other diode 70B is the reset terminal. Connected to RST.
Therefore, in this example, the diodes 70A and 70B can be directly reset by a reset pulse input from the reset terminal RST. In addition, as a result, the reset transistor is deleted from the pixel configuration shown in FIG.
In the photoelectric conversion unit 70, the anode connection point of each of the diodes 70A and 70B is connected to the source of the address transistor 38 via the capacitors C1 and C2. Therefore, when the address transistor 38 is turned on, the potential of the photoelectric conversion unit 70 is applied to the gate of the amplifier transistor 36, and this potential fluctuation is transmitted to the vertical signal line 46 as an output of the source follower circuit via the load transistor 50. This potential is output by sequentially scanning the horizontal shift register 42.
[0014]
FIG. 2 is a sectional view showing an example of the element structure of the CMOS image sensor shown in FIG.
The CMOS image sensor of this example uses a bonded SOI substrate. The photoelectric conversion unit 70 is formed on the upper surface side (upper Si substrate 80A) of the SOI insulating layer 60, and the readout circuit and drive are formed on the lower surface side. Elements such as various transistors 32, 36, and 38 constituting the circuit are formed.
The photodiodes 70A and 70B of the photoelectric conversion unit 70 of this example are obtained by providing the impurity layers of the N + region 71, the P region 72, and the surface N + region 73 in this order from the lower layer on the SOI insulating layer 60. . Further, an N-type impurity layer 62 is provided in the boundary region between the photodiodes 70A and 70B, and is electrically isolated from adjacent elements.
[0015]
Further, the surface of each of the photodiodes 70 </ b> A and 70 </ b> B is connected to a single transparent electrode 64 through the surface N + region 73.
Further, a polycrystalline silicon vertical wiring (polysilicon plug) 68 is disposed through an insulating film 66 at the boundary between the pair of photodiodes 70A and 70B.
The polycrystalline silicon vertical wiring 68 constitutes a capacitor (capacitor C1), is formed so as to penetrate the SOI insulating layer 60 in the vertical direction, and is formed at the bottom portion disposed on the lower surface side of the SOI insulating layer 60. The crystal silicon electrode 82 is connected.
The lower polycrystalline silicon electrode 82 is disposed via an N + layer 84 and an insulating film 86 provided on the lower Si substrate 80B. The lower polycrystalline silicon electrode 82 and the N + layer 84 are connected to a capacitor (capacitor C2). Is configured.
The upper end of the polycrystalline silicon vertical wiring 68 and the transparent electrode 64 are separated by an insulating film 67.
[0016]
Further, N + layers 84 and 85 constituting the sources and drains of the transistors 32, 36, and 38 are formed on the lower Si substrate 80 B below the insulating film 86, and N + layers that serve as the source of the read transistor 32 among them are formed. The layer 84 is disposed corresponding to the lower polycrystalline silicon electrode 82 described above.
In addition to the lower polycrystalline silicon electrode 82 described above, a lower polycrystalline silicon gate electrode 83 is provided on the upper surface of the insulating film 86 corresponding to the gates of the transistors 32, 36, 38, etc. The wirings of the transistors 32, 36, 38, etc. are composed of a single layer of polysilicon wiring 89 to realize the circuit configuration shown in FIG.
In addition, a part of the insulating film 86 extends to the lower layer and constitutes an element isolation region 86A. Further, an oxide film 90 formed by CVD or the like is stacked on the upper layer of the insulating film 86, and surrounds the lower polycrystalline silicon electrodes 82 and 83, the polysilicon wiring 89, and the like in an insulating state.
[0017]
Next, the operation of the CMOS image sensor according to the present embodiment as described above will be described.
Electric charges are generated in the photodiodes 70A and 70B by the light incident on the photodiodes 70A and 70B of the photoelectric conversion unit 70 and accumulated in the P region 72.
At this time, the maximum accumulation amount is determined by appropriately changing the potential of the transparent electrode 64 connected to the surfaces of the photodiodes 70A and 70B, and is generated at the interface between the N + layer 73 on the Si surface and the transparent electrode 64. Noise components due to the interface order are discharged to the transparent electrode 64 side.
Further, by applying a potential lower than that of the P region 72 to the transparent electrode 64, all charges accumulated in the photoelectric conversion regions of the photodiodes 70A and 70B are discharged to the transparent electrode 64 side, and the photodiodes 70A and 70B are reset. Can be done.
At this time, if a voltage is applied to all the photodiodes simultaneously, a global shutter operation can be performed.
[0018]
Further, when light is applied for a certain period while maintaining the potential of the transparent electrode 64, the potential of the photodiodes 70A and 70B, that is, the potential of the polysilicon plug 68 is fluctuated by the charge generated by photoelectric conversion, and this potential is read out. The potential of the source portion (N + layer 84) of the transistor 32 is changed, and this changed potential is transmitted to the gate of the amplifier transistor 36 and output through the source follower circuit.
Further, in this structure, since the photoelectric conversion unit 70 and the potential transmission wiring (polysilicon plug 68) are insulated via a high-quality insulating film (thermal oxide film), noise represented by interface states and the like Since there are few generation sources, it has a structure with a small amount of noise with respect to signal charges.
[0019]
Next, a method for manufacturing a CMOS image sensor according to the present embodiment as described above will be described.
3 to 10 are cross-sectional views showing the element structure at each stage when the element structure shown in FIG. 2 is manufactured.
First, FIG. 3 shows a first substrate constituting the SOI insulating layer 60 and the upper Si substrate 80A. This first substrate is formed as an SOI insulating layer 60 by forming an oxide film on the surface of an N-type Si substrate using a method such as thermal oxidation. Then, ion implantation is performed from the SOI insulating layer 60 side to the Si substrate side, thereby forming an N + layer on the surface of the Si substrate.
Thereby, a first substrate having the above-described photodiode N + region 71 at the boundary between the upper Si substrate 80A and the SOI insulating layer 60 can be manufactured.
[0020]
FIG. 4 shows a second substrate constituting the lower layer Si substrate 80B. This second substrate is formed with a polysilicon film (polysilicon wiring) so that a desired transistor is formed on the Si substrate using a general semiconductor process, and further withstands high temperature processing in a later SOI bonding process. 89), and an oxide film 90 is formed by a technique such as CVD so as to cover all the formations.
In the second substrate, the surface of the oxide film 90 is planarized using a technique such as CMP.
[0021]
Next, as shown in FIG. 5, the first substrate and the second substrate shown in FIGS. 3 and 4 are generally arranged so that their oxide films, that is, the SOI insulating layer 60 and the oxide film 90 face each other. Bonding is performed by an SOI bonding method.
Then, the Si substrate on which the transistor is not formed, that is, the upper Si substrate 80A is used as a surface, and the N-type Si substrate layer is thinned to a desired thickness by using a method such as CMP.
[0022]
Next, as shown in FIG. 6, for the purpose of removing the polished Si substrate surface and subsequent ion implantation control, the surface of the Si substrate 80A is oxidized by thermal oxidation to form an oxide film 92.
Then, through this oxide film 92, P-type ions are implanted into the deep portion of the Si substrate 80A to form a P region 72, and then N + -type ions are implanted into the outermost surface to form an N + region 73.
Next, as shown in FIG. 7, N-type ion implantation for pixel separation (N-type impurity layer 62) is performed using a photoresist as a mask, and then contact holes 94 are formed again by etching using the photoresist as a mask. .
Next, as shown in FIG. 8, immediately after the formation of the contact hole 94, an oxide film (insulating film 66) is formed by thermal oxidation on the Si surface of the upper Si substrate 80A exposed on the inner peripheral surface of the contact hole 94, Next, an electrode material 96 for forming the polysilicon plug 68 is formed by a method such as CVD.
[0023]
Next, as shown in FIG. 9, the electrode material 96 is removed up to the oxide film 92 by a method such as CMP or etch back.
Then, as shown in FIG. 10, after removing the outermost oxide film 92, an oxide film (not shown) to be the insulating film 65 is formed using oxidation, CVD, or both methods, and a photoresist is formed. Then, the oxide film other than the pixel isolation region and the plug surface portion is removed, and the insulating film 65 is formed. However, the oxide film on the surface of the plug portion used as the output terminal is removed together.
Finally, as shown in FIG. 2, a transparent electrode 64 such as ITO or ZnO is formed. If necessary, an insulating film (oxide film or the like) or electrode material is then formed and etched to form an upper wiring (not shown).
[0024]
As described above, in this embodiment, the charge readout circuit unit and the photoelectric conversion unit can be arranged on different planes, and as a result, the photoelectric conversion unit can be enlarged, so that the maximum charge accumulation amount, sensitivity, and the like can be imaged. Basic characteristics as an element can be greatly improved.
Further, since the transparent electrode is connected to the surface of the photodiode, the charge accumulation amount can be controlled without causing a reduction in the amount of incident light. In some cases, all pixels can be discharged simultaneously. In addition, since the reset operation of the photodiode of each pixel can be performed by a single photodiode, the reset transistor required for the reset operation is not necessary, and the configuration of the readout circuit can be simplified, resulting in the need for multilayer wiring. Therefore, all the wirings can be formed with a single layer of polysilicon wiring.
Furthermore, by arranging a capacitor formed of a high-quality oxide film in the signal readout path in series, a complete reset of the photodiode and suppression of noise generation can be performed simultaneously, and a signal with less noise component can be extracted.
[0025]
In the above embodiment, when the charge handled in the photoelectric conversion unit is not an electron but a hole and the discharged hole is an electron, the P type in the explanatory diagram is the N type, and the N type is the P type. Each shall be replaced.
In the above example, the CMOS image sensor has been described. However, the above-described configuration and manufacturing method in which the photoelectric conversion unit and the charge transfer unit are formed on different planes using the SOI substrate can be applied to a CCD image sensor or the like. Is possible.
[0026]
【The invention's effect】
As described above, according to the solid-state imaging device and the method of manufacturing the same of the present invention, the photoelectric conversion unit and the charge readout unit are separately arranged on the two silicon substrates arranged on both sides of the SOI insulating layer of the SOI substrate. Since the signal charge of the photoelectric conversion part is transmitted to the charge readout part side by the plug part provided inside the contact hole that penetrates the insulating layer, the photoelectric conversion part and the readout element, etc. are formed on different planes. The aperture ratio of the photoelectric conversion unit can be improved, and the light receiving sensitivity can be improved and noise can be reduced.
In addition, if a transparent electrode is disposed on the light receiving side of the photoelectric conversion unit, there is an advantage that a global shutter operation can be easily performed, excess charges can be discharged, and the like.
In addition, according to the solid-state imaging device and the manufacturing method thereof of the present invention, an insulating film is formed by thermal oxidation of the silicon surface on the inner peripheral portion of the contact hole, and the capacitor formed by the insulating film serves as a photoelectric conversion unit and a charge readout. The photoelectric conversion unit 70 and the potential transmission wiring (polysilicon plug 68) are insulated from each other through a high-quality insulating film (thermal oxide film). Therefore, there are few noise generation sources represented by interface states and the like, and there is an effect that a structure with a small amount of noise with respect to signal charges can be realized.
In addition, according to the solid-state imaging device and the manufacturing method thereof of the present invention, the SOI substrate is used as the substrate on which each element of the photoelectric conversion unit and the charge readout unit is formed, so that a well region for forming each element is formed. Thus, there is an effect that it is possible to provide a solid-state imaging device that can be omitted, can be easily manufactured, and has low power consumption and suitable for high-speed operation.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a pixel circuit of a solid-state imaging device (CMOS image sensor) according to an embodiment of the present invention.
2 is a cross-sectional view showing an example of an element structure of the CMOS image sensor shown in FIG.
3 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured. FIG.
4 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured. FIG.
5 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured. FIG.
6 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured.
7 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured.
8 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured.
9 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured.
10 is a cross-sectional view showing an element structure at each stage when the element structure shown in FIG. 2 is manufactured.
FIG. 11 is a cross-sectional view showing an example of an element structure around a photoelectric conversion unit of a conventional CCD image sensor.
FIG. 12 is a circuit diagram showing an example of a pixel circuit of a conventional CMOS image sensor.
[Explanation of symbols]
32... Readout transistor, 36... Amplifier transistor, 38... Address transistor, 60... SOI insulation layer, 64... Transparent electrode, 68 ... Polycrystalline silicon vertical wiring (polysilicon plug), 70. 70A, 70B ... photodiode, 71 ... N + region, 72 ... P region, 73 ... surface N + region, 80A ... upper Si substrate, 80B ... lower Si substrate, 82, 83 ... polycrystal Silicon electrode, 94 …… Contact hole.

Claims (14)

An SOI substrate having an SOI insulating layer provided on one side of the first silicon substrate;
A second silicon substrate bonded to the SOI insulating layer side of the SOI substrate;
A first conductivity type region that is provided on either the first silicon substrate or the second silicon substrate and performs photoelectric conversion, and a second conductivity type region provided on the surface of the first conductivity type region. A photoelectric conversion unit having,
A charge readout portion provided on the other of the first silicon substrate and the second silicon substrate;
The first conductivity type is located in a contact hole formed in a state of penetrating the SOI insulating layer from the first silicon substrate to the second silicon substrate , and fluctuates according to the electric charge generated by the photoelectric conversion unit. A plug portion that transmits the signal potential of the region to the charge readout portion side,
An insulating film is formed by thermal oxidation of the silicon surface on the inner periphery of the contact hole, and a capacitor formed by the insulating film forms a part of a signal line between the photoelectric conversion unit and the charge reading unit. And
A transparent electrode is disposed on the surface of the second conductivity type region opposite to the first conductivity type region ,
By applying a potential lower than that of the first conductivity type region to the transparent electrode, the electric charge photoelectrically converted by the photoelectric conversion unit was discharged to the transparent electrode.
The solid-state image sensor characterized by the above-mentioned.   The solid-state imaging device according to claim 1, wherein the photoelectric conversion unit and the charge readout unit are stacked perpendicular to the light incident direction of the photoelectric conversion unit.   The solid-state imaging device according to claim 1, wherein the SOI substrate and the second silicon substrate are bonded by high-temperature bonding of SOI. 4. The solid-state image pickup device according to claim 3, wherein a polysilicon film is used as a wiring material of the charge readout portion. The solid-state imaging device according to claim 1, characterized in that the global shutter operation through the transparent electrode. 6. The solid-state imaging device according to claim 5, wherein surplus charges are discharged through the transparent electrode. The charge readout section includes a charge-voltage converter which outputs a voltage signal corresponding to the signal potential, in series with a capacitor for output reduction when dark between the plug portion and the front Symbol electrostatic load voltage converter The solid-state imaging device according to claim 1, wherein the solid-state imaging device is arranged. The photoelectric conversion unit includes a pair of photodiodes including the first conductivity type region and the second conductivity type region, and the anode terminals on the first conductivity type region side of each photodiode are both is connected to the charge-voltage converter via a capacitor, the cathode terminal of one of the photodiode is connected to a reference potential, characterized in that the cathode terminal of the other photodiode is connected to a reset control line The solid-state imaging device according to claim 1. An SOI substrate having an SOI insulating layer provided on one side of the first silicon substrate;
A second silicon substrate bonded to the SOI insulating layer side of the SOI substrate;
A first conductivity type region that is provided on either the first silicon substrate or the second silicon substrate and performs photoelectric conversion, and a second conductivity type region provided on the surface of the first conductivity type region. A photoelectric conversion unit having,
A charge readout portion provided on the other of the first silicon substrate and the second silicon substrate;
The first of the photoelectric conversion units is located in a contact hole formed in a state of penetrating the SOI insulating layer from the first silicon substrate to the second silicon substrate , and fluctuates according to charges generated by the photoelectric conversion unit. A plug portion that transmits a signal potential of one conductivity type region to the charge readout portion side,
An insulating film is formed by thermal oxidation of the silicon surface on the inner periphery of the contact hole, and a capacitor formed by the insulating film forms a part of a signal line between the photoelectric conversion unit and the charge reading unit. And
A transparent electrode is disposed on the surface of the second conductivity type region opposite to the first conductivity type region ,
A method of manufacturing a solid-state imaging device in which the electric charge photoelectrically converted by the photoelectric conversion unit is discharged to the transparent electrode by applying a lower potential to the transparent electrode than the first conductivity type region,
Providing an SOI insulating layer on one side of the first silicon substrate to generate an SOI substrate;
Forming a photoelectric conversion portion on either the first silicon substrate or the second silicon substrate;
Forming a charge readout portion on either the first silicon substrate or the second silicon substrate;
Bonding a second silicon substrate to the SOI insulating layer side of the SOI substrate;
Forming a contact hole penetrating the SOI insulating layer from the first silicon substrate to the second silicon substrate ;
An insulating film formed by thermal oxidation of a silicon surface is formed on the inner periphery of the contact hole, and then the plug is formed in the contact hole, whereby a capacitor is connected between the photoelectric conversion unit and the charge readout unit. Forming as part of a line;
A method for manufacturing a solid-state imaging device, comprising: The method for manufacturing a solid-state imaging device according to claim 9, wherein the photoelectric conversion unit and the charge readout unit are stacked perpendicular to the light incident direction of the photoelectric conversion unit. 10. The method of manufacturing a solid-state imaging device according to claim 9, wherein the SOI substrate and the second silicon substrate are bonded by high-temperature bonding of SOI. The method of manufacturing a solid-state imaging device according to claim 11, wherein a polysilicon film is used as a wiring material of the charge readout portion. The charge readout section includes a charge-voltage converter which outputs a voltage signal corresponding to the signal potential, in series with a capacitor for output reduction when dark between the plug portion and the front Symbol electrostatic load voltage converter The method for manufacturing a solid-state imaging device according to claim 9 , wherein the solid-state imaging device is arranged. The photoelectric conversion unit includes a pair of photodiodes including the first conductivity type region and the second conductivity type region, and the anode terminals on the first conductivity type region side of each photodiode are both is connected to the charge-voltage converter via a capacitor, the cathode terminal of one of the photodiode is connected to a reference potential, characterized in that the cathode terminal of the other photodiode is connected to a reset control line The manufacturing method of the solid-state image sensor of Claim 9 .

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