JP4294905B2 - Defibrillator - Google Patents

Abstract

A defribrillator comprises first and second electrodes (A, B) for application to a patient, a voltage source ( 60 ), and an output circuit for connecting the voltage source across the electrodes upon the occurrence of a control signal ( 64 ). The output circuit includes a first current path connecting one side of the voltage source to the first electrode (A) and a second current path connecting the other side of the voltage source to the second electrode (B). Each of the current paths contains at least one solid state switching device USD 1 (bo) or IGBT 1. The switching device(s) USD 1 (bo) in at least one of the current paths has no external control and characteristics similar to a Shockley diode.

Description

[0001]
The present invention relates to defibrillators, and more particularly, but not exclusively, to external defibrillators.
[0002]
External defibrillators produce high-energy shock pulses that are transmitted to the patient using abnormal electrodes such as ventricular fibrillation (VF) or ventricular tachycardia (VT) using electrodes attached to the patient's torso. Use to correct. Attaching the electrodes to the patient's torso from outside means that these devices can be made portable and carried by emergency personnel. Unfortunately, delivering the pulse externally to the patient's torso means that higher energy is required than with an implantable defibrillator that connects directly to the surface of the heart. The need for higher energy means that these devices are larger and heavier than the operator desires. Reducing both the size and cost of the external defibrillator means that the device can be carried more easily and more personnel can have the device.
[0003]
Prior art defibrillators that convey single phase or two phase truncation exponential waveforms do this by providing a control or drive signal to the silicon device configuration. Rather than using a mechanical switch or relay that provides a direct electrical connection, the silicon device can be driven using a control signal from a high impedance state to a lower impedance state. This process is much faster than can be obtained from a mechanical switch and makes it possible to accurately generate a millisecond waveform. These methods, however, are complex and expensive because they require the high voltage device to be isolated from the low voltage controller, for example, by using an optical isolator or a coupling transformer.
[0004]
Typically, prior art methods include a silicon controlled rectifier (SCR) and an insulated gate bipolar transistor (IGBT). These devices conduct pulses above 1000V using a gate drive circuit that is rated only at tens of volts. However, current commercial devices cannot withstand about 1200 volts or more. Therefore, several devices need to be placed on top of each other to conduct pulses in excess of the thousands of volts typically required for external defibrillators. This is a concept known as “totem polling” and is known to those skilled in the art. Without totem polling, the SCR automatically changes to these low impedance states once these maximum voltage ratings are exceeded. Similarly, the IGBT fails destructively when its maximum voltage is exceeded. Further, the SCR automatically changes its state when the voltage change rate (δV / δt) exceeds a degree.
[0005]
FIG. 1 is shown as an example, which includes two SCRs, SCR1 and SCR2, that are totem poled together. In FIG. 1, the gate drive circuit GD2 for the upper device SCR2 floats above the signal ground at point B at a voltage Vl equal to the voltage across the lower device SCR1 between points B and C. For this reason, it is necessary to insulate the gate drive to the SCR 2 from the common ground point C. In FIG. 1, this isolation is achieved by a transformer coupler T. The transformer crosses the pulse with the insulation barrier IB without any direct electrical connection. The overall arrangement functions equivalently to a single SCR with increased voltage capacity if the gate drive waveforms to SCR1 and SCR2 are synchronized. The gate drive waveform is typically generated from a timing controller by a logic network. Controlling these silicon devices using an isolated drive circuit reduces the overall size of the circuit because large physical gaps or air spaces are required in different areas of the final circuit. It means that trying to do has limitations. Furthermore, the isolator requires additional support circuitry and synchronized drive waveforms, all of which occupy physical space and additional cost in the final design.
[0006]
It is an object of the present invention to provide an improved defibrillator that alleviates or eliminates these drawbacks.
[0007]
According to one aspect of the present invention there is provided a defibrillator as specified in claim 1 and / or any one or more claims dependent thereon.
[0008]
The present invention is also directed to a method by which the above-described apparatus operates, including method steps that perform all functions of the apparatus.
[0009]
As used herein, an “uncontrolled solid state device” (USD) refers to a high voltage when a voltage exceeding a predetermined threshold is applied across its terminals without the application of any external control signal. A two-terminal solid state device that automatically undergoes a transition from an impedance state to a lower impedance state. The USD may be a single integrated component or a circuit composed of a number of solid components. A basic example of USD is a Schottky diode.
[0010]
“Breakover USD” is a USD that unconditionally transitions to a lower impedance state when the applied voltage exceeds a threshold.
[0011]
“Break Under USD” is USD that only transitions to a lower impedance state if the applied voltage does not exceed a second threshold that is higher than the first threshold.
[0012]
Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings.
[0013]
The embodiment of the invention to be described here has the characteristics of a Schottky diode, which uses a device or circuit referred to herein as an uncontrolled solid state device (USD) as defined above. Unlike SCRs and IGBTs, Schottky diodes do not require a gate drive signal to enter a lower impedance state from a high impedance state. FIG. 2a shows the substrate configuration of a Schottky diode as a four-layer silicon device with individual doping concentrations P1, N1, P2 and N2.
[0014]
FIG. 2b shows the symbol used to indicate a Schottky diode, and it should be noted that there are only two relevant terminals. In essence, a Schottky diode is unidirectional that can only change from its default high impedance state to a reduced impedance state if the polarity of the applied signal forward biases the device in a particular direction. is there. Applying a signal of the opposite polarity does not change the state of the device unless the voltage exceeds its reverse breakdown voltage (Vr). A Schottky diode is characterized in that when a voltage is applied across the device in forward bias, the device is in its lower impedance state only if the voltage exceeds a predetermined threshold (Vth). To change. However, Schottky diodes are not readily available commercially and they can typically withstand only low voltages and small currents. However, this limitation can be overcome by placing other commercially available devices to perform equivalent functions for high voltages and high currents.
[0015]
FIG. 3 is a high voltage, high current, high impedance “breakover” USD, equivalent to a Schottky diode, using DIAC and TRIAC. Note that the entire circuit of FIG. 3 has only two terminals, an anode A ′ and a cathode K ′. The TRIAC changes to a low impedance state that allows a large current to flow when an appropriate voltage is applied to its gate terminal g. The combination of resistors R1 and R2 divides voltage V into voltage Vb and forms a voltage divider with reference to cathode K ′ at the base of transistor T1, where Vb = V [R2 / (R1 + R2)] is there. The emitter follower arrangement of transistor T1 keeps the voltage applied to the DIAC at point X about 0.7V below voltage Vb.
[0016]
The DIAC remains in its default high impedance state as long as the voltage across it does not exceed its threshold Vd. Therefore, as long as this voltage threshold is not exceeded, the USD remains at a high impedance between A ′ and K ′. However, if the voltage at X exceeds the DIAC threshold Vd, the DIAC folds back, causing a voltage to appear at the gate of the TRIAC, and the TRIAC causes a large current to flow A ′ and K ′. Change to its low impedance state between. Therefore, the total voltage at which the USD changes state is accurately set by the voltage divider R1 / R2. If the USD is desired to change to its low impedance state when the voltage V across it, ie across the terminals A ′ and K ′, reaches a certain threshold Vthni, the values of R1 and R2 are This voltage Vth is selected to make the voltage at X equal to the DIAC threshold voltage Vd, ie, the equation Vd = [Vth (R2 / (R1 + R2))] − 0.7 is solved for R1 and R2. Resistor R3 limits the current flowing into the gate terminal of the TRIAC and prevents the gate from being damaged by a relatively high voltage across terminals A ′ and K ′. The value of both R1 and R2 can be kept high by the change in state of the device determined by the ratio of R1 and R2 and the supply to the DIAC made by R3 via the current gain of T1. Using high impedance values for R1 and R2 means that in a high impedance state, there is very little current leakage through the USD. The diode D1 blocks any current in the reverse bias direction and actually determines the reverse breakdown characteristic for the USD.
[0017]
Any device that can go from a high-impedance initial state to a low-impedance state can be used in place of the TRIAC in FIG. 3, for example, the USD is an IGBT, SCR, FET (Field Effect Transistor) or A combination of BJTs (bipolar junction transistors) can be used. Various possible implementations will be known to those skilled in the art.
[0018]
FIG. 4a shows that if the instantaneous voltage across anode A ′ and cathode K ′ exceeds a well-defined threshold Vl and has not yet exceeded a higher voltage threshold Vh, the device is low. Fig. 5 illustrates another USD when configured to change to an impedance state. That is, if the voltage V applied across the device in FIG. 4a is within a well-specified range from Vl to Vh, the device will enter its low impedance state and if outside this range, The device remains in its default high impedance mode. Due to this particular feature, the device is referred to as “break under” USD. Figures 4b and 4c show the circuit symbol and IV characteristics of the device, respectively.
[0019]
The implementation of the break under USD in FIG. 4a is similar to the implementation of the breakover device in FIG. The main difference is the presence of the capacitor C1 and the second transistor T2. Capacitor C1 limits the rate of change of voltage across R1. This limits the rate of change of voltage across the DIAC. Since the voltage across the DIAC is slow to rise, the voltage Y at the base of T2, as defined by the voltage divider R4 / R5, will reach the threshold of T2 before the DIAC voltage reaches its threshold Vd. When it becomes higher than the forward bias voltage across the base-emitter junction, transistor T2 turns on and shorts the gate of the TRIAC to K ′, thus any current flowing into the gate of the TRIAC. Hinder. Using this arrangement, the upper voltage threshold Vh can be set by the voltage divider R4 / R5 and the lower threshold Vl can be set as before by R1 / R2.
[0020]
In any breakunder device, once a voltage high enough to exceed the upper threshold Vh that holds the device in a high impedance state is applied once across its terminals, the applied voltage will have an amplitude. When descending at, the device can be arranged to remain in a high impedance state. In this mode, to change to the low impedance state, the current must be reduced to almost zero and reapplied. This latter device is called a break under USD with hysteresis.
[0021]
FIG. 5a shows the circuit symbol for a break under USD with hysteresis. FIG. 5b shows an implementation of this device based on the break under device shown in FIG. Only the differences are explained. The transistor T2 here forms a second emitter follower that feeds the second DIAC DIAC2. The voltage at point Y is designed to have a value equal to the threshold value of DIAC2 when the voltage V across A ′ and K ′ is equal to the upper threshold value Vh. From FIG. 5b, unlike the voltage at point X, the voltage at point Y instantaneously follows V and becomes part of V according to the ratio set by R4 and R5. If the voltage V causes the voltage at Y to exceed the voltage threshold of DIAC2, the second TRIAC TRIAC2 enters a low impedance state. As soon as TRIAC2 enters its low impedance state, the voltage at the base of T1 drops to almost zero. Once TRIAC2 enters the low impedance state, T1 cannot supply any current to DIAC1 and therefore to the gate of TRIAC1. This “feedback” extension of FIG. 4 introduced a level of hysteresis into the arrangement. The only way for TRIAC1 to enter its low impedance state at this time is to reduce the voltage across A ′, K ′ to zero, the lower threshold set by R1, R2 and DIAC1, and R4, R5 and Applying a new voltage having a value between the upper threshold set by DIAC2. This device has essentially three modes, two high impedances and one low impedance. When the instantaneous voltage applied to the arrangement is below the lower threshold value V1, the combination of R1, R2 and T1 means that DIAC1 does not carry current and TRIAC1 remains at its high impedance. When this applied voltage is higher than the lower threshold value Vl and lower than the upper threshold value Vh, the combination of R4, R5 and T2 causes DIAC2 to pass no current, once the voltage across C1 is Having enough time to rise, DIAC1 passes current through the gate of TRIAC1, meaning that TRIAC1 enters its low impedance state. However, if this applied voltage is higher than the upper threshold Vh, the combination of R4, R5 and T2 causes DIAC2 to pass current through the gate of TRIAC2, thereby suppressing DIAC1 and making TRIAC1 in its high impedance state. Keep on.
[0022]
It should be noted that any of the USDs of FIGS. 3-5 can be realized as a doped silicon layer in a single separate integrated device. No device requires any external control and conducts when the voltage across these two terminals A ′ and K ′ is above and / or below a specified threshold Does not have. Another feature is that in these low impedance states, they can only return to their high impedance state if the current through them is reduced to near zero. Exactly which current they drop out depends on the particular device used.
[0023]
FIG. 6 shows a basic embodiment of a defibrillator according to the present invention designed to provide a single phase output voltage pulse across patient electrode pairs A and B. FIG. The defibrillator includes an energy source 60 which is a capacitor charged by the charging circuit 62 in this example, and an output circuit for connecting a voltage to the capacitor between both ends of the electrodes A and B in response to generation of the control signal 64 And have. The output circuit includes a first current path connecting the + ve side of the energy source 60 to the electrode A, and a second current path connecting the −ve side of the energy source to the electrode B. The first current path includes a breakover USD USD1 (bo), and the second current path includes an IGBT IGBT1. Breakover USD1 (bo) is an energy source to a load (patient) connected across output electrodes A and B if the voltage applied from the energy source is high enough to exceed its threshold. The current from 60 is supplied. Breakover USD1 (bo) can be configured as described with reference to FIG.
[0024]
Initially, both sides of the load will encounter high impedance. Applying the gate drive pulse 64 to the IGBT 1 turns on the latter and reduces the overall energy source voltage across USD1 (bo). When the energy source is charged to a voltage above the threshold for USD1 (bo), the latter changes to its low impedance state. The energy source now initiates a discharge to the load. After a predetermined period, removing drive pulse 64 from the gate of IGBT 1 returns IGBT 1 to its high impedance state, and the current in the circuit is reduced to approximately zero. With nearly zero current, device USD1 (bo) recovers and the load once again encounters high impedance on both sides of A and B.
[0025]
Use of the USD between the electrode A and the + ve terminal of the energy source means that an isolated control circuit connection is not required. The only control element in the circuit of FIG. 6 is the gate of IGBT 1, which is referenced to the circuit ground so that no insulation barrier is required. If a conventional diode D1 is used and charging is improved, current is prevented from flowing back into the charging network. The output generated by the circuit of FIG. 6 is a simple single phase truncation exponential waveform.
[0026]
FIG. 6 shows only one USD in the first current path, but the voltage that can be withstood by the output circuit in the high impedance state is more than one in the first current path, as described above. It can be increased by converting the USD into a totem pole. Two or more USDs in series behave like a single USD with a threshold Vth that is actually the sum of the thresholds of the individual devices.
[0027]
FIG. 7 illustrates one embodiment of a defibrillator according to the present invention designed to provide a biphasic truncation exponential output voltage pulse across patient electrodes A and B. FIG. In essence, the embodiment of FIG. 6 was modified to provide third and third current paths indicated by dotted lines. The third current path connects the + ve side of the energy source 60 to the electrode B, and the fourth current path connects the −ve side of the energy source to the electrode A. The third current path includes two “totem poled” SCRs, SCR1, and SCR2, and the fourth current path includes other IGBTs, IGBT2. The first and second current paths are as before except that the first path is shown with two totem poled breakovers USD, USD1 (bo) and USD2 (bo). The USD may be as shown in FIG. For the reasons described above, the SCR has an insulated gate drive.
[0028]
In operation, energy source 60 is initially charged to a voltage that exceeds the threshold Vth of totem poled USD. Next, at time t0 (see FIG. 8), a gate pulse 64 is applied to the device IGBT1 to bring it into a low impedance state. This effectively adds the entire voltage of the energy source across the totem poled USD (using two USDs as described above to increase the voltage that the circuit can withstand). Thus, the USD is turned on (devices SCR1, SCR2 and IGBT2 remain in their high impedance state) and current flows from electrode A to electrode B through the load. As energy is removed from the energy source by the load, the voltage applied by the energy source decays. At later time t1, IGBT1 is removed from its gate signal and returned to its high impedance state. This reduces the current in the circuit to almost zero and the devices USD1 (do) and USD2 (do) return to their high impedance state. The instant t1 is selected so that at this point the voltage remaining in the energy source is below the threshold Vth of the totem pole devices USD1 (do) and USD2 (do).
[0029]
Here, at time t2 slightly after t1, the devices IGBT2, SCR1 and SCR2 are simultaneously driven by the gate drive pulse 64 ′ to bring them into their low impedance state. Here, the discharge current flows through the load in the opposite direction, ie from electrode B to electrode A. After another predetermined period of time has elapsed, the gate drive to device IGBT2 is removed and the current flowing in the circuit is reduced to almost zero. Again, this causes the two SCRs to return to their high impedance state. The resulting output is as shown in FIG.
[0030]
In this circuit, insulated gate drive is required for the SCR. However, only two such insulated gate drives are necessary in this case. The method used by the prior art requires at least four insulated gate drive circuits. Also, instead of the six control lines previously required, only a total of four devices need to be controlled.
[0031]
FIG. 9 shows a third embodiment of the present invention. This differs from the embodiment of FIG. 7 in that the totem poled SCRs, SCR1 and SCR2 have been replaced with totem poled breakunders USD, USD3 (bu) and USD4 (bu) with hysteresis.
[0032]
In operation, the energy source 60 is initially charged to a voltage that is higher than the totem poled breakover USD threshold Vth and higher than the totem poled break under USD upper voltage threshold Vh. Next, at time t0 (also used in this case, see FIG. 8), a gate pulse 64 is applied to the device IGBT1 to bring it into its low impedance state. This applies substantially the entire voltage of the energy source across totem poled breakovers USD, USD1 (do) and USD2 (do). All other devices remain in these high impedance states (because the break under USD is because the voltage is above their upper threshold Vh, otherwise they are turned on. This is important because it bypasses the load). Thus, the breakover USD is turned on and current flows from electrode A to electrode B through the load. As energy is removed from the energy source by the load, the voltage applied by the energy source decays. At later time t1, IGBT1 is removed from its gate signal and returned to its high impedance state. This reduces the current in the circuit to almost zero and the devices USD1 (do) and USD2 (do) return to their high impedance state. At this point in time, the voltage remaining in the energy source is less than the threshold Vth of the totem pole devices USD1 (do) and USD2 (do), but the totem pole devices USD3 (du) and USD4. Choose to be between upper and lower voltage thresholds Vl, Vh of (du).
[0033]
Here, at time t2 slightly after t1, a gate drive pulse 64 ′ is applied to the device IGBT2 to bring it into its low impedance state. Here, the devices USD3 (du) and USD4 (du) are turned on because the voltage applied across them is between their upper and lower voltage thresholds, and the discharge current causes the load to Flows in the opposite direction, ie from electrode B to electrode A. After another predetermined period of time, the gate drive to device IGBT2 is removed at t3 and the current flowing in the circuit is reduced to almost zero. Again, this causes USD3 (du) and USD4 (du) to return to their high impedance state. The resulting output is as shown in FIG.
[0034]
A special note is that for this arrangement, there is no isolated connection gate control connection to any of the devices in the circuit. Also, only two devices (IGBT1 and IGBT2) require a control signal, both of which have a direct electrical connection with respect to circuit ground. This is a significant saving in size and component cost. Furthermore, to control the entire circuit, only two control signals are required instead of the five that were otherwise required. The control circuit can simply pulse drive one IGBT, IGBT1 to generate a first phase of the output waveform, pulse the second IGBT, IGBT2, and second output A phase can be generated.
[0035]
FIG. 10 shows a fourth embodiment of the present invention. This differs from the embodiment of FIG. 9 in that the two IGBTs, IGBT1 and IGBT2 are each replaced with breakover USD, USD5 (bo) and breakunder USD, USD6 (bu). Moreover, IGBT (IGBT3) was added in common to the second and fourth current paths. For simplicity, as described above, two or more devices such as USD can be totem poled in each current path to increase the ability of the circuit to withstand higher voltages, A single USD (USD1 (bo) and USD2 (bu), respectively) is used in the first and third current paths. This arrangement adds another circuit element IGBT3, but the output circuit is fully automatic and all devices connected to the load across A and B are not controlled. The only control signal required is a signal returning to the gate of IGBT 3 in common ground.
[0036]
In operation, the energy storage device 60 is above the threshold value of the breakover devices USD1 (bo) and USD5 (bo) and is in a threshold range where USD3 (bu) and USD6 (bu) are in their low impedance state. By charging to a voltage high enough to not enter, the gate drive pulse 64 applied to the IGBT 3 turns on USD1 (bo) and USD5 (bo), causing the current to flow from A to B through the load. Shed in. After a predetermined period, removing the gate drive to IGBT 3 will, as before, reduce the current in the circuit to almost zero and return all devices to their high impedance state. The voltage across the energy storage device is now below the thresholds of USD1 (bo) and USD5 (bo), and further, the voltages are USD3 (bu) and USD6 (bu) If within the threshold required to enter the low impedance state, application of the second gate pulse 64 'to the IGBT 3 causes current to flow in the opposite direction from B to A through the load. Again, this generates the two-phase waveform of FIG.
[0037]
Note that not only is any isolated connection required for any of the devices, but only a single device need be applied with a gate drive signal in order to fully operate the entire circuit. This arrangement means that the entire output circuit including USD1 (bo), USD5 (bo), USD3 (bu), USD6 (bu) and IGBT3 can be easily realized as a single integrated solid component. It will be clear. This further means that the entire output stage is an integrated module in a single capsule requiring only five connections. These connections include a common ground connection, an input from an energy source, two output connections to electrodes A and B, and a single input control connection referenced to a common ground that can control the module. It is. FIG. 11 shows a block diagram of a circuit including such an integrated circuit 66, leaving the control terminal in the circuit that requires a standard TTL format signal, and including in this module a gate drive circuit for the IGBT. Note that you can. This represents a huge savings in cost, size and complexity.
[0038]
FIG. 10 is a variation of the one shown in FIG. 10, and the output circuit may be a single integrated circuit component. In the fifth embodiment of the present invention, the energy source is programmable instead of a passive capacitor. The active power source 68 is assumed. Referring to FIG. 12a, where the energy source is designed to provide a programmed constant DC voltage, this voltage is the conduction threshold of the breakover devices USD1 (bo) and USD5 (bo). Above Vth, set at a level above the low impedance threshold range of breakunder devices USD3 (bu) and USD6 (bu), current flows again from A to B through the load. Next, all the devices return to their high impedance state by setting the programmable power supply to supply a voltage of zero volts for a predetermined period of time. In addition, it supplies a voltage below the threshold of USD1 (bo) and USD5 (bo) and within the threshold range necessary for break under devices USD3 (bu) and USD6 (bu) to enter these low impedance states. By setting so that the current flows, the current flows from B to A in the opposite direction. The resulting waveform can be seen as an example in FIG. It is also possible to have several selectable energy sources by placing additional USD in the circuit arrangement. Which energy source should be used to supply the output circuit can be selected whenever it is desired to achieve the required pulse shape.
[0039]
The present invention thus provides an improved means by which a wide variety of pulses and pulse shapes can be generated more easily and with fewer components than are currently available by other means.
[0040]
Other current paths, including USD or other solid state devices, are added between the energy source and electrodes A and B in any of the circuits described above, thereby providing a third, fourth or subsequent phase. It should be understood that can be added at a predetermined polarity.
[0041]
It should also be understood that other protection components may actually be required for reliable operation of the circuit. As an example, an inductor can be placed in series with the output of the energy source to limit the rate of change of current in the circuit. Such additions are known to those skilled in the art.
[0042]
As indicated above, it is known to those skilled in the art to use totem polling to increase the voltage that the circuit can withstand. Thus, in all of the above embodiments, each current path to or from electrode A or B is a single USD or other solid state device, or two or more totem poled according to voltage requirements. Only devices such as these can be included.
[0043]
The present invention is not limited to the embodiments described herein, and these embodiments can be modified or changed without departing from the scope of the present invention.
[Brief description of the drawings]
FIG. 1 is a circuit showing the “totem pole” of two SCRs that allow a combination of two SCRs to withstand higher voltages than a single device.
FIGS. 2A and 2B are a substrate configuration, a circuit symbol, and an I = V characteristic of a Schottky diode, respectively.
FIG. 3 is a circuit diagram of a breakover USD.
FIG. 4a is a circuit diagram of break under USD.
FIG. 4b is a circuit symbol of break under USD.
FIG. 4c is an I = V characteristic of break under USD.
FIG. 5a is a circuit symbol of break under USD having hysteresis.
FIG. 5b is a circuit diagram of a break under USD having hysteresis.
FIG. 6 is a circuit diagram of a first embodiment of a defibrillator according to the present invention.
FIG. 7 is a circuit diagram of a second embodiment of a defibrillator according to the present invention.
FIG. 8 shows an example of a waveform that can be generated by the embodiment of FIG.
FIG. 9 is a circuit diagram of a third embodiment of a defibrillator according to the present invention.
FIG. 10 is a circuit diagram of a fourth embodiment of a defibrillator according to the present invention.
FIG. 11 shows a fourth embodiment when the output circuit is realized as a single-encapsulated integrated circuit component.
12a is a circuit diagram of a fifth embodiment of a defibrillator according to the present invention. FIG.
FIG. 12b shows an example of a waveform that can be generated by the embodiment of a.

Claims (6)

A first electrode and a second electrode Ru attached to the patient, a voltage source, and an output circuit for connecting the voltage source in response to the occurrence of at least one control signal between the first electrode and the second electrode In the defibrillator, the output circuit includes a first current path that connects one side of the voltage source to the first electrode, and a second current path that connects the other side of the voltage source to the second electrode. Two current paths, a third current path connecting the one side of the voltage source to the second electrode, and a fourth current path connecting the other side of the voltage source to the first electrode. Each of the first current path to the fourth current path includes at least one solid-state switching device, each of the at least one solid-state switching device having two terminals, the first current path and the Said in each of the third current paths; At least one solid-state switching device is an uncontrolled two-terminal solid-state device that automatically transitions from a high impedance state to a low impedance state when a voltage higher than a predetermined threshold is applied between the two terminals. The at least one solid-state switching device in the first current path unconditionally transitions to the low impedance state when a voltage applied between the two terminals of the solid-state switching device exceeds a predetermined threshold value. The voltage applied between the two terminals of the at least one solid-state switching device in the third current path exceeds the first predetermined threshold, but the second predetermined threshold The defibrillator is characterized by transitioning to the low impedance state when not exceeding . 2. The defibrillator as claimed in claim 1, wherein each of the second current path and the fourth current path includes a controlled solid-state switching device. 2. The defibrillator according to claim 1, wherein the voltage applied between the two terminals of the at least one solid-state switching device in the second current path exceeds a predetermined threshold value. Unconditionally transition to the low impedance state, and the voltage applied between the two terminals of the at least one solid-state switching device in the fourth current path is a first predetermined threshold value. To the low impedance state when the second predetermined threshold is not exceeded, and the output circuit is controlled solid-state switching common to the second current path and the fourth current path. A defibrillator comprising a device. 4. The defibrillator as claimed in claim 1, wherein the voltage source is a capacitor. 4. A defibrillator as claimed in any one of claims 1 to 3, wherein the voltage source is a programmable voltage source. 6. The defibrillator as claimed in claim 1, wherein the output circuit is a single integrated solid state device.

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