JP4282328B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a nitride film capacitor and a polysilicon resistor.
[0002]
[Prior art]
As a manufacturing method of a semiconductor device for forming a semiconductor device in which a capacitor and a polysilicon resistor are added to a MOS element, a method described in Patent Document 1 has been proposed. A method for manufacturing the conventional semiconductor device will be described below.
[0003]
In a conventional method for manufacturing a semiconductor device, first, an element isolation locos is formed on a silicon substrate by a known method. Thereafter, an oxide film and a polysilicon film are formed, phosphorus is ion-implanted into the polysilicon film, and a polysilicon resistor and a capacitor lower electrode are formed by photolithography and dry etching.
[0004]
Next, oxidation is performed at about 1000 ° C. Then, after forming the nitride film, the nitride film is left on the polysilicon by photolithography and dry etching. Further, after forming a polysilicon film, thermal oxidation is performed, and a MOS gate portion and a capacitor upper electrode are formed by photolithography and dry etching.
[0005]
In the conventional method for manufacturing a semiconductor device disclosed in Patent Document 1, ion implantation is then performed on the polysilicon resistor portion to form several types of polysilicon resistors. Thereafter, an insulating film such as an oxide film or a BPSG film is formed by a well-known method, and after opening a contact, a metal wiring is formed.
[0006]
When this contact opening is performed, only the BPSG film is formed on the MOS element and the capacitor, but on the polysilicon resistor, a laminated film (hereinafter referred to as a silicon oxide film / nitride film / silicon oxide film) is formed under the BPSG film. Abbreviated as ONO film). In order to etch this ONO film as well, it is necessary to perform a lot of dry etching, and the MOS element that is only the BPSG film and the silicon in the opening of the capacitor are dry-etched. Concerned.
[0007]
That is, in the conventional method for manufacturing a semiconductor device in Patent Document 1, first, a polysilicon resistor and a capacitor lower electrode polysilicon are selectively formed on LOCOS by selective etching.
[0008]
Thereafter, a capacitor dielectric having a laminated structure of silicon oxide film / nitride film / silicon oxide film is formed. Thereafter, polysilicon is deposited, and the MOS gate portion polysilicon and the capacitor upper electrode polysilicon are formed by selective etching.
[0009]
[Patent Document 1]
JP-A-11-145404 (Description of paragraph number [0027] to paragraph number [0047], FIG. 1, FIG. 3, FIG. 4)
[0010]
[Problems to be solved by the invention]
However, in this manufacturing method, first, since the polysilicon resistance is oxidized twice, the size and thickness vary, and it is considered that a highly accurate resistance value cannot be obtained.
[0011]
Second, when forming the MOS gate part and the capacitor upper electrode by dry etching, there is a problem that the polysilicon remains and the polysilicon is left beside the capacitor lower electrode.
[0012]
Thirdly, if dry etching is frequently performed, there is a concern that the underlying ONO film, further polysilicon resistance, and silicon in the source and drain regions beside the MOS gate will be etched. In order to prevent this, if the ONO film, which is a capacitor dielectric, is thickened, a large-capacity capacitor cannot be formed, and the under-gate oxide film is thickened, resulting in a problem that the MOS element cannot be enhanced.
[0013]
In other words, since the polysilicon resistor is oxidized by the oxide film formation at a high temperature after the polysilicon resistor is formed, there is a concern that the absolute accuracy and the relative accuracy may be deteriorated, and after the second polysilicon film formation, At the time of selective etching, polysilicon is likely to remain in the step portion on the side of the polysilicon of the polysilicon resistor and the capacitor lower electrode, which makes it difficult to manufacture stably. Further, when the contact is opened, the region where only the BPSG film is etched and BPSG Since there is a region where the film and the ONO film are etched, it is difficult to perform stable manufacturing.
[0014]
Therefore, in view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device that solves these problems.
[0015]
[Means for Solving the Problems]
In the present invention, first, a first polysilicon resistor is formed on LOCOS by selective etching, and a gate portion polysilicon is formed in the MOS region by selective etching. Thereafter, an oxide film to be a gate side wall film is formed to form a nitride film capacitor and second and third polysilicon resistors.
[0016]
According to this method, it is not necessary to form an oxide film at a high temperature after forming the polysilicon resistor, so the polysilicon resistor is not oxidized, and both the absolute accuracy and relative accuracy of the polysilicon resistor are good.
[0017]
In addition, since the gate side wall film also serves as a base protective film during dry etching, a lot of dry etching can be performed, and the polysilicon remaining in the stepped portion can be eliminated.
[0018]
Then, by making the insulating film structure of each element the same when the contact is opened, variations due to etching can be eliminated.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Next, in order to clarify the above features and advantages of the present invention, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described in detail below with reference to the accompanying drawings.
[0020]
A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a schematic cross-sectional view of a semiconductor device to which the method for manufacturing a semiconductor device of the present invention is applied.
[0021]
Referring to FIG. 1, a semiconductor device according to the present invention includes a silicon substrate 1, an element isolation locus 2 formed on the silicon substrate 1 by a known semiconductor device manufacturing method, a region of a MOS portion 3, a capacitor portion. 5 regions.
[0022]
Further, the semiconductor device according to the present invention includes a thermal oxide film 6 having a thickness of about 16 nm, a polysilicon film 7 having a thickness of about 150 nm, a tungsten silicide film 8 having a thickness of about 150 nm, and a resist by photolithography. CVD oxide having a film thickness of about 200 nm which becomes a sidewall film of the MOS part gate 9 formed by dry etching, the first polysilicon resistor 10a, and the gate part 9 and also serves as a base protective film during dry etching. A film 11, a nitride film 12 having a thickness of about 30 nm serving as a dielectric of the capacitor 5, a top electrode of the capacitor 5, and a polysilicon film 13 having a thickness of about 250 nm serving as the second and third polysilicon resistors And a CVD oxide film 18 having a thickness of about 30 nm.
[0023]
Next, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS.
[0024]
In the method of manufacturing a semiconductor device according to the embodiment of the present invention, first, as shown in FIG. 2A, the element isolation LOCOS 2 and the silicon substrate 1 are formed on the silicon substrate 1 by a known semiconductor device manufacturing method. The region of the MOS unit 3 and the region of the capacitor unit 5 are formed.
[0025]
Thereafter, a thermal oxide film 6 having a thickness of about 16 nm and a polysilicon film 7 having a thickness of about 150 nm are formed, and impurities such as phosphorus are diffused so that the polysilicon film 7 has a layer resistance of about 40Ω / □. To do.
[0026]
Thereafter, as shown in FIG. 2B, a tungsten silicide film 8 having a thickness of about 150 nm is formed, and a resist is left on the gate of the MOS part 3 and the polysilicon resistor by photolithography, and the MOS part is dry-etched. 3 gate 9 and first polysilicon resistor 10a are formed.
[0027]
Next, as shown in FIG. 2C, a CVD oxide film 11 having a thickness of about 200 nm to be the gate side wall film 14 is formed, and then only the capacitor region 5 is opened by photolithography to perform wet etching. Thus, the CVD oxide film 11 is etched.
[0028]
Then, as shown in FIG. 3A, a nitride film 12 having a thickness of about 30 nm is formed as a capacitor dielectric. Then, an upper electrode of the capacitor 5 and a polysilicon film 13 having a thickness of about 250 nm to be a polysilicon resistor are formed.
[0029]
Thereafter, as shown in FIG. 3B, an impurity such as phosphorus is ion-implanted at a dose of about 1.5E15 cm ⁻² , and annealing is performed by heat treatment at 900 ° C. for about 10 minutes. In addition, as heat processing temperature, 950 degreeC is set to MAX.
[0030]
Next, the resist is left on the capacitor and the polysilicon resistor by photolithography, and the capacitor 5 and the second polysilicon resistors (10b-1, 10b-2) are formed by dry etching.
[0031]
Thereafter, as shown in FIG. 3C, the diffusion layer forming region in the MOS element region is opened by photolithography, and the CVD oxide film 11 is etched by dry etching, thereby forming the gate side wall film 14.
[0032]
Next, as shown in FIG. 3D, a CVD oxide film 18 having a thickness of about 30 nm is formed, and ions such as chin and boron are implanted into the MOS region. At this time, the third polysilicon resistor 10c is formed by ion implantation into the second polysilicon resistor (10b-2).
[0033]
Thereafter, an insulating film 16 such as an oxide film or a BPSG film is formed by a well-known method, and a metal wiring 17 is formed after opening the contact.
[0034]
According to this method, it is not necessary to form an oxide film at a high temperature after forming the polysilicon resistor, so the polysilicon resistor is not oxidized, and both the absolute accuracy and relative accuracy of the polysilicon resistor are good.
[0035]
In addition, since the gate side wall film 14 also serves as a base protective film during dry etching, a lot of dry etching can be performed and the remaining polysilicon in the stepped portion can be eliminated.
[0036]
Then, by making the insulating film structure of each element the same when the contact is opened, variations due to etching can be eliminated.
[0037]
【The invention's effect】
As described above, according to the present invention, in a method of manufacturing a semiconductor device having a MOS element, after forming a gate of a MOS, a sidewall film is formed, and then a nitride film capacitor and a polysilicon resistor are formed. Thus, a stable and highly accurate product can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a semiconductor device to which a method for manufacturing a semiconductor device of the present invention is applied.
2 is a schematic cross-sectional view of the semiconductor device shown in FIG. 1 to which the semiconductor device manufacturing method of the present invention is applied, and FIGS. 2 (a) to 2 (c) show the manufacturing method in the order of steps; It is.
3 is a schematic cross-sectional view of the semiconductor device shown in FIG. 1 to which the method of manufacturing a semiconductor device of the present invention is applied, and FIGS. 3 (a) to 3 (d) are continued from FIG. 2 (c); It is the figure which represented the manufacturing method in process order.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 LOCOS for element isolation 3 MOS part 5 Nitride film capacitor 6 Thermal oxide film 7 Polysilicon film 8 Tungsten silicide film 9 MOS part gate 10a 1st polysilicon resistance 10b 2nd polysilicon resistance 10c 3rd poly Silicon resistors 10b-1, 10b-2 Second polysilicon resistor 11 CVD oxide film 12 serving as gate side wall film Nitride film 13 serving as capacitor dielectric Capacitor upper electrode and polysilicon film 14 serving as polysilicon resistor Gate portion Sidewall film 16 Insulating film 17 such as oxide film and BPSG film Metal wiring 18 CVD oxide film

Claims (8)

A method of manufacturing a semiconductor device in which a MOSFET element, a capacitor element, a first polysilicon resistance element, a second polysilicon resistance element, and a third polysilicon resistance element are formed on a semiconductor substrate. And
An element isolation oxide film forming step of forming an element isolation oxide film on the semiconductor substrate;
A thermal oxide film forming step of forming a thermal oxide film on the semiconductor substrate after the element isolation oxide film forming step ;
A first polysilicon film forming step of forming a first polysilicon film on the thermal oxide film and the element isolation oxide film;
A first ion implantation step of implanting ions into the first polysilicon film;
The first polysilicon film is formed by etching the ion-implanted first polysilicon film to form the gate of the MOSFET element on the thermal oxide film and the first polysilicon resistance element on the element isolation film. A film removal step;
A CVD oxide film forming step of forming a first CVD oxide film on the semiconductor substrate after the first polysilicon film removing step;
An oxide film etching step of etching the first CVD oxide film of the capacitive element portion;
A nitride film / second polysilicon film forming step for sequentially forming a nitride film and a second polysilicon film on the semiconductor substrate after the oxide film etching step;
A second ion implantation step of implanting ions into the second polysilicon film;
The nitride film and the second polysilicon film ion-implanted in the second ion implantation process are etched to form an upper electrode of the capacitor element, the second polysilicon resistance element, and the third polysilicon film. A second polysilicon film removing step for forming a resistance element;
A diffusion region opening step for etching the first CVD oxide film on the diffusion region of the MOSFET element and the first polysilicon resistance element;
A method of manufacturing a semiconductor device, comprising: a third ion implantation step of implanting ions into the diffusion region and the third polysilicon resistance element after the diffusion region opening step.   2. The method of manufacturing a semiconductor device according to claim 1, wherein a sidewall film of the gate is formed by the etching in the step of opening the diffusion region.   3. The semiconductor manufacturing apparatus according to claim 2, wherein, in the CVD oxide film forming step, a first CVD oxide film is formed at least on the MOSFET element and the first polysilicon resistance element. Manufacturing method.   In the second polysilicon film removing step, an upper electrode of the capacitor element, the second polysilicon resistor element, and the third polysilicon resistor element are formed, and the MOSFET element and the first polysilicon resistor are formed. 4. The method of manufacturing a semiconductor manufacturing apparatus according to claim 3, wherein the second polysilicon film on the element is removed.   5. The method of manufacturing a semiconductor device according to claim 4, wherein in the first polysilicon film removing step, the gate of the MOSFET element and the first polysilicon resistance element are formed simultaneously.   6. The method of manufacturing a semiconductor device according to claim 1, wherein phosphorus is ion-implanted in the first ion implantation step, and arsenic or boron is ion-implanted in the third ion implantation step. .   The method of manufacturing a semiconductor device according to claim 1, wherein the nitride film forms a dielectric of the capacitive element. The element isolation oxide film step, the thermal oxide film formation step, the first polysilicon film formation step, the first ion implantation step, the first polysilicon film removal step, and the CVD oxide film formation step. A film process, the oxide film etching process, the nitride film / second polysilicon film formation process, the second ion implantation process, the second polysilicon film removal process, and the diffusion region opening process, The method of manufacturing a semiconductor device according to claim 1, wherein the third ion implantation step is sequentially performed.

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