JP4281488B2 - Wiring formation method - Google Patents

Description

  The present invention relates to a wiring forming method, a micro tile element, a circuit device, and an electronic apparatus.

Conventionally, an epitaxial lift-off (ELO) method has been devised in which a semiconductor element formed on a certain substrate is separated from the substrate into a minute tile shape to produce a minute tile-shaped element (semiconductor element). The micro tile-like element is handled and attached to an arbitrary substrate (final substrate), thereby forming a substrate including a thin film device (see, for example, Patent Document 1).
JP 2000-58562 A

  By the way, the electrodes (terminals) included in the micro tile-like element and the terminals of the circuit provided on the final substrate are connected by electric wiring. The electrical wiring is, for example, when the electrode provided on the upper surface of the micro tile-shaped element to be wired and the upper surface or side surface of the micro tile-shaped element have different polarities, the upper surface or side surface of the micro tile-shaped element. Must be formed across.

  However, if the electrical wiring is composed of an aerial wiring such as a wire bond, the wiring takes a lot of trouble, and it is difficult to make a very small wiring, and a great manufacturing cost is required. In addition, if the electrical wiring is formed using a technique such as vapor deposition of a metal thin film or photolithography, a mask having a desired pattern has to be formed, and a great manufacturing cost is required. Dealing with changes also requires significant costs.

  In contrast to these methods, it is conceivable to take a method of forming electric wiring by discharging droplets (liquid material) containing metal from an inkjet nozzle or a dispenser onto a substrate. In the formation of the electrical wiring using this droplet discharge method, it is not necessary to form a mask, and the constituent material of the electrical wiring is not wasted by etching, so that the manufacturing cost can be reduced. However, when the lyophilicity (wetting property) of the substrate surface is high, the liquid material ejected and applied thereto wets and spreads, making it difficult to form a fine wiring pattern. Also, when the wettability of the substrate surface is low, that is, when the liquid repellency is high, the width of the wiring pattern can be reduced, but the adhesion between the substrate and the wiring deteriorates, and disconnection is likely to occur. Reliability deteriorates.

The present invention has been made in view of the above circumstances, and when forming an electrical wiring using a liquid material, a wiring forming method capable of forming a highly reliable electrical wiring having a fine wiring pattern. Another object is to provide a micro tile element, a circuit device, and an electronic apparatus.
Further, in the present invention, when a thin tile device is pasted on a substrate to form a thin film device (circuit device), the thin film device can be miniaturized, and the wiring of the thin film device is short-circuited or disconnected while reducing the manufacturing cost. It is an object of the present invention to provide a wiring formation method, a micro tile element, a circuit device, and an electronic device that can reduce the occurrence of the problem.

In order to achieve the above object, one of the wiring forming methods of the present invention uses a first substrate and a second substrate having a wiring region, and forms a convex component on the first substrate. The convex component is cut out from the first substrate, and the convex component is joined to the second substrate, thereby providing a convex levee at least at a part of the periphery of the wiring region, An electrical wiring is formed in the wiring region by applying a liquid material containing a conductive material on the wiring region.
In one of the above-described wiring forming methods of the present invention, the liquid material is preferably applied using a droplet discharge method.
In one of the above-described wiring forming methods of the present invention, the levee preferably has an insulating property.
In one of the above-described wiring forming methods of the present invention, the bank is preferably made of polyimide.
In one of the above-described wiring forming methods of the present invention, it is preferable that the liquid material is applied after the surface of the bank is subjected to a liquid repellent treatment.
In one of the above-described wiring forming methods of the present invention, it is preferable that the liquid material is applied after lyophilic treatment is performed on the wiring region.
In one of the above-described wiring forming methods of the present invention, it is preferable that the convex component is formed on the first substrate using a photolithography method.
In one of the above-described wiring forming methods of the present invention, it is preferable that the convex component is formed on the first substrate using a photocurable material or a thermosetting material.
In one of the above-described wiring forming methods of the present invention, it is preferable that at least a part of the first electric wiring is formed on the second electric wiring formed in the wiring region.
In one of the above-described wiring forming methods of the present invention, an electronic functional part is further formed on the first substrate, and the electronic functional part and the convex component are cut off from the first substrate. It is preferable that the electronic functional unit and the bank are provided on the second substrate by forming a tile-like element and bonding the micro tile-like element to the second substrate.
In order to achieve the above object, the wiring forming method of the present invention is a region surrounded by the bank by providing a convex bank (partition) so as to surround at least a part of the electrode provided on the substrate. An electrical wiring is formed in the wiring region by applying a liquid material containing a conductive material in the wiring region. According to the present invention, the liquid material applied in the wiring region is surrounded by the bank. Therefore, even if the liquid material is sufficiently injected into the wiring region, the bank can prevent the liquid material from flowing out of the wiring region. Therefore, according to the present invention, it is possible to accurately apply the liquid material only in the wiring region regardless of whether the wiring region is lyophilic or liquid repellent, and the wiring region has a fine wiring pattern. A highly reliable electrical wiring can be formed.

  In the wiring forming method of the present invention, a convex bank is provided on at least a part of the outline (boundary) of the wiring region, which is a region where electric wiring is to be formed on the substrate, and a conductive material is provided in the wiring region. An electrical wiring is formed in the wiring region by applying a liquid material containing the material. According to the present invention, for example, when there is an approaching part in a part of two electrical wirings, a short circuit between the two electrical wirings is avoided by providing a bank only at the outline of the wiring area in the vicinity of the approaching part. be able to. Therefore, even if the liquid material is sufficiently injected into the wiring region, the bank can prevent the liquid material from flowing out to other wiring regions. Therefore, according to the present invention, even if the wiring region is lyophilic or lyophobic, it is possible to prevent the wiring from being short-circuited. Can be achieved.

  In the wiring forming method of the present invention, it is preferable that the liquid material is applied using a droplet discharge method. In this case, the liquid material can be easily injected and applied in the wiring region surrounded by the bank by discharging liquid material droplets from an inkjet nozzle or the like. Therefore, it is not necessary to form a mask, and the constituent material of the electric wiring is not wasted by etching, so that the manufacturing cost can be reduced. The levee may have insulating properties. In this way, higher density wiring and electronic circuits can be formed. The levee may be made of polyimide.

  Moreover, the wiring formation method of this invention is good also as apply | coating the said liquid material after performing a liquid repellent process on the surface of the said bank. According to the present invention, for example, the liquid material that has landed near the boundary of the wiring region spreads wet to a part of the wiring region and the surface of the levee, but the liquid material applied to the surface of the levee is ejected from the surface of the levee. Is pushed back into the wiring area. Therefore, it is possible to form a wiring pattern having a higher accuracy and avoid a short circuit. The liquid material may be applied after lyophilic treatment is performed on a region (wiring region) surrounded by the bank. According to the present invention, since the liquid material that has landed at a certain location in the wiring area can spread to every corner of the wiring area, the liquid material leaks to all of the wiring area without accurately controlling the landing position. The liquid material can be applied without any problem.

  Moreover, the wiring formation method of this invention is good also as providing the said bank using the photolithographic method. Moreover, the said bank may be provided using a photocurable material or a thermosetting material. For example, the levee having a desired pattern is formed by applying a photocurable material or a thermosetting material to the entire surface of the substrate, and selectively irradiating light only to a region where the levee is provided.

  In the wiring forming method of the present invention, the constituent member forming the bank is formed on the first substrate which is a substrate different from the second substrate which is the substrate on which the electrical wiring is formed, and the first substrate is used to form the dam It is good also as providing the said dike in this 2nd board | substrate by cutting out the structural member which makes a dike, and joining this structural member to the said 2nd board | substrate. According to the present invention, after the embankment is once formed on the first substrate, the embankment can be formed on the second substrate by transferring the embankment to the second substrate. Therefore, according to this invention, since only the member which comprises the said bank is once made, the bank member can also be diverted to various board | substrates and manufacturing cost can be reduced. Further, only the bank member can be inspected and tested, and the reliability can be improved. Further, the first substrate and the second substrate may be made of completely different materials (for example, the first substrate is a resin and the second substrate is a semiconductor). Moreover, as a method of forming the bank on the first substrate, the above-described photolithography method, a method using a photocurable material, or a thermosetting material can be used.

  In the wiring forming method of the present invention, at least an electronic functional part and a constituent member forming the bank are formed on a first substrate that is a substrate different from a second substrate that is a substrate on which the electrical wiring is formed. Then, the electronic functional unit and the structural member forming the bank are cut from the first substrate to form a micro tile element, and the micro tile element is joined to the second substrate, thereby the second substrate It is preferable to provide the electronic function part and the bank. According to this invention, the member which comprises the said bank can be formed in the process of forming a micro tile-shaped element on a 1st board | substrate. Therefore, the dike can be formed on the second substrate only by joining the micro tile-like element to the second substrate. Therefore, for example, the dike for forming the electrical wiring that connects the electrode of the micro tile-shaped element joined to the second substrate and the electrode of the second substrate with a liquid material can be provided without increasing the number of steps. . Thus, according to the present invention, when a thin tile device is attached on a substrate to form a thin film device (such as a semiconductor device), the wiring for the thin film device is short-circuited while suppressing the manufacturing cost The increase in parasitic capacitance can be reduced.

  Further, in the wiring forming method of the present invention, the constituent member forming the bank surrounds at least a part of the electrodes included in the electronic functional part of the first substrate and at least a part of the electrodes of the second substrate. It is preferable to arrange in the position. According to the present invention, the levee can be formed so as to surround the wiring region of the electrical wiring that connects the electrode of the micro tile-shaped element joined to the second substrate and the electrode of the second substrate. Therefore, by applying the liquid material to the wiring region, the electrical wiring for connecting the electrode of the micro tile element and the electrode of the second substrate can be finely and highly reliable at low cost. Can be formed. Further, since the dike can be arranged at a desired position at least with respect to the electrode on the micro tile element side and is transferred to the second substrate as a part of the micro tile element in the arrangement, at least the electrode on the micro tile element side In contrast, electric wiring can be formed by self-alignment. Therefore, according to the present invention, the electrical wiring arranged with high accuracy with respect to the minute electrode on the minute tile-shaped element can be formed using the liquid material.

  In the wiring forming method of the present invention, it is preferable that the constituent members constituting the bank are formed in the same layer as the insulating layer included in the electronic functional part (part to be a micro tile element) in the first substrate. If it does in this way, the shape of the insulating layer in the 1st substrate can only be made into the shape which constitutes a dike, and the dike can be provided without adding other processes, and the dike can be provided at low cost. Can be provided. Moreover, it is good also as arrange | positioning an electrode on the insulating layer in a said 1st board | substrate. If it does in this way, while an insulating layer insulates the electrode of a micro tile-like element from other desired members, a part of the insulating layer will constitute the embankment. Therefore, since this insulating layer has the insulating function of the electrode and the bank function of the liquid material forming the wiring, further cost reduction and downsizing can be achieved. Accordingly, the electric wiring formed by the wiring forming method of the present invention can electrically connect the electrode of the micro tile-shaped element bonded to the second substrate and the electrode of the second substrate.

  Further, in the wiring forming method of the present invention, there are at least two regions surrounded by the dike or the wiring region, and the at least two regions are on opposite sides of the micro tile-shaped element bonded to the second substrate. Are preferably arranged so that the regions intersect each other. According to the present invention, the two wiring regions are formed so as to sandwich the micro tile element. Therefore, even if the liquid material overflows from the wiring area, the micro tile element (tile part) prevents the overflowing material from entering the other wiring area, that is, the tile part works as an obstacle. Short circuit can be avoided.

  The micro tile element of the present invention is a micro tile element in which an electronic functional part formed on a first substrate is separated from the first substrate into a micro tile shape, and the tile unit has a tile shape. And the micro tile-like element is disposed so as to surround at least a part of an electrode provided on the second substrate when the micro tile-like element is bonded to a second substrate which is a substrate different from the first substrate. And a convex bank portion having a connecting portion with the tile portion. According to the present invention, after bonding the micro tile-shaped element to the second substrate, the liquid material containing the conductive material is applied to the region surrounded by the bank portion, and thereby the electric wiring is formed in the region. Can be formed. Therefore, regardless of whether the wiring region is lyophilic or lyophobic, the liquid material can be accurately applied only in the wiring region, and a fine wiring pattern and highly reliable electrical wiring can be obtained. Can be formed. Further, according to the present invention, the levee can be formed on the second substrate only by joining the micro tile-like element to the second substrate. Therefore, for example, the dike for forming the electrical wiring that connects the electrode of the micro tile-shaped element joined to the second substrate and the electrode of the second substrate with a liquid material can be provided without increasing the number of steps. . Thus, according to the present invention, when a thin tile device is attached on a substrate to form a thin film device (such as a semiconductor device), the wiring for the thin film device is short-circuited while suppressing the manufacturing cost The increase in parasitic capacitance can be reduced.

  Further, the micro tile element of the present invention has an electrode, and the bank portion surrounds at least a part of the electrode of the micro tile element and at least a part of the electrode of the second substrate. Are preferably arranged. According to the present invention, the dike is formed so as to surround the wiring region of the electric wiring that connects the electrode of the micro tile element and the electrode of the second substrate by bonding the micro tile element to the second substrate. be able to. Therefore, by applying the liquid material to the wiring region, the electrical wiring for connecting the electrode of the micro tile element and the electrode of the second substrate can be finely and highly reliable at low cost. Can be formed. Further, since the dike can be arranged at a desired position at least with respect to the electrode on the micro tile element side and is transferred to the second substrate as a part of the micro tile element in the arrangement, at least the electrode on the micro tile element side In contrast, electric wiring can be formed by self-alignment. Therefore, according to the present invention, the electrical wiring arranged with high accuracy with respect to the minute electrode on the minute tile-shaped element can be formed using the liquid material.

  Moreover, it is preferable that the micro tile-like element of the present invention has an insulating layer, and the bank portion is formed in the same layer as the insulating layer. According to the present invention, it is possible to provide the levee without adding other processes only by making the shape of the insulating layer in the first substrate into a shape that constitutes the levee, and the function can be achieved at low cost. A bank can be provided. Moreover, it is preferable that the electrode of the micro tile element of the present invention is formed on the insulating layer. According to the present invention, since the insulating layer has the insulating function of the electrodes and the bank function of the liquid material forming the wiring, further cost reduction and downsizing can be achieved.

  Further, in the micro tile-like element of the present invention, there are at least two regions surrounded by the bank portion, and the at least two regions are disposed opposite to one side and the other side of the tile portion. Preferably it is. According to the present invention, two wiring regions are formed so as to sandwich the fine tile-like element in a state where the fine tile-like element is bonded to the second substrate. Therefore, even if the liquid material overflows from the wiring area, the tile part of the micro tile element prevents the overflowing material from entering the other wiring area, that is, the tile part is an obstacle (embankment part). ) To avoid short circuit. In the micro tile element of the present invention, it is preferable that the levee portion is formed in a ring shape. If it does in this way, the embankment part which forms the outline of a wiring field continuously without a break can be provided only by joining a micro tile-like element to the 2nd substrate.

  In addition, the circuit device of the present invention includes the micro tile element and the second substrate to which the micro tile element is bonded. Moreover, it is preferable that the circuit apparatus of this invention has provided the electrical wiring in the area | region enclosed by the said embankment part. In the circuit device of the present invention, it is preferable that the electrical wiring electrically connects the electrode of the micro tile-shaped element and the electrode of the second substrate. According to the present invention, there is provided a circuit device (thin film device) having a configuration in which a micro tile element is bonded to a substrate, and has an electrical wiring for electrically connecting the micro tile element and the substrate. It is possible to provide a circuit device in which the wiring is formed of a fine wiring pattern and has a low probability of disconnection and short circuit and high reliability.

  An electronic apparatus according to the present invention includes the circuit device. According to the present invention, an electronic device including a micro tile-shaped element formed by using an epitaxial lift-off (ELO) method can be made compact, and the cost is low as a device with low occurrence of short-circuit failure and disconnection failure. Can be offered at.

<Micro tile element>
Hereinafter, the micro tile element according to the present invention and the wiring forming method according to the present invention will be described. In the present embodiment, an electrical wiring that electrically connects an electrode on a micro tile element and an electrode on another substrate (final substrate) will be described as an example, but the present invention is not limited to this. . FIG. 1 is a view showing an example of a micro tile element according to an embodiment of the present invention, FIG. 1 (a) is a sectional view, and FIG. 1 (b) is a plan view.

  The micro tile element 1 is a micro tile semiconductor element. However, the micro tile-shaped element 1 is not limited to a semiconductor element, and may be a tile-shaped member having an electrode or an electronic functional part. The micro tile-like element 1 is a plate-like member having a thickness of 20 μm or less and a vertical and horizontal size of several tens to several hundreds of μm, for example. In the manufacturing method of the micro tile element 1, a sacrificial layer is formed on a semiconductor substrate (first substrate), and a functional layer (electronic function part) forming the micro tile element 1 is laminated on the sacrificial layer. Next, the micro tile-shaped element 1 is completed by etching the sacrificial layer to separate the micro tile-shaped element 1 from the semiconductor substrate. A method for manufacturing the micro tile element 1 using such an epitaxial lift-off (ELO) method will be described in detail later.

  In the present embodiment, an example in which the micro tile-like element 1 includes a surface-emitting laser (VCSEL) is described. However, the present invention is not limited to this as described above. Absent. The micro tile element 1 includes a tile portion 11 made of an n-type semiconductor, an active layer (not shown), a p-type semiconductor 12, an insulating layer (insulating portion) 13, an anode electrode (electrode portion) 14, A cathode electrode 15 and bank portions 16a and 16b are provided. FIG. 2 is a plan view showing components of the micro tile element 1 shown in FIG. 2A shows the tile portion 11 and the p-type semiconductor 12, FIG. 2B shows the insulating layer 13 and the bank portions 16 a and 16 b, and FIG. 2C shows the anode electrode 14 and the cathode electrode 15. It shows.

  The tile unit 11 constitutes a DBR (Distributed Bragg Reflector) mirror made of, for example, an n-type AlGaAs multilayer film. An active layer is laminated on the tile portion 11. The active layer is laminated in a thin cylindrical shape in a region near the center on the upper surface of the tile portion 11, and is made of, for example, AlGaAs. As shown in FIG. 2A, the p-type semiconductor 12 is stacked in a cylindrical shape on the upper surface of the active layer on the tile portion 11, and constitutes a DBR mirror made of, for example, a p-type AlGaAs multilayer film. . An optical resonator forming a surface emitting laser is formed by the tile portion 11 made of the n-type semiconductor, the active layer, and the p-type semiconductor 12.

  The cathode electrode 15 is provided on the upper surface of the tile portion (n-type semiconductor) 11. Specifically, the cathode electrode 15 is provided on a region other than the region where the active layer and the p-type semiconductor 12 are provided on the upper surface of the tile portion 11, that is, on a region other than the vicinity of the center on the upper surface of the tile portion 11. ing. The cathode electrode 15 is in ohmic contact with the n-type semiconductor forming the tile portion 11.

  The insulating layer 13 is provided on the upper surface of the tile portion 11 and prevents the anode electrode 14 side and the tile portion 11 (n-type semiconductor) side from being short-circuited. The insulating layer 13 is formed so as to cover one end and the side surface of the tile portion 11 from the vicinity of the center on the upper surface of the tile portion 11. In addition, the insulating layer 13 may be formed larger in advance so as to protrude from the outer edge of the tile portion 11. Here, the arrangement of the insulating layer 13 may be devised so that at least a part of the insulating layer 13 protrudes from the outer edge of the tile portion 11 as described above. After the micro tile-like element 1 is bonded to a desired substrate (final substrate), electric wiring is formed on the insulating layer 13.

The insulating layer 13 is made of polyimide, for example. The insulating layer 13 preferably has flexibility. That is, it is preferable that the insulating layer 13 is easily bent as a single body, and is not cracked even when bent. Therefore, the insulating layer 13 may be made of, for example, resin, glass, ceramic, silicon oxide (SiO ₂ ), or the like as long as the insulating layer 13 can be configured to meet the above conditions.

  The anode electrode 14 is provided so as to cover the upper surface of the p-type semiconductor 12 and the upper surface of the insulating layer 13 with one metal film. The anode electrode 14 is in ohmic contact with the p-type semiconductor 12. The anode electrode 14 is also preferably flexible. Then, when the insulating layer 13 is bent by an external force or the like, the anode electrode 14 and the insulating layer 13 are formed such that the anode electrode 14 is also bent in close contact with the insulating layer 13 (that is, in the same shape as the insulating layer 13). It is preferable that

  The bank portions 16a and 16b are one of the features of the present invention. The bank portions 16a and 16b are structures that form convex partition walls (banks). That is, the bank portions 16a and 16b are structures that define the application region of the liquid material applied to form the electrical wiring. Specifically, the bank portions 16a and 16b are connected to the insulating layer 13 provided in the tile portion 11 as shown in FIGS. 1B and 2B, and are the same members as the insulating layer 13. (For example, polyimide). Therefore, the bank portions 16 a and 16 b are mechanically connected to the tile portion 11 via the insulating layer 13. The bank portions 16a and 16b are arranged so as to surround at least a part of electrodes provided on the substrate when the micro tile-shaped element 1 is bonded to a desired substrate (final substrate). Moreover, you may perform a liquid-repellent process on the surface of the bank portions 16a and 16b.

  That is, the bank portions 16a and 16b are formed in a “U” shape as shown in FIGS. 1 (b) and 2 (b). All or part of the region surrounded by the “U” shape and the insulating layer 13 of the tile portion 11 electrically connects the electrode (anode electrode 14 or cathode electrode 15) of the micro tile element and the electrode of the final substrate. This is a wiring region where electrical wiring to be connected is formed. An electric wiring is formed in the wiring region by applying a liquid material containing a conductive material to the wiring region and then drying. Moreover, the bank portions 16a and 16b may have a “ring” shape or a “b” shape.

<Circuit device and its manufacturing method>
Next, a circuit device according to an embodiment of the present invention using the micro tile element 1 and a manufacturing method thereof will be described. 3 and 4 are cross-sectional views of the main part showing a method for manufacturing a circuit device using the micro tile-like element 1. 3 and 4, (a) is a cross-sectional view, and (b) is a plan view. FIG. 4 shows a circuit device according to the present invention. First, the micro tile element 1 formed as shown in FIG. 1 is bonded to a final substrate (second substrate) 50 as shown in FIG. The final substrate 50 is not particularly limited, and any member such as silicon, ceramic, glass, glass epoxy, plastic, and polyimide can be applied. The final substrate 50 is provided with electronic elements, electro-optical elements, electrodes, integrated circuits (not shown), or the like. Electrodes 51 and 52 are provided at desired positions on the surface of the final substrate 50. The electrode 51 is an electrode connected to the anode electrode 14 of the micro tile element 1, and the electrode 52 is an electrode connected to the cathode electrode 15 of the micro tile element 1.

  The joining of the micro tile element 1 and the final substrate 50 is performed by, for example, bonding the bottom surface of the micro tile element 1 and the surface of the final substrate 50 with an adhesive. In this joining, it is preferable that the side of the insulating layer 13 in the micro tile-shaped element 1, that is, the protruding portion is in contact with the surface of the final substrate 50. That is, the protrusion of the insulating layer 13 of the micro tile element 1 shown in FIG. 2 is bent downward, and the protrusion is in close contact with the side surface of the tile portion 21a, so that the micro tile element 1 is placed on the final substrate 50. Adhere to. In this way, by bonding the micro tile-like element 1 to the final substrate 50, the insulating layer 13 of the semiconductor element is automatically brought into close contact with the surface of the final substrate 50 and the side surface of the tile portion 11, and automatically. The insulating layer 13 covers the end portion of the tile portion 11. Then, the insulating layer 13 is disposed on the path of the electrical wiring that electrically connects the micro tile-shaped element 1 and the final substrate 50.

  Further, by bonding the micro tile-shaped element 1 to the final substrate 50, the bank portions 16 a and 16 b of the micro tile-shaped element 1 are also bonded to the surface of the final substrate 50. That is, the micro tile-like element 1 is bonded to the final substrate 50 by applying an adhesive to the bottom surfaces of the bank portions 16a and 16b. As a result, the embankment portions 16 a and 16 b are also transferred to the surface of the final substrate 50 together with the micro tile-like element 1. And the bank part 16a is arrange | positioned so that a part of electrode 51 of the last board | substrate 50 may be enclosed. Further, the bank portion 16 a and the insulating layer 13 surround a part of the electrode 51 of the final substrate 50 and a part of the anode electrode 14 of the micro tile element 1. This surrounded region is a wiring region connecting the electrode 51 and the anode electrode 14. The bank portion 16b is disposed so as to surround a part of the electrode 52 of the final substrate 50. Further, the bank portion 16 b and the insulating layer 13 surround a part of the electrode 52 of the final substrate 50 and the cathode electrode 15 of the micro tile element 1. This surrounded region is a wiring region connecting the electrode 52 and the cathode electrode 15. In these wiring areas, lyophilic treatment may be performed. Alternatively, the entire surface of the final substrate 50 may be preliminarily subjected to lyophilic treatment, after which the micro tile-shaped element 1 is bonded, and then the surface of the levee portions 16a and 16b may be subjected to liquid repellent treatment.

  As a specific method of the liquid repellent treatment, a method in which the surfaces of the bank portions 16a and 16b are made liquid repellent surfaces by self-alignment will be described below. When the surface of polyimide is treated with fluorine plasma, the surface is fluorinated and becomes a liquid repellent surface. On the other hand, the surface of a material other than polyimide, for example, a metal (anode electrode 14, cathode electrode 15, electrodes 51, 52, etc.) or an inorganic substance (SiO2, etc.) is not fluorinated even when the fluorine plasma treatment is performed. Accordingly, when there are areas where polyimide is exposed and areas where the polyimide is not present on the surface of the substrate, only the polyimide exposed area can be made liquid repellent in a self-aligned manner by performing fluorine plasma treatment on the entire surface of the substrate. Therefore, by previously forming the dike portions 16a and 16b from polyimide, only the surfaces of the dike portions 16a and 16b can be made liquid repellent in a self-aligned manner.

  Next, as shown in FIG. 4, electric wirings 53 and 54 are formed in the wiring region, which is a region surrounded by the bank portions 16 a and 16 b and the insulating layer 13. A method of forming the electric wirings 53 and 54 will be described. First, a liquid material containing a conductive material is discharged from an inkjet nozzle or the like and landed in the wiring region. The landed liquid material wets and spreads in the wiring region, but it is avoided that the levee portions 16a and 16b and the insulating layer 13 flow out of the wiring region. Thereafter, the liquid material wet and spread in the wiring region is dried and cured. As a result, the electrical wiring 53 that connects the electrode 51 of the final substrate 50 and the anode electrode 14 of the micro tile element 1 is completed, and the electrode 52 of the final substrate 50 and the cathode electrode 15 of the micro tile element 1 are connected. The electrical wiring 54 is completed. Therefore, a circuit device including the final substrate 50 and the micro tile-like element 1 electrically and mechanically connected to the final substrate 50 is also completed.

  Thus, according to the present embodiment, the levee portions 16a and 16b can prevent the liquid material from flowing out of the wiring region even if the liquid material is sufficiently injected into the wiring region. Therefore, according to the present embodiment, the liquid material can be accurately applied only in the wiring area regardless of whether the wiring area is lyophilic or lyophobic, and the wiring pattern is a fine wiring pattern. In addition, highly reliable electrical wirings 53 and 54 can be formed. Further, according to the present embodiment, the levee portions 16 a and 16 b can be formed on the final substrate 50 only by joining the micro tile-shaped element 1 to the final substrate 50. Therefore, the bank portions 16a and 16b for forming the electrical wiring for connecting the electrode of the micro tile-shaped element 1 bonded to the final substrate 50 and the electrode of the final substrate 50 with a liquid material are provided without increasing the number of steps. be able to. That is, the bank portions 16a and 16b can be formed as part of the design of the insulating layer 13 in the step of forming the insulating layer 13.

  Further, the bank portions 16a and 16b can be arranged at a desired position at least with respect to the electrode on the side of the micro tile element 1, and are transferred to the final substrate 50 as a part of the micro tile element 1 with the arrangement, so Electric wiring can be formed by self-alignment with respect to the electrode on the tile element 1 side. Therefore, according to the present invention, the electrical wiring arranged with high accuracy with respect to the minute electrode on the minute tile-like element 1 can be formed using the liquid material. Thus, according to this embodiment, when the circuit device (thin film device) is configured by attaching the micro tile-shaped element 1 on the final substrate 50, the wiring for the thin film device is short-circuited while suppressing the manufacturing cost. Alternatively, disconnection and increase in parasitic capacitance can be reduced.

Further, when only the bank portions 16a and 16b are made liquid-repellent as described above, the liquid material that has landed in the wiring region is more reliably dammed by the bank portions 16a and 16b, and at the same time, the liquid material and the electrode (anode The adhesion with the electrode 14, the cathode electrode 15, the electrodes 51, 52, etc.) can be improved.
In the liquid repellent treatment described above, the entire surface of the final substrate 50 is subjected to a lyophilic treatment in advance, the micro tile-like element 1 is then joined, and then the liquid repellent treatment is applied to the surfaces of the levee portions 16a and 16b. Although the method of giving is mentioned, you may perform a liquid repellent process with the following method. That is, after the micro tile-shaped element 1 is bonded to the final substrate 50, the entire final substrate 50 including the micro tile-shaped element 1 is subjected to lyophilic processing (oxygen plasma processing or the like). Thereafter, by performing the above-described fluorine plasma treatment, only the surfaces of the bank portions 16a and 16b can be selectively made liquid repellent.
If the oxygen plasma treatment is performed prior to the fluorine plasma treatment as described above, the surfaces of the electrodes (the anode electrode 14, the cathode electrode 15, the electrodes 51, 52, etc.) are cleaned (made lyophilic), and this is more preferable.
Examples of the fluorine plasma treatment method include the following methods. That is, for example, low pressure plasma treatment or atmospheric pressure plasma treatment in which a gas containing fluorine or a fluorine compound is used as an introduction gas and plasma irradiation is performed in a reduced pressure atmosphere or an atmospheric pressure atmosphere (Japanese Patent Laid-Open No. 2000-353594). reference). In this reference, it is described that it becomes lyophilic with respect to a nonpolar liquid by the fluorine treatment, but actually it exhibits liquid repellency with respect to almost all liquids.

<Other micro tile elements and circuit devices>
Next, another example of the micro tile element and the circuit device will be described with reference to FIG. FIG. 5 is a plan view showing another circuit device according to another embodiment of the present invention. In this embodiment, in particular, the layout of the bank is different from the circuit device shown in FIG. In the circuit device, a micro tile-shaped element 1 a is bonded on a final substrate 50. The micro tile element 1a differs from the micro tile element 1 shown in FIG. 1 in the layout, that is, the arrangement of the bank portions 16c and 16d. The components other than the bank portions 16c and 16d in the micro tile element 1a are the same as the components of the micro tile element 1. The layout of the electrodes 51a and 52a of the final substrate 50 is also different from the layout of the electrodes 51 and 52 of the final substrate 50 shown in FIG. And the electric wiring 53a is formed in the wiring area | region enclosed by the bank part 16c, and the electrode 51a of the last board | substrate 50 and the anode electrode 14 of the micro tile-shaped element 1a are connected. In addition, an electrical wiring 54a is formed in a wiring region surrounded by the bank portion 16c, and the electrode 52a of the final substrate 50 and the cathode electrode 15 of the micro tile element 1a are connected.

  Accordingly, according to the present embodiment, the wiring regions surrounded by the bank portions 16c and 16d are disposed so as to face each other via the corners of the tile portion 11 of the micro tile-shaped element 1. Therefore, according to the present embodiment, even if the liquid material overflows from the wiring region, the corner of the tile portion 11 prevents the overflowing material from going to and entering the other wiring region, A short circuit can be avoided and a highly reliable circuit device can be easily formed.

<Application example to HBT>
Next, an example in which the micro tile element and the circuit device according to the present invention are applied to a hetero bipolar transistor (hereinafter referred to as HBT) will be described with reference to FIGS. FIG. 6 is a plan view showing the HBT according to the embodiment of the present invention. FIG. 7 is a cross-sectional view of the HBT shown in FIG. FIG. 7A is a cross-sectional view of the portion AA ′ in FIG. FIG. 7B is a cross section of the part BB ′ in FIG. FIG. 7C is a cross section of the part CC ′ in FIG. FIG. 8 is also a cross-sectional view of the HBT shown in FIG. FIG. 8A is a cross section of the part DD ′ in FIG. FIG. 8B is a cross section of the portion EE ′ in FIG.

  The HBT according to the present embodiment is obtained by forming a single HBT (unit element) as the micro tile element 1b and bonding the micro tile element 1b to the final substrate 50. 6 to 8 show one minute tile-shaped element 1b, but a plurality of minute tile-shaped elements 1b are joined at a predetermined interval on the common collector wiring 51c of the final substrate 50, and the individual HBTs are arranged in parallel. By connecting, a high-output HBT can be configured easily and with high reliability.

  On the surface of the final substrate 50, a common collector wiring 51c made of a metal film is formed in a rectangular shape. A plurality of micro tile elements 1b are joined to the upper surface of the common collector wiring 51c. On the surface of the final substrate 50, a common base wiring 51b and a common emitter wiring 51e made of a metal film are formed so as to sandwich the common collector wiring 51c.

  A micro tile-like element 1b that constitutes one HBT single body includes a first layer (collector layer) 11c made of an N-type semiconductor, and a second layer (base layer) 11b made of a P-type semiconductor provided on the first layer 11c. And a third layer (emitter layer) 11e made of an N-type semiconductor provided on the second layer 11b. The second layer 11b is formed on the upper surface of the first layer 11c, and is a thinner layer than the first layer 11c and the third layer 11e. The third layer 11e is provided so as to cross the center of the upper surface of the second layer, and the area of the upper surface is smaller than the area of the upper surface of the first layer 11c and the second layer 11b. The side surfaces of the first layer 11c, the second layer 11b, and the third layer 11e may be formed vertically or may have a tapered shape.

  A collector electrode 14c made of a metal film is provided on a part of the upper surface of the first layer 11c. A base electrode 14b made of a metal film is provided on a portion where the third layer is not provided on the upper surface of the second layer 11b, that is, on both side portions on the upper surface of the second layer 11b. An emitter electrode 14e made of a metal film is provided on substantially the entire top surface of the third layer. The thicknesses of the collector electrode 14c, the base electrode 14b, and the emitter electrode 14e are significantly thinner than the first layer 11c, the second layer 11b, and the third layer 11e. The thickness of the micro tile element 1b forming the HBT is, for example, several μm. An emitter lead electrode 14e 'is connected to the emitter electrode 14e. A base lead electrode 14b 'is connected to the base electrode 14b.

  The first layer 11c is formed of an N-type semiconductor made of, for example, gallium arsenide (GaAs). The second layer 11b is formed of a P-type semiconductor made of, for example, gallium arsenide (GaAs). The third layer 11e is formed of an N-type semiconductor made of, for example, aluminum, gallium, arsenic (AlGaAs). With such a configuration, the first layer 11c functions as a collector, the second layer 11b functions as a base, and the third layer 11e functions as an emitter.

  With such a configuration, the micro tile element 1b constitutes a gallium arsenide (GaAs) HBT. Therefore, by arranging the micro tile-like element 1b at a desired position on the final substrate 50, a high-speed amplifier circuit of gigahertz order can be formed at an arbitrary position.

  Furthermore, the micro tile-shaped element 1b is provided with levee portions 16e, 16f, 16g, and 16h. The bank portions 16e, 16f, 16g, and 16h are connected to the insulating layer 13 of the micro tile element 1b, respectively. As shown in FIG. 8B, the bank portion 16e has a wiring area for forming an electric wiring 53e that connects the emitter lead electrode 14e ′ of the micro tile-shaped element 1b and the common emitter wiring 51e of the final substrate 50. It is arranged to surround. As shown in FIG. 8A, the bank portion 16f has a wiring region for forming an electrical wiring 53b that connects the base lead electrode 14b ′ of the micro tile-shaped element 1b and the common base wiring 51b of the final substrate 50. It is arranged to surround. As shown in FIG. 7B, the bank portions 16g and 16h have wiring areas for forming an electrical wiring 53c that connects the collector electrode 14c of the micro tile-shaped element 1b and the common collector wiring 51c of the final substrate 50. It is arranged to surround.

  Therefore, according to the present embodiment, the electrical wirings 53c, 53b, and 53e can be formed with high accuracy and simplicity by applying a liquid material containing a conductive material to the wiring region. Therefore, according to the present embodiment, it is possible to provide an HBT with high reliability and high output at a low cost. In addition, according to the present embodiment, the common collector wiring 51c, the common base wiring 51b, and the common emitter wiring 51e, which are wirings for connecting the micro tile-like elements 1b (HBT alone) in parallel, are directly provided on the final substrate 50, respectively. While forming, these wirings do not contact each other and do not cross each other. Therefore, according to the present embodiment, a plurality of unit elements (HBTs) provided on the substrate plane can be connected in parallel without the need for air gap wiring. It can be manufactured easily.

  In addition, according to the present embodiment, the collector layer of each micro tile-like element 1b is directly bonded onto one common collector wiring 51c provided on the final substrate 50, so that it is formed on the insulating substrate as in the conventional structure. The heat dissipation can be made higher than when the collector layer is formed directly. Therefore, according to the present embodiment, the reliability can be further improved, the driving power can be easily increased, and a compact HBT that can operate at a higher speed than the conventional one can be easily configured.

<Details of Manufacturing Method of Micro Tile Element and Circuit Device>
Next, a detailed manufacturing method of the micro tile element and the circuit device according to the present invention will be described with reference to FIGS. This manufacturing method is based on the epitaxial lift-off (ELO) method. In this manufacturing method, a case where a compound semiconductor device (compound semiconductor element) as the micro tile element 1 (micro tile element) is bonded onto the final substrate will be described. However, the present invention is not limited to the type and form of the final substrate. A manufacturing method can be applied. Note that the “semiconductor substrate (epitaxial substrate)” in the present embodiment refers to an object made of a semiconductor material, but is not limited to a plate-shaped substrate. "include.

<First step>
FIG. 9 is a schematic cross-sectional view showing the first step of the manufacturing method. In FIG. 9, a substrate 10 is the semiconductor substrate (first substrate), for example, a gallium arsenide compound semiconductor substrate. A sacrificial layer 10 a is provided as the lowest layer in the substrate 10. The sacrificial layer 10a is made of aluminum arsenic (AlAs) and has a thickness of, for example, several hundred nm. For example, the n-type semiconductor layer 10b on which the tile portion 11 in FIG. 1 is formed is formed on the sacrificial layer 10a, and the p-type semiconductor 12 and the insulating layer 13 are formed on the n-type semiconductor layer 10b. Provide a layer. The insulating layer 13 is designed (patterned) so as to form the bank portions 16a and 16b having a desired shape.
As a specific method for forming the bank portions 16a and 16b, for example, a photolithography method is used. For example, the insulating layer 13 and the bank portions 16a and 16b are formed by forming an insulating layer on the entire surface of the substrate 10, then forming a photoresist on the insulating layer, and irradiating ultraviolet rays through a photomask having a desired shape. A resist mask is formed only in the region to be provided, and then etched to form the insulating layer 13 and the bank portions 16a and 16b having a desired pattern. Moreover, you may form the bank portions 16a and 16b using a photocurable material or a thermosetting material. For example, a photocurable material or a thermosetting material is applied to the entire surface of the substrate 10, and the insulating layer having a desired pattern is irradiated by selectively irradiating only the region where the insulating layer 13 and the bank portions 16a and 16b are provided. 13 and bank portions 16a and 16b are formed. The thickness of the functional layer is, for example, about 1 μm to 10 (20) μm. Then, a micro tile element (for example, a surface emitting laser) is formed in the functional layer.

  In addition to the surface emitting laser (VCSEL), other functional elements such as a phototransistor (PD), a high electron mobility transistor (HEMT), a driver circuit made of HBT, or an APC circuit is formed as the micro tile element. May be. Each of these micro tile-like elements is formed by laminating a plurality of epitaxial layers on the substrate 10. In addition, an operation test is also performed on each micro tile element.

<Second step>
10 and 11 are schematic cross-sectional views showing the second step of the manufacturing method. In this step, first, a resist mask 30 is formed so as to cover the upper surface of a plurality of micro tile elements (including the bank portions 16a and 16b) formed on the surface layer (functional layer) of the substrate 10. Thereafter, as shown in FIG. 11, isotropic etching such as wet etching is performed on the substrate 10. In this way, an undercut occurs at the edge portion of the resist mask 30. Therefore, the bottom surfaces of the bank portions 16a and 16b in the micro tile element are undercut. Accordingly, the bank portions 16a and 16b are separated from the substrate 10 and have a cantilevered tail shape.

<Third step>
FIG. 12 is a schematic cross-sectional view showing the third step of the manufacturing method. In this step, an intermediate transfer film (handling film) 40 is attached to the surface of the substrate 10 (the upper surface side of the micro tile element). The intermediate transfer film 40 is a flexible film having a surface coated with an adhesive. In addition, the intermediate transfer film 40 is configured, for example, by using PET (polyethylene terephthalate; “T60” thickness: 50 μm) manufactured by Toray as a base material, and forming a pressure-sensitive adhesive thereon to a thickness of 30 μm to 50 μm. In this step, the intermediate transfer film 40 may be attached to the substrate while leaving the resist mask 30 on the surface of the substrate 10.

<4th process>
FIG. 13 is a schematic cross-sectional view showing the fourth step of the manufacturing method. In this step, a selective etching solution is injected between the intermediate transfer film 40 and the substrate 10 to selectively etch only the sacrificial layer 10a. As the selective etching solution, for example, low concentration hydrochloric acid having high selectivity with respect to aluminum / arsenic is used.

<5th process>
FIG. 14 is a schematic sectional view showing the fifth step of the manufacturing method. When all of the sacrificial layer 10 a is etched in the fourth step, the micro tile-shaped element 1 (functional layer) is separated from the substrate 10. In this step, the micro tile element 1 attached to the intermediate transfer film 40 is separated from the substrate 10 by separating the intermediate transfer film 40 from the substrate 10. As a result, the functional layer on which the micro tile-like element 1 is formed is the micro tile-like element 1 as shown in FIG. 1 and is stuck and held on the intermediate transfer film 40. Here, it is preferable that the thickness of the micro tile element 1 (functional layer) is, for example, about 1 μm to 10 μm and the size (vertical and horizontal) is, for example, several tens μm to several hundreds μm.

<6th process>
Next, the process proceeds to the step of manufacturing the circuit device by bonding the micro tile-like element 1 according to the present invention formed as described above to the final substrate. FIG. 15 is a schematic sectional view showing the sixth step of the manufacturing method. In this step, the micro tile element 1 is aligned with a desired position on the final substrate 50 by moving the intermediate transfer film 40 to which the micro tile element 1 is attached. Here, the final substrate 50 is made of, for example, a silicon semiconductor, and electrodes 51 and 52 are formed thereon. The alignment is performed so that at least part of the electrode 51 is included in the region surrounded by the bank portion 16a of the micro tile-shaped element 1 and at least part of the electrode 52 is included in the region surrounded by the bank portion 16b. To do. Note that an adhesive for adhering the micro tile-shaped element 1 is applied to a desired position of the final substrate 50. The thickness of the adhesive may be several μm or less, for example. The adhesive may be applied to the micro tile element 1.

<Seventh step>
FIG. 16 is a schematic cross-sectional view showing the seventh step of the manufacturing method. In this step, the micro tile element 1 (including the bank portions 16a and 16b) aligned at a desired position of the final substrate 50 is pressed through the intermediate transfer film 40 with the back pressing jig 80, and the final substrate 50 The tile part 11 of the micro tile-shaped element 1 and the levee parts 16a and 16b are joined simultaneously. Here, since the adhesive is applied to the desired position of the final substrate 50 or the micro tile-like element 1, the micro tile-like element 1 is adhered to the desired position of the final substrate 50 together with the bank portions 16a and 16b. The

<Eighth process>
FIG. 17 is a schematic sectional view showing the eighth step of the manufacturing method. In this step, the adhesive force of the intermediate transfer film 40 is lost, and the intermediate transfer film 40 is peeled off from the microtile-shaped element 1. The adhesive of the intermediate transfer film 40 is UV curable or thermosetting. When the UV curable adhesive is used, the back pressing jig 80 is made of a transparent material, and the adhesive force of the intermediate transfer film 40 is lost by irradiating ultraviolet rays (UV) from the tip of the back pressing jig 80. Let In the case of using a thermosetting adhesive, the back pressing jig 80 may be heated. Alternatively, after the sixth step in the manufacturing process of the micro tile element 1, the adhesive force may be completely lost by irradiating the entire surface of the intermediate transfer film 40 with ultraviolet rays. Although the adhesive strength has disappeared, the adhesive remains slightly in reality, and the micro tile-shaped element 1 is very thin and light and is held by the intermediate transfer film 40.

<9th process>
This step is not shown. In this step, heat treatment or the like is performed, and the fine tile-shaped element 1 including the bank portions 16a and 16b is finally bonded to the final substrate 50.

<10th process>
FIG. 18 is a schematic cross-sectional view showing a tenth step of the method of manufacturing the semiconductor device. In this step, the micro tile element 1 and the final substrate 50 are electrically connected. Specifically, the conductive material is coated so as to continuously cover the electrodes (not shown) of the micro tile element 1 and the electrodes 51 and 52 of the final substrate 50 surrounded by the bank portions 16a and 16b. The liquid material 53 and 54 containing are dripped. That is, the liquid material 53 is discharged from an inkjet nozzle or the like to land the liquid material 53 on the wiring area surrounded by the bank portion 16a, and the liquid material 53 is applied to the wiring area. Further, the liquid material 54 is discharged from an inkjet nozzle or the like to land the liquid material 54 on the wiring area surrounded by the bank portion 16b, and the liquid material 54 is applied to the wiring area. The outflow of the liquid materials 53 and 54 from the wiring area is blocked by the bank portions 16a and 16b. Thereafter, the liquid materials 53 and 54 are dried and heated to form a conductive film, that is, an electric wiring. As a result, the electrodes of the micro tile element 1 and the electrodes 51 and 52 of the final substrate are electrically connected. Therefore, the circuit device according to the present invention, which forms one LSI chip or the like using the micro tile element 1 as a constituent element, is completed.

  Accordingly, even if the final substrate 50 is, for example, silicon, the surface emitting laser or the like is formed such that the micro tile-like element 1 including the surface emitting laser made of gallium / arsenic is formed at a desired position on the final substrate 50. It is possible to form the semiconductor element forming the above on a substrate made of a material different from that of the semiconductor element. Also, since a surface emitting laser is completed on a semiconductor substrate (substrate 10) and then cut into fine tiles, the surface emitting laser must be tested in advance before creating an integrated circuit incorporating the surface emitting laser. It becomes possible to sort. Further, according to the above manufacturing method, only the functional layer including the micro tile-like element 1 (surface emitting laser or the like) can be cut from the semiconductor substrate as the micro tile-like element, mounted on the film, and handled. The tile-shaped elements 1 can be individually selected and bonded to the final substrate 50, and the size of the micro-tile-shaped elements 1 that can be handled can be made smaller than that of the conventional mounting technology.

  Further, according to the above manufacturing method, when the shape of the insulating layer 13 is changed to a desired shape in the step of forming the micro tile element 1 on the substrate 10, the micro tile element 1 is transferred to the final substrate 50. The bank portion 16 is also transferred at the same time, and the bank portion 16 can be automatically formed on the final substrate. Therefore, according to the above manufacturing method, an integrated circuit having a thin film device (circuit device) that is more compact, has a lower probability of occurrence of wiring short-circuiting and disconnection, and operates at high speed can be manufactured easily and at low cost. can do.

<Electronic equipment>
An example of an electronic apparatus including the circuit device (thin film device) according to the embodiment will be described.
The thin film device of the above embodiment can be applied to a surface emitting laser, a light emitting diode, a photodiode, a phototransistor, a high electron mobility transistor, a heterobipolar transistor, an inductor, a capacitor, or a resistor. Application circuits or electronic devices equipped with these thin film devices include optical interconnection circuits, optical fiber communication modules, laser printers, laser beam projectors, laser beam scanners, linear encoders, rotary encoders, displacement sensors, pressure sensors, and gas sensors. Blood blood flow sensor, fingerprint sensor, high-speed electric modulation circuit, wireless RF circuit, mobile phone, wireless LAN, and the like.

  FIG. 19A is a perspective view showing an example of a mobile phone. In FIG. 19A, reference numeral 1000 denotes a mobile phone body using the thin film device, and reference numeral 1001 denotes a display unit. FIG. 19B is a perspective view showing an example of a wristwatch type electronic device. In FIG. 19B, reference numeral 1100 indicates a watch body using the thin film device, and reference numeral 1101 indicates a display unit. FIG. 19C is a perspective view showing an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 19C, reference numeral 1200 denotes an information processing apparatus, reference numeral 1202 denotes an input unit such as a keyboard, reference numeral 1204 denotes an information processing apparatus body using the thin film device, and reference numeral 1206 denotes a display unit.

  Since the electronic device shown in FIG. 19 includes the circuit device (thin film device) of the above embodiment, wiring short-circuit hardly occurs, the device operates at high speed, is thin and compact, and can be manufactured at low cost. Can do.

  The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention, and the specific materials and layers mentioned in the embodiment can be added. The configuration is merely an example, and can be changed as appropriate.

  In the above embodiment, the configuration in which the micro tile element 1 includes a surface emitting laser has been described. However, the present invention is not limited to this, and the micro tile element 1 includes a light emitting diode, a photodiode, and a phototransistor. In addition, at least one of a high electron mobility transistor, a hetero bipolar transistor, an inductor, a capacitor, and a resistor may be included. Further, in the above embodiment, the thickness of the insulating layer 13 may be varied according to the speed of the signal input / output to / from the micro tile element 1 (that is, the electric signal passing through the electric wirings 53 and 54). Good. For example, when the signal is a high-frequency signal such as a radio communication signal, the thickness of the insulating layer 13 is increased, and when the signal is a relatively low frequency, the thickness of the insulating layer 13 is decreased. Accordingly, a semiconductor device (thin film device) having desired electrical characteristics can be easily configured.

  In the manufacturing method (wiring forming method) of the above-described embodiment, an example of forming a wiring that electrically connects a micro tile-shaped element bonded to the final substrate and the final substrate has been described. However, the present invention is not limited to this, and can be applied to formation of various electric wirings using a droplet discharge method, such as wiring between two electrodes previously formed on one substrate.

It is sectional drawing and a top view which show the micro tile-shaped element which concerns on embodiment of this invention. It is a top view which shows the structural member of a micro tile-like element same as the above. It is sectional drawing and a top view which show the manufacturing method of the circuit device which concerns on embodiment of this invention. 1 is a cross-sectional view and a plan view showing a circuit device according to an embodiment of the present invention. It is a top view which shows the circuit apparatus which concerns on other embodiment of this invention. It is a top view which shows HBT which concerns on other embodiment of this invention. It is sectional drawing of each part in HBT same as the above. It is sectional drawing of each part in HBT same as the above. It is sectional drawing which shows the 1st process of the manufacturing method of the micro tile-shaped element which concerns on embodiment of this invention, and a circuit apparatus. It is sectional drawing which shows the 2nd process of the manufacturing method same as the above. It is sectional drawing which shows the 2nd process of the manufacturing method same as the above. It is sectional drawing which shows the 3rd process of the manufacturing method same as the above. It is sectional drawing which shows the 4th process of the manufacturing method same as the above. It is sectional drawing which shows the 5th process of the manufacturing method same as the above. It is sectional drawing which shows the 6th process of the manufacturing method same as the above. It is sectional drawing which shows the 7th process of the manufacturing method same as the above. It is sectional drawing which shows the 8th process of the manufacturing method same as the above. It is sectional drawing which shows the 10th process of the manufacturing method same as the above. It is a figure which shows an example of the electronic device provided with the semiconductor device of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1, 1a, 1b ... Micro tile element, 11 ... Tile part, 12 ... p-type semiconductor, 13 ... Insulating layer (insulating part), 14 ... Anode electrode (electrode part), 15 ... Cathode electrode, 16a, 16b, ... Embankment part, 50 ... Final substrate, 51, 51a, 52, 52a ... Electrode, 53, 53a, 54, 54a ... Electrical wiring

Claims (10)

A first substrate;
A second substrate having a wiring region;
Use
Forming a convex component on the first substrate;
By cutting the convex component from the first substrate and joining the convex component to the second substrate, a convex bank is provided at least at a part of the periphery of the wiring region,
By applying a liquid material containing a conductive material over the wiring area, the wiring forming method comprising forming a first electrical interconnection to the wiring area. Coating of the liquid material, the wiring formation method of claim 1, wherein the using a droplet discharge method. The dike claim 1 or 2 any one wiring forming method according to, characterized in that it has an insulating property. The embankment is any one wiring forming method as claimed in claims 1 to 3, characterized in that it consists of polyimide. After performing liquid-repellent treatment on the surface of the embankment, the wiring formation method of any one of claims 1 to 4, characterized in that the coating of the liquid material. Wherein after performing lyophilic treatment on the wiring area, the wiring formation method of any one of claims 1 5, characterized in that the coating of the liquid material. Component of the convex shape is any one wiring forming method as claimed in claim 1 6, characterized in that formed on the first substrate by a photolithography method. Component of the convex shape, the wiring formation method of any one of claims 1 6, characterized in that formed on the first substrate using a light-curable material or a thermosetting material. The wiring formation according to claim 1, wherein at least a part of the first electric wiring is formed on a second electric wiring formed in the wiring region. Method. Furthermore, an electronic functional part is formed on the first substrate,
By the the components of the convex and the electronic function part from the first substrate to form a cut tile-shaped element, bonding the tile-shaped element to the second substrate, the said second substrate wiring forming method of any one of claims 1 to 9, characterized by providing an electronic functional unit and the embankment.

Images