JP4270944B2 - Ultrasonic diagnostic apparatus and received data processing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an ultrasonic diagnostic apparatus and a data processing method, and more particularly to a configuration of a signal processing unit.
[0002]
[Prior art]
The ultrasonic diagnostic apparatus has various operation modes. For example, B mode (monochrome two-dimensional tomographic image mode), CFM (color flow mapping mode), D mode (Doppler mode), and the like. There is also a B / D mode.
[0003]
In order to perform appropriate signal processing according to each mode, as shown in FIG. 10, a conventional ultrasonic diagnostic apparatus is equipped with a plurality of dedicated processors 12, 14, and 16 corresponding to each mode. Yes. FIG. 10 shows a state in which the B mode processor 12, the CFM mode processor 14, and the D mode processor 16 are arranged in parallel. Each processor 12, 14, 16 is configured by hardware dedicated to each mode. Therefore, in order to change the signal processing contents in each processor, it is necessary to exchange hardware. In addition, even if the processing load on a specific processor increases, other processors cannot bear that load. To increase the processing load, the hardware scale must be increased. There wasn't.
[0004]
Patent Document 1 below discloses an ultrasonic diagnostic apparatus including a signal processing unit, but an idea that a single processing program is divided and operated by sub-programs is not recognized. Incidentally, Japanese Patent Application No. 2002-199471, which is an unpublished prior application, describes the processing of received signal packets.
[0005]
[Patent Document 1]
Japanese Patent Laid-Open No. 11-235339
[0006]
[Problems to be solved by the invention]
An object of the present invention is to realize efficient signal processing using a plurality of processors.
[0007]
Another object of the present invention is to be able to flexibly cope with a change in a program.
[0008]
[Means for Solving the Problems]
(1) An apparatus according to the present invention includes a data output unit that outputs received data, and a processor that includes a plurality of processors connected in series from higher to lower, and that processes the received data Each of the processors constituting the processor row includes a subprogram set storage unit storing a subprogram set constituting a plurality of processing programs corresponding to a plurality of operation modes, and the subprogram set, A subprogram execution unit that processes the received data that is the processing target by executing a specific subprogram corresponding to the operation mode corresponding to the received data that is the processing target and its own order. Features.
[0009]
According to the above configuration, a plurality of processors are directly connected to form a processor row, and received data is processed in stages from the upper processor to the lower processor. Each of the plurality of processors constituting the processor array has a set of subprograms, from which a specific subprogram to process received data to be input is selected and received by executing the specific program. Data is processed. Since each processor operates independently, it is possible to avoid the local concentration of the load and to distribute the load, thereby achieving efficient processing. In addition, since the configuration of each processor can be made common to the whole or most of them except for a part thereof, the burden at the time of design and maintenance is reduced. That is, it is not necessary to design all of them as dedicated circuits for each processor. The reception data output means is preferably a transmission / reception means for transmitting / receiving ultrasonic waves, but may be other than that.
[0010]
Preferably, the plurality of processors constituting the processor array start operation by data input and operate independently from each other, and the received data is pipelined. According to this configuration, a master processor that manages the operations of all the processors locally and in real time becomes unnecessary. For this reason, there exists an advantage that the flexibility of a system configuration and the freedom degree of design are rich.
[0011]
Preferably, each processor constituting the processor row has a correspondence table storage unit that stores a correspondence table in which a subprogram to be executed by itself is associated with each operation mode, and the subprogram execution unit includes Subprogram selection means for selecting the specific subprogram with reference to the correspondence table is included. As described above, it is desirable to store the correspondence table in each processor. However, it is also possible to store the correspondence table outside the processor, or to add information for selecting a subprogram in each processor to the received data. It may be.
[0012]
Preferably, the processors constituting the processor row are different from each other only in the contents of the correspondence table, and the other hardware and software are the same. As a result, the design efficiency can be drastically increased by using the entire configuration in common, with only a partial configuration.
[0013]
Preferably, it includes means for individually changing the contents of the correspondence table for each processor constituting the processor row. Preferably, it includes means for collectively changing the contents of the subprogram set for each processor constituting the processor array. The batch change means that the same contents are changed, and the simultaneous change processing may be performed on all the processors or the sequential change processing may be performed.
[0014]
Preferably, preprocessing means for adding attribute information for each received data in units of ultrasonic beams is included, and the subprogram selecting means refers to attribute information added to the received data to be processed. The specific subprogram is selected. Preferably, the attribute information is information specifying an operation mode. Preferably, the attribute information is information specifying the specific subprogram.
[0015]
Preferably, the preprocessing means writes the received data to the frame memory in accordance with a transmission / reception sequence according to a frame memory for storing the reception data, and from the frame memory in accordance with a predetermined sequence different from the transmission / reception sequence. Memory management means for reading the received data. According to this configuration, received data can be processed asynchronously with the transmission / reception sequence. That is, the transfer timing and transfer order can be changed.
[0016]
Preferably, DMA transfer of received data is executed between the processors in the processor row. According to this configuration, data transfer can be separated from data processing in the processor by DMA (direct memory access) transfer.
[0017]
Preferably, the data processing unit has a plurality of processor rows arranged in parallel, and the received data is distributed to the plurality of processor rows. This configuration is advantageous when higher speed processing is required. The same set of subprograms may be used between the processor columns, or may be different depending on circumstances. Even in the latter case, the above-mentioned various advantages can be obtained because a common subprogram set is used for each processor column.
[0018]
(2) The method according to the present invention is a method of pipeline processing received data using a processor array including a plurality of processors connected in series from upper to lower in an ultrasonic diagnostic apparatus, the processor A step of storing the same subprogram set for each processor in the sequence, and a specific subprogram corresponding to the received data input from the previous stage in the subprogram set in each processor in the processor sequence And in each processor in the processor row, executing the selected specific subprogram to process the input received data, and outputting the processed received data to a subsequent stage; The subprogram set is composed of a plurality of subprogram groups, Sub program group is characterized in that it constitutes a processing program corresponding to each operation mode.
[0019]
Preferably, the method further includes a step of collectively changing the contents of the subprogram set stored in each processor in the processor row.
[0020]
(3) FIG. 11 shows a comparative example. In this example, the signal processing unit 10 includes a B-mode processing program execution unit 18, a CFM mode processing program execution unit 20, and a D-mode processing program execution unit 22. However, each program operation is dedicated, but it is the same as the conventional example shown in FIG. 10, and the load distribution cannot be performed.
[0021]
FIG. 12 shows a master-slave processor configuration as a reference example. The four slave processors 24, 26, 28 and 30 operate under centralized control by the master processor 32. When such a configuration is applied to signal processing in the ultrasonic diagnostic apparatus, the burden on the master processor 32 increases, which may become a bottleneck. In addition, in the case of specification change, there is a possibility that the whole needs to be redesigned.
[0022]
On the other hand, according to the present invention, it is rational because it is possible to prevent the local concentration of the load and achieve an efficient process and to maintain the basic configuration of the system even if there is a function change.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0024]
FIG. 1 shows a preferred embodiment of an ultrasonic diagnostic apparatus according to the present invention, and FIG. 1 is a block diagram showing the overall configuration thereof.
[0025]
The probe 40 is an ultrasonic probe that is used in contact with a body surface of a living body or is inserted into a body cavity. The probe 40 has an array transducer composed of a plurality of vibration elements. This array transducer may be a 1D array transducer in which a plurality of transducer elements are linearly arranged, or may be a 2D array transducer in which a plurality of transducer elements are two-dimensionally arranged. An ultrasonic beam is formed by the array transducer, and the ultrasonic beam is electronically scanned. Examples of the electronic scanning method include various scanning methods such as electronic linear scanning and electronic sector scanning. Incidentally, an ultrasonic beam is formed for each of various operation modes such as the B mode, the CFM mode, and the D mode. Here, the ultrasonic beam in the CFM mode means an ultrasonic beam corresponding to a so-called color Doppler method. For example, in the B / D combined mode, the ultrasonic beam for the B mode and the ultrasonic beam for the D mode are alternately formed according to a predetermined transmission / reception sequence, and this is the same in the other combined modes. .
[0026]
The transmitter 42 functions as a transmission beam former and has a plurality of transmission circuits corresponding to a plurality of vibration elements. A plurality of transmission signals are generated by the plurality of transmission circuits, and the transmission signals are supplied to the plurality of vibration elements. Thereby, ultrasonic waves are emitted from the probe 40 into the living body.
[0027]
When the probe 40 receives a reflected wave from the living body, a plurality of reception signals are output from the plurality of vibration elements. Those received signals are input to the receiving unit 44. The receiving unit 44 functions as a so-called digital beam former and has a plurality of receiving circuits provided corresponding to the plurality of vibration elements. Each receiving circuit includes an amplifier, an A / D converter, a delay circuit, and the like. The reception signal output from each receiving circuit is input to an adder, and so-called phasing addition is executed in the adder. The received signal after the phasing addition is output to a beam processing unit 46 as a signal processing unit.
[0028]
In the example illustrated in FIG. 1, the beam processing unit 46 includes a preprocessing unit 48, a processor A50, a processor B52, and a processor C54. Each of the processors 50, 52, and 54 functions as a signal processing unit, and the processors 50, 52, and 54 have the same configuration except for some data (a correspondence table described later). In other words, except for a part, they have the same hardware and software. The contents of the correspondence table to be described later differ between the processors 50, 52, and 54.
[0029]
The preprocessing unit 48 has a function of assigning attribute information to a reception signal, that is, reception data for each ultrasonic beam. The attribute information is information for identifying the operation mode in the present embodiment. Of course, other information may be included as the attribute information. Further, as the attribute information, information specifying a subprogram (routine) to be executed by each processor described later may be included. In addition, the preprocessing unit 48 in the present embodiment has a frame memory. That is, the reception data for each ultrasonic beam is temporarily stored in the frame memory. The writing in that case follows the transmission / reception sequence. On the other hand, the reading of the received data from the frame memory can be performed according to a predetermined sequence that is asynchronous with the transmission / reception sequence, whereby the reading timing and reading order can be changed. As a result, it is advantageous when performing beam correlation processing, for example. Of course, such a frame memory and a memory control function may be provided as necessary.
[0030]
The beam processing unit 46 shown in FIG. 1 has three processors 50, 52, and 54 connected in series. However, the number of processors is not limited to three, and may be two or four or more. Good. Further, as will be described later with reference to FIG. 9, a plurality of processor rows connected in series can be provided in parallel. Each processor 50, 52, 54 is configured by a DSP (digital signal processor) in this embodiment.
[0031]
Of course, each of the processors 50, 52, and 54 can be provided by a processor other than such a DSP. For example, the processors 50, 52, and 54 can be configured by an electronic circuit including a CPU. In any case, it is desirable to use a processor that performs a program operation. As described above, the processors 50, 52, and 54 basically have the same configuration, and in this embodiment, the processors 50, 52, and 54 have routine sets as the same subprogram set. Have. Each processor 50, 52, 54 selects an appropriate subprogram, that is, a routine according to the operation mode corresponding to the input received data and the order in which the processor 50 is arranged, and executes the routine. , Processing of incoming received data is executed. A configuration example and an operation example of each of the processors 50, 52, and 54 will be described in detail later using FIG.
[0032]
Thus, the beam processing unit 46 performs signal processing corresponding to the operation mode associated with each received data, and specifically, the beam processing unit 46 as a whole corresponds to the B mode. Data processing, data processing corresponding to the CFM mode, data processing corresponding to the D mode, and the like are executed. Here, the data processing corresponding to the B mode is, for example, detection, logarithmic compression, gain adjustment, noise removal, and the like, and the data processing corresponding to the CFM mode is quadrature detection, filtering, autocorrelation calculation, etc. Data processing corresponding to the mode includes detection, filtering, frequency analysis processing, and the like. Of course, each of the above-described processing contents is an example, and it is desirable to provide data processing applied to various operation modes.
[0033]
The display processing unit 56 receives the processed reception data output from the beam processing unit 46. The display processing unit 56 has a function as a DSC (digital scan converter), for example, and has a function of forming an appropriate image corresponding to each operation mode. For example, in the CFM mode, received data representing a blood flow velocity is input, and a so-called color Doppler image (two-dimensional blood flow image) is formed by synthesizing these data while performing coordinate conversion on the data. The display processing unit 56 forms a so-called Doppler waveform when reception data corresponding to the D mode is input.
[0034]
Image data output from the display processing unit 56 is sent to the display unit 58, and an ultrasonic image corresponding to the operation mode is displayed on the display screen of the display unit 58.
[0035]
The system controller 60 is configured by a system program, a CPU, and the like, and performs operation control of each component in the ultrasonic diagnostic apparatus. However, unlike the master processor 32 shown in FIG. 12, the CPU does not centrally manage the operations of the processors 50, 52, and 54 in real time. Set operating parameters and download programs. That is, the processors 50, 52, and 54 can operate independently, that is, autonomously after a certain setting is made. In the present embodiment, each of the processors 50, 52, and 54 constitutes a data driven processor in which operation is started with data input as a trigger. As a result, as will be described later, so-called pipeline processing is achieved for a plurality of received data input in chronological order.
[0036]
The operation panel 62 includes a keyboard, a trackball, and the like, and the user can input necessary operation commands and parameters to the apparatus using the operation panel 62.
[0037]
FIG. 2 shows a configuration example of the processors 50, 52, and 54 shown in FIG. 1, and FIG. 2 shows a configuration example of the processor A50 as a representative. As described above, the other processors B52 and C54 have the same configuration. The configuration shown in FIG. 2 is a so-called functional block diagram, and an actual DSP is realized by various configuration modes.
[0038]
The memories 150 and 152 function as input buffers. That is, the reception data output from the previous stage is stored in the memory 150 or the memory 152. The reason why the two memories 150 and 152 are provided in this way is to enable reading from the other while writing to one. The same applies to the output buffer. As the output buffer, a memory 160 and a memory 162 are provided, and the access buffer is configured to be accessible by a so-called ping-pong method as in the case of the input buffer. Incidentally, DMA (direct memory access) transfer of received data is executed between the preprocessing unit 48 and the processor A50, between the processors 50, 52 and 54, and between the processor C54 and the display processing unit 56. Thus, the program execution unit 154 described below is freed from the burden of directly controlling data transfer.
[0039]
The program execution unit 154 has a program memory 156, and various programs or routines described later with reference to FIG. The program execution unit 154 executes a specific program and routine stored in the program memory 156, and performs processing for which the received data is input by the execution. The program execution unit 154 is provided with a calculation memory 158, and the calculation memory 158 temporarily stores calculation values necessary for executing the program.
[0040]
FIG. 3 shows a specific configuration of the unit data 63 output from the preprocessing unit 48. The unit data 63 forms a packet or a capsule, and the unit data 63 includes a data portion 63B and a header portion 63A. The data portion 63B includes beam data, that is, reception data for each ultrasonic beam. Consists of attribute information. In the present embodiment, this attribute information is information for identifying an operation mode associated with beam data.
[0041]
As described above, the attribute information is added to the received data in the preprocessing unit 48, and the packetized data is subjected to necessary processing in each of the processor A50, the processor B52, and the processor C54. Finally, it is passed to the display processing unit 56. In the display processing unit 56, attribute information is referred to as necessary at the stage of image formation, and attribute information that has become unnecessary thereafter is removed.
[0042]
FIG. 4 shows a data structure in the program memory 156 shown in FIG. In the program memory 156, various programs such as a main routine 64, a B mode processing program 68, a CFM mode processing program 70, and a D mode processing program 72 are stored. An execution routine correspondence table 66 is provided in or outside the main routine 64, and the execution program correspondence table 66 is used to select a subprogram, that is, a routine that is responsible for each operation mode in each processor. Yes.
[0043]
That is, in this embodiment, the B mode processing program 68 is divided into three subprograms of B routine # 1, B routine # 2, and B routine # 3. That is, the B mode is determined by the whole of these three routines. A processing program 68 is configured. Similarly, the CFM mode processing program 70 includes three routines of CFM routine # 1, CFM routine # 2, and CFM routine # 3, and the D mode processing program 72 includes D routine # 1 and D routine. # 2 and D routine # 3. Thus, in this embodiment, the number of divisions is the same.
[0044]
In a certain processor, only a specific routine in each program 68, 70, 72 is actually used, that is, it is not actually used for other routines. In other words, it is complicated to store a routine having the same contents for each processor and to make a dedicated design for each processor by selecting a necessary routine for each processor from among them. Is to avoid.
[0045]
Here, the main routine 64 also basically has the same contents among the processors, but as described above, the contents of the execution routine correspondence table 66 included therein differ between the processors.
[0046]
5 and 6 show specific examples of the above-described execution routine correspondence table 66. For example, what is shown in FIG. 5 is an execution routine correspondence table corresponding to the processor A50, and what is shown in FIG. It is an execution routine correspondence table corresponding to processor B52. In each correspondence table, a routine corresponding to each beam attribute, that is, each operation mode is designated. Such designation corresponds to the arrangement or order of processing of each processor. As shown in FIGS. 5 and 6, since the processor A50 is the first processor, the routine # 1 for each operation mode. Is assigned to the processor B, and the routine # 2 is assigned to each operation mode. The same applies to the third processor C54.
[0047]
In this way, when a single operation program is selected by dividing and assigning a single processing program to a plurality of processors arranged in series, the processing is shared by the plurality of processors. It is possible to avoid such a problem that the processing is concentrated on a certain processor. In addition, if the contents of each program are changed, the designer only needs to correct the common routine set for multiple processors at a time, so the designer only modifies the execution routine correspondence table. There is an advantage that it is sufficient.
[0048]
Next, operation examples of the processor A50, the processor B52, and the processor C54 will be described with reference to FIGS. FIG. 7 shows a sequence of beam data, and the time T ₁ ~ T _Five Each beam data is transmitted at each timing until. Here, the beam data is passed to the first processor in the order of B [0], D [1], D [2], and B [1].
[0049]
FIG. 8 shows the operation contents of each processor in the case shown in FIG. Here, each processor is conceptually shown in the horizontal direction in FIG. 8, and each time is shown in the vertical direction in FIG. First time T ₁ , The first beam data B [0] is transferred to the processor A50, and the data is processed by the execution of the B routine # 1 according to the execution routine correspondence table in the processor A50. And the processing result is time T ₂ Is passed to the processor B52, where the data is processed by the execution of the B routine # 2 according to the description in the execution routine correspondence table of the processor B52. Furthermore, time T _Three The data processed by the processor B52 is processed by the execution of the B routine # 3 selected in accordance with the description in the execution routine correspondence table in the next processor C54.
[0050]
On the other hand, time T ₂ , The second data beam data D [0] is input to the processor A50, which is processed by executing the D routine # 1. And the data is the time T _Three And time T _Four Are processed step by step by D routine # 2 and D routine # 3 in processor B52 and processor C54. This is repeated for each subsequent data. Therefore, as shown in FIG. 8, the pipeline processing as described above causes the processors to operate independently from each other, and the load is distributed as a whole in order to execute their own sharing. Efficient data processing is realized.
[0051]
In the meantime, in FIG. 1, when the contents of a routine set in the processors 50, 52, and 54 are changed, a program modification portion or a program under the control of the system controller 60 is read by reading from a communication line or medium not shown. The entire program is downloaded to each processor 50, 52, 54 at once. In this case, the user or designer does not have a burden of considering which program part is to be downloaded to which processor. On the other hand, when the execution routine correspondence table of each processor 50, 52, 54 is modified, the contents of the new correspondence table are written to each processor under the control of the system controller 60. However, the data capacity of such an execution routine correspondence table is extremely small, and the burden on the system or the design burden for writing is very small.
[0052]
FIG. 9 shows another configuration example. That is, the beam processing unit 46 shown in FIG. 9 has two processor rows 74 and 76 provided in parallel with each other. Each processor row 74 and 76 is constituted by three processors connected in series. The processor row 74 and the processor row 76 may be the same including their functions, but may correspond to different operation modes. In the former case, the processor that can be processed in the distribution stage of the received data to the first processor A1 and the processor A2 may preferentially capture the received data. In the latter case, the preprocessing unit 48 It may be determined to which processor row the received data is to flow. Of course, it is also possible for the head processor A1 or A2 to capture the received data that it is responsible for.
[0053]
In the embodiment described above, the execution routine correspondence table is stored for each of the processors 50, 52, and 54. However, as described above, when the preprocessing unit 48 assigns attribute information to the received data. As the attribute information, a routine number for each processor may be designated. That is, the preprocessing unit 48 has the same function as the execution routine correspondence table in each processor.
[0054]
【The invention's effect】
As described above, according to the present invention, there is an advantage that efficient signal processing can be realized using a plurality of processors. Moreover, according to this invention, there exists an advantage that it can respond to a design change etc. flexibly.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a preferred embodiment of an ultrasonic diagnostic apparatus according to the present invention.
FIG. 2 is a block diagram illustrating a specific configuration example of each processor illustrated in FIG. 1;
FIG. 3 is a diagram for explaining a packet configuration;
4 is a diagram for explaining a data structure in the program memory shown in FIG. 2; FIG.
FIG. 5 is a diagram showing an example of an execution routine correspondence table;
FIG. 6 is a diagram showing another example of an execution routine correspondence table.
FIG. 7 is a diagram illustrating a column of beam data corresponding to a transmission / reception sequence.
FIG. 8 is a diagram for explaining the operation content of each processor at each time;
FIG. 9 is a diagram illustrating another configuration example of the beam processing unit illustrated in FIG. 1;
FIG. 10 is a block diagram for explaining a conventional example.
FIG. 11 is a block diagram for explaining a comparative example.
FIG. 12 is a block diagram for explaining a reference example;
[Explanation of symbols]
40 probe, 42 transmitting unit, 44 receiving unit, 46 beam processing unit (signal processing unit), 48 preprocessing unit, 50, 52, 54 processor, 56 display processing unit, 58 display unit, 64 main routine, 66 execution routine Table, 68B mode processing program, 70 CFM mode processing program, 72 B mode processing program, 154 program execution unit, 156 program memory.

Claims (14)

Data output means for outputting received data;
A data processor that includes a processor array including a plurality of processors connected in series from the upper level to the lower level, and processes the received data;
Including
Each processor constituting the processor row is
A subprogram set storage unit storing a subprogram set constituting a plurality of processing programs corresponding to a plurality of operation modes;
A subprogram for processing the received data to be processed by executing a specific subprogram corresponding to the operation mode and its rank corresponding to the received data to be processed in the set of subprograms. The execution part;
An ultrasonic diagnostic apparatus comprising: The apparatus of claim 1.
The plurality of processors constituting the processor row start operation by data input and operate independently of each other,
An ultrasonic diagnostic apparatus, wherein the received data is pipeline processed. The apparatus of claim 1.
Each processor that constitutes the processor column has a correspondence table storage unit that stores a correspondence table in which a subprogram to be executed by itself is associated with each operation mode,
The ultrasonic diagnostic apparatus, wherein the subprogram execution unit includes subprogram selection means for selecting the specific subprogram with reference to the correspondence table. The apparatus of claim 3.
The ultrasonic diagnostic apparatus, wherein the processors constituting the processor row are different from each other only in the contents of the correspondence table, and the other hardware and software are the same. The apparatus of claim 4.
An ultrasonic diagnostic apparatus comprising means for individually changing the contents of the correspondence table for each processor constituting the processor row. The apparatus of claim 1.
An ultrasonic diagnostic apparatus comprising means for collectively changing the contents of the subprogram set for each processor constituting the processor array. The apparatus of claim 1.
Including pre-processing means for adding attribute information for each received data in units of ultrasonic beams;
The ultrasonic diagnostic apparatus, wherein the subprogram selection means selects the specific subprogram by referring to attribute information added to the received data to be processed. The apparatus of claim 7.
The ultrasonic diagnostic apparatus, wherein the attribute information is information for specifying an operation mode. The apparatus of claim 7.
The ultrasonic diagnostic apparatus, wherein the attribute information is information for designating the specific subprogram. The apparatus of claim 7.
The preprocessing means includes
A frame memory for storing the received data;
Memory management means for writing the received data to the frame memory according to a transmission / reception sequence, and reading the reception data from the frame memory according to a predetermined sequence different from the transmission / reception sequence;
An ultrasonic diagnostic apparatus comprising: The apparatus of claim 1.
The ultrasonic diagnostic apparatus, wherein DMA transfer of received data is executed between the processors in the processor array. The apparatus of claim 1.
The data processing unit has a plurality of processor rows arranged in parallel,
The ultrasonic diagnostic apparatus, wherein the received data is distributed to the plurality of processor rows. In an ultrasonic diagnostic apparatus, a method of pipeline processing received data using a processor array composed of a plurality of processors connected in series from upper to lower,
Storing the same set of subprograms for each processor in the processor array;
In each processor in the processor row, selecting a specific subprogram corresponding to the received data input from the previous stage in the subprogram set;
In each processor in the processor row, executing the selected specific subprogram to process the input received data, and outputting the processed received data to the subsequent stage;
Including
The data processing method in the ultrasonic diagnostic apparatus, wherein the subprogram set includes a plurality of subprogram groups, and each subprogram group constitutes a processing program corresponding to each operation mode. 14. The method of claim 13, wherein
The data processing method in the ultrasonic diagnostic apparatus further includes a step of collectively changing the contents of the subprogram set stored in each processor in the processor row.

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