JP4252391B2 - Collective semiconductor device - Google Patents

Description

The present invention relates to a condenser if a semiconductor device using an organic substrate, relates current if a semiconductor device that to prevent substrate deformation especially when resin sealing.

  As a semiconductor device using an organic substrate capable of freely routing wiring on an insulating substrate, a surfaceless type of leadless type such as a Ball Grid Array (hereinafter referred to as BGA) structure or a Land Grid Array (hereinafter referred to as LGA) structure. Semiconductor devices are widely used. Recently, a structure called a pad-on-via type that does not require wiring as shown in FIG. 4 can be reduced in area, so that it is widely adopted in ultra-small Chip Scale Package (hereinafter referred to as CSP). ing.

  In such a semiconductor device, the standoff (height a from the lower surface of the base material of the organic substrate to the lower surface of the function electrode, see FIG. 4) is formed to a height of about 20 μm to 150 μm. This reduces the occurrence of mounting defects due to warpage of the mounted motherboard and foreign matter adhering to the surface of the semiconductor device and the motherboard, and functions to improve mounting reliability.

  For example, in a semiconductor device having a BGA structure, the wiring on the chip mounting surface is taken out to the mother board mounting surface (back surface of the organic substrate) using a through hole, and is connected by drawing a wiring pattern to a predetermined function electrode. On the motherboard mounting surface, only the function electrodes are left so that solder flow does not occur when the solder balls are subsequently mounted, and the solder balls are selectively covered with a solder resist of about 20 μm including the through-hole portion and the wiring pattern, and the exposed function electrodes are solder balls. By forming the structure, a standoff of about 100 μm can be obtained.

  On the other hand, a semiconductor device having an LGA structure generally has a structure in which a solder ball is not attached to a semiconductor device having a BGA structure. Therefore, the height of the function electrode surface is lower than the height of the solder resist surface, and the standoff is negative. In the Japanese Patent Application Laid-Open No. 2002-83900, the present applicant projects the resin filled in the through hole from the through hole opening surface so that the function electrode (land) of the LGA structure does not have a shape recessed from the solder resist. A technique for forming a land with high mountability and high reliability by plating on it is disclosed.

  In the pad-on-via type semiconductor device, as shown in FIG. 4, the through-hole 2 is filled with a resin 9 after through-hole plating so that the lower surface of the through-hole 8 formed in the organic substrate 2 can be used as the function electrode 1 as it is. The resin 9 is plated. Since the semiconductor device having such a structure does not require a routing wiring area, the area of the organic substrate can be reduced, and it is not necessary to cover with the solder resist that has been implemented to prevent solder flow. The stand-off amount can be secured. Therefore, in the semiconductor device having such a structure, the standoff is about 30 to 40 μm.

  In a semiconductor device using these organic substrates, it is general that only one surface of the organic substrate is resin-sealed by a transfer molding method as a method of resin-sealing the semiconductor chip 7. The semiconductor device formed by the transfer mold method has a smaller variation in the thickness of the semiconductor device than other sealing methods such as a potting method, and can use a less expensive resin than the resin used in the potting method, High productivity and low cost production.

However, in the transfer mold method, after filling the resin and applying a holding pressure of several tons before curing, the resin void generated during injection is pushed out of the air vent, reducing the number of places where water remains, so that during mounting reflow It prevents problems such as package cracks.
JP 2002-83900 A

  However, as schematically shown in FIG. 5, the substrate is likely to be deformed by the holding pressure by the transfer mold method, and the warp stress may cause the semiconductor chip 7 to be peeled off, resulting in a decrease in reliability of the semiconductor device. There is. In particular, in a peripheral type semiconductor device having a function electrode only on the outer periphery of the semiconductor device, the center portion of the lower surface of the semiconductor device is deformed into a convex shape as shown in FIG. Such deformation of the substrate may lead to a decrease in connectivity such as wire bonding and occurrence of defects such as chip cracks. In particular, as a semiconductor device is made thinner, a semiconductor package using an organic substrate tends to be thinned from about 0.2 to 0.4 mm to about 0.1 to 0.2 mm. The strength is low, and further substrate deformation has become a big problem.

  As described above, in a semiconductor device having a predetermined standoff using an organic substrate, the standoff is preferably within a predetermined range from the viewpoint of mounting reliability, but on the other hand, substrate deformation occurs during transfer molding. An object of the present invention is to provide a semiconductor device and a collective semiconductor device that prevent deformation of a resin substrate during resin sealing in a semiconductor device having a predetermined standoff.

In order to achieve the above object, the collective semiconductor device according to the present invention has a plurality of semiconductor chips mounted on the surface of the collective organic substrate, the semiconductor chips are resin-sealed, and a predetermined surface is formed on the back surface of the collective organic substrate. A function electrode having a stand-off and a height substantially equal to the function electrode are arranged at a position to prevent deformation of the substrate when resin-sealing the semiconductor chip, and by dispersing stress applied to the function electrode A collective semiconductor device provided with an auxiliary pattern for preventing substrate deformation , wherein the auxiliary pattern is formed on a region to be cut and removed when the collective organic substrate is cut to form a semiconductor device. It is characterized by.

In integrated semiconductor device of multi-cavity of the present invention, by providing the auxiliary patterns that have a same standoff as function electrode on the cutting line, the distance between the function electrode as typified by fan-in structure 0 Even when a semiconductor device having an electrode arrangement as large as about 5 mm is produced, substrate deformation can be prevented.

An embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a first reference example of the present invention, which is an example of a full grid electrode arrangement in which function electrodes and auxiliary patterns are arranged in a lattice pattern on the entire back surface of a semiconductor device. Reference numeral 1 denotes a function electrode connected to the semiconductor chip, 2 denotes an organic substrate, and 3 denotes an auxiliary pattern. Since the function electrode 1 and the auxiliary pattern 3 having the same shape as the function electrode 1 are formed on the organic substrate 2 at the same time, the standoff is about 30 to 40 μm in height. As a result, at the time of transfer molding, the auxiliary pattern 3 can disperse stress applied to the function electrode 1 and prevent deformation of the substrate at the time of holding pressure immediately after filling the resin by making contact with the mold on the same surface. The function electrode 1 and the auxiliary pattern 3 are arranged at predetermined intervals in consideration of the material of the organic substrate, the thickness, conditions at the time of transfer molding, and the like so that the substrate does not deform. As an example, when the wiring space is about 0.4 mm or less, the organic substrate can be prevented from being deformed. Further, the arrangement of the function electrode 1 and the auxiliary pattern 3 can be variously changed and the deformation of the organic substrate 2 may be prevented, and the arrangement is not limited to the lattice arrangement.

FIG. 2 shows a second reference example of the present invention, which is an example in which a square auxiliary pattern 4 is arranged at the center of the back surface of the semiconductor device. The auxiliary pattern 4 is also formed at the same height as the function electrode 1 and has the effect of stress dispersion in the same manner as the auxiliary pattern 3 of the first reference example , and can prevent substrate deformation. Also in this reference example , the arrangement and shape of the function electrode 1 and the auxiliary pattern 4 can be variously changed according to the resin sealing conditions, and it is sufficient that the deformation of the organic substrate 2 can be prevented. However, the present invention is not limited to a structure in which square auxiliary patterns are arranged.

FIG. 3 shows an embodiment of the present invention and is a layout view of semiconductor devices on a multi-piece collective organic substrate. Reference numeral 5 denotes a collective organic substrate, 6 denotes an auxiliary pattern formed on a dicing cutting line formed on the back surface of the collective organic substrate 5, and 10 denotes a semiconductor device separated into pieces by dicing. In the figure, the function electrode is not shown, and the auxiliary pattern is schematically shown. The aggregate organic substrate having such a structure is formed as follows. First, a collective organic substrate 5 having function electrodes and auxiliary patterns 6 formed on the back surface is prepared, and a semiconductor chip is mounted on the surface. The semiconductor chip is resin-sealed by a transfer mold method. Thereafter, the semiconductor device 10 is individualized by cutting along the center line of the auxiliary pattern 6 formed on the back surface of the collective organic substrate 5. When resin molding is performed by transfer molding, if the distance between function electrodes formed on individual semiconductor devices, such as a fan-in structure, is large, the organic substrate deforms when holding pressure during resin sealing. End up. Therefore, in the present invention, by disposing the same standoff auxiliary pattern 6 as the function electrode 1 on the cutting line, the stress is dispersed, and even if the distance is large, the resin sealing can be performed without deforming the organic substrate. It becomes possible. In this case, when the auxiliary pattern 6 is formed on the cutting line, the auxiliary pattern 3 or 4 shown in the reference examples 1 and 2 in the present invention can be formed at the same time.

  It is preferable that all the auxiliary patterns 6 formed on the dicing cutting line are removed by dicing. Therefore, when the dicing blade width is about 0.1 to 0.2 mm, the auxiliary pattern width is about 0.050 to 0.15 mm in consideration of tolerances such as positional deviation, and is cut off during dicing, The auxiliary pattern 6 does not remain in the separated semiconductor device 10.

It is a figure explaining the 1st reference example of this invention . It is a figure explaining the 2nd reference example of this invention . It is a figure explaining embodiment of this invention . It is a figure explaining this kind of conventional semiconductor device. It is a figure explaining the deformation | transformation of the organic substrate of the conventional semiconductor device.

Explanation of symbols

1: function electrode, 2: organic substrate, 3, 4, 6: auxiliary pattern, 5: collective organic substrate, 7: semiconductor chip, 8: through hole, 9: resin, 10: semiconductor device

Claims (1)

A plurality of semiconductor chips are mounted on the surface of the collective organic substrate, the semiconductor chips are resin-sealed, a function electrode having a predetermined standoff on the back surface of the collective organic substrate, and a height substantially equal to the function electrode In the collective semiconductor device provided with an auxiliary pattern for preventing the deformation of the substrate by dispersing the stress applied to the function electrode when the semiconductor chip is resin-sealed. There,
The collective semiconductor device, wherein the auxiliary pattern is formed on a region to be cut and removed when the collective organic substrate is cut to form a semiconductor device.

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