JP4251256B2 - Method for producing microcrystalline film - Google Patents

Method for producing microcrystalline film Download PDF

Info

Publication number
JP4251256B2
JP4251256B2 JP2000250270A JP2000250270A JP4251256B2 JP 4251256 B2 JP4251256 B2 JP 4251256B2 JP 2000250270 A JP2000250270 A JP 2000250270A JP 2000250270 A JP2000250270 A JP 2000250270A JP 4251256 B2 JP4251256 B2 JP 4251256B2
Authority
JP
Japan
Prior art keywords
microcrystalline
film
light emitting
producing
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000250270A
Other languages
Japanese (ja)
Other versions
JP2002064066A (en
Inventor
敏明 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Systems Co Ltd filed Critical Fuji Electric Systems Co Ltd
Priority to JP2000250270A priority Critical patent/JP4251256B2/en
Publication of JP2002064066A publication Critical patent/JP2002064066A/en
Application granted granted Critical
Publication of JP4251256B2 publication Critical patent/JP4251256B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Description

【0001】
【発明の属する技術分野】
【0002】
この発明は、薄膜トランジスタや薄膜太陽電池など薄膜半導体デバイスに用いられる微結晶膜の製造方法に関する。
【従来の技術】
【0003】
非単結晶膜を用いた薄膜半導体デバイス、特にシリコン系の非単結晶薄膜であるアモルファスシリコン(a-Si)、およびアモルファスシリコンゲルマニウム(a-SiGe)等の合金膜を、プラズマ放電によって形成した薄膜半導体デバイスは、単結晶シリコンデバイスと比較して、大面積に、低温で、安価に作成できることから、ディスプレイ用の薄膜トランジスタ(TFT)や電力用の大面積薄膜太陽電池等への適用において特に期待されている。
【0004】
上記プラズマ放電によって形成する薄膜は、例えば下記のような装置により形成される。図7は、a-Si 薄膜太陽電池をプラズマ放電によって形成する場合の成膜室の概略構造の一例を示し、特開平8−250431号公報に記載された構造の一例を示す。図7(a)、(b)はそれぞれ、成膜室の開放時および封止時の概略断面図を示す。
【0005】
図7(a)に示すように、断続的に搬送されてくる可撓性基板10の上下に函状の下部成膜部室壁体21と上部成膜部室壁体22とを対向配置し、成膜室の封止時には、下部成膜部室と上部成膜部室からなる独立した処理空間を構成するようになっている。この例においては、下部成膜部室は電源40に接続された高周波電極31を備え、上部成膜部室は、ヒータ33を内蔵した接地電極32を備える。
【0006】
成膜時には、図7(b)に示すように、上部成膜部室壁体22が下降し、接地電極32が基板10を抑えて下部成膜部室壁体21の開口側端面に取付けられたシール部材50に接触させる。これにより、下部成膜部室壁体21と基板10とから、排気管61に連通する気密に密閉された成膜空間60を形成する。上記のような成膜室において、高周波電極31へ高周波電圧を印加することにより、プラズマを成膜空間60に発生させ、図示しない導入管から導入された原料ガスを分解して基板10上に膜を形成することができる。
【0007】
ところで、上記のような装置によって形成された薄膜太陽電池用のa-Siは、単結晶に比べて、電子移動度が小さいため、上記TFTに適用した場合、ディスプレイの開口率が小さく輝度やコントラストが悪くなる問題がある。これを解決するために、微結晶シリコン(μc-Si)のTFTへの適用が検討されている。ここで微結晶とは、プラズマCVDや光CVD、熱CVD等で作成した薄膜で、アモルファス成分に対して結晶体積分率が数%からほぼ100%、結晶粒径が数nmから数μmの物を指す。μc-Siを用いることにより、a-Siに比べて電子移動度を数桁向上することができる。
【0008】
さらに、単結晶シリコンに比べて単結晶ゲルマニウムは、電子移動度で約2倍、ホール移動度で約2.5倍大きい。微結晶膜においても同様に、微結晶シリコンゲルマニウム(μc-SiGe)あるいは微結晶ゲルマニウム(μc-Ge)を用いることによって、μc-Siに比べて電子移動度の向上が期待できる。 また上記とは異なる問題として、a-Siまたはアモルファスシリコンゲルマニウム(a-SiGe)を用いた太陽電池では、長時間の光照射に対して太陽電池の効率が低下するいわゆるSteabler Wronski効果によって、効率が初期よりも低下する問題がある。
【0009】
最近、p-i-n型非単結晶太陽電池として、p、i、n層材料にμc-Siを適用することにより、光劣化がない太陽電池が作成可能なことが報告されている([報告1]J.Meier, P. Torres, R. Platz, S. Dubail, U. Kroll, A.A. Anna Selvan, N. Pellaton Vaucher Ch. Hof, D. Fischer, H. Keppner, A. Shah, K.D. Ufert, P. Giannoules, J.Koehler; "On the way towards high efficiency thin film silicon solar cells by the "micromorph" concept", Mat. Res. Soc. Symp. Proc. Vol.420, 1996, pp.3 参照)。
【発明が解決しようとする課題】
【0010】
しかしながら、μc-Siを用いたデバイスの性能を向上させるためには、μc-Siの結晶性をさらに向上させる必要がある。結晶性の一つの指標として、ラマン散乱分光を用いた結晶体積分率の評価がある。具体的には、結晶シリコンのTOモードに起因した520cm-1付近のピークとアモルファスシリコンのTOモードに起因した480cm-1付近のピークの強度比(I520/I480)が結晶体積分率の一つの目安となる。一般的な13.56MHzの高周波プラズマCVDにおいて、原料ガスのSiH4を水素で20〜100倍程度に希釈した場合、I520/I480の典型的な値は2〜5程度で、低い値を示す。デバイスの性能を向上させるためには、I520/I480をさらに増加する必要がある。
【0011】
この発明は、上記の点に鑑みてなされたもので、本発明の課題は、微結晶膜を用いた薄膜半導体デバイスの性能向上を図るために、高い結晶体積分率、即ち高い(I520/I480)を有する微結晶膜を形成可能な微結晶膜の製造方法を提供することにある。
【課題を解決するための手段】
【0012】
前述の課題を達成するため、この発明においては、微結晶膜形成用基板の一側に配設した平板状の接地電極と、他側に平行して配設した平板状の高周波電極と、原料ガス供給口とを備えた成膜室に、膜形成用の原料ガスを導入し、プラズマ放電によって前記基板主面に微結晶膜を形成する微結晶膜の製造方法において、前記微結晶膜の微結晶は、微結晶シリコン,微結晶ゲルマニウム,微結晶シリコン合金,微結晶ゲルマニウム合金の内のいず れかとし、前記高周波電極近傍に生ずる発光部とこの発光部に対向して接地電極近傍に生ずる発光部とが、隣接または重なる成膜条件で微結晶膜を形成することとする(請求項1の発明)。
【0013】
前記請求項1の発明の実施態様としては、下記請求項2ないしの発明が好適である。即ち、前記請求項1に記載の微結晶膜の製造方法において、前記接地電極と高周波電極との電極間隔寸法を減少することによって、前記両発光部が隣接または重なる成膜条件とする(請求項2の発明)。また、請求項1に記載の微結晶膜の製造方法において、前記成膜室の成膜圧力を減少することによって、前記両発光部が隣接または重なる成膜条件とする(請求項3の発明)。
【0014】
さらに、請求項1ないし3のいずれかに記載の微結晶膜の製造方法において、電極に印加する周波数は、10MHz〜100MHzとする(請求項4の発明)。さらにまた、請求項1ないし4のいずれかに記載の微結晶膜の製造方法において、前記高周波電極は、アースシールドを除去してなるものとする(請求項5の発明)。
【0015】
また、請求項1に記載の微結晶膜の製造方法において、前記微結晶シリコン合金は、微結晶シリコンゲルマニウム,微結晶シリコンカーバイド,微結晶シリコンオキサイド,微結晶シリコンナイトライドの内のいずれかとする(請求項の発明)。
【0016】
上記各実施態様に関しては、実験結果とともに、後に詳述するが、電極間隔寸法を減少するか、もしくは成膜圧力を減少することによって、高周波電極近傍に生ずる発光部とこの発光部に対向して接地電極近傍に生ずる発光部とが、隣接または重なる成膜条件となって、これにより、微結晶膜の結晶性が向上する理由は、下記のとおりと考えられる。
【0017】
図6に、説明の便宜上、従来の微結晶膜の製造方法の一例に関わる高周波プラズマCVDの放電構造を模式的に示す。この例において、成膜用のガスとしては微結晶膜を作製する典型的な条件である、SiH4を水素で50倍に希釈した条件を用いた。そのほかの成膜条件としては、圧力67Pa、電源周波数100MHz、放電パワー30Wとし、電極間隔dは30mmである。高周波電極1、基板2を載置しヒータ4を備える接地電極3のいずれの近傍にも、まず暗部(6、8)があり、続いて発光部(71、72)が存在する。発光部71と発光部72の間の中間部9はあまり明るくない。放電構造の詳細な観察により、放電構造は電極に平行な面に対して端部を除いてほぼ均一である。また、両電極近傍の暗部の厚さはほぼ等しくa1≒a2であり、両電極から発光部端部までの距離も等しくb1≒b2である。電極間隔dを変えても電極から発光部端部までの距離(b1、b2)や暗部の厚さ(a1、a2)は変らずに、中間部9の厚さcだけが減少することが分かった。また、圧力を減少すると、図のb1、b2が増加し、両発光部が接近する。
【0018】
プローブを用いた測定から、中間部に比べて、発光部の電子温度が高いことを確認した。すなわち、製膜に寄与するシラン系ラジカル(SiHx (x=0,1,2,3)等)や水素原子ラジカル(H)は、主にこの発光部で発生しているといえる。これに対して、中間部では電子温度が低いため、ラジカルと母ガスの2次反応により、ラジカルの損失が多くなっている。
【0019】
μc-Si膜は、シラン系ラジカルに対する水素原子ラジカルの割合を高くした場合に、結晶性が良くなり、I520/I480が増加する傾向がある。水素原子ラジカルの生成断面積のしきい値は、シラン系ラジカルの生成断面積のしきい値より高く、電子温度が高いほど水素原子ラジカルの割合が高くなる。発光部と発光部を重ねることによって、電極間中央部が全て電子温度の高い発光部となるので、水素原子ラジカルの割合が増加して、微結晶膜の結晶性が向上すると考えられる。
【0020】
また一方において、水素原子ラジカルは反応性が高いため母ガスとの2次反応による損失が多いが、発光部と発光部を重ねることによって、中間部がなくなり、ラジカルの損失、特に水素原子ラジカルの損失が抑制されて、基板を置く接地電極にラジカルが効果的に供給されて、微結晶膜の結晶性が向上すると考えられる。
【発明の実施の形態】
【0021】
この発明の実施の形態について以下に述べる。
【0022】
図1に、この発明の実施例に関わる高周波プラズマCVDの放電構造を模式的に示す。この実施例においては、RF(13.56MHz)の容量結合型プラズマCVD装置を用い、高周波電源5により高周波電極1に電力が供給される。接地電極3の上に基板2を置き、ヒータ4により加熱することができる。
【0023】
高周波電極1と接地電極3の間にプラズマを発生させて原料ガスを分解して、基板2に微結晶膜の製膜を行う。電極間隔dを十分小さくすると、両電極近傍の発光部が重なって1つの発光部7となる。そのとき、暗部6、暗部8の厚さは変わらない。
【0024】
μc-Siの製膜条件としては、基板ヒータ温度200℃、SiH4流量5sccm、水素流量250sccm、で水素希釈率50倍、圧力67Pa、放電パワー15〜60Wを用いた。ここでは、電極間隔dを12.5mmにして、両発光部が重なるようにした。なお、流量の単位sccmは、standard cc/min(標準状態換算の流量cm3/min)を示す。
【0025】
図2に、図1の実施例の装置を用いて製膜したμc-Siについて、電極間隔dに対する結晶体積分率(I520/I480)を求めた実験結果を示す。参照データとして、両電極近傍の発光部が重ならないd=30mmの100MHzと13.6MHzのI520/I480もプロットした。13.6MHzでd=30mmの場合(B)、I520/I480=4〜5と低くなっている。d=12.5mmにして両発光部を重ねた場合(D)、I520/I480=9〜10に増加する。また、100MHzの場合、両発光部が重ならないd=30mmの場合(A)においても、I520/I480=9〜12と高い値を示すが、d=12.5mmにして両発光部を重ねた場合(C)、I520/I480はさらに増加してI520/I480=12〜16の高い値を示す。両発光部を重ねること、また、望ましくは電源周波数を上げることによって、I520/I480の増大を図ることができる。
【0026】
図3は、請求項2の発明に関わる実験結果を示す図であって、圧力67Pa、電極間隔d=30mm一定の場合について、電源周波数fに対する接地電極から接地電極近傍の発光部端部までの距離b2の関係を示す。fの増加に対して、わずかにb2が減少する。高周波電極から高周波電極近傍の発光部までの距離b1も周波数に対してb2と同様に変化し、b1≒b2であった。また、電極間隔を変えても、中間部cの厚さが変るだけである。
【0027】
即ち、図3から、電極間隔d=b2×2とすることにより、両発光部が隣接または重なる条件を求めることができる。図3から、d=30mmの場合、13.6〜100MHzのいずれの周波数においても、d>b2×2で両発光部は重ならない。これに対してd=12.5mmの場合、いずれの周波数でもd<b2×2で、両発光部が重なることが分かる。
【0028】
図4は、請求項3の発明に関わる実験結果を示す図であって、電極間隔d=30mm一定の場合について、成膜圧力Prに対する接地電極から接地電極近傍の発光部端部までの距離b2の関係を示す。電源周波数13.6MHzから100MHzまでパラメータとして変化させている。いずれの周波数においても、Prを減少すると、b2が増加する。すなわち、電極間隔d一定の場合においても、Prを減少することによって両発光部を重ねることができる。また、b1≒b2であり、電極間隔を変えても、中間部cの厚さが変るだけである。すなわち、図4から、電極間隔d=b2×2とすることにより、両発光部が隣接または重なる条件を求めることができる。
【0029】
電極間隔d=20mmにおいて、100MHzにおいて、両発光部が重ならないPr=133Paと、両発光部が重なるPr=40Paでμc-Siを製膜した。Pr=133PaではI520/I480=10であったのに対して、Pr=40PaではI520/I480=13.5に増加した。
【0030】
次に、請求項4の発明に関わり、以下に詳述する。図1または図6に示すような、高周波電極と接地電極の近傍に対称に暗部および発光部が現れる放電構造は、RFからVHFの周波数帯に特徴的に現れる。この周波数帯において、電源周波数の半周期の間に、電子の走行距離は電極間隔と同等もしくは電極間隔より長いが、イオンの走行距離は電極間隔に対して無視できるほど短い。即ち、電子は電源周波数に追随して動くが、イオンは電源周波数に追随できない。
【0031】
図5は、周波数fと半周期の電子の走行距離との関係を示す。図5に示すように、約1MHzにおいて最も軽い水素原子イオン(H+)、水素分子イオン(H2+)においても半周期に約1mmしか動けなくなる。また、周波数が高くなって約1GHzになると、今度は電子が約1mmしか動けなくなる。図中電子温度5eVの場合と、電子温度10eVの場合の電子の走行距離を示す。
【0032】
従って、電源周波数1MHz〜1GHzにおいて、電子の走行距離は1mm以上、イオンの走行距離は1mm以下となり、上記のような放電構造が発生すると考えられる。典型的には、電子の走行距離10mm以上、イオンの走行距離0.1mm以下となる電源周波数10MHz〜100MHzにおいて、上記のような放電構造が明確に現れる。
【0033】
ところで、これまで説明した実施例における高周波電極は、アースシールドがない構造である。アースシールドがある場合には、Pr>67Paにおいて、高周波電圧が印加されている部分とアースシールドとの間で放電が発生し、面方向で放電が不均一になり、良好なμc-Siを製膜することができなくなった。アースシールドがない高周波電極を用いることにより、実験した6.7〜133PaのPrの範囲で放電の不均一の問題は生じない。
【0034】
なお、放電パワーに対しては、b2は変化しなかった。
【0035】
同様の実験を、微結晶ゲルマニウム、微結晶シリコンカーバイド、微結晶シリコンオキサイド、微結晶シリコンナイトライド、微結晶シリコンゲルマニウムについて行なったところ、μc-Siと同様に両発光部を重ねると、I520/I480の増加が認められた。
【発明の効果】
【0036】
上記のとおり、この発明によれば、微結晶膜形成用基板の一側に配設した平板状の接地電極と、他側に平行して配設した平板状の高周波電極と、原料ガス供給口とを備えた成膜室に、膜形成用の原料ガスを導入し、プラズマ放電によって前記基板主面に微結晶膜を形成する微結晶膜の製造方法において、前記微結晶膜の微結晶は、微結晶シリコン,微結晶ゲルマニウム,微結晶シリコン合金,微結晶ゲルマニウム合金の内のいずれかとし、前記高周波電極近傍に生ずる発光部とこの発光部に対向して接地電極近傍に生ずる発光部とが、隣接または重なる成膜条件で微結晶膜を形成することによって、結晶体積分率の高い良好な微結晶膜を作製することができる。
【0037】
上記発明の実施態様としては、電極間隔を減少することによって、あるいは、圧力を減少することによって、両電極の発光部を隣接または重ねることができ、結晶体積分率の高い微結晶膜を作製することができる。
【0038】
このように作成した結晶体積分率の高い微結晶膜を薄膜太陽電池へ適用した場合、変換効率の向上に効果がある。また、このように作成した結晶体積分率の高い微結晶膜をディスプレイ用の薄膜トランジスタへ適用した場合、ディスプレイの開口率を大きくして輝度やコントラスト上げることに効果がある。
【図面の簡単な説明】
【0039】
【図1】 この発明の実施例に関わる放電構造を模式的に示す図
【図2】 電極間隔dと結晶体積分率(I520/I480)との関係の実験結果を示す図
【図3】 請求項2の発明に関わる実験結果を示す図
【図4】 請求項3の発明に関わる実験結果を示す図
【図5】 周波数fと半周期の電子の走行距離との関係を示す図
【図6】 従来の微結晶膜の製造方法の一例に関わる放電構造を模式的に示す図
【図7】 従来の薄膜太陽電池用の成膜室の概略構造の一例を示す図
【符号の説明】
【0040】
1:高周波電極、2:基板、3:接地電極、4:ヒータ、5:高周波電源、6,8:暗部、7:発光部。
[0001]
BACKGROUND OF THE INVENTION
[0002]
The present invention relates to a method for producing a microcrystalline film used for a thin film semiconductor device such as a thin film transistor or a thin film solar cell.
[Prior art]
[0003]
Thin film semiconductor devices using non-single crystal films, especially thin films formed by plasma discharge of alloy films such as amorphous silicon (a-Si) and amorphous silicon germanium (a-SiGe), which are silicon-based non-single crystal thin films Compared to single crystal silicon devices, semiconductor devices can be made in large areas, at low temperatures, and at low cost, and are especially expected for applications in thin film transistors (TFTs) for displays, large area thin film solar cells for power, etc. ing.
[0004]
The thin film formed by the plasma discharge is formed by, for example, the following apparatus. FIG. 7 shows an example of a schematic structure of a film forming chamber when an a-Si thin film solar cell is formed by plasma discharge, and shows an example of the structure described in Japanese Patent Application Laid-Open No. 8-250431. FIGS. 7A and 7B are schematic cross-sectional views when the film forming chamber is opened and sealed, respectively.
[0005]
As shown in FIG. 7 (a), a box-shaped lower film forming chamber wall 21 and an upper film forming chamber wall 22 are arranged opposite to each other on the upper and lower sides of the flexible substrate 10 that is intermittently conveyed. When the film chamber is sealed, an independent processing space composed of a lower film forming chamber and an upper film forming chamber is formed. In this example, the lower film forming chamber is provided with a high-frequency electrode 31 connected to a power source 40, and the upper film forming chamber is provided with a ground electrode 32 with a built-in heater 33.
[0006]
At the time of film formation, as shown in FIG. 7B, the upper film forming section chamber wall 22 is lowered, and the ground electrode 32 holds the substrate 10 and is attached to the opening side end surface of the lower film forming section chamber wall 21. The member 50 is brought into contact. Thereby, an airtightly sealed film forming space 60 communicating with the exhaust pipe 61 is formed from the lower film forming part chamber wall 21 and the substrate 10. In the film forming chamber as described above, by applying a high frequency voltage to the high frequency electrode 31, plasma is generated in the film forming space 60, and a source gas introduced from an introduction pipe (not shown) is decomposed to form a film on the substrate 10. Can be formed.
[0007]
By the way, a-Si for thin-film solar cells formed by the above-described device has a lower electron mobility than a single crystal. Therefore, when applied to the TFT, the aperture ratio of the display is small and the brightness and contrast are low. There is a problem that makes it worse. In order to solve this problem, the application of microcrystalline silicon (μc-Si) to TFT is being studied. Here, the microcrystal is a thin film made by plasma CVD, photo CVD, thermal CVD, etc., which has a crystal volume fraction of several percent to almost 100% and a crystal grain size of several nm to several μm with respect to the amorphous component. Point to. By using μc-Si, the electron mobility can be improved by several orders of magnitude compared to a-Si.
[0008]
Furthermore, single crystal germanium is about twice as high in electron mobility and about 2.5 times in hole mobility as compared to single crystal silicon. Similarly, in a microcrystalline film, the use of microcrystalline silicon germanium (μc-SiGe) or microcrystalline germanium (μc-Ge) can be expected to improve the electron mobility compared to μc-Si. Moreover, as a problem different from the above, in solar cells using a-Si or amorphous silicon germanium (a-SiGe), the efficiency is reduced by the so-called Steabler Wronski effect, which reduces the efficiency of the solar cell against long-time light irradiation. There is a problem of lowering than the initial stage.
[0009]
Recently, as a pin-type non-single-crystal solar cell, it has been reported that by applying μc-Si to p, i, and n layer materials, it is possible to create a solar cell free from light degradation ([Report 1] J .Meier, P. Torres, R. Platz, S. Dubail, U. Kroll, AA Anna Selvan, N. Pellaton Vaucher Ch. Hof, D. Fischer, H. Keppner, A. Shah, KD Ufert, P. Giannoules, J. Koehler; "On the way towards high efficiency thin film silicon solar cells by the" micromorph "concept", Mat. Res. Soc. Symp. Proc. Vol. 420, 1996, pp.3).
[Problems to be solved by the invention]
[0010]
However, in order to improve the performance of devices using μc-Si, it is necessary to further improve the crystallinity of μc-Si. One index of crystallinity is the evaluation of the crystal volume fraction using Raman scattering spectroscopy. Specifically, the intensity ratio (I520 / I480) of the peak near 520 cm-1 due to the TO mode of crystalline silicon and the peak near 480 cm-1 due to the TO mode of amorphous silicon is one of the crystal volume fractions. It becomes a standard. In a general 13.56 MHz high-frequency plasma CVD, when SiH4 as a raw material gas is diluted about 20 to 100 times with hydrogen, a typical value of I520 / I480 is about 2 to 5 and shows a low value. In order to improve the performance of the device, it is necessary to further increase I520 / I480.
[0011]
The present invention has been made in view of the above points, and an object of the present invention is to improve the performance of a thin film semiconductor device using a microcrystalline film, that is, a high crystal volume fraction, that is, a high (I520 / I480). The present invention provides a method for producing a microcrystalline film capable of forming a microcrystalline film having a).
[Means for Solving the Problems]
[0012]
In order to achieve the above-described problems, in the present invention, a flat ground electrode disposed on one side of the microcrystalline film forming substrate, a flat high-frequency electrode disposed in parallel with the other side, and a raw material the film forming chamber with a gas inlet, introducing a raw material gas for film formation, method of manufacturing a microcrystalline film forming a microcrystalline film on the substrate main surface by a plasma discharge, fine of the microcrystalline film crystals, microcrystalline silicon, microcrystalline germanium, microcrystalline silicon alloy occurs Izu Rekatoshi ground electrode near to face the light emitting portion and the light emitting portion occurring in the high-frequency electrode vicinity of the microcrystalline germanium alloy A microcrystalline film is formed under a film forming condition adjacent to or overlapping with the light emitting portion (the invention of claim 1).
[0013]
As an embodiment of the invention of claim 1, the inventions of claims 2 to 6 below are suitable. That is, in the method for manufacturing a microcrystalline film according to claim 1, by reducing the electrode interval dimension between the ground electrode and the high-frequency electrode, the film-forming condition is set such that the light emitting portions are adjacent or overlapped. Invention of 2). Further, in the method for manufacturing a microcrystalline film according to claim 1, the film-forming pressure in the film-forming chamber is reduced to form a film-forming condition in which the two light-emitting portions are adjacent to or overlap each other (the invention of claim 3). .
[0014]
Furthermore, in the method for producing a microcrystalline film according to any one of claims 1 to 3, the frequency applied to the electrode is set to 10 MHz to 100 MHz (invention of claim 4). Furthermore, in the method for manufacturing a microcrystalline film according to any one of claims 1 to 4, the high-frequency electrode is formed by removing a ground shield (invention of claim 5).
[0015]
In the method of manufacturing the microcrystalline film of claim 1, wherein the microcrystalline silicon alloy, microcrystalline silicon germanium, microcrystalline silicon carbide, microcrystalline silicon oxide, and any of the microcrystalline silicon nitride ( Invention of Claim 6 ).
[0016]
Each of the above embodiments will be described in detail later along with the experimental results. By reducing the electrode gap size or reducing the film forming pressure, the light emitting portion generated in the vicinity of the high frequency electrode and the light emitting portion are opposed to each other. The reason why the crystallinity of the microcrystalline film is improved is as follows because the light-emitting portion generated in the vicinity of the ground electrode is adjacent to or overlaps with the film-forming condition.
[0017]
For convenience of explanation, FIG. 6 schematically shows a discharge structure of high-frequency plasma CVD related to an example of a conventional method for producing a microcrystalline film. In this example, as a film forming gas, a condition in which SiH4 was diluted 50 times with hydrogen, which is a typical condition for producing a microcrystalline film, was used. As other film forming conditions, the pressure is 67 Pa, the power supply frequency is 100 MHz, the discharge power is 30 W, and the electrode interval d is 30 mm. In the vicinity of either the high-frequency electrode 1 or the ground electrode 3 on which the substrate 2 is placed and the heater 4 is provided, there are dark portions (6, 8) first, followed by light-emitting portions (71, 72). The intermediate part 9 between the light emitting part 71 and the light emitting part 72 is not so bright. From a detailed observation of the discharge structure, the discharge structure is substantially uniform except for the edges with respect to the plane parallel to the electrodes. Further, the thickness of the dark part in the vicinity of both electrodes is almost equal a1≈a2, and the distance from both electrodes to the light emitting part end is also equal b1≈b2. It can be seen that even if the electrode distance d is changed, the distance (b1, b2) from the electrode to the end of the light emitting part and the thickness (a1, a2) of the dark part do not change, but only the thickness c of the intermediate part 9 decreases. It was. Further, when the pressure is decreased, b1 and b2 in the figure increase, and both light emitting parts approach.
[0018]
From the measurement using the probe, it was confirmed that the electron temperature of the light emitting part was higher than that of the intermediate part. That is, it can be said that silane radicals (SiHx (x = 0, 1, 2, 3), etc.) and hydrogen atom radicals (H) contributing to film formation are mainly generated in this light emitting part. On the other hand, since the electron temperature is low in the intermediate portion, the loss of radicals is increased due to the secondary reaction between the radical and the mother gas.
[0019]
The μc-Si film tends to have better crystallinity and increase I520 / I480 when the ratio of hydrogen atom radicals to silane radicals is increased. The threshold value of the hydrogen atom radical generation cross section is higher than the threshold value of the silane radical generation cross section, and the higher the electron temperature, the higher the proportion of hydrogen atom radicals. By superimposing the light emitting portion and the light emitting portion, the central portion between the electrodes becomes a light emitting portion having a high electron temperature, so that the proportion of hydrogen atom radicals is increased and the crystallinity of the microcrystalline film is improved.
[0020]
On the other hand, since hydrogen atom radicals are highly reactive, there are many losses due to secondary reactions with the mother gas. However, by overlapping the light-emitting part and the light-emitting part, there is no intermediate part, and the loss of radicals, particularly the hydrogen atom radicals. It is considered that the loss is suppressed, radicals are effectively supplied to the ground electrode on which the substrate is placed, and the crystallinity of the microcrystalline film is improved.
DETAILED DESCRIPTION OF THE INVENTION
[0021]
Embodiments of the present invention will be described below.
[0022]
FIG. 1 schematically shows a discharge structure of high-frequency plasma CVD according to an embodiment of the present invention. In this embodiment, RF (13.56 MHz) capacitively coupled plasma CVD apparatus is used, and power is supplied to the high-frequency electrode 1 by the high-frequency power source 5. The substrate 2 can be placed on the ground electrode 3 and heated by the heater 4.
[0023]
Plasma is generated between the high-frequency electrode 1 and the ground electrode 3 to decompose the source gas, and a microcrystalline film is formed on the substrate 2. When the electrode interval d is made sufficiently small, the light emitting portions in the vicinity of both electrodes overlap to form one light emitting portion 7. At that time, the thickness of the dark part 6 and the dark part 8 does not change.
[0024]
As film formation conditions for μc-Si, a substrate heater temperature of 200 ° C., a SiH4 flow rate of 5 sccm, a hydrogen flow rate of 250 sccm, a hydrogen dilution rate of 50 times, a pressure of 67 Pa, and a discharge power of 15 to 60 W were used. Here, the electrode interval d is set to 12.5 mm so that the light emitting portions overlap each other. The unit sccm of flow rate indicates standard cc / min (flow rate cm3 / min in standard state conversion).
[0025]
FIG. 2 shows the experimental results of determining the crystal volume fraction (I520 / I480) with respect to the electrode spacing d for μc-Si formed using the apparatus of the embodiment of FIG. As reference data, 100 MHz and 13.6 MHz I520 / I480 with d = 30 mm where the light emitting portions in the vicinity of both electrodes do not overlap are also plotted. When d = 30 mm at 13.6 MHz (B), I520 / I480 = 4-5. When both light emitting parts are overlapped with d = 12.5 mm (D), I520 / I480 = 9-10. In case of 100MHz, when both light emitting parts do not overlap d = 30mm (A) also shows a high value of I520 / I480 = 9-12, but when both light emitting parts are overlapped with d = 12.5mm (C), I520 / I480 further increases and shows a high value of I520 / I480 = 12-16. It is possible to increase I520 / I480 by overlapping both light emitting units, and preferably by raising the power supply frequency.
[0026]
FIG. 3 is a diagram showing an experimental result related to the invention of claim 2, in the case where the pressure is 67 Pa and the electrode interval d = 30 mm is constant, from the ground electrode to the light emitting part end near the ground electrode with respect to the power frequency f. The relationship of distance b2 is shown. As f increases, b2 decreases slightly. The distance b1 from the high-frequency electrode to the light emitting part in the vicinity of the high-frequency electrode also changed with respect to the frequency in the same manner as b2, and b1≈b2. Further, even if the electrode interval is changed, only the thickness of the intermediate portion c is changed.
[0027]
That is, from FIG. 3, by setting the electrode distance d = b2 × 2, it is possible to obtain a condition in which both light emitting portions are adjacent or overlap. From FIG. 3, when d = 30 mm, both light emitting portions do not overlap at d> b2 × 2 at any frequency of 13.6 to 100 MHz. On the other hand, in the case of d = 12.5 mm, it can be seen that both light emitting portions overlap each other at any frequency with d <b2 × 2.
[0028]
FIG. 4 is a diagram showing experimental results relating to the invention of claim 3, and in the case where the electrode interval d = 30 mm is constant, the distance b2 from the ground electrode to the light emitting portion end near the ground electrode with respect to the film forming pressure Pr The relationship is shown. The power frequency is changed as a parameter from 13.6MHz to 100MHz. At any frequency, decreasing Pr increases b2. That is, even in the case where the electrode interval d is constant, both light emitting portions can be overlapped by decreasing Pr. In addition, b1≈b2, and even if the electrode interval is changed, only the thickness of the intermediate portion c is changed. That is, from FIG. 4, by setting the electrode interval d = b2 × 2, it is possible to obtain a condition in which both light emitting units are adjacent or overlap.
[0029]
At an electrode interval of d = 20 mm, at 100 MHz, μc-Si was formed with Pr = 133 Pa where both light emitting portions do not overlap and Pr = 40 Pa where both light emitting portions overlap. In Pr = 133Pa, it was I520 / I480 = 10, but in Pr = 40Pa, it increased to I520 / I480 = 13.5.
[0030]
Next, in relation to the invention of claim 4, it will be described in detail below. The discharge structure in which the dark part and the light emitting part appear symmetrically in the vicinity of the high-frequency electrode and the ground electrode as shown in FIG. 1 or FIG. 6 appears characteristically in the frequency band from RF to VHF. In this frequency band, during the half cycle of the power supply frequency, the electron travel distance is equal to or longer than the electrode spacing, but the ion travel distance is negligibly short with respect to the electrode spacing. That is, electrons move following the power supply frequency, but ions cannot follow the power supply frequency.
[0031]
FIG. 5 shows the relationship between the frequency f and the half-cycle electron travel distance. As shown in FIG. 5, even the lightest hydrogen atom ion (H +) and hydrogen molecular ion (H2 +) at about 1 MHz can move only about 1 mm in a half cycle. Also, when the frequency is increased to about 1 GHz, the electrons can move only about 1 mm this time. In the figure, the traveling distance of electrons when the electron temperature is 5 eV and when the electron temperature is 10 eV is shown.
[0032]
Therefore, at a power supply frequency of 1 MHz to 1 GHz, the traveling distance of electrons is 1 mm or more and the traveling distance of ions is 1 mm or less, and it is considered that the above discharge structure is generated. Typically, such a discharge structure clearly appears at a power supply frequency of 10 MHz to 100 MHz at which the electron travel distance is 10 mm or more and the ion travel distance is 0.1 mm or less.
[0033]
By the way, the high frequency electrode in the Example described so far is a structure without an earth shield. When there is an earth shield, when Pr> 67Pa, discharge occurs between the part where the high-frequency voltage is applied and the earth shield, resulting in non-uniform discharge in the surface direction, producing good μc-Si. I can no longer film. By using a high-frequency electrode without an earth shield, the problem of non-uniform discharge does not occur in the experimental range of Pr of 6.7 to 133 Pa.
[0034]
Note that b2 did not change with respect to the discharge power.
[0035]
The same experiment was performed on microcrystalline germanium, microcrystalline silicon carbide, microcrystalline silicon oxide, microcrystalline silicon nitride, and microcrystalline silicon germanium. When both light emitting portions were overlapped as in μc-Si, I520 / I480 Increased.
【The invention's effect】
[0036]
As described above, according to the present invention, the planar ground electrode disposed on one side of the microcrystalline film forming substrate, the planar high-frequency electrode disposed in parallel with the other side, and the source gas supply port In a method for manufacturing a microcrystalline film, a raw material gas for film formation is introduced into a film forming chamber provided with a plasma discharge to form a microcrystalline film on the main surface of the substrate . One of microcrystalline silicon, microcrystalline germanium, microcrystalline silicon alloy, and microcrystalline germanium alloy, and a light emitting portion generated in the vicinity of the high frequency electrode and a light emitting portion generated in the vicinity of the ground electrode opposite to the light emitting portion, By forming the microcrystalline film under adjacent or overlapping film forming conditions, a favorable microcrystalline film with a high crystal volume fraction can be manufactured.
[0037]
As an embodiment of the above invention, a light-emitting portion of both electrodes can be adjacent to each other or overlapped by reducing the distance between the electrodes or by reducing the pressure, and a microcrystalline film having a high crystal volume fraction is manufactured. be able to.
[0038]
When the microcrystalline film having a high crystal volume fraction prepared as described above is applied to a thin film solar cell, there is an effect in improving the conversion efficiency. In addition, when the microcrystalline film having a high crystal volume fraction prepared as described above is applied to a thin film transistor for a display, it is effective in increasing the aperture ratio of the display and increasing the brightness and contrast.
[Brief description of the drawings]
[0039]
FIG. 1 is a diagram schematically showing a discharge structure according to an embodiment of the present invention. FIG. 2 is a diagram showing an experimental result of a relationship between an electrode interval d and a crystal volume fraction (I520 / I480). FIG. 4 is a diagram showing an experimental result related to the invention of Item 2. FIG. 4 is a diagram showing an experimental result related to the invention of Claim 3. FIG. 5 is a diagram showing a relationship between the frequency f and a half-cycle electron traveling distance. ] Schematic diagram showing a discharge structure related to an example of a conventional method for producing a microcrystalline film. [Fig. 7] Diagram showing an example of a schematic structure of a film forming chamber for a conventional thin film solar cell.
[0040]
1: high frequency electrode, 2: substrate, 3: ground electrode, 4: heater, 5: high frequency power source, 6, 8: dark part, 7: light emitting part.

Claims (6)

微結晶膜形成用基板の一側に配設した平板状の接地電極と、他側に平行して配設した平板状の高周波電極と、原料ガス供給口とを備えた成膜室に、膜形成用の原料ガスを導入し、プラズマ放電によって前記基板主面に微結晶膜を形成する微結晶膜の製造方法において、前記微結晶膜の微結晶は、微結晶シリコン,微結晶ゲルマニウム,微結晶シリコン合金,微結晶ゲルマニウム合金の内のいずれかとし、前記高周波電極近傍に生ずる発光部とこの発光部に対向して接地電極近傍に生ずる発光部とが、隣接または重なる成膜条件で微結晶膜を形成することを特徴とする微結晶膜の製造方法。A film is formed in a film forming chamber having a flat ground electrode disposed on one side of the substrate for forming a microcrystalline film, a flat high frequency electrode disposed in parallel to the other side, and a source gas supply port. In the method for manufacturing a microcrystalline film, in which a forming source gas is introduced and a microcrystalline film is formed on the main surface of the substrate by plasma discharge, the microcrystalline film includes microcrystalline silicon, microcrystalline germanium, microcrystalline Either a silicon alloy or a microcrystalline germanium alloy, and a microcrystalline film is formed under a film forming condition in which a light emitting portion generated in the vicinity of the high-frequency electrode and a light emitting portion generated in the vicinity of the ground electrode opposite to the light emitting portion are adjacent or overlapped. A process for producing a microcrystalline film characterized by comprising: 請求項1に記載の微結晶膜の製造方法において、前記接地電極と高周波電極との電極間隔寸法を減少することによって、前記両発光部が隣接または重なる成膜条件とすることを特徴とする微結晶膜の製造方法。  2. The method for producing a microcrystalline film according to claim 1, wherein a film forming condition in which the two light emitting portions are adjacent to each other or overlap each other by reducing an electrode interval dimension between the ground electrode and the high frequency electrode. A method for producing a crystal film. 請求項1に記載の微結晶膜の製造方法において、前記成膜室の成膜圧力を減少することによって、前記両発光部が隣接または重なる成膜条件とすることを特徴とする微結晶膜の製造方法。  2. The method for producing a microcrystalline film according to claim 1, wherein a film forming condition in which the light emitting units are adjacent to each other or overlap each other by reducing a film forming pressure in the film forming chamber. Production method. 請求項1ないし3のいずれかに記載の微結晶膜の製造方法において、電極に印加する周波数は、10MHz〜100MHzとすることを特徴とする微結晶膜の製造方法。  4. The method for producing a microcrystalline film according to claim 1, wherein the frequency applied to the electrode is 10 MHz to 100 MHz. 請求項1ないし4のいずれかに記載の微結晶膜の製造方法において、前記高周波電極は、アースシールドを除去してなるものとすることを特徴とする微結晶膜の製造方法。  5. The method for producing a microcrystalline film according to claim 1, wherein the high-frequency electrode is formed by removing an earth shield. 請求項記載の微結晶膜の製造方法において、前記微結晶シリコン合金は、微結晶シリコンゲルマニウム,微結晶シリコンカーバイド,微結晶シリコンオキサイド,微結晶シリコンナイトライドの内のいずれかとすることを特徴とする微結晶膜の製造方法。2. The method for producing a microcrystalline film according to claim 1 , wherein the microcrystalline silicon alloy is one of microcrystalline silicon germanium, microcrystalline silicon carbide, microcrystalline silicon oxide, and microcrystalline silicon nitride. A method for producing a microcrystalline film.
JP2000250270A 2000-08-21 2000-08-21 Method for producing microcrystalline film Expired - Fee Related JP4251256B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000250270A JP4251256B2 (en) 2000-08-21 2000-08-21 Method for producing microcrystalline film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000250270A JP4251256B2 (en) 2000-08-21 2000-08-21 Method for producing microcrystalline film

Publications (2)

Publication Number Publication Date
JP2002064066A JP2002064066A (en) 2002-02-28
JP4251256B2 true JP4251256B2 (en) 2009-04-08

Family

ID=18739876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000250270A Expired - Fee Related JP4251256B2 (en) 2000-08-21 2000-08-21 Method for producing microcrystalline film

Country Status (1)

Country Link
JP (1) JP4251256B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4405715B2 (en) 2002-08-23 2010-01-27 キヤノンアネルバ株式会社 Method of forming silicon nanocrystal structure terminated with oxygen or nitrogen and silicon nanocrystal structure terminated with oxygen or nitrogen formed thereby
JP2008303078A (en) * 2007-06-05 2008-12-18 Japan Atomic Energy Agency Method for producing silicon thin film or isotopically enriched silicon thin film

Also Published As

Publication number Publication date
JP2002064066A (en) 2002-02-28

Similar Documents

Publication Publication Date Title
US6846728B2 (en) Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film
KR100469134B1 (en) Inductive plasma chemical vapor deposition method and amorphous silicon thin film transistor produced using the same
Takahashi et al. Large-area and high-speed deposition of microcrystalline silicon film by inductive coupled plasma using internal low-inductance antenna
TWI538218B (en) Thin film transistor
JP4557400B2 (en) Method for forming deposited film
US20120142138A1 (en) Deposition box for silicon-based thin film solar cell
WO2008056557A1 (en) Method for forming silicon based thin film by plasma cvd method
WO2010050363A1 (en) Plasma cvd apparatus, method for producing semiconductor film, method for manufacturing thin film solar cell, and method for cleaning plasma cvd apparatus
Kondo et al. Novel aspects in thin film silicon solar cells–amorphous, microcrystalline and nanocrystalline silicon
Jadhavar et al. Growth of hydrogenated nano-crystalline silicon (nc-Si: H) films by plasma enhanced chemical vapor deposition (PE-CVD)
JP3960792B2 (en) Plasma CVD apparatus and method for manufacturing amorphous silicon thin film
CN102629555B (en) Gate insulation layer and preparation method thereof, TFT and preparation method thereof, array substrate and display device
JP4251256B2 (en) Method for producing microcrystalline film
CN109119484A (en) The manufacturing method of thin film transistor (TFT) and thin film transistor (TFT)
JPH08242005A (en) Amorphous silicon thin film transistor and its manufacture
US20100062585A1 (en) Method for forming silicon thin film
WO2011153671A1 (en) Discharge electrode plate array for film solar cell disposition
JPS6331110A (en) Manufacture of semiconductor device
JP4841735B2 (en) Deposition method
JP4282047B2 (en) Plasma processing apparatus and semiconductor device manufacturing method
JPH0897427A (en) Thin film semiconductor device and thin film transistor and its manufacture
JP2001332503A (en) Method of manufacturing fine crystal film by plasma discharge
Zhang et al. A pre-hydrogen glow method to improve the reproducibility of intrinsic microcrystalline silicon thin film depositions in a single-chamber system
JP2000114188A (en) Manufacture of non-single crystal semiconductor thin film
JPH0199213A (en) Device for formation of film

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060215

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070704

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070823

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071016

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20081009

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20081016

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20081016

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20081016

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081201

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20081225

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090107

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120130

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120130

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120130

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130130

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130130

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140130

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees