JP4251057B2 - Plasma display panel - Google Patents

Description

  The present invention relates to a plasma display panel (hereinafter also referred to as a panel).

  In recent years, a plasma display device whose market scale has been rapidly expanded is a display device with excellent visibility characterized by a large screen, a thin shape, and a light weight. In addition, in order to cope with high-definition video typified by high-definition broadcasting, high-definition plasma display panels are being promoted. There are several types of electrode structures for plasma display panels. Currently, AC type three-electrode plasma display panels suitable for larger screens and higher definition are the mainstream.

  In the AC type three-electrode plasma display panel, a large number of discharge cells are generally formed between a front plate and a back plate that are opposed to each other. The front plate is formed with a plurality of display electrodes, each consisting of a scan electrode and a sustain electrode, in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrodes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of partition walls formed in parallel to the data electrodes on each of the dielectric layers. A phosphor layer is formed on the side surface of the partition wall. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode and the data electrode are three-dimensionally crossed and sealed, and the discharge gas is sealed in the internal discharge space. In addition, a high-definition plasma display panel compatible with high vision usually has more than 700 scanning electrodes.

  As a method for driving an AC type plasma display panel, a so-called subfield method is generally used in which one field period is divided into a plurality of subfields and gradation display is performed by a combination of subfields that emit light. Each subfield has an initialization period, an address period, and a sustain period.

  In the initialization period, initialization pulses are applied to all discharge cells constituting the plasma display panel to generate excitation particles (hereinafter referred to as priming particles) necessary for subsequent address discharge. In the subsequent address period, a scan pulse and an address pulse are applied to the scan electrode and the data electrode provided in the plasma display panel, respectively, to cause selective address discharge. In the subsequent sustain period, a predetermined number of sustain pulses are applied between the scan electrode and the sustain electrode to cause a sustain discharge, causing the discharge cell to emit light.

  When a discharge is generated in a discharge cell, there is a time difference (hereinafter abbreviated as a discharge delay) from when a discharge voltage is applied to when discharge is started. Therefore, in order to discharge the discharge cell stably, the pulse width of the scan pulse and the address pulse must be longer than at least the discharge delay.

  On the other hand, since the scan pulse is sequentially applied to the scan electrodes in the address period, the number of scan pulses applied is determined by the number of scan electrodes. That is, when the number of scan electrodes increases due to high definition of the plasma display panel, the address period becomes longer depending on the increased number of scan electrodes. If the writing period is long, either the initialization period or the sustain period is shortened so that the subfield period does not change, or the subfield period is lengthened without changing the initialization period and the sustain period. Time adjustment by is required.

  However, if the initialization pulse is shortened in order to shorten the initialization period, the initialization of the discharge cell becomes uncertain, and erroneous discharge is likely to occur in the subsequent address discharge. If the number of sustain pulses applied is reduced in order to shorten the sustain period, the number of sustain discharges is reduced and the luminance is lowered. In addition, if the number of subfields per field is reduced in order to lengthen the period of the subfield, the gradation is deteriorated.

In order to solve these problems, an auxiliary discharge electrode (hereinafter referred to as a priming electrode) is provided on the front plate, and the discharge delay is caused by the auxiliary discharge (hereinafter referred to as priming discharge) generated by the in-plane auxiliary discharge on the front plate side. A panel to be reduced and a driving method thereof have been proposed (see Patent Document 1).
JP 2002-297091 A

  However, in the above-mentioned panel, since the individual auxiliary discharge cells are relatively large, the distance between the discharge cells for image display cannot be reduced, and as a result, there is a problem that high definition is difficult. It was.

  The present invention has been made in view of such problems, and can achieve high definition of the plasma display panel, high speed and stabilization of the writing operation, and further, when the priming electrode is disconnected, the priming electrode It is an object of the present invention to provide a plasma display panel that can suppress the occurrence of problems due to disconnection.

The plasma display panel according to the present invention includes a scan electrode and a sustain electrode disposed on a first substrate so as to be parallel to each other, and a second substrate disposed opposite to the first substrate with a discharge space interposed therebetween. A data electrode disposed in a direction intersecting the scan electrode and the sustain electrode, a dielectric layer formed to cover the data electrode, and the scan electrode and the sustain electrode provided only on the dielectric layer And a plurality of main discharge cells formed by the scan electrode, the sustain electrode, and the data electrode, the scan electrode, and the priming. A plurality of priming discharge cells formed with electrodes, and partitioning the primer on the second substrate. Are arranged in a direction intersecting the grayed electrode, and characterized in that a shorting bar which connects the plurality of priming electrodes electrically from each other.

  According to this configuration, by disposing the priming electrode on the second substrate, it is possible to realize high definition of the plasma display panel and high speed and stabilization of the writing operation. Furthermore, since the priming electrodes are electrically connected to each other by the short bar, when a disconnection occurs in the priming electrode, it is driven from another electrically connected priming electrode to the priming electrode that is disconnected via the short bar. A voltage can be applied.

  Moreover, the structure formed by electrically connecting at least two adjacent priming electrodes among the priming electrodes to each other by a short bar may be employed.

  Even with such a configuration, when a disconnection occurs in the priming electrode, a driving voltage can be applied to the priming electrode that is disconnected from the other priming electrode that is electrically connected via the short bar.

  The short bar may be disposed so as to pass under the partition wall, and at least the width of the short bar disposed under the partition wall may be equal to or smaller than the partition wall width.

  According to such a configuration, unnecessary discharge that may occur due to the provision of the short bar can be suppressed.

  According to the plasma display panel of the present invention, even when the definition is increased, the address discharge is stably performed at a high speed, and when the priming electrode is disconnected, the occurrence of problems due to the disconnection of the priming electrode can be suppressed. Panels can be provided.

  Hereinafter, a plasma display panel according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a cross-sectional view showing a plasma display panel according to an embodiment of the present invention, and FIG. 2 is a perspective view schematically showing a structure on the back substrate side of the panel.

  As shown in FIG. 1, a glass front substrate 21 as a first substrate and a rear substrate 31 as a second substrate are arranged to face each other with a discharge space therebetween, and ultraviolet rays are radiated to the discharge space by discharge. A gas mixture of neon and xenon is enclosed.

  A plurality of scan electrodes 22 and sustain electrodes 23 are formed in parallel with each other on the front substrate 21. At this time, two electrodes are alternately arranged so as to be sustain electrode 23 -scan electrode 22 -scan electrode 22 -sustain electrode 23-. Scan electrode 22 and sustain electrode 23 are each composed of transparent electrodes 22a and 23a and metal bus bars 22b and 23b formed on transparent electrodes 22a and 23a, respectively. Here, a light absorption layer 28 made of a black material is provided between scan electrode 22 and scan electrode 22 and between sustain electrode 23 and sustain electrode 23.

  Of the scanning electrodes 22, the protruding portion 22 b ′ of the metal bus 22 b of one scanning electrode 22 is formed to protrude onto the light absorption layer 28. A dielectric layer 24 and a protective layer 25 are formed so as to cover the scan electrode 22, the sustain electrode 23, and the light absorption layer 28.

  On the rear substrate 31, a plurality of data electrodes 32 are formed in parallel to each other in a direction intersecting with the scan electrodes 22 and the sustain electrodes 23. A dielectric layer 33a is formed so as to cover the data electrode 32, and a plurality of priming electrodes 36 are formed on the dielectric layer 33a in a direction crossing the data electrode 32. Further, as shown in FIG. 2, a short bar 37 is formed in a direction intersecting with the priming electrode 36, and the short bar 37 electrically connects the adjacent priming electrodes 36 to each other.

  The dielectric layer 33a has a predetermined thickness and insulates the data electrode 32 and the priming electrode 36 from each other. A dielectric layer 33b (hereinafter, dielectric layer 33a and dielectric layer 33b is also referred to as dielectric layer 33) is further formed so as to cover priming electrode 36, and a main discharge cell (hereinafter abbreviated as discharge cell) is further formed thereon. A partition wall 34 for partitioning 40 is formed. As shown in FIG. 2, the partition wall 34 includes a vertical wall portion 34 a that extends in a direction parallel to the data electrode 32, and a horizontal wall portion 34 b that forms the discharge cells 40 and that forms the gap portions 41 between the discharge cells 40. It consists of Every other gap 41 has a priming electrode 36, and the gap 41 having the priming electrode 36 is formed as a priming discharge cell (hereinafter abbreviated as priming cell) 41a. A phosphor layer 35 is provided on the surface of the dielectric layer 33 corresponding to the discharge cells 40 partitioned by the barrier ribs 34 and on the side surfaces of the barrier ribs 34.

  When the front substrate 21 and the rear substrate 31 are arranged to face each other and sealed, a protruding portion 22b ′ protruding on the light absorption layer 28 among the metal bus bars 22b of the scanning electrode 22 formed on the front substrate 21, and the rear substrate Alignment is performed so that the priming electrode 36 formed on 31 is parallel to and opposed to the priming cell 41a. That is, the plasma display panel shown in FIGS. 1 and 2 performs a priming discharge between the protruding portion 22b ′ formed on the front substrate 21 side and the priming electrode 36 formed on the back substrate 31 side. It has become. Further, in FIG. 1, the phosphor layer 35 is not formed on the priming cell 41a side, but this is because a priming discharge is easily generated by not providing a phosphor layer that functions to inhibit discharge. Further, since the interval between the protruding portion 22b 'and the priming electrode 36 is shorter than the interval between the data electrode 32 and the transparent electrode 22a, the priming discharge has a lower discharge start voltage than the address discharge and is likely to generate a discharge.

  1 and 2, a dielectric layer 33b is further formed so as to cover the priming electrode 36. However, the dielectric layer 33b may not be formed. Further, in FIG. 1, the phosphor layer 35 is not formed on the gap 41 side, but the phosphor layer 35 may be formed on the gap 41 side.

  3A is a cross-sectional view taken along line AA in FIG. 2, and FIG. 3B is a cross-sectional view taken along line BB in FIG. In addition, the short bar 37 is arrange | positioned so that it may pass under the vertical wall part 34a, as shown in FIG.

FIG. 4 is an electrode array diagram of the plasma display panel in accordance with the exemplary embodiment of the present invention. M columns of data electrodes D _{1 to} D _m (data electrodes 32 in FIG. 1) are arranged in the column direction, and n rows of scan electrodes SC _{1 to} SC _n (scan electrodes 22 in FIG. 1) and n rows of data electrodes are arranged in the row direction. sustain electrodes _SU 1 to SU _n (sustain electrodes 23 in FIG. 1) and the sustain electrodes SU ₁ - scan electrode SC ₁ - scan electrode SC ₂ - sustain electrode _SU 2 - · · · and so as to alternately arranged two by two Has been. In the embodiment of the present invention, n / 2 priming electrodes PR are arranged so as to face the protruding portions of the odd-numbered scan electrodes SC ₁ , SC ₃ ,... (The protruding portion 22 b ′ in FIG. 1). ₁ , PR ₃ ,... (Priming electrode 36 in FIG. 1) are arranged.

A discharge cell C _{i, j} (discharge cell 40 in FIG. 1) including a pair of scan electrodes SC _i , sustain electrodes SU _i (i = 1 to n) and one data electrode D _j (j = 1 to _m ). ) Is formed in the discharge space. At this time, the total number of discharge cells C is mxn. In addition, a priming cell PS _i (priming cell 41a in FIG. 1) including the protruding portion of the scan electrode SC _i and the priming electrode PR _i is formed in an odd number of 1 to n rows, and the total number of priming cells PS is n / 2

As described above, in the plasma display panel according to the embodiment of the present invention, the scan electrodes SC _p (p = odd number) in the odd-numbered rows have the protruding portions 22b ′, and generate priming discharge along with their own scanning. Write. On the other hand, the scan electrode SC _{p + 1} in the even-numbered row does not have the protruding portion 22b ′, and writing is performed without generating a priming discharge associated with its own scanning.

  Next, driving waveforms and timings for driving the panel will be described.

  FIG. 5 is a drive waveform diagram of the plasma display panel in accordance with the exemplary embodiment of the present invention. In the embodiment of the present invention, one field period is composed of a plurality of subfields having an initialization period, an address period, and a sustain period, and each subfield has a different number of sustain pulses in the sustain period. Since the same operation is performed except for the above, only the operation of one subfield will be described here.

In half of the initializing period, data electrodes _D 1 to D _m, sustain electrodes _SU 1 to SU _n and priming electrodes _{PR 1 ~PR n-1} respectively kept 0 (V), to the scan electrodes _SC 1 to SC _n from the voltage _{V i1} of the discharge start voltage or less with respect to sustain electrodes _SU 1 to SU _n, and applies the ramp waveform voltage gradually rises toward the voltage _{V i2} that exceeds the discharge start voltage. While the ramp waveform voltage rises, the scan electrodes SC _{1 to} SC _n and the sustain electrodes SU _{1 to} SU _n , the data electrodes D _{1 to} D _m , and the priming electrodes PR _{1 to} PR _n−1 are each first time. A weak initializing discharge occurs. Negative wall voltage is accumulated on scan electrodes _SC 1 to SC _n upper, data electrodes _D 1 to D _m upper, the sustain electrodes _SU 1 to SU _n upper and priming electrode _{PR 1 ~PR n-1} top Accumulates positive wall voltage. Here, the wall voltage at the upper part of the electrode represents a voltage generated by the wall charge accumulated on the dielectric layer covering the electrode.

In the second half of the initializing period, maintaining the sustain electrodes _SU 1 to SU _n to a positive voltage Ve, the scan electrodes _SC 1 to SC _n, the voltage _{V i3} which is a discharge start voltage or less with respect to sustain electrodes _SU 1 to SU _{n Is} applied with a ramp waveform voltage that gradually falls toward voltage V _i4 exceeding the discharge start voltage. During this time, the second weak initializing discharge is generated between the scan electrodes SC _{1 to} SC _n and the sustain electrodes SU _{1 to} SU _n , the data electrodes D _{1 to} D _m , and the priming electrodes PR _{1 to} PR _n−1. Occur. Then, negative wall voltage and sustain electrodes _SU 1 to SU _n positive wall voltage on scan electrodes _SC 1 to SC _n upper are weakened, positive wall voltage on data electrodes _D 1 to D _m upper address operation The positive wall voltage above the priming electrodes PR _{1 to} PR _n−1 is also adjusted to a value suitable for the priming operation. This completes the initialization operation.

In the address period, scan electrodes SC _{1 to} SC _n are temporarily held at voltage Vc. Then, a voltage Vq substantially equal to the voltage change (Vc−V _i4 ) is applied to the priming electrodes PR _{1 to} PR _n−1 .

First, in the address operation of the discharge cells C _{p, 1 to} C _{p, m in} the odd-numbered rows, the scan pulse voltage Va is applied to the scan electrode SC _p and the data electrode D _k (k corresponding to the image signal to be displayed is displayed. Is an integer of 1 to m), and a positive write pulse Vd is applied. The scan electrodes SC _p of odd rows are scanning electrodes for writing with generating the priming discharge in accordance with the self-scanning. Therefore, by applying the scan pulse voltage Va, a priming discharge is generated between the priming electrode PR _p and the scan electrode SC _p in the priming cell PS _p , and the discharge cells C _{p, 1 to} C _{p, m} and the discharge cell C Priming is supplied inside _{p + 1,1 to} CP _{+ 1, m} . Since the discharge at this time has a structure in which the priming cell easily discharges as described above, the discharge becomes a fast and stable priming discharge with a small discharge delay.

Subsequently, an address discharge is generated in the discharge cells _{Cp, k} corresponding to the data electrodes _Dk to which the address pulse voltage is applied. At this time, since the discharge of the discharge cell C _{p, k} is generated while priming is supplied from the priming discharge generated between the scan electrode SC _p and the priming electrode PR _p , the time until the supply of priming from the priming cell is started. Although there is a delay, the discharge is small and stable after the priming supply.

By this address discharge, a positive voltage is accumulated on the scan electrode SC _p of the discharge cells C _{p, k} and a negative voltage is accumulated on the sustain electrode SU _p, and the address operation in the odd-numbered rows is completed.

Next, in the address operation of the discharge cells C _{p + 1,1 to} C _{P + 1, m in} the even-numbered row, the scan pulse voltage Va is applied to the scan electrode SCP _{+ 1} in the p + 1 row, and at the same time, among the data electrodes D _{1 to} D _m A positive address pulse voltage Vd is applied to the data electrode _Dk corresponding to the image signal to be displayed in the (p + 1) th row. As a result, a discharge is generated at the intersection between the data electrode _Dk and the scan electrode SCP _{+ 1} . At this time, in the discharge cell C _{P + 1, k} , discharge occurs in a state where sufficient priming has already been supplied from the priming discharge generated between the scan electrode SC _p and the priming electrode PR _p , so the discharge delay of the address discharge is Very small and stable discharge.

By this address discharge, a positive voltage is accumulated on the scan electrode SC _p of the discharge cell C _{p + 1, k} , and a negative voltage is accumulated on the sustain electrode SU _p, and the address operation in the even-numbered row is completed.

Thereafter, the same address operation is performed until the discharge cell C _{n, k} in the _n- th row _, and the address operation is completed.

In the sustain period, after returning once to the scan electrodes _SC 1 to SC _n and sustain electrodes _SU 1 to SU _n to 0 (V), applies a positive sustain pulse voltage Vs to scan electrodes _SC 1 to SC _n. At this time, the voltage between the upper portion of scan electrode SC _{i and} upper portion of sustain electrode SU _i in discharge cell C _{i, j where} address discharge has occurred is in addition to positive sustain pulse voltage Vs, and scan electrode SC _i in the address period. The wall voltage accumulated in the upper part and the upper part of the sustain electrode SU _i is added to be higher than the discharge start voltage. As a result, a sustain discharge is generated in the discharge cells C _{i, j} . Similarly, the sustain pulses are alternately applied to scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SUn, so that the _number of sustain pulses is _equal to the number of sustain pulses for discharge cells C _{i, k} that have caused address discharge. The sustain discharge is continuously performed.

Thus, in the embodiment of the present invention, the discharge cell C _p of the odd-numbered _{rows, 1 -C} p, in a write operation of _m, provided in priming electrode PR _p and the front substrate 21 provided on the back substrate 31 side the priming discharge is generated between the scan electrodes SC _p and. At this time, a common voltage waveform is always applied to the priming electrodes PR _{1 to} PR _n−1 . Due to the occurrence of the priming discharge, priming can be supplied to the inside of the discharge cells C _{p, 1 to} C _{p, m} and the discharge cells C _{p + 1,1 to} C _{p + 1, m,} and the discharge delay is small, and it is fast and stable. Address discharge can be realized.

  Next, the short bar 37 will be described.

  In the manufacturing process of the plasma display panel, disconnection may occur in the electrodes of the plasma display panel due to various factors. If the priming electrode 36 is disconnected, priming discharge does not occur at the disconnection portion, and priming cannot be supplied to the discharge cells 40 around the disconnection portion, and the discharge delay of the address discharge becomes large and the address operation becomes unstable. If the writing operation becomes unstable, a normal image cannot be displayed. Usually, in the manufacturing process of a plasma display panel, a process for selecting a plasma display panel having such a defect (hereinafter, a selection process) is provided to select defective products. In addition, the plasma display panel with broken electrodes must be disposed of, or repaired (hereinafter referred to as repair), and other measures must be taken, which all contribute to the manufacture of plasma display panels. This increases the cost.

  FIG. 6 is a plan view schematically showing the structure on the back substrate side in the embodiment of the present invention. In FIG. 6, the partition wall 34 is indicated by a broken line for easy understanding of the position and shape of the short bar 37. That is, in the embodiment of the present invention, as shown in FIG. 6, the short bar 37 is formed in the direction intersecting with the priming electrode 36, and the priming electrodes 36 are electrically connected to each other. In the embodiment of the present invention, since a common voltage waveform is always applied to all the priming electrodes 36, the priming electrodes 36 are electrically connected to each other so that the disconnected priming electrodes 36 are connected to each other. On the other hand, it becomes possible to apply a drive voltage from another electrically connected priming electrode 36 via a short bar 37. Thus, since the plasma display panel of the present invention has a short bar, even if the priming electrode is disconnected, priming discharge can be generated at the disconnected portion, and a normal image can be displayed. It becomes.

  Further, in the embodiment of the present invention, as shown in FIG. 6, the short bar 37 is disposed so as to pass under the vertical wall portion 34a, and at least the width of the short bar 37 disposed under the vertical wall portion 34a. Can be configured so that the short bar 37 does not cover the region of the discharge cell 40. This state is shown using a perspective view schematically showing the structure of the priming electrode 36, the short bar 37, and the vertical wall portion 34a of FIG. However, the discharge cells 40 are omitted in FIG. As described above, the transparent electrodes 22a and 23a are formed in pairs on the front substrate 21 side with the discharge cell 40 interposed therebetween. Therefore, the width of the short bar 37 is formed wider than the width of the vertical wall portion 34a in the short direction, or the short bar 37 is disposed at a place other than the lower portion of the vertical wall portion 34a and covers the region of the discharge cell 40. If this happens, unnecessary discharge may occur between the short bar 37 and the transparent electrode 22a or the transparent electrode 23a. That is, in the embodiment of the present invention, by configuring the width and arrangement of the short bar 37 so that the short bar 37 is hidden under the vertical wall portion 34a in this manner, An unnecessary discharge is not generated in the meantime.

  FIG. 8 is a plan view showing an example of the configuration of the short bar 37 in the embodiment of the present invention. As shown in FIG. 8, adjacent priming electrodes 36 may be connected by a plurality of short bars 37. By configuring in this way, it is possible to suppress the occurrence of the above-described problem even if there are two or more disconnections occurring in one priming electrode 36. In the experiment conducted by the present inventor, by arranging the short bars 37 at intervals of about 10 cm in a 42-inch size plasma display panel, it is possible to increase the yield even if the screening process is omitted from the manufacturing process of the plasma display panel. It has been confirmed that it has no effect. If the sorting process becomes unnecessary, the cost in the manufacturing process can be further reduced. FIG. 9 is a plan view showing another example of the configuration of the short bar 37 in the embodiment of the present invention. As shown in FIG. 8, the adjacent short bars 37 may be arranged on one straight line. However, as shown in FIG. 9, two adjacent short bars 37 are continuously arranged on one straight line. The structure arrange | positioned so that it may not line up.

  If there is one short bar 37 that connects adjacent priming electrodes 36 and a driving voltage is applied from one end of the priming electrode 36, a configuration in which the short bar 37 is disposed at the other end is desirable. FIG. 10 is a plan view schematically showing an example of the structure on the back substrate side in the embodiment of the present invention. However, FIG. 10 shows only the end portion to which the short bar 37 is connected. At this time, the short bar 37 disposed at the end portion is very unlikely to cause unnecessary discharge with other electrodes. Therefore, as shown in FIG. 10, the width of the short bar 37 is reduced to the short side of the vertical wall portion 34a. It is good also as a structure formed wider than the width | variety of a direction.

  11A to 11D are perspective views schematically showing examples of the structures of the priming electrode 36 and the short bar 37 in the embodiment of the present invention. FIG. 11A shows a configuration in which the priming electrode 36 and the short bar 37 are formed on the same thickness and the same arrangement surface. In this configuration, in the plasma display panel manufacturing process, the priming electrode 36 and the short bar 37 can be manufactured in the same process. FIG. 11B is a diagram showing a configuration in which the short bar 37 is formed thinner than the priming electrode 36. In this configuration, the short bar 37 can be formed with less material for forming the short bar 37. FIGS. 11C and 11D show a configuration in which a short bar 37 is disposed on or below the priming electrode 36. In this configuration, in the manufacturing process of the plasma display panel, before or after the priming electrode 36 is formed, for example, the wire-like short bar 37 can be formed in a lump.

  In the embodiment of the present invention, the vertical wall portion 34a is formed in parallel with the data electrode 32 so that the discharge cell 40 has a quadrangular shape, and the short bar 37 is disposed under the vertical wall portion 34a. An example was explained. However, the embodiment of the present invention is not limited to this configuration. For example, even if the vertical wall portion 34a is formed so as to form the discharge cell 40 in a shape other than a quadrangle such as a hexagon, By arranging the bar 37 below the vertical wall portion 34a in accordance with the shape of the vertical wall portion 34a, the same effect as described above can be obtained.

  The embodiment of the present invention may be configured to form the short bar 37 by arbitrarily combining the above-described configuration examples.

  As described above, the plasma display panel according to the present invention is provided with a priming electrode on the back substrate side, so that even when the plasma display panel has a high definition, the discharge delay is small and high-speed and stable address discharge can be realized. Can do. In addition, by providing a short bar and electrically connecting adjacent priming electrodes to each other by the short bar, even when the priming electrode is disconnected, it is possible to suppress the occurrence of problems related to the disconnection of the priming electrode. For example, it is possible to reduce the cost spent on repairs.

  The plasma display panel according to the present invention can perform address discharge at high speed and stably even when the definition is increased, and can suppress the occurrence of problems due to disconnection of the priming electrode when the priming electrode is disconnected. Useful.

Sectional drawing which shows the plasma display panel in embodiment of this invention The perspective view which shows typically the structure by the side of the back substrate of the plasma display panel in embodiment of this invention. (A) is a cross-sectional view taken along the line AA in FIG. 2 (B) is a cross-sectional view taken along the line BB in FIG. Electrode arrangement diagram of plasma display panel in accordance with the exemplary embodiment of the present invention Driving waveform diagram of plasma display panel in accordance with the exemplary embodiment of the present invention The top view which shows typically the structure by the side of the back substrate in embodiment of this invention The perspective view which shows typically the structure of the priming electrode, short bar, and vertical wall part in embodiment of this invention The top view which shows an example of a structure of the short bar in embodiment of this invention The top view which shows another example of a structure of the short bar in embodiment of this invention The top view which shows typically an example of the structure by the side of the back substrate in embodiment of this invention (A)-(d) is a perspective view which shows typically the example of the structure of the priming electrode and short bar in embodiment of this invention

Explanation of symbols

21 Front substrate 22 (made of glass) 22 Scan electrode 22a, 23a Transparent electrode 22b, 23b Metal bus 22b 'Protruding portion 23 Sustain electrode 24, 33, 33a, 33b Dielectric layer 25 Protective layer 28 Light absorbing layer 31 (made of glass ) Back substrate 32 Data electrode 34 Partition 34a Vertical wall 34b Horizontal wall 35 Phosphor layer 36 Priming electrode 37 Short bar 40 Discharge cell 41 Gap 41a Priming cell

Claims (3)

A scan electrode and a sustain electrode arranged so as to be parallel to each other on the first substrate, and the scan electrode and the sustain electrode arranged on the second substrate opposed to each other with a discharge space interposed therebetween A data electrode arranged in a direction intersecting with the data electrode, a dielectric layer formed so as to cover the data electrode, and provided only on the dielectric layer and arranged in parallel with the scan electrode and the sustain electrode and the scan A priming electrode for generating a priming discharge with the electrode, a plurality of main discharge cells formed with the scan electrode, the sustain electrode, and the data electrode, and a plurality of formed with the scan electrode and the priming electrode Barrier ribs formed so as to partition priming discharge cells, disposed on the second substrate in a direction intersecting with the priming electrodes, and A plasma display panel, characterized in that a shorting bar which connects the serial plurality of priming electrodes electrically from each other. 2. The plasma display panel according to claim 1, wherein at least two adjacent priming electrodes among the priming electrodes are electrically connected to each other by a short bar. The short bar is disposed so as to pass under the partition, and at least a width of the short bar disposed under the partition is formed to be equal to or less than a width of the partition. Plasma display panel.

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