JP4251047B2 - Solid-state imaging device and method for manufacturing solid-state imaging device - Google Patents

Description

  The present invention relates to a solid-state imaging device.

  Conventionally, for example, a CMOS solid-state image sensor is known as a solid-state image sensor (see Non-Patent Document 1).

Here, the configuration of the CMOS solid-state imaging device will be described with reference to FIG.
FIG. 10 shows an enlarged sectional view corresponding to one pixel of, for example, a CMOS type solid-state imaging device, and particularly shows an enlarged sectional view around the semiconductor substrate.
In the CMOS solid-state imaging device 41, for example, an element isolation layer (so-called LOCOS film) 43A formed in a predetermined region on the surface of a P-type semiconductor substrate 42, and a semiconductor substrate 42 below the element isolation layer 43A are formed. A pixel isolation region 43 is formed by the high-concentration P-type semiconductor region 43B, and a light receiving sensor unit 45 for forming a photodiode is formed in the unit pixel region 44 delimited by the pixel isolation region 43, On one side of the light receiving sensor unit 45, a floating diffusion unit 47 formed of a high-concentration N-type semiconductor region 471 that converts a signal charge accumulated in the light receiving sensor unit 45 into a voltage via a read gate unit 46. Is formed.
Although not shown, in the unit pixel 44, an output unit (output amplifier) that outputs the voltage converted by the floating diffusion unit 47 and a reset gate that sweeps out signal charges accumulated in the floating diffusion unit 47. Etc. are provided.

The light receiving sensor portion 45 is formed in a region excluding the lower portion of the readout gate portion 46 and the floating diffusion portion 47 in the unit pixel region 44.
In the case shown in FIG. 10, the light receiving sensor unit 45 is formed in a low concentration N-type first semiconductor region 451 formed on the bottom side of the substrate 42 and a shallow region in the first semiconductor region 451. And a high-concentration N-type second semiconductor region 452.
Reference numeral 49 denotes a hole accumulation layer (a so-called positive charge storage region) formed on the surface of the second semiconductor region 452.

In the read gate unit 46, the read electrode 52 is formed on the semiconductor substrate 42 with the insulating film 51 interposed therebetween. A side wall 53 is formed on the side wall of the readout electrode 52.
Although not shown, an interlayer insulating film, for example, is formed on the entire surface including the readout electrode 52, and a color filter is formed on the interlayer insulating film via, for example, a passivation film, a planarizing film, or the like. . An on-chip lens is formed at a position corresponding to the light receiving sensor unit 45 through the color filter. For example, a multilayer wiring layer is formed in the interlayer insulating film.

Next, operations at the time of light reception and reading in the CMOS type solid-state imaging device 41 having such a configuration will be described with reference to FIGS.
FIG. 11 shows a potential diagram corresponding to the light receiving sensor unit 45, the read gate unit 46, and the floating diffusion unit 47 in the solid-state imaging device 41.
First, at the time of receiving light, when light is incident on the light receiving sensor unit 45 through an on-chip lens (not shown), the incident light is photoelectrically converted in the first semiconductor region 451 formed on the bottom side of the substrate 42. .
Then, the signal charge e generated in the first semiconductor region 451 due to the photoelectric conversion is increased in the first gradient as shown by an arrow X in FIG. From the semiconductor region 451 to the second semiconductor region 452.
Thereby, as shown in FIG. 10, the signal charge e is accumulated in the second semiconductor region 452 of the light receiving sensor unit 45 in particular.

  Next, at the time of reading, when a reading voltage having a predetermined height is applied to the reading electrode 52 by an external application unit (not shown), the potential 46B of the reading gate portion 46 receives light as shown in FIG. 11B. It goes deeper than the potential 45B of the sensor unit 45. As a result, the signal charge e is read from the light receiving sensor unit 45 to the floating diffusion unit 47.

The signal charge e read to the floating diffusion unit 47 is converted to a voltage and output from an output unit (not shown).
After the voltage is output, a predetermined voltage is applied to a reset gate portion (not shown), so that the signal charge e accumulated in the floating diffusion portion 47 is swept away.
“Transistor Technology”, February 2003, p. 128-131

By the way, in the above-described CMOS type solid-state imaging device 41, in the light receiving sensor unit 45, the potential of the light receiving sensor unit 45 may be further deepened in order to expand the dynamic range by increasing the accumulation amount of the signal charge e. It has been demanded.
That is, as shown in FIG. 11A, for example, the potential 45B of the light receiving sensor unit 45 formed at the depth h1 is formed at a deeper depth h2 as shown in FIG. 12A.

  However, with such a configuration, it is difficult to efficiently read the signal charge e from the light receiving sensor unit 45 to the floating diffusion unit 47.

  That is, as shown in FIG. 11A, when the potential 45B of the light receiving sensor unit 45 is formed at the depth h1, at the time of reading, a read voltage of a predetermined height is applied to the read electrode 52, so that FIG. As shown, the potential 46B of the read gate unit 46 can be lowered deeper than the potential 45B of the light receiving sensor unit 45, and the signal charge e accumulated in the light receiving sensor unit 45 can be read to the floating diffusion unit 47.

  However, as shown in FIG. 12A, when the potential 45B of the light receiving sensor unit 45 is further deepened to be a potential 55B having a depth h2, the potential 55B of the light receiving sensor unit 45 is formed to a deeper position. Sometimes, as in the case of the potential 45B formed at the depth h1, when a read voltage having a predetermined height is applied to the read electrode, as shown in FIG. It becomes difficult to read the signal charge e to the floating diffusion portion 47 efficiently without becoming deeper than the potential 55B of the portion 45.

  In such a case, the signal charge e cannot be efficiently read out to the floating diffusion portion 47 unless the read voltage applied to the read electrode 52 is further increased.

Further, in the case of the above-described CMOS solid-state imaging device 41, in the unit pixel region 44, as described above, in addition to the light receiving sensor unit 45, a floating diffusion that converts signal charges from the light receiving sensor unit 45 into a voltage. In the unit pixel region 44, an output unit that outputs the voltage converted by the unit 47 and the floating diffusion unit 47, and a reset gate unit that sweeps out signal charges accumulated in the floating diffusion unit are provided. The area occupied by the light receiving sensor 45 is narrow.
Therefore, the solid-state imaging device 41 has a configuration in which incident light is photoelectrically converted, the amount of accumulated signal charges e is small, and the sensitivity is low.

  In view of the above, the present invention provides a solid-state imaging device having a configuration capable of reducing a readout voltage and increasing a signal charge accumulation amount to obtain a wide dynamic range and high sensitivity. Is.

The solid-state imaging device according to the present invention is formed between a light receiving sensor unit that photoelectrically converts incident light to generate a signal charge, a floating diffusion unit that converts signal charge into a voltage, and a light receiving sensor unit and the floating diffusion unit. a read gate, which is, a unit pixel and an output unit for outputting the voltage converted by the floating diffusion portion is Ru is formed. Further , the signal charge is read from the light receiving sensor portion to the floating diffusion portion by the first read electrode formed on the read gate portion and the second read electrode formed on at least a part of the floating diffusion portion. Is assumed to be performed.

Furthermore, in the solid-state imaging device according to the present invention, the light-receiving sensor unit has a first semiconductor region formed on the bottom side of the semiconductor substrate in the unit pixel, including the lower part of the readout gate unit and the floating diffusion unit. In addition, the second semiconductor region is shallower than the first semiconductor region, includes a lower portion of the read gate portion and the floating diffusion portion, and is formed with a higher impurity concentration than the first semiconductor region. In addition, a third semiconductor region formed with a higher impurity concentration than the second semiconductor region is provided in a region shallower than the second semiconductor region and excluding the lower part of the read gate portion and the floating diffusion portion.

According to the solid-state imaging device according to the present invention, the light receiving sensor unit that photoelectrically converts incident light to generate a signal charge, the floating diffusion unit that converts the signal charge into a voltage, and between the light receiving sensor unit and the floating diffusion unit. A first readout electrode formed on the readout gate unit, wherein the unit pixel is formed having a readout gate unit formed on the output unit and an output unit that outputs the voltage converted by the floating diffusion unit, and the floating diffusion Since the signal charge is read from the light receiving sensor part to the floating diffusion part by the second readout electrode formed on at least a part of the part, for example, at the time of readout, the first readout electrode and the second readout electrode If a read voltage is applied simultaneously to the electrodes, Well potential parts, the potential of the floating diffusion portion may also be lowered.
Thereby, for example, the readout gate is constituted only by the electrode formed on the readout gate part, and the readout gate part and the floating diffusion part are compared with the case of the solid-state imaging device in which only the potential of the readout gate part is lowered at the time of readout. The potential formed can be further graded.
  Therefore, a stronger electric field can be applied to the signal charge read from the light receiving sensor unit, and reading efficiency can be improved.

  According to the present invention, it is possible to efficiently read signal charges from the light receiving sensor portion to the floating diffusion portion, and thus it is possible to provide a solid-state imaging device capable of ensuring sufficient read efficiency even with a low read voltage. It becomes possible.

  In the above-described configuration, the light receiving sensor unit includes a first semiconductor region formed on the bottom side of the semiconductor substrate including a lower part of the readout gate unit and the floating diffusion unit in the unit pixel, and the first semiconductor. A second semiconductor region formed in a region shallower than the region and including a lower portion of the read gate portion and the floating diffusion portion; and a lower portion of the read gate portion and the floating diffusion portion in a region shallower than the second semiconductor region. In the case where the third semiconductor region is formed in a region excluding the region, the region contributing to photoelectric conversion can be expanded, so that the amount of accumulated signal charges can be increased, and a wide dynamic range can be obtained. It is possible to provide a solid-state imaging device having a configuration that can be obtained and has high sensitivity.

  Embodiments of the present invention will be described below with reference to the drawings.

First, an embodiment of a solid-state imaging device according to the present invention will be described with reference to FIG.
FIG. 1 shows an enlarged cross-sectional view corresponding to one pixel of, for example, a CMOS solid-state imaging device, and particularly shows an enlarged cross-sectional view around the semiconductor substrate.
In the solid-state imaging device 1 according to the present embodiment, for example, an element isolation layer (so-called LOCOS film) 3A formed in a predetermined region on the surface of a P-type semiconductor substrate 2 and a semiconductor substrate 2 below the element isolation layer 3A. A pixel separation region 3 is formed by the formed high-concentration P-type semiconductor region 3B, and a light receiving sensor portion 5 that forms a photodiode is formed in the unit pixel region 4 delimited by the pixel separation region 3. On one side of the light receiving sensor unit 5, a floating diffusion unit made of a high-concentration N-type semiconductor region 71 that converts a signal charge accumulated in the light receiving sensor unit 5 into a voltage via a read gate unit 6. 7 is formed.
Although not shown, in the unit pixel 4, an output unit (output amplifier) that outputs the voltage converted by the floating diffusion unit 7 and a reset gate that sweeps out signal charges accumulated in the floating diffusion unit 7. Etc. are provided.

The light receiving sensor unit 5 includes a low-concentration N-type first semiconductor region 51 formed on a bottom side of the semiconductor substrate 2 and in a region other than the lower portion of the readout gate unit 6 and the floating diffusion unit 7, and the low-concentration The N-type second semiconductor region 52 is formed in a region that is shallower than the second N-type semiconductor region 51.
Reference numeral 9 denotes a hole accumulation layer (so-called positive charge accumulation region) formed on the surface of the N-type second semiconductor region 52.

In the read gate unit 6, a read electrode 12 is formed on the semiconductor substrate 2 with an insulating film 11 interposed therebetween.
Here, in the solid-state imaging device 1 of the present embodiment, the readout electrode 12 is composed of two electrodes.
That is, in the conventional solid-state imaging device, the readout electrode is configured only by the electrode formed in the readout gate portion. However, in the solid-state imaging device 1 of the present embodiment, the readout gate portion 6 is similar to the conventional one. The readout electrode 12 is composed of the electrode (first readout electrode) 121 formed on the first electrode and the electrode (second readout electrode) 122 newly formed on the floating diffusion portion 7.
Note that the first read electrode 121 and the second read electrode 122 are insulated from each other by the sidewall 13 formed on the side wall of the first read electrode 121.

The second readout electrode 122 is formed on a part of the floating diffusion portion 7 as shown in a plan view in FIG.
In the case of FIG. 2, the second read electrode 122 is formed on a part of the floating diffusion part 7. However, for example, the second read electrode 122 may be formed so as to cover the entire floating diffusion part 7.

  Although not shown, an interlayer insulating film, for example, is formed on the entire surface including the readout electrode 52, and a color filter is formed on the interlayer insulating film via, for example, a passivation film, a planarizing film, or the like. . An on-chip lens is formed at a position corresponding to the light receiving sensor portion via the color filter. For example, a multilayer wiring layer is formed in the interlayer insulating film.

Next, operations at the time of light reception and reading in the CMOS type solid-state imaging device 1 having such a configuration will be described with reference to FIGS.
FIG. 3 shows a potential diagram corresponding to the light receiving sensor unit 5, the readout gate unit 6, and the floating diffusion unit 7 in the solid-state imaging device 1.
First, at the time of light reception, when light is incident on the light receiving sensor unit 5 through an on-chip lens (not shown), the incident light is photoelectrically converted in the first semiconductor region 51 formed on the bottom side of the substrate 2. .
Then, the signal charge e generated in the first semiconductor region 51 due to the photoelectric conversion is caused by a concentration gradient that increases toward the surface side of the substrate 2, as shown by an arrow X in FIG. Collected in the semiconductor region 52.
Thereby, as shown in FIG. 1, the signal charge e is accumulated in the light receiving sensor portion 5, particularly in the second semiconductor region 52.

Next, at the time of reading, a reading voltage is applied to the first reading electrode 121 and the second reading electrode 122 by an external application unit (not shown).
At this time, by simultaneously applying a read voltage to the first and second read electrodes 121 and 122, the potential 6 </ b> B of the read gate portion 6 decreases below the first read electrode 121, and the second Under the read electrode 122, the potential 7 </ b> B of the floating diffusion portion 7 is deeply lowered to the bottom side of the substrate 2. That is, not only the potential of the read gate part is lowered as in the conventional case, but also the potentials of the read gate part 6 and the floating diffusion part 7 are simultaneously lowered.
As a result, the potential formed by the read gate unit 6 and the floating diffusion unit 7 has a gradient, and a strong electric field is applied to the signal charge e read from the light receiving sensor unit 5. Then, as shown in FIG. 3B, the signal charge e is efficiently read from the light receiving sensor unit 45 to the floating diffusion unit 47.

The signal charge e read to the floating diffusion unit 47 is converted into a voltage and output from an output unit (not shown).
Then, after the voltage is output, a predetermined voltage is applied to a reset gate portion (not shown), thereby sweeping out signal charges accumulated in the floating diffusion portion.

At this time, as shown in FIG. 4A, first, a predetermined voltage is applied only to the second readout electrode 122 to lower the potential 7B of the floating diffusion portion 7, and in this state, as shown in FIG. 4B. In addition, for example, a predetermined voltage is applied to the reset gate 33 to lower the potential 33B of the reset gate 33 deeply.
Thereafter, the predetermined voltage applied to the first readout electrode 122 is turned off, so that the potential 7B of the floating diffusion portion 7 is not applied with the original voltage, as shown in FIG. 4C. By returning, the signal charge e accumulated in the floating diffusion portion 7 can be swept out without remaining.
Thus, reset efficiency can be improved by separately applying voltages to the first readout electrode 121 and the second readout electrode 122 and changing the timing of the voltage applied to the reset gate portion 33. It becomes possible.
Further, reset efficiency can be further improved by changing the height of the applied voltage.

  According to the solid-state imaging device 1 of the present embodiment, in addition to the normal readout electrode (first readout electrode) 121 formed on the readout gate unit 6, it is formed on at least a part of the floating diffusion unit 7. Since the readout electrode 12 is composed of the readout electrode (second readout electrode) 122, when readout voltage is simultaneously applied to the first and second readout electrodes 121 and 122 during readout, As shown in FIG. 3, the potential 6B of the read gate portion 6 can be lowered, and at the same time, the potential 7B of the floating diffusion portion 7 can be lowered deeply.

Thus, as in the case of the conventional solid-state imaging device, not only the potential of the readout gate portion alone is lowered (see FIG. 11), but the potential 6B of the readout gate portion 6 and the potential 7B of the floating diffusion portion 7 are further reduced. Therefore, the potential formed by the readout gate section 6 and the floating diffusion section 7 can be further graded as compared with the conventional solid-state imaging device.
Therefore, a stronger electric field can be applied to the signal charge read from the light receiving sensor unit, and reading efficiency can be improved.

Next, another embodiment of the solid-state imaging device of the present invention will be described with reference to FIG.
FIG. 5 shows an enlarged cross-sectional view corresponding to one pixel of the solid-state image sensor, and particularly shows an enlarged cross-sectional view around the semiconductor substrate.
In the solid-state imaging device 10 according to the present embodiment, the first readout electrode 121 formed on the readout gate unit 6 and the floating diffusion unit 7 are formed as in the case of the solid-state imaging device 1 according to the above-described embodiment. The readout electrode 12 is composed of the second readout electrode 122 formed on at least a part of the solid-state imaging device 1, but the configuration of the light receiving sensor unit 5 is different from that of the solid-state imaging device 1 of the above-described embodiment.
Specifically, in the unit pixel region 4, the light receiving sensor unit 5 is further enlarged to the lower part of the floating diffusion unit 7 and the readout gate unit 6.
Since the other configuration is the same as that of the solid-state imaging device 1 shown in FIG. 1, the corresponding parts are denoted by the same reference numerals, and redundant description is omitted.

That is, in the case of the solid-state imaging device 10 of the present embodiment, the unit pixel region 4 is formed in a deep region on the bottom side of the semiconductor substrate 2 including the lower part of the readout gate portion 6 and the floating diffusion portion 7. A first semiconductor region 511 and a second region formed shallower than the first semiconductor region 511 and including the lower portion of the read gate portion 6 and the floating diffusion portion 7, as in the first semiconductor region 511. The light receiving sensor unit 5 is composed of the semiconductor region 512 and the third semiconductor region 533 formed only in the region shallower than the second semiconductor region 522 and excluding the lower portion of the readout gate portion 6 and the floating diffusion portion 7. Constitute.
Reference numeral 9 denotes a hole accumulation layer (positive charge accumulation region) made of a high-concentration P-type impurity and formed on the surface of the third semiconductor region 533.

In the case of the solid-state imaging device 10 of the present embodiment, since the first conductive type, for example, the P-type semiconductor substrate 2 is used, the first semiconductor region 511 has the second conductive type, for example, a low concentration N-type. Formed from impurities. The second semiconductor region 522 is formed of a second conductivity type, for example, an N-type impurity. The third semiconductor region 533 is formed of a second conductivity type, for example, a high concentration N-type impurity.
As described above, each semiconductor has a higher impurity concentration from the third semiconductor region 511 formed on the bottom side of the substrate 2 toward the third semiconductor region 533 formed on the substrate surface side. By applying a gradient to the impurity concentration of the region, for example, the signal charge e photoelectrically converted in the first semiconductor region 511 and the second semiconductor region 522 formed on the bottom side of the substrate 2 is converted to the surface side of the substrate 2. Thus, the third semiconductor region 533 formed in the second region is efficiently collected.

  Here, the P-type semiconductor region 20 formed between the second semiconductor region 522 and the high-concentration N-type semiconductor region 71 constituting the floating diffusion portion 7 is read to the second read electrode 122, for example. When a voltage is applied, the potential decreases, and a part of the signal charge e photoelectrically converted in the first and second semiconductor regions 511 and 522 directly passes through a path indicated by an arrow Y in FIG. It can also be formed at such a concentration as to be read out to the floating diffusion portion 7.

In such a configuration, when a read voltage is simultaneously applied to the first and second read electrodes 121 and 122 at the time of reading, as shown in FIGS. 5 is read from the third semiconductor region 533 through the read gate portion 6 to the floating diffusion portion 7, and the signal charge e exceeds the potential of the P-type semiconductor region 20 from the first and second semiconductor regions 511 and 522. Thus, it can be directly read out to the floating diffusion section 7.
That is, in the solid-state imaging device 10 according to the present embodiment, a semiconductor region constituting the light receiving sensor unit 5 is formed up to a region including the lower part of the readout gate unit 6 and the floating diffusion unit 7 and a part of the floating diffusion unit 7 is formed. In addition, since the second readout electrode 122 is formed, the signal charge e can be directly read out to the floating diffusion region 7 as described above.
Thereby, compared with the case where the signal charge e is read from the normal light receiving sensor part 5 to the floating diffusion part 7 via the read gate part 6, the read efficiency of the signal charge e can be further increased.

Next, operations at the time of light reception and reading in the CMOS type solid-state imaging device 10 having such a configuration will be described with reference to FIGS.
First, at the time of receiving light, when light is incident on the light receiving sensor unit 5 through an on-chip lens (not shown), the first semiconductor region 511 formed on the bottom side of the substrate 2 in the unit pixel region 4 and the first semiconductor region 511 are formed. Photoelectric conversion is performed in the second semiconductor region 522 formed in a region shallower than the semiconductor region 511.
The signal charges e generated in the first and second semiconductor regions 511 and 522 by photoelectric conversion are caused by the concentration gradient formed so as to increase toward the surface side of the substrate 2 in FIG. As indicated by an arrow X, the light is collected in the third semiconductor region 533 formed on the surface side and accumulated in the third semiconductor region 533.
The operation at the time of reading and after the signal charge e is read out to the floating diffusion section 7 is the same as that in the above-described embodiment, and thus the duplicate description is omitted.

According to the solid-state imaging device 10 of the present embodiment, in addition to the readout electrode (first readout electrode) 121 formed on the readout gate unit 6 as in the case of the solid-state imaging device 1 of the above-described embodiment. Since the readout electrode 12 is configured by the readout electrode (second readout electrode) 122 formed on at least a part of the floating diffusion portion 7, the readout electrode 12 is connected to the first and second readout electrodes 121 and 122 during readout. On the other hand, when the read voltage is applied simultaneously, the potential 6B of the read gate portion 6 can be lowered and the potential 7B of the floating diffusion portion 7 can be lowered deeply (see FIG. 3).
In this way, not only the potential of the readout gate part is lowered, but also the potential 6B of the readout gate part 6 and the potential 7B of the floating diffusion part 7 can be lowered, compared with the conventional solid-state imaging device. The potential formed by the read gate unit 6 and the floating diffusion unit 7 can be further graded, and the read efficiency of the signal charge e read from the light receiving sensor unit 5 can be improved.

  Further, according to the solid-state imaging device 10 of the present embodiment, in the unit pixel region 4, the first semiconductor region is a deep region on the bottom side of the substrate 2 and includes the lower part of the readout gate portion 6 and the floating diffusion portion 7. 511 is formed, and the second semiconductor region 512 including the read gate portion 6 and the floating diffusion portion 7 is formed in a region shallower than the first semiconductor region 511, thereby forming the light-receiving sensor portion 5. Since the region has been expanded to the region below the readout gate unit 6 and the floating diffusion unit 7, for example, the semiconductor region constituting the light receiving sensor unit 5 is a region excluding the bottom of the readout gate unit 6 and the floating diffusion unit 6. Compared to the conventional solid-state image sensor formed only on the It can gel.

  In the solid-state imaging device 10 of the present embodiment, in the light receiving sensor unit 5, the first semiconductor region 511 and the second semiconductor region 522 are formed including the lower part of the readout gate unit 6 and the floating diffusion unit 7. Although the case where the third semiconductor region 533 is formed in the region excluding the lower portion of the readout gate portion 6 and the floating diffusion portion 7 is shown, the light receiving sensor portion 5 is used when the higher sensitivity is to be obtained. For example, it can be configured as follows.

  In other words, the first semiconductor region 511 formed in a deep region on the bottom side of the semiconductor substrate 2 and the second semiconductor region 522 formed in a region shallower than the first semiconductor region 511 include the pixel isolation region 3. The third semiconductor region 533 formed in a region shallower than the second semiconductor region 522 is formed so as to cover the entire unit pixel region 4 except for the output portion (not shown) and the reset gate portion (see FIG. (Not shown), it is formed in a region excluding the lower portion of the pixel isolation region 3, the read gate portion 6 and the floating diffusion portion 7.

  When the light receiving sensor unit 5 has such a configuration, the region contributing to the photoelectric conversion can be further enlarged compared to the light receiving sensor unit 5 having the configuration shown in FIG. Thus, it is possible to provide the solid-state imaging device 10 having a configuration capable of obtaining a wide dynamic range and having high sensitivity.

  Further, in the solid-state imaging device 10 of the present embodiment, as shown in FIG. 5, in the unit pixel region 4, in the deep region on the bottom side of the semiconductor substrate 2, the lower part of the readout gate unit 6 and the floating diffusion unit 7. The first semiconductor region 511 formed including the first semiconductor region 511 and a region shallower than the first semiconductor region 511, as well as the first semiconductor region 511, including the lower part of the read gate portion 6 and the floating diffusion portion 7. A second semiconductor region 512 formed in step S3, and a third semiconductor region 533 formed only in a region shallower than the second semiconductor region 522 and excluding the lower portion of the read gate portion 6 and the floating diffusion portion 7. The light receiving sensor unit 5 is configured from the read gate unit 6 and the float in at least a deep region on the bottom side of the semiconductor substrate 2. The light receiving sensor unit 5 is formed from a semiconductor region formed including a lower portion of the diffusion portion 7 and a region shallower than the semiconductor region except for the read gate portion 6 and the lower portion of the floating diffusion portion 7. If configured, the present invention is not limited to this.

Next, a method of manufacturing the CMOS type solid-state imaging device shown in FIG. 5 will be described with reference to FIGS.
In the illustrated example, a cross-sectional view corresponding to one pixel of a CMOS type solid-state imaging device is shown, and the same reference numerals are given to portions corresponding to FIG.

First, as shown in FIG. 6A, for example, an insulating film 11 made of, for example, a SiO ₂ film, a SiN film or the like is formed on a P-type semiconductor substrate 2 and then an element isolation layer is formed in a predetermined region on the surface of the semiconductor substrate 2. (For example, a LOCOS film) 3A is formed.

Next, a resist film (not shown) is formed on the entire surface, and a resist mask 15 that covers only the unit pixel region 4 is formed using a known lithography technique.
Then, by using this resist mask 15 as a mask, a high-concentration P-type impurity is implanted from the entire surface, and as shown in FIG. 6B, between the adjacent unit pixel regions 4 in the semiconductor substrate 2 under the LOCOS film 3A. A high-concentration P-type semiconductor region 3 </ b> B for partitioning is formed.
Thus, the pixel isolation region 3 is formed by the LOCOS film 3A and the semiconductor region 3B.
In addition, the pixel isolation region for separating the adjacent unit pixel regions 4 can also be formed by using, for example, an STI (shallow trench element isolation) method.

Next, after removing the resist mask 15 and forming a resist film (not shown) on the entire surface, a resist mask 17 having an opening 16 only on the unit pixel region 4 is formed using a known lithography technique. To do.
Then, using this resist mask 17 as a mask, an N-type impurity having a lower concentration than the entire surface is implanted so as to include a region in the unit pixel region 4 which will be a later-described read gate portion and floating diffusion portion. At this time, the low concentration N-type impurity is implanted from the surface of the semiconductor substrate 2 to a position (Rp position) within a range of 0.1 μm to 10 μm, for example.
As a result, as shown in FIG. 6C, in the unit pixel region 4, a first semiconductor region 511 constituting a light receiving sensor unit described later is formed from the deep region on the bottom side of the substrate 2 to the surface side of the substrate 2. A low concentration N-type semiconductor region 35 is formed.

Subsequently, without removing the resist mask 17, an N-type impurity having a higher concentration than the low-concentration N-type impurity implanted earlier, for example, is removed from the entire surface in the same manner as the low-concentration N-type impurity. Implantation is performed so as to include a region to be a later-described readout gate portion and floating diffusion portion in the pixel region 4. At this time, the N-type impurity is implanted at a position shallower than the implantation position of the low-concentration N-type impurity previously implanted.
As a result, as shown in FIG. 7D, an N-type semiconductor region 18 to be a second semiconductor region to be described later is formed from a position shallower than the first semiconductor region 35 to the surface side of the substrate 2. At the same time, a first semiconductor region 511 is formed.

Next, the resist mask 17 is removed, a resist film (not shown) is formed again, and a resist having an opening 32 on a region to be a read gate portion and a floating diffusion portion described later using a known lithography technique. A mask 19 is formed.
Then, for example, P-type impurities are implanted from the entire surface using the resist mask 19 as a mask. At this time, the P-type impurity is implanted into a shallow position on the surface side of the substrate 2 in the N-type semiconductor region 18.
As a result, as shown in FIG. 7E, a P-type semiconductor region 20 is formed in the N-type semiconductor region 18 in a region that becomes a read gate portion and a floating diffusion portion.
The potential of the P-type semiconductor region 20 decreases when a read voltage is applied to a second read electrode 122 described later, and the signal charge e is read from the second semiconductor region 512 to the floating diffusion portion 7. It is also possible to form with an impurity having such a concentration.

Next, the resist mask 19 is removed, and an electrode material layer 21 for forming a first readout electrode described later is formed on the entire surface. Then, after a resist film (not shown) is formed on the electrode material layer 21, a resist mask 23 having an opening 22 is formed only on a region to be a floating diffusion portion to be described later using a known lithography technique. .
Then, using the resist mask 23 as a mask, the electrode material layer 21 is removed by etching, and as shown in FIG. 7F, an opening 24 is formed in the electrode material layer 21 in a region to be a floating diffusion portion.

Subsequently, without removing the resist mask 23, a high-concentration N-type impurity is implanted from the entire surface using the resist mask 23 as a mask. At this time, high-concentration N-type impurities are implanted into a shallow position on the surface side of the substrate 2 in the P-type impurity region 20.
As a result, as shown in FIG. 8G, the floating diffusion portion 7 composed of the high-concentration N-type impurity region 71 is formed at a shallow position on the surface side of the substrate 2 in the P-type semiconductor region 20. Further, a read gate portion 6 is formed in a part of the P-type semiconductor region 20 adjacent to the floating diffusion portion 7.
Note that the impurity concentration of the N-type semiconductor region 71 constituting the floating diffusion portion 7 is floating when a read voltage is applied to a first read electrode 121 and a second read electrode 122, which will be described later, at the time of reading, for example. The diffusion unit 7 has such a concentration that the signal charge can be stored in an amount exceeding the amount of signal charge that can be stored in the light receiving sensor unit 5.

Next, after removing the resist mask 23 and forming a resist film (not shown) on the entire surface, the electrode material layer 21 remains on the light receiving sensor portion and the readout gate portion 6 described later using a known lithography technique. A resist mask 26 having such a pattern is formed.
Then, by using the resist mask 26 as a mask, the electrode material layer 21 is removed by etching, so that the electrode material layer 21 is formed only on a region serving as a light receiving sensor portion described later and on the readout gate portion 6 as shown in FIG. The state is formed.

Next, the resist mask 26 is removed, a resist film (not shown) is formed again on the entire surface, and the pattern of the electrode material layer 21 remains only on the read gate portion 6 by using a known lithography technique. A resist mask 27 is formed.
Then, the electrode material layer 21 is removed by etching using the resist mask 27, so that the electrode material layer 21 is formed only on the read gate 6 as shown in FIG. 8I. Thereby, the first readout electrode 12 is formed.

Subsequently, without removing the resist mask 27, high-concentration N-type impurities are implanted from the entire surface using the resist mask 27 as a mask. At this time, high-concentration N-type impurities are implanted into a shallow position on the surface side of the substrate 2 in the previously formed N-type semiconductor region 18.
As a result, as shown in FIG. 9J, a high-concentration N-type semiconductor region 28 is formed in the N-type semiconductor region 18. At the same time, a second semiconductor region 522 made of an N-type impurity is formed.

Next, the resist mask 27 is removed, and sidewalls 13 are formed on the sidewalls of the first readout electrode 12. Then, a resist film (not shown) is formed on the entire surface, and a resist mask 29 that covers a region except the light receiving sensor portion is formed using a known lithography technique.
Then, a high-concentration P-type impurity is implanted into a shallow position on the surface side of the substrate 2 in the high-concentration N-type semiconductor region 18 from the entire surface. At this time, P-type impurities are not implanted into the semiconductor substrate 2 below the sidewall 13.
As a result, as shown in FIG. 9K, in the high-concentration N-type semiconductor region 28, the high-concentration N-type third semiconductor region 533 and the high-concentration P on the surface of the third semiconductor region 533 are obtained. A type hole accumulation layer (so-called positive charge accumulation region) 9 is formed.

Next, the resist mask 29 is removed, and an electrode material layer 30 for forming a second readout electrode described later is formed on the entire surface. Then, after forming a resist film (not shown) on the electrode material layer 30, a resist mask 31 having a pattern for forming a second readout electrode is formed using a known lithography technique.
At this time, the pattern of the resist mask 31 is formed in a pattern that covers a part of the floating diffusion portion 7 and a part of the first readout electrode 121 as shown in FIG.

Then, by using this resist mask 31 as a mask, the electrode material layer 30 is removed by etching, whereby the second readout electrode 122 is formed as shown in FIG. 9M.
As a result, the read electrode 12 including the first read electrode 121 and the second read electrode 122 is formed. In this way, the solid-state imaging device 10 in the state shown in FIG. 5 is formed.

  Thereafter, although not shown, an interlayer insulating film, for example, is formed on the entire surface including the readout electrode 12, and a color filter is formed on the interlayer insulating film via, for example, a passivation film, a planarizing film, or the like. Then, an on-chip lens is formed at a position corresponding to the light receiving sensor unit 5 through the color filter. For example, a multilayer wiring layer is formed in the interlayer insulating film.

  In the above-described embodiment, the present invention is applied to the case of a P-type semiconductor substrate. However, the present invention can also be applied to an N-type semiconductor substrate, for example.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

It is a schematic sectional drawing which shows one Embodiment of the solid-state image sensor of this invention. It is a top view of the floating diffusion part of FIG. FIGS. 2A and 2B are potential diagrams of main parts at the time of reading of the solid-state imaging device of FIG. FIGS. 2A to 2C are potential diagrams of main parts when the solid-state imaging device of FIG. 1 is reset. It is a schematic sectional drawing which shows other embodiment of the solid-state image sensor of this invention . FIGS. 6A to 6C are manufacturing process diagrams (part 1) illustrating a manufacturing method of the solid-state imaging device of FIGS. FIG. 6D is a manufacturing process diagram (part 2) illustrating the manufacturing method of the solid-state imaging device of FIG. 5 ; Manufacturing process diagrams showing a manufacturing method of a solid-state imaging device G~I Figure 5 is a diagram (part 3). Manufacturing process diagrams showing a manufacturing method of a solid-state imaging device J~M Figure 5 is a diagram (part 4). It is a schematic sectional drawing of the conventional solid-state image sensor. A and B are potential diagrams of main parts of the solid-state imaging device of FIG. 9. A and B are diagrams for explaining conventional problems.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Solid-state image sensor, 2 ... Semiconductor substrate, 3 (3A, 3B) ... Pixel isolation | separation area | region, 4 ... Unit pixel area, 5 ... Light receiving sensor part, 6 ... Read-out gate , 7 ... Floating diffusion part, 9 ... Positive charge storage region, 11 ... Insulating film, 12 (121, 122) ... Read electrode, 13 ... Side wall

Claims (5)

A light receiving sensor unit that photoelectrically converts incident light to generate a signal charge;
A floating diffusion section for converting the signal charge into a voltage;
A readout gate portion formed between the light receiving sensor portion and the floating diffusion portion;
A unit pixel having an output unit that outputs a voltage converted by the floating diffusion unit ;
In the unit pixel, the light receiving sensor unit is formed on the bottom side of the semiconductor substrate and includes a lower part of the readout gate unit and the floating diffusion unit.
A second semiconductor region that is shallower than the first semiconductor region, includes a lower portion of the read gate portion and the floating diffusion portion, and is formed with a higher impurity concentration than the first semiconductor region;
A third semiconductor region formed in a region shallower than the second semiconductor region, excluding the lower portion of the read gate portion and the floating diffusion portion, and having a higher impurity concentration than the second semiconductor region; Configured,
A first readout electrode formed on the readout gate portion;
Wherein the second readout electrodes formed on at least a part of the floating diffusion portion, reading Ru performed from the light receiving sensor portion of the signal charge to the floating diffusion portion
Solid-state imaging device. The solid-state imaging device according to 請 Motomeko 1 reset gate portion adjacent the that provided in the floating diffusion portion. A light receiving sensor unit that photoelectrically converts incident light to generate a signal charge;
A floating diffusion section for converting the signal charge into a voltage;
A readout gate portion formed between the light receiving sensor portion and the floating diffusion portion;
A unit pixel having an output part formed adjacent to the following diffusion part;
In the unit pixel, the light receiving sensor unit is formed on the bottom side of the semiconductor substrate and includes a lower part of the readout gate unit and the floating diffusion unit.
A second semiconductor region that is shallower than the first semiconductor region, includes a lower portion of the read gate portion and the floating diffusion portion, and is formed with a higher impurity concentration than the first semiconductor region;
A third semiconductor region formed in a region shallower than the second semiconductor region, excluding the lower portion of the read gate portion and the floating diffusion portion, and having a higher impurity concentration than the second semiconductor region; Configured,
A first readout electrode formed on the readout gate portion;
A second readout electrode formed on at least a part of the floating diffusion portion,
By applying a voltage to the first readout electrode and the second readout electrode, readout of the signal charge from the light receiving sensor unit to the floating diffusion unit is performed,
The voltage converted by the floating diffusion unit is output from the output unit.
Solid-state image sensor. A reset gate unit is provided adjacent to the floating diffusion unit, and after the voltage converted by the floating diffusion unit is output from the output unit, a voltage is applied to the reset gate unit, and the floating diffusion unit is applied to the floating diffusion unit. The solid-state imaging device according to claim 3, wherein the accumulated voltage is swept out. Forming an insulating layer on the unit pixel region of the semiconductor substrate of the first conductivity type;
Forming a pixel isolation region at a predetermined position of the semiconductor substrate;
Forming a first second conductivity type semiconductor region by ion-implanting a second conductivity type impurity into the unit pixel region of the semiconductor substrate;
A second conductivity type impurity is ion-implanted into the first second conductivity type semiconductor region, and the region shallower than the first second conductivity type semiconductor region is more than the first second conductivity type semiconductor region. Forming a second second conductivity type semiconductor region having a high impurity concentration;
A region shallower than the second second-conductivity-type semiconductor region by ion-implanting a first-conductivity-type impurity into the second second-conductivity-type semiconductor region in the region where the read gate portion and the floating diffusion portion are formed And forming a first conductivity type semiconductor region;
Forming a first electrode material layer for forming a first readout electrode on the entire surface of the semiconductor substrate;
Forming a first resist film on the first electrode material layer;
Forming an opening of the first resist layer on a region for forming the following diffusion portion;
Removing the first electrode material layer exposed from the opening of the first resist layer;
Using the first resist layer and the first electrode material layer as a mask, a second conductivity type impurity is ion-implanted into the first conductivity type semiconductor region and is shallower than the first conductivity type semiconductor region. Forming a floating diffusion portion comprising a second conductivity type semiconductor region in the region;
Removing the first electrode material layer other than on the light receiving sensor part and the readout gate part after removing the first resist layer;
Forming a second resist layer in a region excluding the light receiving sensor portion;
Using the second resist layer as a mask, removing the electrode material other than the read gate portion to form a first read electrode;
Using the second resist layer as a mask, a second conductivity type impurity is ion-implanted into the second second conductivity type semiconductor region, and in a region shallower than the second second conductivity type semiconductor region, Forming a third second conductive semiconductor region having an impurity concentration higher than that of the second second conductive semiconductor region;
Forming a sidewall on the sidewall of the first readout electrode after removing the second resist layer;
Forming a third resist layer in a region excluding the light receiving sensor portion;
Using the third resist layer as a mask, a first conductivity type impurity is ion-implanted into the third second conductivity type semiconductor region, and the third second conductivity type semiconductor region on the surface side of the semiconductor substrate. Forming a positive charge accumulation region composed of a first conductivity type semiconductor region in a shallower region;
Forming a second electrode material layer for forming a second readout electrode on the entire surface of the semiconductor substrate after removing the third resist layer;
Forming a fourth resist layer covering a part of the floating diffusion portion and a part on the first readout electrode on the second electrode material layer;
Forming a second readout electrode by removing the second electrode material layer using the fourth resist layer as a mask;
A method for manufacturing a solid-state imaging device including:

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