JP4249424B2 - Waveform equalizer and recorded information reproducing apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a waveform equalizer and a recorded information reproducing apparatus in a recorded information reproducing apparatus that reproduces recorded information from a recording medium.
[0002]
[Prior art]
In order to improve the S / N ratio of a read signal read from a recording medium on which digital data is recorded at high density, a technique for performing waveform equalization by performing a filtering process for emphasizing the high frequency band on the read signal is known. ing. At this time, the improvement ratio of the S / N ratio can be increased as the emphasis of the high frequency with respect to the read signal is increased. Therefore, Japanese Patent Laid-Open No. 11-259985 has proposed a waveform equalizer that can apply high-frequency enhancement without increasing intersymbol interference.
[0003]
FIG. 1 is a diagram showing a configuration of a recorded information reproducing apparatus equipped with a waveform equalizer proposed by Japanese Patent Laid-Open No. 11-259985.
In FIG. 1, a pickup 1 supplies an A / D converter 3 with a read signal obtained by reading an information signal recorded by 8/16 modulation on a recording disk 2 such as a DVD (Digital Versatile Disc). To do. The A / D converter 3 samples the read signal at a timing according to the channel clock, and supplies a read sample value series R including a sample value series obtained at this time to the waveform equalizer 5. The channel clock is a clock having a period of 1T in an 8/16 modulated information signal.
[0004]
The amplitude limiting circuit 51 of the waveform equalizer 5 increases the amplitude limited read sample value series RLIM obtained by limiting the amplitude of the read sample value series R with the amplitude limit values Th and -Th as shown in FIG. This is supplied to the area enhancement filter 52. That is, when each read sample value of the read sample value series R is within the range of the amplitude limit value -Th to Th, the amplitude limit circuit 51 uses the read sample value series R as it is as the amplitude limit read sample value. Output as series RLIM. When each read sample value of the read sample value series R is larger than the amplitude limit value Th, the amplitude limit value Th itself is output as the amplitude limit read sample value series RLIM. On the other hand, when each read sample value of the read sample value series R is smaller than the amplitude limit value -Th, the amplitude limit value -Th itself is output as the amplitude limit read sample value series RLIM. Each of the amplitude limit values Th and -Th is a read sample value series corresponding to 3T, which is the shortest level inversion interval (hereinafter referred to as run length) in 8/16 modulation, as shown in FIG. Only R is set to a value that does not limit the amplitude.
[0005]
The high-frequency emphasis filter 52 includes unit delay elements FD1 to FD4, coefficient multipliers M1, M2, M3, and M4, and an adder AD that adds the outputs of these coefficient multipliers. Each of the unit delay elements FD1 to FD4 delays the input value by one clock cycle of the channel clock and outputs the delayed value. The coefficient multipliers M1, M2, M3, and M4 are coefficient multipliers each having a multiplication coefficient [−k, k, k, −k]. That is, the high-frequency emphasis filter 52 is a transversal filter having tap coefficients [−k, k, 0, k, −k]. With this configuration, the high-frequency emphasis filter 52 generates a high-frequency emphasized read sample value sequence in which only the high-frequency component level of the amplitude limited read sample value sequence RLIM is increased, and supplies this to the adder 54.
[0006]
The adder 54 adds the high-frequency emphasized read sample value series and the read sample value series R supplied after being delayed by two cycles of the channel clock by the delay element 53, and equalizes the addition result. The corrected read sample value series RH is output.
Next, the operation of the waveform equalizer 5 will be described.
[0007]
In general, a reproduction system for reproducing recorded information from a recording medium has a low-pass filter characteristic. Therefore, each read sample in the read sample value series R corresponding to the highest frequency run length 3T in the 8/16 modulated signal. The value is lowered. Therefore, in order to improve the S / N ratio for the read sample value series corresponding to the shortest run length 3T, the high frequency emphasis filter 52 applies only the read sample value series to the read sample value series corresponding to the run length 3T. Increase the value of. Here, even after high-frequency emphasis by the high-frequency emphasis filter 52, as shown in FIG. 2, it is desirable that the value of the equalization correction read sample value series RH at the zero crossing point D0 is constant at zero level. However, since the high-frequency emphasis filter 52 is a transversal filter having tap coefficients [−k, k, 0, k, −k] as shown in FIG. 1, for example, the time point D-2 and the time point D− in FIG. 1 If the read sample values are not the same, the value of the equalization corrected read sample value series RH at the zero crossing point D0 will fluctuate. In particular, when the value of the tap coefficient k is increased so as to apply high-frequency emphasis strongly, the variation becomes larger, which leads to an increase in intersymbol interference.
[0008]
Therefore, the high-frequency emphasis filter is obtained by applying an amplitude limit to the read sample value series R having a run length of 4T or more at the amplitude limit values Th and -Th as shown in FIG. 52. According to the amplitude limitation by the amplitude limitation circuit 51, as shown in FIG. 2A, when the run length of the read signal is 3T, the interpolation read sample value series RR is directly subjected to the amplitude limitation. The read sample value series RLIM is supplied to the high frequency enhancement filter 52. On the other hand, the interpolated read sample value series RR corresponding to the run length 4T or more is within the range of the amplitude limit value -Th to Th near the zero crossing time point D0, but exceeds this range at other time points. Therefore, when the run length of the read signal is 4T or more, as shown in (b) of FIG. 2, the value is fixed to the amplitude limit value -Th or Th at a time other than the zero crossing time D0. The amplitude limited read sample value series RLIM is supplied to the high frequency enhancement filter 52.
[0009]
In this case, the values at the time points D-2 and D-1 (or D1 and D2) in FIG. 2 are equal in any case where the run length is 4T or more. Therefore, even if the value of the tap coefficient k is increased and high-frequency emphasis is applied strongly, the value variation of the equalization correction read sample value series RH does not occur at the zero crossing point D0, and the increase in intersymbol interference is suppressed. It is.
[0010]
However, when the modulation method of the recording signal recorded on the recording disk 2 is, for example, (1, 7) modulation in which the shortest run length is 2T, the waveform equalizer 5 as shown in FIG. With the configuration, an increase in intersymbol interference cannot be suppressed.
FIG. 3 is a diagram showing an example of a waveform form of the read sample value series R read from the recording disk 2 on which the information signal is recorded by the modulation method in which the shortest run length is 2T.
[0011]
As shown in FIG. 3 (b), when the run length is 3T or more, the amplitude limit reading is performed at each of the time points D-2, D-1, D1, and D2 by the amplitude limiting action by the amplitude limiting circuit 51. The sample values are substantially the same.
However, when the run length 2T, that is, the shortest level inversion interval is less than twice the clock period in the channel clock signal, as shown in FIG. 3 (a), the time points D-2 and D-1 (or D2 and D1) Amplitude limited read sample values in each are not the same value. Accordingly, if the value of the tap coefficient k is increased to strongly apply high-frequency emphasis, the fluctuation of the value of the equalization correction read sample value series RH at the zero crossing point D0 is further increased, which causes an increase in intersymbol interference. It is.
[0012]
[Problems to be solved by the invention]
The present invention has been made to solve such a problem, and even if the shortest run length of the read signal is not more than twice the clock period of the channel clock signal, the read signal is not increased without increasing the intersymbol interference. An object of the present invention is to provide a waveform equalizer and a recorded information reproducing apparatus capable of applying high frequency emphasis to the above.
[0013]
[Means for Solving the Problems]
In order to solve the above problem, the invention according to claim 1 is to perform waveform equalization processing on a read sample value series obtained by sampling a read signal read from a recording medium according to each clock timing of a channel clock signal. A waveform equalizer that obtains an equalization-corrected read sample value sequence and obtains the read signal based on the read sample value sequence in accordance with an intermediate clock timing of the channel clock signal. Interpolating means for obtaining a sample value series as an interpolated read sample value series, amplitude limiting means for limiting the interpolated read sample value series with a predetermined amplitude limit value to obtain an amplitude limited read sample value series, and the amplitude limit A filter for weighting and adding amplitude-limited read sample values in the read sample value series, and the interpolation reading Delay means for delaying the sample value series to obtain a delayed read sample value series; and adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series; Have.
According to the second aspect of the present invention, equalization correction is performed by performing waveform equalization processing on a read sample value series obtained by sampling a read signal read from a recording medium in accordance with each clock timing of the channel clock signal. A waveform equalizer for obtaining a read sample value series, wherein the read sample value series is limited by a predetermined amplitude limit value to obtain an amplitude limited read sample value series, and the amplitude limited read sample value series And interpolating means for obtaining a sample value series that will be obtained when the read signal is sampled according to an intermediate clock timing of the channel clock signal as an interpolated read sample value series; A filter for weighting and adding the interpolated read sample values, and the amplitude limited read sample value series A delay means for obtaining an extended to delayed read sample value sequence, and adding means for said equalization corrected read sample value sequence to the result of the addition of the output of the said delayed read sample value sequence filter.
According to the third aspect of the present invention, equalization correction is performed by applying waveform equalization processing to a read sample value series obtained by sampling a read signal read from a recording medium in accordance with each clock timing of the channel clock signal. A waveform equalizer for obtaining a read sample value series, wherein the read sample value series is limited by a predetermined amplitude limit value to obtain an amplitude limited read sample value series, and the amplitude limited read sample value series Obtained when the read signal is sampled according to the intermediate clock timing of the channel clock signal based on the filter that weights and adds the amplitude limited read sample values in the middle and outputs the result, and the amplitude limited read sample value series. Interpolating means for obtaining a sample value series that will be obtained as an interpolated read sample value series, and the interpolated read sample value system A delay means for obtaining a delayed read sample value sequence with a delay, and a summing means to the equalization corrected read sample value sequence to the result of the addition of the output of the said delayed read sample value sequence filter.
According to a fourth aspect of the present invention, there is provided a recording information reproducing apparatus for reproducing recorded information from a recording medium, wherein a pickup for reading a signal of the recorded information from the recording medium, and a read signal read by the pickup A waveform equalizer that obtains an equalized corrected read sample value series by performing waveform equalization processing on a read sample value series obtained by sampling according to each clock timing of the channel clock signal, and the equalized corrected read signal Demodulating means for demodulating and outputting a reproduction signal, and the waveform equalizer is configured to sample the read signal in accordance with an intermediate clock timing of the channel clock signal based on the read sample value series. Interpolating means for obtaining a sample value series that will be obtained as an interpolated read sample value series, and the interpolated read sample value series Amplitude limiting means for obtaining an amplitude limited read sample value series by limiting with an amplitude limit value, a filter for weighting and adding amplitude limited read sample values in the amplitude limited read sample value series, and the interpolation Delay means for delaying the read sample value series to obtain a delayed read sample value series; and adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series; Have
According to a fifth aspect of the present invention, there is provided a recording information reproducing apparatus for reproducing recording information from a recording medium, wherein a pickup for reading a signal of the recording information from the recording medium, and a read signal read by the pickup A waveform equalizer that obtains an equalized corrected read sample value series by performing waveform equalization processing on a read sample value series obtained by sampling according to each clock timing of the channel clock signal, and the equalized corrected read signal Demodulating means for demodulating and outputting a reproduction signal, and the waveform equalizer limits amplitude of the read sample value sequence with a predetermined amplitude limit value to obtain an amplitude limited read sample value sequence; When the read signal is sampled according to the intermediate clock timing of the channel clock signal based on the amplitude limited read sample value series An interpolation means for obtaining a sample value series that will be obtained as an interpolated read sample value series, a filter for weighting and adding interpolated read sample values in the interpolated read sample value series, and the amplitude limited read sample value series Delay means for obtaining a delayed read sample value series, and addition means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series.
According to a sixth aspect of the present invention, there is provided a recording information reproducing apparatus for reproducing recorded information from a recording medium, wherein a pickup for reading a signal of the recorded information from the recording medium, and a read signal read by the pickup A waveform equalizer that obtains an equalized corrected read sample value series by performing waveform equalization processing on a read sample value series obtained by sampling according to each clock timing of the channel clock signal, and the equalized corrected read signal Demodulating means for demodulating and outputting a reproduction signal, and the waveform equalizer limits amplitude of the read sample value sequence with a predetermined amplitude limit value to obtain an amplitude limited read sample value sequence; A filter for weighting and adding the amplitude limited read sample values in the amplitude limited read sample value series to each other and outputting to the amplitude limited read sample value series And interpolating means for obtaining, as an interpolated read sample value series, a sample value series that would be obtained when the read signal was sampled according to an intermediate clock timing of the channel clock signal, and delaying the interpolated read sample value series And delay means for obtaining a delayed read sample value series, and adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Examples of the present invention will be described below.
FIG. 4 is a diagram showing a configuration of a recorded information reproducing apparatus provided with a waveform equalizer according to the present invention.
In FIG. 4, a pickup 1 is an A / D converter for reading a read signal obtained by reading an information signal modulated and recorded by, for example, (1, 7) modulation method having a shortest run length of 2T from a recording disk 2. 3 is supplied. The A / D converter 3 samples the read signal at a timing corresponding to the channel clock signal, and supplies a read sample value series R composed of a series of sample values obtained at this time to the waveform equalizer 6. The channel clock signal is a clock signal having a period of 1T in the (1, 7) modulated information signal. That is, the run length 2T is twice as long as the clock period in the channel clock signal.
[0015]
The waveform equalizer 6 supplies an equalization corrected read sample value series RH obtained by performing high frequency emphasis on the read sample value series R to each of an information demodulation circuit 7 and a PLL (Phase Locked Loop) circuit 8. . The data demodulation circuit 7 restores the original information signal by performing (1, 7) demodulation on the equalization corrected read sample value series RH, and outputs this as a reproduction information signal. The PLL circuit 8 generates a channel clock signal obtained by correcting the phase error generated in the equalization corrected read sample value series RH, and supplies this to the A / D converter 3.
[0016]
FIG. 5 is a diagram showing an internal configuration of the waveform equalizer 6 according to the present invention.
In FIG. 5, the interpolation filter 61 performs an interpolation operation on the read sample value series R supplied from the A / D converter 3. By such an interpolation operation, the interpolation filter 61 obtains a sample value series that will be obtained when the read signal read from the recording disk 2 is sampled at an intermediate timing of each clock timing of the channel clock signal. Then, the interpolation filter 61 obtains an interpolated read sample value series RR obtained by interpolating the obtained sample value series in the read sample value series R, and supplies this to the amplitude limiting circuit 51.
[0017]
In the actual interpolation filter 61, the interpolation calculation process is
(n + 0.5) T
n: Even number
T: 1 channel clock cycle
Time to be spent. Therefore, hereinafter, the operation will be described assuming that a delay of 0.5 · T occurs in the interpolation calculation processing by the interpolation filter 61.
[0018]
The amplitude limiting circuit 51 supplies the amplitude limited read sample value series RLIM obtained by limiting the amplitude of the interpolated read sample value series RR with the amplitude limit values Th and -Th to the high frequency emphasis filter 52 '. That is, when each read sample value in the interpolated read sample value series RR is within the range of the amplitude limit value -Th to Th, the amplitude limit circuit 51 directly uses the interpolated read sample value series RR as the amplitude limit read. Output as sample value series RLIM. If each read sample value of the interpolated read sample value series RR is larger than the amplitude limit value Th, the amplitude limit value Th itself is output as the amplitude limit read sample value series RLIM. On the other hand, when each read sample value of the interpolated read sample value series RR is smaller than the amplitude limit value -Th, the amplitude limit value -Th itself is output as the amplitude limit read sample value series RLIM. At this time, each of the amplitude limit values Th and -Th is set to such a value that only the interpolated read sample value series RR corresponding to the shortest run length 2T is not subjected to the amplitude limit. That is, the amplitude limit value Th is larger than the maximum value in the section corresponding to the run length 2T in the interpolated read sample value series RR, and the amplitude limit value -Th is the minimum in the section corresponding to the run length 2T. Is less than the value.
[0019]
The high-frequency emphasis filter 52 ′ includes unit delay elements FD1 to FD3, coefficient multipliers M1, M2, M3, and M4, and an adder AD that adds the outputs of these coefficient multipliers. Each of the unit delay elements FD1 to FD3 delays the input value by one clock cycle of the channel clock and outputs it. The coefficient multipliers M1, M2, M3, and M4 are coefficient multipliers each having a multiplication coefficient [−k, k, k, −k]. That is, the high-frequency emphasis filter 52 ′ is a transversal filter having tap coefficients [−k, k, k, −k]. With this configuration, the high-frequency emphasis filter 52 ′ generates a high-frequency emphasis read sample value sequence whose level is increased only for the sample sequence corresponding to the run length 2T in the amplitude limited read sample value sequence RLIM. This is supplied to the adder 54. The adder 54 adds the high-frequency emphasized read sample value series and the read sample value series R supplied after being delayed by two cycles of the channel clock by the delay element 53, and equalizes the addition result. The corrected read sample value series RH is output.
[0020]
Next, the operation of the waveform equalizer 6 will be described with reference to FIG.
6 indicate the respective read samples in the read sample value series R, and the black circle points indicate the interpolated read samples in the interpolated read sample value series RR obtained by the interpolation filter 61. FIG. 6 shows the read samples in the read sample value series R and the interpolated read samples in the interpolated read sample value series RR in each case of run lengths 2T to 4T.
[0021]
As shown in FIG. 6, each of the amplitude limit values Th and -Th in the amplitude limit circuit 51 is set to a value such that only the interpolated read sample value series RR corresponding to the shortest run length 2T is not subject to the amplitude limit. Is set. Therefore, as shown in FIG. 6A, when the run length is 2T, the interpolated read sample value series RR is supplied as it is to the high frequency emphasis filter 52 ′ as the amplitude limited read sample value series RLIM. The On the other hand, when the run length is 3T or more, the interpolated read sample value series RR is within the range of the amplitude limit value -Th to Th only near the zero crossing point D0. Over. Therefore, when the run length is 3T or more, as shown in (b) of FIG. 6, the amplitude limit reading in which the value is fixed to the amplitude limit value -Th or Th at a time other than the zero crossing time D0 as shown in FIG. The sample value series RLIM is supplied to the high-frequency emphasis filter 52 ′.
[0022]
Accordingly, the high-frequency emphasis filter 52 ′ has amplitude limited read samples at time points D-1.5, D-0.5, D0.5, and D1.5 in the amplitude limited read sample value series RLIM as shown in FIG. Based on the value, an equalization correction read sample value at the time point D0 is obtained.
That is, when the equalization correction read sample value at the time point D0 is Z0,
Z0 = (-k) .Y-1.5 + k.Y-0.5 + k.Y0.5 + (-k) .Y1.5
Y-1.5: Amplitude limited reading sample value at time D-1.5 during RLIM
Y-0.5: Amplitude limited reading sample value at time D-0.5 during RLIM
Y0.5: Amplitude limited read sample value at time D0.5 during RLIM
Y1.5: Amplitude limited read sample value at time D1.5 during RLIM
It becomes.
[0023]
At this time, as shown in FIG. 6, the amplitude limited read sample values at the time points D-1.5 and D-0.5 (or the time points D0.5 and D1.5) corresponding to the run length 2T are substantially the same. . Further, when the run length is 3T or more, the amplitude limit read sample value at each of the time points D-1.5 and D-0.5 (or the time points D0.5 and D1.5) is also the amplitude limit value −Th (or Th). ), They are the same as each other. Therefore, even if the value of the tap coefficient k of the high-frequency emphasis filter 52 ′ is increased in order to strongly apply high-frequency emphasis, the value of the equalization correction read sample value series RH at the zero crossing point D0 maintains a constant value. There is no increase in intersymbol interference.
[0024]
As described above, in the waveform equalizer shown in FIG. 5, first, the read sample value series R is interpolated at the intermediate timing of the channel clock signal to obtain the interpolated read sample value series RR. Next, an amplitude control process is performed on the interpolated read sample value series RR to obtain an amplitude limited read sample value series RLIM. Then, in the high frequency emphasis filter 52 ′, the amplitude limited read sample values at the four consecutive time points in the amplitude limited read sample value series RLIM are weighted and added by the coefficient multipliers M1 to M4, respectively. Here, by delaying the read sample value series R by two clock cycles of the channel clock signal, a read sample value corresponding to an intermediate time point among the four time points is obtained, and this is added to the weighted addition result. The equalization correction read sample value series RH is obtained.
[0025]
However, the number of amplitude-limited read sample values to be weighted and added in the high-frequency emphasis filter 52 ′ is not limited to four, and can be appropriately changed according to the target filter characteristics as long as it is an even number of two or more. It is. At this time, if the number of amplitude-limited read sample values to be weighted is N, the read sample value series R can be delayed by the delay element 53 by a clock period (N / 2) times the channel clock signal. For example, a read sample value corresponding to an intermediate time point among these N amplitude limited read sample values is obtained.
[0026]
FIG. 7 is a diagram showing another configuration example of the waveform equalizer 6 according to the present invention.
In FIG. 7, the double oversampling circuit 62 performs a double oversampling process on the read sample value series R supplied from the A / D converter 3. With this processing, the double oversampling circuit 62 obtains a sample value series that would be obtained when the read signal read from the recording disk 2 was sampled with a clock signal having a clock frequency twice that of the channel clock signal. Ask. The double oversampling circuit 62 supplies the sample value series to the amplitude limiting circuit 51 as an interpolated read sample value series RR.
[0027]
The amplitude limiting circuit 51 supplies the high-frequency emphasis filter 63 with an amplitude limited read sample value series RLIM obtained by limiting the amplitude of the interpolated read sample value series RR with the amplitude limit values Th and -Th. In other words, the amplitude limiting circuit 51 determines that the interpolated read sample value when each read sample value in the interpolated read sample value series RR is smaller than the amplitude limit value Th and larger than the amplitude limit value -Th. The value series RR is output as it is as the amplitude limited read sample value series RLIM. If each read sample value of the interpolated read sample value series RR is larger than the amplitude limit value Th, the amplitude limit value Th itself is output as the amplitude limit read sample value series RLIM. On the other hand, when each read sample value of the interpolated read sample value series RR is smaller than the amplitude limit value -Th, the amplitude limit value -Th itself is output as the amplitude limit read sample value series RLIM. At this time, each of the amplitude limit values Th and -Th is set to such a value that only the interpolated read sample value series RR corresponding to the shortest run length 2T is not subjected to the amplitude limit.
[0028]
The high-frequency emphasis filter 63 includes delay elements FFD1 to FFD3 as shown in FIG. 7, coefficient multipliers M1, M2, M3, and M4, and an adder AD that adds the outputs of these coefficient multipliers. The Each of the delay elements FFD1 to FFD3 sequentially takes the inputted value at a clock timing having a frequency twice as high as that of the channel clock signal, and outputs the delayed value by one period of the channel clock signal. The coefficient multipliers M1, M2, M3, and M4 are coefficient multipliers each having a multiplication coefficient [−k, k, k, −k]. That is, the high-frequency emphasis filter 63 is a transversal filter having tap coefficients [−k, 0, k, 0, k, 0, −k].
[0029]
With this configuration, the high frequency emphasis filter 63 generates a high frequency emphasis read sample value series in which the level is increased only for the sample series corresponding to the run length 2T in the amplitude limited read sample value series RLIM, This is supplied to the adder 54. The adder 54 adds the high frequency emphasized read sample value series and the interpolated read sample value series RR supplied after being delayed by the delay element 64 by three periods of the channel clock, and the addition result is equalized. Output as a correction correction sample value series RH.
[0030]
Next, the operation of the waveform equalizer 6 shown in FIG. 7 will be described with reference to FIG.
8 indicate the respective sample values in the interpolated read sample value series RR output from the double oversampling circuit 62 in the case of each of run lengths 2T to 4T.
[0031]
As shown in FIG. 8, each of the amplitude limit values Th and -Th in the amplitude limit circuit 51 is such that only the interpolated read sample value series RR corresponding to the shortest run length 2T is not subject to the amplitude limit. Is set to Therefore, as shown in FIG. 8A, when the run length is 2T, the interpolated read sample value series RR is supplied as it is to the high frequency emphasis filter 63 as the amplitude limited read sample value series RLIM. . On the other hand, when the run length is 3T or more, it is within the range of the amplitude limit value -Th to Th near the zero crossing point D0, but exceeds this range at other times. Therefore, when the run length is 3T or more, as shown in (b) of FIG. 8, the amplitude is fixed at the amplitude limit value -Th or Th at a time other than the vicinity of the zero crossing time D0. The limited read sample value series RLIM is supplied to the high frequency enhancement filter 63.
[0032]
At this time, the high-frequency emphasis filter 63 performs amplitude limited read samples at time points D-1.5, D-0.5, D0.5, and D1.5 in the amplitude limited read sample value series RLIM as shown in FIG. Based on the value, an equalization correction read sample value at the time point D0 is obtained.
That is, when the equalization correction read sample value at the time point D0 is Z0,
Z0 = (-k) .Y-1.5 + k.Y-0.5 + k.Y0.5 + (-k) .Y1.5
Y-1.5: Amplitude limited reading sample value at time D-1.5 during RLIM
Y-0.5: Amplitude limited reading sample value at time D-0.5 during RLIM
Y0.5: Amplitude limited read sample value at time D0.5 during RLIM
Y1.5: Amplitude limited read sample value at time D1.5 during RLIM
It becomes.
[0033]
At this time, as shown in FIG. 8, the amplitude limited read sample values at the time points D-1.5 and D-0.5 (or the time points D0.5 and D1.5) corresponding to the run length 2T are substantially the same. . Furthermore, the amplitude limit read sample value at each of the time points D-1.5 and D-0.5 (or time points D0.5 and D1.5) corresponding to a run length of 3T or more is also set to the amplitude limit value -Th (or Th). Because they are fixed, they are the same.
[0034]
Therefore, even if the tap coefficient k is set to be large so that high frequency emphasis is strongly applied in the high frequency emphasizing filter 63, the equalization correction read sample value series RH at the zero crossing point D0 maintains a constant value. No increase in intersymbol interference occurs.
In the embodiment shown in FIG. 7, the double oversampling circuit 62 performs a double oversampling process on the read sample value series R supplied from the A / D converter 3. The configuration is not limited. For example, instead of using the double oversampling circuit 62, the read signal may be sampled with a clock signal having a frequency twice that of the channel clock signal at the stage of the A / D converter 3. is there.
[0035]
In the waveform equalizer shown in FIG. 5 or FIG. 7, a sample value series corresponding to the center tap in the high-frequency emphasis filter 52 ′ (or 63) is added to the adder 54 via the delay element 53 (or 64). To supply. That is, only the sample value series corresponding to the center tap in the high-frequency emphasis filter 52 ′ (or 63) is reflected in the equalization corrected read sample value series RH without being subjected to amplitude limitation by the amplitude limiting circuit 51. It is. However, the amplitude limit by the amplitude limit circuit 51 may be applied to the sample value series corresponding to the center tap.
[0036]
FIG. 9 and FIG. 10 are diagrams showing modifications of the waveform equalizer made in view of this point. FIG. 9 is a diagram showing a modification of the waveform equalizer shown in FIG. 5, and FIG. 10 is a diagram showing a modification of the waveform equalizer shown in FIG.
Further, in the high-frequency emphasis filter 63 shown in FIGS. 7 and 10, it is possible to acquire a sample value series corresponding to the center tap as described above in the filter.
[0037]
FIG. 11 is a diagram showing a modification of the waveform equalizer shown in FIGS. 7 and 10 made in view of the above points.
In the high-frequency emphasis filter 63 ′ shown in FIG. 11, the delay element FFD2 of the high-frequency emphasis filter 63 shown in FIGS. 7 and 10 is divided into two stages of delay elements FFD2A and FFD2B, and the output of the delay element FFD2A. Is supplied to the adder AD. At this time, each of the delay elements FFD2A and FFD2B is a delay element that takes in an input value at a clock timing of twice the frequency of the channel clock signal and supplies it to the next stage. According to such a configuration, the sample value series corresponding to the center tap as described above is extracted from the delay element FFD2A, and is directly supplied to the adder AD. Therefore, according to the configuration shown in FIG. 11, the sample value series corresponding to the center tap is converted into the equalized correction read sample value series without using the delay element 64 and the adder 54 as shown in FIGS. It can be reflected in RH.
[0038]
In the waveform equalizer shown in FIG. 5, only the sample value series corresponding to the center tap in the high-frequency emphasis filter 52 ′ is not subjected to the interpolation processing by the interpolation filter 61, but corresponds to this center tap. Interpolation processing by the interpolation filter 61 may be performed only on the sample value series.
FIG. 12 is a diagram showing another modification of the waveform equalizer made in view of the above points.
[0039]
The functions of the interpolation filter 61, the amplitude limiting circuit 51, the high-frequency emphasis filter 52 ′, and the adder 54 shown in FIG. 12 are the same as those shown in FIG.
In FIG. 12, an interpolation filter 61 applies an interpolated read sample value series obtained by performing the above-described interpolation operation processing to the read sample value series R supplied from the A / D converter 3 to a delay element 53 ′. Supply. The interpolation filter 61 spends the time corresponding to 0.5 period of the channel clock in the interpolation calculation process. The delay element 53 ′ delays the interpolated read sample value series supplied from the interpolating filter 61 by one cycle of the channel clock, and then supplies it to the adder 54. On the other hand, the amplitude limiting circuit 51 applies the amplitude limited read sample value series RLIM obtained by limiting the amplitude with the amplitude limit values Th and -Th to the read sample value series R supplied from the A / D converter 3. The high frequency enhancement filter 52 'is supplied. The high-frequency emphasis filter 52 ′ generates a high-frequency emphasis read sample value sequence whose level is increased only for the sample sequence corresponding to the run length 2T in the amplitude-limited read sample value sequence RLIM, and adds this Supply to the vessel 54. The adder 54 adds the high frequency emphasized read sample value series and the interpolated read sample value series supplied after being delayed by one cycle of the channel clock by the delay element 53 ′, and equalizes the addition result. The corrected read sample value series RH is output.
[0040]
As described above, in the waveform equalizer shown in FIG. 12, first, amplitude control processing is performed on the read sample value series R to obtain the amplitude limited read sample value series RLIM. Then, in the high frequency emphasis filter 52 ′, the amplitude limited read sample values at the four consecutive time points in the amplitude limited read sample value series RLIM are weighted and added by the coefficient multipliers M1 to M4, respectively. During this time, an interpolated read sample value series is obtained by interpolating the read sample value series R at the intermediate timing of the channel clock signal. Then, by delaying the interpolated read sample value series by one clock cycle of the channel clock signal, a read sample value corresponding to an intermediate time point among the four time points is obtained, and this is added to the weighted addition result. The equalization correction read sample value series RH is obtained.
[0041]
At this time, in the waveform equalizer shown in FIG. 12, assuming that the number of amplitude limited read sample values to be weighted and added is N, the interpolated read sample value series is converted into (N / 2) of the channel clock signal by the delay element 53 ′. -1) If the delay is performed by a multiple of the clock period, a read sample value corresponding to an intermediate time point among these N amplitude limited read sample values can be obtained.
[0042]
In the waveform equalizer shown in FIG. 12, the sample value series corresponding to the center tap of the high-frequency emphasis filter 52 ′, that is, the sample value corresponding to the intermediate point in time between the four amplitude limited read sample values to be weighted and added. The amplitude is not limited only to the series. However, instead of FIG. 12, the configuration shown in FIG. 13 is adopted so that the amplitude limiting circuit 51 limits the amplitude on the sample value series corresponding to the center tap of the high-frequency emphasis filter 52 ′. good.
[0043]
In the above embodiment, the case where the waveform equalizer according to the present invention is applied to the information reproducing apparatus for reproducing the recorded information from the recording medium has been described. However, the application is not limited to the information reproducing apparatus. In short, if the transmission system has a characteristic in which the high frequency band is attenuated, the waveform equalizer according to the present invention can be mounted to perform high frequency enhancement without increasing intersymbol interference. .
[0044]
In the high frequency emphasis filter, amplitude limited read sample values at each of the four time points D in the amplitude limited read sample value series RLIM are weighted and added by coefficient multipliers M1 to M4, respectively. The number of amplitude limited read sample values to be performed may be at least two. Further, each functional module (amplitude limiting circuit 51, high-frequency emphasis filter 52 ′, adder 54, delay elements 53 and 64, interpolation filter 61, and double oversampling circuit 62) constructing the waveform equalizer 6 according to the present invention. ) May be realized by either an analog signal processing circuit or a digital signal processing circuit.
[0045]
In short, the waveform equalizer according to the present invention is obtained by adding the read signal obtained at the intermediate point between the signal levels at the two consecutive time points in the amplitude limited read signal (RLIM) to the weighted addition result between the two signal levels. Any configuration may be used as long as it is output as a correction correction read signal (RH).
[0046]
【The invention's effect】
As described above in detail, the waveform equalizer and the recorded information reproducing apparatus according to the present invention are obtained by weighting and adding the signal levels at the first time point and the second time point in the amplitude limited read signal obtained by limiting the amplitude of the read signal. The addition result of the read signal and the signal level at the intermediate time between the first time point and the second time point is output as an equalization correction read signal.
[0047]
Therefore, according to the present invention, even if the shortest run length of the read signal is not more than twice the clock period of the channel clock signal, high frequency emphasis can be applied without increasing intersymbol interference.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a recorded information reproducing apparatus provided with a waveform equalizer 5;
FIG. 2 is a diagram showing a read sample value series R obtained when an information signal recorded by 8/16 modulation is read, and an amplitude limited read sample value series RLIM obtained by a waveform equalizer 5;
FIGS. 3A and 3B are diagrams showing a read sample value series R obtained when a modulated information signal is read and an amplitude limited read sample value series RLIM obtained by a waveform equalizer 5; FIG. is there.
FIG. 4 is a diagram showing a configuration of a recorded information reproducing apparatus including a waveform equalizer 6 according to the present invention.
FIG. 5 is a diagram showing an example of an internal configuration of a waveform equalizer 6 according to the present invention.
FIG. 6 shows (1, 7) a read sample value series R obtained when a modulated and recorded information signal is read, and an amplitude limited read sample value series RLIM obtained by a waveform equalizer 6 according to the present invention. FIG.
FIG. 7 is a diagram showing another example of the waveform equalizer 6 according to the present invention.
8 shows a read sample value series R obtained when (1, 7) modulated and recorded information signals are read, and an amplitude limited read sample value series RLIM obtained by the waveform equalizer 6 shown in FIG. FIG.
FIG. 9 is a diagram showing a modification of the waveform equalizer 6 shown in FIG.
10 is a diagram showing a modification of the waveform equalizer 6 shown in FIG.
11 is a diagram showing a modification of the waveform equalizer 6 shown in FIGS. 7 and 10. FIG.
12 is a diagram showing a modification of the waveform equalizer 6 shown in FIG.
13 is a diagram showing a modification of the waveform equalizer 6 shown in FIG.
[Explanation of main part codes]
6 Waveform equalizer
51 Amplitude limiting circuit
52 ', 63, 63' High frequency enhancement filter
61 Interpolation filter
62 Double oversampling circuit

Claims (6)

A waveform equalizer that obtains an equalized corrected read sample value sequence by performing waveform equalization processing on a read sample value sequence obtained by sampling a read signal read from a recording medium according to each clock timing of a channel clock signal There,
Interpolating means for obtaining, as an interpolated read sample value series, a sample value series that will be obtained when the read signal is sampled according to the intermediate clock timing of the channel clock signal based on the read sample value series;
Amplitude limiting means for limiting the interpolated read sample value series with a predetermined amplitude limit value to obtain an amplitude limited read sample value series;
A filter for weighting and adding the amplitude limited read sample values in the amplitude limited read sample value series,
Delay means for delaying the interpolated read sample value series to obtain a delayed read sample value series;
Adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series;
A waveform equalizer characterized by comprising: A waveform equalizer that obtains an equalized corrected read sample value sequence by performing waveform equalization processing on a read sample value sequence obtained by sampling a read signal read from a recording medium according to each clock timing of a channel clock signal There,
Amplitude limiting means for limiting the read sample value series with a predetermined amplitude limit value to obtain an amplitude limited read sample value series;
Interpolating means for obtaining, as an interpolated read sample value series, a sample value series that would be obtained when the read signal was sampled according to an intermediate clock timing of the channel clock signal based on the amplitude limited read sample value series;
A filter for weighting and adding the interpolated read sample values in the interpolated read sample value series,
Delay means for delaying the amplitude limited read sample value series to obtain a delayed read sample value series;
Adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series;
A waveform equalizer characterized by comprising: A waveform equalizer that obtains an equalized corrected read sample value sequence by performing waveform equalization processing on a read sample value sequence obtained by sampling a read signal read from a recording medium according to each clock timing of a channel clock signal There,
Amplitude limiting means for limiting the read sample value series with a predetermined amplitude limit value to obtain an amplitude limited read sample value series;
A filter for weighting and adding the amplitude limited read sample values in the amplitude limited read sample value series,
Interpolating means for obtaining, as an interpolated read sample value series, a sample value series that would be obtained when the read signal was sampled according to an intermediate clock timing of the channel clock signal based on the amplitude limited read sample value series;
Delay means for delaying the interpolated read sample value series to obtain a delayed read sample value series;
Adding means for adding the delayed read sample value series and the output of the filter as the equalization corrected read sample value series;
A waveform equalizer characterized by comprising: A recorded information reproducing apparatus for reproducing recorded information from a recording medium,
A pickup for reading a signal of the recording information from the recording medium;
A waveform equalizer that performs waveform equalization processing on a read sample value sequence obtained by sampling a read signal read by the pickup according to each clock timing of a channel clock signal to obtain an equalization corrected read sample value sequence; ,
Demodulation means for demodulating the equalization correction read signal and outputting a reproduction signal,
The waveform equalizer uses, as the interpolated read sample value series, a sample value series that will be obtained when the read signal is sampled according to an intermediate clock timing of the channel clock signal based on the read sample value series. Interpolating means to be obtained; amplitude limiting means for obtaining the amplitude limited read sample value series by limiting the interpolated read sample value series with a predetermined amplitude limit value; and amplitude limited read sample values in the amplitude limited read sample value series A filter for weighted addition and output, delay means for delaying the interpolated read sample value series to obtain a delayed read sample value series, and a sum of the delayed read sample value series and the output of the filter And a recording information reproducing apparatus comprising: an adding unit configured to equalize and correct read sample value series. A recorded information reproducing apparatus for reproducing recorded information from a recording medium,
A pickup for reading a signal of the recording information from the recording medium;
A waveform equalizer that performs waveform equalization processing on a read sample value sequence obtained by sampling a read signal read by the pickup according to each clock timing of a channel clock signal to obtain an equalization corrected read sample value sequence; ,
Demodulation means for demodulating the equalization correction read signal and outputting a reproduction signal,
The waveform equalizer is configured to limit the read sample value series with a predetermined amplitude limit value to obtain an amplitude limit read sample value series, and to limit the read signal based on the amplitude limit read sample value series. Interpolating means for obtaining a sample value series that will be obtained when sampling is performed according to an intermediate clock timing of the channel clock signal as an interpolated read sample value series, and interpolated read sample values in the interpolated read sample value series A filter for weighted addition and output; delay means for delaying the amplitude limited read sample value sequence to obtain a delayed read sample value sequence; and a sum of the delayed read sample value sequence and the output of the filter And a recording information reproducing apparatus comprising: an adding unit configured to equalize and correct read sample value series. A recorded information reproducing apparatus for reproducing recorded information from a recording medium,
A pickup for reading a signal of the recording information from the recording medium;
A waveform equalizer that performs waveform equalization processing on a read sample value sequence obtained by sampling a read signal read by the pickup according to each clock timing of a channel clock signal to obtain an equalization corrected read sample value sequence; ,
Demodulation means for demodulating the equalization correction read signal and outputting a reproduction signal,
The waveform equalizer includes amplitude limiting means for limiting the read sample value series with a predetermined amplitude limit value to obtain an amplitude limited read sample value series, and an amplitude limited read sample value in the amplitude limited read sample value series A sample value series that will be obtained when the read signal is sampled according to the intermediate clock timing of the channel clock signal based on the filter that weights and adds them to each other and the amplitude limited read sample value series Interpolating means for obtaining an interpolated read sample value series, delay means for delaying the interpolated read sample value series to obtain a delayed read sample value series, and adding the delayed read sample value series and the output of the filter And a means for adding the equalized correction read sample value series.

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