JP4224662B2 - Image encoding apparatus and method, image decoding apparatus and method, and image processing apparatus - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image encoding apparatus and method for compressing and encoding image data, an image decoding apparatus and method for decoding compressed and encoded image data, and an image processing apparatus including the image encoding apparatus and the image decoding apparatus About.
[0002]
[Prior art]
Conventionally, as an image encoding method for compressing and encoding image data, there is a bidirectional predictive encoding method adopted in the MPEG (Moving Picture Experts Group) standard. In this bidirectional predictive encoding method, three types of encoding are performed: intra-frame encoding, inter-frame forward predictive encoding, and bidirectional predictive encoding, and in response to these encodings, Three types of image types are defined: I (Intra) picture, P (Predictive) picture, and B (Bidirectionally predictive) picture. Note that the P picture and the B picture are also called a non-intra picture or an inter picture.
[0003]
When encoding image data to be encoded as an intra picture, for example, the image data is encoded in the same frame (or field). On the other hand, when encoding image data to be encoded as a non-intra picture, encoding is performed on difference image data obtained by referring to a past frame or a future frame.
[0004]
Further, for example, there is a hierarchical encoding method as an encoding method for improving image quality in stages. In this hierarchical encoding method, image data to be encoded is divided into a plurality of hierarchical image data, and encoding is performed on the divided hierarchical image data. Here, the image data of each layer is, for example, image data divided for different frequency components.
[0005]
FIG. 11 shows the configuration of such a hierarchical encoding scheme image encoding apparatus. This image encoding device includes a dividing circuit 170 and encoding circuits 171 and 172. The dividing circuit 170 is used to divide the input image data XX as image data to be encoded into a plurality of (here, two) layers of image data (basic layer image data X1 and higher layer image data X2). is there. The encoding circuit 171 is for encoding the base layer image data X1 output from the dividing circuit 170. The encoding circuit 172 is for encoding the high-level image data X2 output from the dividing circuit 170. As will be described later, the encoding circuits 171 and 172 have the same configuration and operate in the same manner.
[0006]
The dividing circuit 170 includes an image processing circuit 170a and a subtraction circuit 170b. The image processing circuit 170a is for extracting basic layer image data X1, which is image data having basic characteristics, from the input image data XX. The subtraction circuit 170b is for subtracting the base layer image data X1 from the input image data XX. Here, the basic layer image data is image data that can be viewed as a normal image. For example, in terms of the spatial frequency of an image, it is image data having a low frequency component. Further, the higher hierarchy image data is, for example, image data for obtaining a high-quality image, and is image data having a high frequency component. When the input image data XX is divided with respect to the spatial frequency, the image processing circuit 170a is configured by, for example, an LPF (Low Pass Filter) circuit.
[0007]
The input image data XX is supplied to the image processing circuit 170a and the subtraction circuit 170b in the dividing circuit 170, respectively. The image processing circuit 170a extracts the basic layer image data X1 from the input image data XX, and outputs the extracted basic layer image data X1 to the encoding circuit 171 and the subtraction circuit 170b, respectively.
[0008]
The subtraction circuit 170b subtracts the base layer image data X1 output from the image processing circuit 170a from the input image data XX, and outputs the difference image data as the subtraction result to the encoding circuit 172 as higher layer image data X2. It is like that.
[0009]
FIG. 12 shows the configuration of the encoding circuits 171 and 172 shown in FIG. The encoding circuits 171 and 172 have the same configuration as described above except that the input image data to be encoded is different and is the basic layer image data X1 or the higher layer image data X2. And operate in the same manner.
[0010]
The coding circuit shown in FIG. 12 includes a preprocessing circuit 151, a subtraction circuit 152, a DCT (Discrete Cosine Transform) circuit 153, and a quantization circuit 154. For example, the preprocessing circuit 151 rearranges raster scan format image data in a predetermined encoding processing order, converts the rearranged image data into a block scan format, and converts the image data of a plurality of macroblocks (hereinafter referred to as block data). Data). The subtraction circuit 152 is for subtracting, for example, predicted image data described later from the image data (block data) output from the preprocessing circuit 151. The DCT circuit 153 is for converting image data into frequency components, and is for acquiring DCT coefficients by performing DCT on the subtraction result output from the subtraction circuit 151. The quantization circuit 154 is for quantizing the DCT coefficient output from the DCT circuit 153 based on a predetermined quantization value.
[0011]
The encoding circuit includes an inverse quantization circuit 158, an inverse DCT circuit 159, an adder circuit 160, and a frame memory 161. The inverse quantization circuit 158 is for inversely quantizing the output data of the quantization circuit 154. The inverse DCT circuit 159 is for performing inverse DCT on the output data (reconstructed DCT coefficient) of the inverse quantization circuit 158. The adder circuit 160 is for adding the output data (image data) of the inverse DCT circuit 159 and the predicted image data. The frame memory 161 is for storing the addition result of the addition circuit 160 as reference image data.
[0012]
Further, this encoding circuit includes a motion compensation circuit 162, a motion vector detection circuit 163, a switch 164, and a control circuit 166. The motion vector detection circuit 163 is for detecting a motion vector based on the image data output from the preprocessing circuit 151 and the reference image data stored in the frame memory 161. The motion compensation circuit 162 performs motion compensation on the reference image data stored in the frame memory 161 based on the motion vector detected by the motion vector detection circuit 163, and uses the reference image data for motion compensation as predicted image data. Is to occur as
[0013]
The control circuit 166 determines whether to encode the image data output from the preprocessing circuit 151 as an intra picture, and switches the switch 164 according to the determination result.
[0014]
When the control circuit 166 determines that the image data output from the preprocessing circuit 151 is to be encoded as an intra picture, the switch 164 causes the data “0” to be subtracted from the subtraction circuit 152 in accordance with the switching signal output from the control circuit 166. And are switched so as to be output to the adder circuit 160, respectively. In addition, when the control circuit 166 determines that the image data output from the preprocessing circuit 151 is to be encoded as a non-intra picture, the switch 164 is changed in the motion compensation circuit 162 according to the switching signal output from the control circuit 166. The generated predicted image data is switched so as to be output to the subtraction circuit 152 and the addition circuit 160, respectively.
[0015]
Thereby, the subtraction result output from the subtraction circuit 152 is the image data itself when the image data is encoded as an intra picture. The subtraction result is difference image data obtained by using predicted image data when the image data is encoded as a non-intra picture.
[0016]
In addition, the encoding circuit includes a variable length encoding circuit 155, a multiplexing circuit 156, a buffer 157, and a rate control circuit 165. The variable length coding circuit 155 is for performing variable length coding on the output data of the quantization circuit 154. The multiplexing circuit 156 is for multiplexing the encoded data (DCT coefficient, quantization value of the quantization circuit 154, picture type, etc.) output from the variable length coding circuit 155, motion vectors, and the like. . The buffer 157 temporarily holds the output data of the multiplexing circuit 156 and outputs it as a stream at a predetermined bit rate. The rate control circuit 165 is for monitoring the data occupation state in the buffer 157 and controlling the quantization value of the quantization circuit 154 in accordance with the data occupation state.
[0017]
FIG. 13 is a flowchart showing an encoding process in the variable length encoding circuit 155 shown in FIG. As shown in FIG. 13, in step A1, a picture type relating to data (block data and quantized DCT coefficients) input to the variable length coding circuit 155 is determined. If it is determined that the input data is related to a non-intra picture, in step A2, an encoding process is performed using a preset non-intra picture encoding table (encoding process 3).
[0018]
On the other hand, when it is determined in step A1 that the input data relates to an intra picture, in step A3, the DCT coefficient type in the input data is determined. This is because the DCT coefficient in each block data includes a DC (Direct Current) coefficient that does not change in the block data and an AC (Alternate Current) coefficient that changes in the block data. This is because the encoding process is performed independently.
[0019]
If it is determined in step A3 that the DCT coefficient type is a DC coefficient, in step A4, encoding is performed using a DC coefficient coding table that is set in advance with respect to the DC coefficient difference value between adjacent block data. Processing is performed (encoding processing 1). On the other hand, when it is determined that the DCT coefficient type is an AC coefficient, in step A5, an encoding process is performed using a preset AC coefficient encoding table (encoding process 2).
[0020]
In the image coding apparatus of the hierarchical coding system configured as described above, when image data input to the coding circuits 171 and 172 is coded as an intra picture, for example, motion compensation is performed on such image data. Was not done. This is because the characteristics of the image are greatly different between when image data is encoded as a non-intra picture and when encoded as an intra picture. Therefore, unlike the case of a non-intra picture that encodes difference image data with few data components, in the case of an intra picture, the input image data itself is encoded.
[0021]
[Problems to be solved by the invention]
By the way, in the encoding circuits 171 and 172, input image data (basic layer image data and higher layer image data) is not separately encoded. However, since the higher layer image data is difference image data indicating the difference between the input image data and the basic layer image data, in terms of the nature of the image, the higher layer image data of the intra picture is the higher layer image of the non-intra picture. Very similar to image data. Therefore, for example, if high-order layer image data is to be encoded as an intra picture without acquiring difference image data by motion compensation, the high-order layer image data has fewer data components than the base layer image data. However, there is a problem that the code amount of the higher layer image data is increased and the encoding efficiency is lowered.
[0022]
The present invention has been made in view of such problems, and an object of the present invention is to divide image data to be encoded into image data of a plurality of hierarchies, and to determine a predetermined hierarchy among the divided image data of the plurality of hierarchies. An image encoding device and method, an image decoding device and method, and an image processing device capable of improving the encoding efficiency of image data of a predetermined layer when encoding the image data as an intra picture are provided. There is to do.
[0023]
[Means for Solving the Problems]
  An image encoding device according to the present invention converts image data to be encoded., Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataDividing means for dividing the image data into a plurality of hierarchies, and the image data of the plurality of hierarchies divided by the dividing meansHigh-level image dataIs encoded as an intra picture,Encode differential image data obtained by subtracting non-zero reference data from high-order hierarchical image dataEncoding means.
[0024]
  In addition, the image encoding method according to the present invention provides image data to be encoded., Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataA step of dividing the image data into a plurality of hierarchies, and a plurality of hierarchies of image data divided from the image data to be encodedHigh-level image dataIs encoded as an intra picture,Encode differential image data obtained by subtracting non-zero reference data from high-order hierarchical image dataSteps.
[0025]
  An image decoding apparatus according to the present invention includes:The image data to be encoded is divided and encoded into image data of a plurality of layers including basic layer image data and high-level image data obtained by subtracting the basic layer image data from the image data to be encoded. Is obtained by decoding the base layer image data.First decoding means for decoding the first encoded data, and second encoded data different from the first encoded data areObtained by encoding difference image data obtained by subtracting non-zero reference data from high-level image dataIf the image data is an intra picture,The second encoded data is decoded by adding the reference data in the process of decoding the second encoded data.Second decoding means.
[0026]
  The image decoding method according to the present invention includes:The image data to be encoded is divided and encoded into image data of a plurality of layers including basic layer image data and high-level image data obtained by subtracting the basic layer image data from the image data to be encoded. Is a method for decoding encoded data obtained by encoding the basic layer image data.A step of decoding the first encoded data and a second encoded data different from the first encoded dataObtained by encoding difference image data obtained by subtracting non-zero reference data from high-level image dataIf the image data is an intra picture,The second encoded data is decoded by adding the reference data in the process of decoding the second encoded data.Steps.
[0027]
  An image processing apparatus according to the present invention stores image data to be encoded., Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataDivide into multiple levels of image data, and the divided multiple levels of image dataHigh-level image dataIs encoded as an intra picture,Encode differential image data obtained by subtracting non-zero reference data from high-order hierarchical image dataEncoding means and encoded by this encoding meansThe encoded high-level image data is decoded by adding the reference data in the process of decoding the high-level image data.Decoding means.
[0028]
  In the image encoding device or the image encoding method according to the present invention, the image data to be encoded is, Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataThe image data is divided into multiple levels of image data.High-level image dataIs encoded as an intra picture,Difference image data obtained by subtracting non-zero reference data from high-order hierarchical image data is encoded.
[0029]
  In the image decoding apparatus or the image decoding method according to the present invention,Obtained by encoding base layer image dataThe first encoded data is decoded, and second encoded data different from the first encoded data isObtained by encoding difference image data obtained by subtracting non-zero reference data from high-level image dataIf the image data is an intra picture,By adding the reference data in the process of decoding the second encoded data, the second encoded data is decoded.
[0030]
  In the image processing apparatus according to the present invention, the image data to be encodedIncludes the basic layer image data and the higher layer image data obtained by subtracting the base layer image data from the image data to be encoded.The image data is divided into multiple levels of image data.High-level image dataIs encoded as an intra picture,Difference image data obtained by subtracting non-zero reference data from high-order hierarchical image data is encoded.And encodedBy adding the reference data in the process of decoding the higher layer image data, the encoded higher layer image data is decoded.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0032]
(First embodiment)
FIG. 1 shows a configuration of an image encoding device according to the present embodiment, and FIG. 2 shows a configuration of an image decoding device according to the present embodiment. The image encoding method and the image decoding method according to the present embodiment are embodied by the image encoding device and the image decoding device according to the present embodiment, and will be described below.
[0033]
The image processing apparatus according to the present embodiment includes the image encoding apparatus shown in FIG. 1 and the image decoding apparatus shown in FIG.
[0034]
First, the image coding apparatus shown in FIG. 1 will be described. This image encoding apparatus includes a dividing circuit 1 and encoding circuits 2 and 3.
[0035]
The dividing circuit 1 includes an image processing circuit 1a and a subtracting circuit 1b, and the input image data YY as image data to be encoded is converted into a plurality (here, two) of image data (basic layer image data Y1 and The image data is divided into higher hierarchy image data Y2). When the input image data YY is divided with respect to the spatial frequency, the image processing circuit 1a is configured by, for example, an LPF circuit.
[0036]
The input image data YY is supplied to the image processing circuit 1a and the subtraction circuit 1b in the dividing circuit 1, respectively. The image processing circuit 1a extracts basic layer image data Y1, which is image data having basic characteristics, from the input image data YY, and outputs the extracted basic layer image data Y1 to the encoding circuit 2 and the subtraction circuit 1b, respectively. It is supposed to do.
[0037]
The subtraction circuit 1b subtracts the basic layer image data Y1 output from the image processing circuit 1a from the input image data YY, and outputs the difference image data as the subtraction result to the encoding circuit 3 as higher layer image data Y2. It has become.
[0038]
The encoding circuit 2 is for encoding the base layer image data Y1, is configured in the same manner as the encoding circuits 171 and 172, and operates similarly.
[0039]
FIG. 3 shows the configuration of the encoding circuit 3 shown in FIG. The encoding circuit 3 is for encoding the high-order hierarchical image data Y2, and includes a preprocessing circuit 10, a subtraction circuit 11, a DCT circuit 12, and a quantization circuit 13. For example, the preprocessing circuit 10 rearranges raster scan format image data in a predetermined encoding processing order, and converts each rearranged image data into a block scan format to obtain a plurality of block data. . The subtraction circuit 11 subtracts, for example, predicted image data described later from the image data (block data) output from the preprocessing circuit 10. The DCT circuit 12 obtains a DCT coefficient by performing DCT on the subtraction result output from the subtraction circuit 11. The quantization circuit 13 quantizes the DCT coefficient output from the DCT circuit 12 based on a predetermined quantization value.
[0040]
The encoding circuit 3 includes an inverse quantization circuit 17, an inverse DCT circuit 18, an adder circuit 19, and a frame memory 20. The inverse quantization circuit 17 performs inverse quantization on the output data of the quantization circuit 13. The inverse DCT circuit 18 performs inverse DCT on the output data (reconstructed DCT coefficient) of the inverse quantization circuit 17. The adding circuit 19 adds the output data (image data) of the inverse DCT circuit 18 and the predicted image data. The frame memory 20 stores the addition result of the addition circuit 19 as reference image data.
[0041]
Further, the encoding circuit 3 includes a motion vector detection circuit 21, a motion compensation circuit 22, a switch 23, and a control circuit 29. The motion vector detection circuit 21 detects a motion vector based on the image data output from the preprocessing circuit 10 and the reference image data stored in the frame memory 20. The motion compensation circuit 22 performs motion compensation on the reference image data stored in the frame memory 20 based on the motion vector detected by the motion vector detection circuit 21, and uses the reference image data for motion compensation as predicted image data. Is supposed to occur.
[0042]
The control circuit 29 determines whether or not to encode the image data output from the preprocessing circuit 10 as an intra picture, and switches the switch 23 according to the determination result.
[0043]
When the control circuit 29 determines that the image data output from the preprocessing circuit 10 is to be encoded as an intra picture, the switch 23 responds to a switching signal output from the control circuit 29 and receives a predetermined value ( Reference data indicating zero (not zero) is switched so as to be output to the subtracting circuit 11 and the adding circuit 19, respectively. This predetermined value is a value that minimizes the code amount when encoding image data. In addition, when the control circuit 29 determines that the image data output from the preprocessing circuit 10 is to be encoded as a non-intra picture, the switch 23 operates in the motion compensation circuit 22 in accordance with the switching signal output from the control circuit 29. The generated predicted image data is switched so as to be output to the subtraction circuit 11 and the addition circuit 19, respectively.
[0044]
Thereby, the subtraction result output from the subtraction circuit 11 becomes differential image data obtained by using the reference data when the image data is encoded as an intra picture. The subtraction result is difference image data obtained by using predicted image data when the image data is encoded as a non-intra picture.
[0045]
The encoding circuit 3 includes a variable length encoding circuit 14, a multiplexing circuit 15, a buffer 16, and a rate control circuit 24. The variable length encoding circuit 14 does not distinguish between the image data input to the preprocessing circuit 10 according to the picture type, that is, the input image data is encoded as an intra picture and is encoded as a non-intra picture. The same variable length encoding process is performed on the output data of the quantization circuit 13 without distinction between the case and the case.
[0046]
The multiplexing circuit 15 includes encoded data (such as DCT coefficients, quantization values of the quantization circuit 13 and picture type) output from the variable-length encoding circuit 14, motion vectors, reference data indicating predetermined values, and the like. Are to be multiplexed. The buffer 16 temporarily holds the output data of the multiplexing circuit 15 and outputs it as a stream at a predetermined bit rate. The rate control circuit 24 monitors the data occupation state in the buffer 16 and controls the quantization value of the quantization circuit 13 according to the data occupation state.
[0047]
Next, the operation of the image coding apparatus configured as described above will be described.
[0048]
FIG. 4 is a flowchart showing an encoding process by the image encoding apparatus shown in FIG. When input image data YY that is image data to be encoded is input to the dividing circuit 1, in step B1, the dividing circuit 1 divides the input image data YY into basic layer image data Y1 and higher layer image data Y2. To do. Then, the dividing circuit 1 outputs the basic layer image data Y1 to the encoding circuit 2, and outputs the higher layer image data Y2 to the encoding circuit 3.
[0049]
In step B2, the encoding circuit 2 operates in the same manner as the conventional encoding circuits 171 and 172, and encodes the base layer image data Y1. That is, when the base layer image data Y1 output from the dividing circuit 1 is encoded as an intra picture, the encoding circuit 2 performs encoding on the base layer image data Y1. On the other hand, when the base layer image data Y1 is encoded as a non-intra picture, the encoding circuit 2 performs encoding on the difference image data obtained by using the base layer image data Y1 and the predicted image data.
[0050]
On the other hand, in step B3, the encoding circuit 3 performs encoding on the higher layer image data Y2 output from the dividing circuit 1 as follows.
[0051]
The preprocessing circuit 10 rearranges the input higher layer image data Y2 in a predetermined encoding order, and converts the rearranged higher layer image data Y2 into a plurality of block data. The motion vector detection circuit 21 detects a motion vector based on the higher layer image data Y2 output from the preprocessing circuit 10 and the reference image data stored in the frame memory 20. The motion compensation circuit 22 performs motion compensation on the reference image data based on the motion vector detected by the motion vector detection circuit 21.
[0052]
When it is determined that the higher hierarchy image data Y2 is to be encoded as a non-intra picture, the control circuit 29 switches the switch 23 so that the reference image data generated in the motion compensation circuit 22 is supplied to the subtraction circuit 11 as predicted image data. .
[0053]
On the other hand, when it is determined that the higher hierarchy image data Y2 is to be encoded as an intra picture, the control circuit 29 switches the switch 23 so that reference data indicating a predetermined value supplied from the outside is supplied to the subtraction circuit 11.
[0054]
The subtraction circuit 11 subtracts either the predicted image data or the reference data from the high-order hierarchical image data Y2, and outputs the subtraction result (difference image data) to the DCT circuit 12. The DCT circuit 12 obtains a DCT coefficient by performing DCT on the subtraction result from the subtraction circuit 11. The quantization circuit 13 quantizes the DCT coefficient acquired by the DCT circuit 12, and outputs the quantized DCT coefficient to the variable length coding circuit 14 and the inverse quantization circuit 17, respectively. The rate control circuit 24 monitors the data occupation state in the buffer 16 and controls the quantization value of the quantization circuit 13 according to the data occupation state.
[0055]
The inverse quantization circuit 17 performs inverse quantization on the DCT coefficient quantized by the quantization circuit 13. The inverse DCT circuit 18 performs inverse DCT on the DCT coefficients inversely quantized by the inverse quantization circuit 17, thereby restoring the image data. The adding circuit 19 adds the restored image data and either the predicted image data or the reference data. The frame memory 20 stores the addition result of the addition circuit 19 as reference image data.
[0056]
The variable length encoding circuit 14 encodes the DCT coefficient quantized by the quantization circuit 13 based on a predetermined encoding process, regardless of the picture type of the higher layer image data Y2. The multiplexing circuit 15 includes encoded data (such as DCT coefficients, quantization values of the quantization circuit 13 and picture type) output from the variable-length encoding circuit 14, motion vectors, reference data indicating predetermined values, and the like. Is multiplexed. These multiplexed data are once held in the buffer 16 and then output as a stream at a predetermined bit rate.
[0057]
Next, an image decoding apparatus that decodes the image data encoded as described above will be described.
[0058]
The image decoding apparatus shown in FIG. 2 includes decoding circuits 5 and 6 and an adding circuit 7. The decoding circuit 5 decodes a stream related to the encoded base layer image data Y1. The decoding circuit 6 is adapted to decode a stream related to the encoded higher layer image data Y2. The adder circuit 7 adds the base layer image data Y1 decoded by the decoder circuit 5 and the higher layer image data Y2 decoded by the decoder circuit 6, and restores the addition result as input image data YY. ing.
[0059]
FIG. 5 shows the configuration of the decoding circuit 5 shown in FIG. The decoding circuit 5 includes a buffer 40, a separation circuit 41, a variable length decoding circuit 42, an inverse quantization circuit 43, and an inverse DCT circuit 44. The buffer 40 temporarily holds a stream related to the encoded basic layer image data Y1. This stream includes encoded data (DCT coefficients, quantized values, and picture types), motion vectors, and the like. The separation circuit 41 is configured to separate streams held in the buffer 40. The variable length decoding circuit 42 performs variable length decoding on the encoded data separated by the separation circuit 41. The inverse quantization circuit 43 performs inverse quantization on the output data of the variable length decoding circuit 42. The inverse DCT circuit 44 performs inverse DCT on the output data of the inverse quantization circuit 43.
[0060]
The decoding circuit 5 includes an addition circuit 45, a frame memory 47, a motion compensation circuit 48, a switch 49, and a determination circuit 54. The adder circuit 45 adds the output data of the inverse DCT circuit 44 and the predicted image data. The frame memory 47 stores the addition result of the addition circuit 45 as reference image data. The motion compensation circuit 48 performs motion compensation on the reference image data stored in the frame memory 47 based on the motion vector separated by the separation circuit 41, and generates reference image data for motion compensation as predicted image data. It is supposed to be. The determination circuit 54 determines the picture type (intra picture or non-intra picture) separated by the separation circuit 41, and switches the switch 49 according to the determination result.
[0061]
When the determination circuit 54 determines that the encoded base layer image data Y1 is an intra picture, the switch 49 sets the data “0” to the addition circuit 45 in accordance with the switching signal output from the determination circuit 54. It can be switched to output. When the determination circuit 54 determines that the encoded base layer image data Y1 is a non-intra picture, the switch 49 is generated in the motion compensation circuit 48 in response to the switching signal output from the determination circuit 54. The predicted image data is switched so as to be output to the adding circuit 45.
[0062]
Further, the decoding circuit 5 converts the block scan format block data supplied from the addition circuit 45 into the raster scan format image data, rearranges the converted image data in a predetermined order, and outputs the data. A post-processing circuit 46 is included.
[0063]
FIG. 6 shows the configuration of the decoding circuit 6 shown in FIG. When the encoded higher layer image data Y2 is an intra picture, the decoding circuit 6 performs a decoding process using reference data indicating a predetermined value included in the stream held in the buffer 40. Except for this point, it is configured similarly to the decoding circuit 5 shown in FIG. 5 and operates in the same manner.
[0064]
That is, when the encoded higher layer image data Y2 is an intra picture, the stream temporarily held in the buffer 40 includes reference data indicating a predetermined value. Therefore, the separation circuit 41 separates the reference data from this stream and supplies the separated reference data to the switch 50. When the determination circuit 54 determines that the encoded higher-level image data Y2 is an intra picture, the switch 50 is separated by the separation circuit 41 in accordance with the switching signal output from the determination circuit 54. The reference data is switched so as to be output to the adder circuit 45.
[0065]
Here, the decoding circuit 5 corresponds to a specific example of “first decoding means” of the present invention, and the decoding circuit 6 corresponds to a specific example of “second decoding means” of the present invention.
[0066]
Next, the operation of the image decoding apparatus configured as described above will be described.
[0067]
FIG. 7 is a flowchart showing a decoding process by the image decoding apparatus shown in FIG. When the stream related to the encoded base layer image data Y1 is supplied, in step C1, the decoding circuit 5 decodes the stream to restore the base layer image data. That is, the buffer 40 temporarily holds a stream related to the encoded base layer image data Y1. The separation circuit 41 separates the streams held in the buffer 40. Then, the separation circuit 41 supplies the motion vector separated from the stream to the motion compensation circuit 48 and supplies the encoded data separated from the stream to the variable length decoding circuit 42.
[0068]
The variable length decoding circuit 42 performs variable length decoding on the encoded data separated by the separation circuit 41. The inverse quantization circuit 43 performs inverse quantization on the output data of the variable length decoding circuit 42. The inverse DCT circuit 44 performs inverse DCT on the output data of the inverse quantization circuit 43.
[0069]
When it is determined that the encoded base layer image data Y1 is an intra picture, the determination circuit 54 switches the switch 49 so that the data “0” is supplied to the addition circuit 45. The adder circuit 45 adds the data “0” and the output data of the inverse DCT circuit 44 and supplies the addition result to the post-processing circuit 46 and the frame memory 47, respectively.
[0070]
On the other hand, when the determination circuit 54 determines that the encoded base layer image data Y1 is a non-intra picture, the motion compensation circuit 48 stores it in the frame memory 47 based on the motion vector separated by the separation circuit 41. Motion compensation is performed on the reference image data that has been processed, and reference image data for motion compensation is generated as predicted image data. The determination circuit 54 switches the switch 49 so that the predicted image data output from the motion compensation circuit 48 is supplied to the addition circuit 45. The adder circuit 45 adds the predicted image data output from the motion compensation circuit 48 and the output data of the inverse DCT circuit 44, and supplies the addition result to the post-processing circuit 46 and the frame memory 47, respectively.
[0071]
The post-processing circuit 46 converts the block scan format block data, which is the addition result supplied from the addition circuit 45, into raster scan format image data, and outputs the converted image data in a predetermined order. This output image data becomes the restored basic layer image data. This basic layer image data is also supplied to the adder circuit 7.
[0072]
On the other hand, when a stream related to the encoded higher layer image data Y2 is supplied, in step C2, the decoding circuit 6 decodes the stream to restore the higher layer image data. That is, the buffer 40 temporarily holds a stream related to the encoded higher hierarchical image data Y2. When the encoded higher layer image data Y2 is an intra picture, the stream held in the buffer 40 includes reference data indicating a predetermined value. Therefore, the separation circuit 41 separates this reference data from the stream and supplies it to the switch 50.
[0073]
Here, when it is determined that the encoded higher layer image data Y2 is an intra picture, the determination circuit 54 switches the switch 50 so that the reference data is supplied to the addition circuit 45. The adder circuit 45 adds the reference data and the output data of the inverse DCT circuit. In other respects, the decoding circuit 6 operates in the same manner as the decoding circuit 5 to restore the higher layer image data and outputs the higher layer image data to the addition circuit 7.
[0074]
In step C3, the adding circuit 7 adds the basic layer image data output from the decoding circuit 5 and the higher layer image data output from the decoding circuit 6, and restores the addition result as input image data.
[0075]
As described above, in the present embodiment, reference data other than zero is used even when, for example, higher-layer image data is encoded as an intra picture among image data of a plurality of layers divided in the hierarchical encoding method. Encoding is performed on difference image data having a small data component obtained by subtraction using. Therefore, it is possible to improve the coding efficiency by reducing the code amount of the higher layer image data, thereby improving the coding efficiency of the entire input image data. Since the high-level image data encoded in this way is decoded based on the reference data, high-level image data with good reproducibility can be obtained.
[0076]
(Second Embodiment)
FIG. 8 shows the configuration of the encoding circuit of the image encoding device according to the present embodiment, and FIG. 9 shows the configuration of the decoding circuit of the image decoding device according to the present embodiment. The image coding apparatus according to the present embodiment stores in advance reference data that is used when high-level image data is coded as an intra picture. In addition, the image decoding apparatus according to the present embodiment is configured to store in advance reference data used for decoding when the encoded higher layer image data is an intra picture. Others are configured in the same manner as in the first embodiment and operate in the same manner.
[0077]
The image encoding method and the image decoding method according to the present embodiment are embodied by the image encoding device and the image decoding device according to the present embodiment, and will be described below. Here, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted here.
[0078]
The encoding circuit shown in FIG. 8 corresponds to the encoding circuit 3 shown in FIG. 1, further includes an intra-picture frame memory 25, and performs encoding on high-level image data. . The intra-picture frame memory 25 stores in advance reference data indicating a value that minimizes the code amount when encoding the higher layer image data. In addition, this encoding circuit is provided with a switch 26 instead of the switch 23.
[0079]
When the encoding circuit shown in FIG. 8 determines that the higher layer image data is to be encoded as an intra picture, the control circuit 29 stores the reference data stored in advance in the intra picture frame memory 25 in the subtraction circuit 11. Switch 26 is switched so that it is supplied. The subtraction circuit 11 obtains difference image data by subtracting the reference data from the output data (higher layer image data) of the preprocessing circuit 10. Thereafter, the difference image data is encoded in the same manner as in the first embodiment.
[0080]
Further, the decoding circuit shown in FIG. 9 corresponds to the decoding circuit 6 shown in FIG. 1, and further includes an intra-picture frame memory 51 as compared with the decoding circuit shown in FIG. Decoding is performed on the high-level image data that has been processed. The intra picture frame memory 51 stores in advance reference data having the same contents as the reference data stored in the intra picture frame memory 25 in the encoding circuit shown in FIG. The decoding circuit is provided with a switch 52 instead of the switch 50.
[0081]
When the decoding circuit shown in FIG. 9 determines that the encoded higher layer image data is an intra picture, the determination circuit 54 adds reference data stored in advance in the intra picture frame memory 51. The switch 52 is switched so as to be supplied to the circuit 45. The adder circuit 45 adds the reference data and the output data of the inverse DCT circuit 44, and outputs the addition result to the post-processing circuit 46 and the frame memory 47. The post-processing circuit 46 restores the higher hierarchy image data of the intra picture based on the addition result from the addition circuit 45.
[0082]
As described above, in the present embodiment, when high-level image data is encoded as an intra picture, encoding related to high-level image data using reference data stored in advance in the encoding circuit and the decoding circuit, respectively. Since the decoding is performed, it is possible to save the trouble of transmitting the reference data itself from the encoding circuit to the decoding circuit.
[0083]
In the present embodiment, the reference data is stored in advance in the encoding circuit and the decoding circuit, respectively. For example, when encoding high-level image data, the reference data is first encoded. When the encoded higher layer image data is decoded, the encoded reference data may be first decoded and stored in the intra picture frame memory in the decoding circuit.
[0084]
(Third embodiment)
FIG. 10 shows the configuration of the encoding circuit of the image encoding apparatus according to the present embodiment. The image coding apparatus according to the present embodiment is configured to calculate an average pixel value of high-level image data as reference data when high-level image data is encoded as an intra picture. Others are configured in the same manner as in the first embodiment and operate in the same manner.
[0085]
The image coding method according to the present embodiment is embodied by the image coding apparatus according to the present embodiment, and will be described below. Here, the same components as those of the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted here.
[0086]
The encoding circuit illustrated in FIG. 10 corresponds to the encoding circuit 3 illustrated in FIG. 1, and is compared with the encoding circuit illustrated in FIG. 3, the average pixel value of the output data of the preprocessing circuit 10. It further includes an average pixel value calculation circuit 27 that calculates (average value of all the pixels of the higher layer image data) as reference data, and performs encoding on the higher layer image data. Further, this encoding circuit is provided with a switch 28 instead of the switch 23.
[0087]
In the encoding circuit shown in FIG. 10, when the higher layer image data is encoded as an intra picture, the average pixel value calculation circuit 27 calculates the average pixel value of the output data (higher layer image data) of the preprocessing circuit 10. To do. The control circuit 29 switches the switch 28 so that the average pixel value calculated by the average pixel value calculation circuit 27 is supplied to the subtraction circuit 11. The subtraction circuit 11 acquires difference image data by subtracting the average pixel value from the output data of the preprocessing circuit 10. Then, similarly to the case of the first embodiment, the difference image data is encoded.
[0088]
The average pixel value calculation circuit 27 outputs the calculated average pixel value to the multiplexing circuit 15. The multiplexing circuit 15 multiplexes the average pixel value together with the encoded data of the higher layer image data and outputs the multiplexed result.
[0089]
The high-level image data encoded in this way is decoded by the decoding circuit shown in FIG. In this case, the separation circuit 53 separates the average pixel value from the stream held in the buffer 40 and supplies the separated average pixel value to the switch 50. As a result, this average pixel value can be used when decoding the higher-level image data of the encoded intra picture.
[0090]
As described above, in the present embodiment, when high-level image data is encoded as an intra picture, the average pixel value is calculated and used, and the calculated pixel average value is multiplexed and output. Therefore, encoding can be performed with the data amount reduced optimally according to the properties of the image data. When the encoded higher layer image data is an intra picture, decoding on the higher layer image data is performed using the average pixel value output by multiplexing. Therefore, it is possible to save the trouble of preparing the average pixel value as reference data in advance.
[0091]
As mentioned above, although several embodiment of this invention was described, this invention is not limited to said embodiment, A various deformation | transformation is possible.
[0092]
For example, in the present invention, in the hierarchical encoding method, the image data to be encoded is divided into a plurality of layers of image data (basic layer image data and higher layer image data), and the higher layer image data is encoded as an intra picture. In this case, encoding is performed on the high-level image data using the reference data. However, even when image data with few data components is encoded as an intra picture, if such reference data is used, the encoding efficiency can be improved.
[0093]
In the present invention, encoding is performed on image data in a hierarchy in which image data to be encoded is divided for different frequency components. For example, encoding is performed on image data in a hierarchy divided for each color component. You may do it.
[0094]
【The invention's effect】
  As explained above, from claim 14The image encoding device according to claim 1, or the claim5According to the image encoding method described in the above, the image data to be encoded is, Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataDivide into multiple levels of image data, and the divided multiple levels of image dataHigh-level image dataIs encoded as an intra picture,Encode differential image data obtained by subtracting non-zero reference data from high-order hierarchical image dataSo I did thisHigher hierarchyThere is an effect that the encoding efficiency of the image data can be improved.
[0095]
  ClaimsAny one of 6-9Or an image decoding device according to claim 110According to the image decoding method described in the above, the image data to be encoded is, Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataIf the image data is divided into multiple layers and encoded,Obtained by encoding base layer image dataWhile decoding the first encoded data, the second encoded data different from the first encoded data isObtained by encoding difference image data obtained by subtracting non-zero reference data from high-level image dataWhen the image data is an intra pictureThe second encoded data is decoded by adding the reference data in the process of decoding the second encoded data.Since it did in this way, there exists an effect that image data with sufficient reproducibility can be obtained from this 2nd code data.
[0096]
  ClaimsAny one of 11 to 14According to the image processing apparatus described in the above, the image data to be encoded is, Including basic hierarchical image data and higher hierarchical image data obtained by subtracting basic hierarchical image data from encoding target image dataDivide into multiple levels of image data, and the divided multiple levels of image dataHigh-level image dataIs encoded as an intra picture, Encoding differential image data obtained by subtracting non-zero reference data from high-order hierarchical image dataWithThe encoded high-level image data is decoded by adding the reference data in the process of decoding the encoded high-level image data.I did soHigher hierarchyThe encoding efficiency of image data can be improved and the reproducibility is goodHigher hierarchyThere is an effect that image data can be obtained.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an image coding apparatus of a hierarchical coding system according to a first embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration of an image decoding apparatus using a hierarchical coding scheme according to the first embodiment of the present invention.
3 is a block diagram showing a configuration of an encoding circuit shown in FIG. 1. FIG.
4 is a flowchart showing encoding processing by the image encoding device shown in FIG. 1; FIG.
5 is a block diagram showing a configuration of a decoding circuit shown in FIG. 2. FIG.
6 is a block diagram showing a configuration of a decoding circuit shown in FIG. 2. FIG.
7 is a flowchart showing decoding processing by the image decoding apparatus shown in FIG.
FIG. 8 is a block diagram showing a configuration of an encoding circuit of an image encoding device according to a second embodiment of the present invention.
FIG. 9 is a block diagram showing a configuration of a decoding circuit of an image decoding apparatus according to a second embodiment of the present invention.
FIG. 10 is a block diagram showing a configuration of an encoding circuit of an image encoding device according to a third embodiment of the present invention.
FIG. 11 is a block diagram illustrating a configuration of a conventional image encoding apparatus using a hierarchical encoding method.
12 is a block diagram showing a configuration of the encoding circuit shown in FIG. 11. FIG.
13 is a flowchart showing an encoding process by the variable length encoding circuit shown in FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Dividing circuit, 1a ... Image processing circuit, 1b, 11 ... Subtraction circuit, 2, 3 ... Encoding circuit, 5, 6 ... Decoding circuit, 7, 19, 45 ... Adder circuit, 10 ... Pre-processing circuit, 12 ... DCT circuit, 13 ... Quantization circuit, 14 ... Variable length coding circuit, 15 ... Multiplexing circuit, 16, 40 ... Buffer, 17, 43 ... Inverse quantization circuit, 18, 44 ... Inverse DCT circuit, 20, 47 ... Frame memory, 21 ... motion vector detection circuit, 22, 48 ... motion compensation circuit, 23, 26, 28, 49, 50, 52 ... switch, 24 ... rate control circuit, 25, 51 ... frame memory for intra picture, 27 ... Average pixel value calculation circuit 29... Control circuit 41, 53... Separation circuit 42. Variable length decoding circuit 46.

Claims (14)

Dividing means for dividing image data to be encoded into image data of a plurality of hierarchies including basic hierarchy image data and higher hierarchy image data obtained by subtracting the basic hierarchy image data from the image data to be encoded When,
The case of encoding as an intra picture the higher hierarchy image data in the image data of the plurality of divided hierarchies by dividing means, the difference image data obtained by subtracting the reference data other than zero from the higher hierarchy image data picture image encoding apparatus and a coding means for encoding. Furthermore, a storage means for storing the reference data is provided .
Image encoding apparatus 請 Motomeko 1 wherein. Furthermore, a calculation means for calculating an average pixel value of the higher hierarchy image data as the reference data is provided .
Image encoding apparatus 請 Motomeko 1 wherein. Furthermore, a multiplexing means for multiplexing and outputting the average pixel value calculated by the calculation means together with the encoded data of the higher layer image data obtained by the encoding means is provided.
The image encoding device according to claim 3. Dividing the image data to be encoded into image data of a plurality of layers including basic layer image data and high-order layer image data obtained by subtracting the base layer image data from the image data to be encoded; ,
When encoding the higher layer image data of the plurality of layers of image data divided from the image data to be encoded as an intra picture, it is obtained by subtracting reference data other than zero from the higher layer image data. steps and the including images coding method for coding a difference image data to be. The image data to be encoded is encoded by dividing the image data into a plurality of layers including base layer image data and higher layer image data obtained by subtracting the base layer image data from the image data to be encoded. An apparatus for decoding encoded data obtained by converting to
First decoding means for decoding first encoded data obtained by encoding the base layer image data ;
Second encoded data different from the first encoded data is an intra picture obtained by encoding differential image data obtained by subtracting non-zero reference data from the higher hierarchical image data . If it is the image data, images of the by adding the reference data in the second step of decoding the coded data, and a second decoding means for decoding said second coded data Decoding device. Furthermore, a storage means for storing the reference data is provided.
The image decoding apparatus according to claim 6. The reference data is an average pixel value of the higher layer image data.
The image decoding apparatus according to claim 6. The second decoding means uses the average pixel value when decoding the second encoded data by extracting the average pixel value from the second encoded data.
The image decoding apparatus according to claim 8. The image data to be encoded is encoded by dividing the image data into a plurality of layers including base layer image data and higher layer image data obtained by subtracting the base layer image data from the image data to be encoded. A method for decoding encoded data obtained by converting to
Decoding first encoded data obtained by encoding the base layer image data ;
Second encoded data different from the first encoded data is an intra picture obtained by encoding differential image data obtained by subtracting non-zero reference data from the higher hierarchical image data . If it is the image data, the second by 2 in the process of decoding the coded data thereby adding the reference data, the second step and the including images decoding method for decoding coded data. The image data to be encoded is divided into image data of a plurality of layers including basic layer image data and high-order layer image data obtained by subtracting the base layer image data from the image data to be encoded. when encoding the higher hierarchy image data in the image data of a plurality of hierarchies obtained by the intra-picture, coding for encoding the difference image data obtained by subtracting the reference data other than zero from the higher hierarchy image data Means,
By adding the reference data in the process of decoding the higher hierarchy image data encoded by said encoding means, images processing device and a decoding means for decoding the high hierarchical image data encoded . Each of the encoding means and the decoding means has storage means for storing the reference data.
The image processing apparatus according to claim 11. The encoding means encodes the reference data first when encoding the higher layer image data,
The decoding means is obtained by first decoding and decoding the reference data encoded by the encoding means when decoding the high-level image data encoded by the encoding means. Store the reference data
The image processing apparatus according to claim 11. The encoding means includes calculation means for calculating an average pixel value of the high-order hierarchical image data as the reference data.
The image processing apparatus according to claim 11.

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