JP4217706B2 - Image processing apparatus and image processing method - Google Patents

Description

  The present invention relates to an image processing apparatus and an image processing method, and more particularly to an image processing apparatus and an image processing method for improving edge jaggies in image data subjected to pseudo halftone processing without cost.

  Specifically, it is intended for electrophotographic process copiers and printers, but it can also be applied to devices using other processes such as inkjet printers and displays.

  Conventionally, several techniques for improving jaggies generated in a low-resolution printer in an image processing apparatus have been proposed.

  The jaggy here refers to rattling that occurs at the edge of a character. This is shown in FIG.

  FIG. 14 is a schematic diagram for explaining a character processing state in a conventional image processing apparatus, and shows a state in which rattling occurs at, for example, an edge portion of a character.

  In FIG. 14, each of the squares shown corresponds to one pixel, and in this example, the density is 300 dpi, and the portion indicated by “L” indicates the above-described jaggy. Here, 15 “L” characters are shown.

  With respect to such jaggies, in the conventional technique, pattern matching is performed, and image data is added to a portion that matches the pattern or pixels that cause jaggies are removed to improve backlash.

  The details of the pattern matching here are well-known techniques, and thus detailed description thereof is omitted.

  FIG. 15 is a schematic diagram for explaining a character processing state in a conventional image processing apparatus, and shows an example in which, for example, rattling that occurs at an edge portion of a character, that is, jaggy is improved.

  FIG. 15A shows a state in which halftone data is added to pixels matched by pattern matching. Halftone data is added to the location indicated by the “L” character. Particularly in a printer having an electrophotographic process, there is an effect that the image quality can be greatly improved only by adding such halftone data to the jaggy.

  On the other hand, FIG. 15B shows a state in which pixel-divided data is added to pixels matched by pattern matching.

  Here, the pixel division is a technique in which one pixel of 300 dpi is divided into a plurality of portions and dots are partially formed. Here, a case where the image is vertically divided is shown as an example. Since the technique of pixel division is also known, detailed description thereof is omitted here.

  As described above, examples of the smoothing process described above include adding a halftone dot or a pixel dividing dot to the jaggy. However, on the contrary, it is needless to say that processing for thinning a dark pixel in a jaggy portion, such as making a full dot into a halftone dot, or making a full dot into a pixel-divided dot, is also possible.

  Conventionally, a technique for improving the problems in this type of image processing apparatus is disclosed in Patent Document 1.

  On the other hand, a technique as shown in FIG. 16 is also known. This technique is for improving jaggy generated in pseudo halftone processing such as screen processing. This is a jaggy that occurs at a resolution lower than the resolution of the printer, and is an improvement over what cannot be improved by the method described above.

Specifically, the jaggy portion shown in FIG. 6A is generated by an image forming method such as a screen, and image quality degradation has occurred at a resolution coarser than the printer resolution (here, 300 dpi). . As shown in FIG. 5B, jaggy is improved by placing (outputting) halftone dots (halftone data) at the edge portion.
Japanese Patent Laid-Open No. 10-42141

  By the way, when the resolution of the printer is increased, the jaggy due to the resolution of the printer as described above becomes almost no problem. That is, when the resolution of the printer is about 600 dpi or 1200 dpi, the level of jaggies that can be identified decreases.

  However, jaggy caused by an image forming method such as a screen method is easily recognized even when the printer resolution is increased. In the case of screen processing, the screen resolution (number of lines) is expressed in a pseudo manner by forming dots in which a plurality of pixels are concentrated using a pattern generally called a fatning type. . Therefore, a screen resolution (number of lines) higher than the resolution of the printer is not used. For example, when outputting image data screen-processed by a printer having a resolution of 600 dpi, the screen resolution (number of lines) is generally about 133 lines to 175 lines, and at most about 268 lines. This is also because if a screen having a higher number of lines is used, a stable image quality cannot be obtained due to the characteristics of the electrophotographic printer. The unit of the number of lines is generally defined as LPI (Lines Per Inch).

  Therefore, as a technique for improving the jaggy generated by the latter image forming method, there is a method of placing a halftone dot at the edge portion described above. However, since this method is complicated in computation and requires a lot of memory, the cost of an apparatus equipped with a technique for realizing this method tends to increase. For this reason, in order to be able to be mounted on a low-cost electrophotographic printer, MFP, etc., a method capable of improving the jaggy described above with a simpler configuration is required.

  The present invention has been made in view of the above situation, and an object thereof is to improve jaggy generated by an image forming method with a simple configuration.

An image processing apparatus according to an aspect of the present invention that achieves the above object includes first image data, second image data obtained by performing pseudo halftone processing on the first image data, and the first image data. An image processing apparatus for improving jaggy in the second image data based on attribute data representing an attribute of each pixel included in the image data,
Determination means for outputting a determination signal indicating whether or not to perform a smoothing process based on the attribute data;
Edge correction generating means for generating edge correction data from the first image data by performing a smoothing process according to the discrimination signal ;
Selecting means for comparing the pixel signal of the second image data with the pixel signal of the edge correction data output from the edge correction generating means and outputting a pixel signal having a higher density; .

That is, in the present invention, the first image data, the second image data obtained by performing pseudo halftone processing on the first image data, and the attribute representing the attribute of each pixel included in the first image data Based on the data, in order to improve jaggies in the second image data, based on the attribute data, output a determination signal indicating whether to perform the smoothing process, perform the smoothing process according to the determination signal , Edge correction data is generated from the first image data, the pixel signal of the second image data is compared with the pixel signal of the edge correction data output in the edge correction generation step, and a pixel signal having a higher density is obtained. Output.

The edge correction generation unit includes a smoothing unit that performs a smoothing process on pixels in a region of a predetermined size, and a predetermined size that includes the target pixel by quantizing the first image data with an arbitrary threshold value. it matches the pattern in the region of the output matching processing means for outputting the data from the smoothing means of the pixel of interest if they match, the determination signal and based on the first image data, the edge detection signal Edge detecting means that performs the detection, and adaptive smoothing means that outputs one of the pixel signal included in the second image data and the output signal of the matching processing means in accordance with the edge detection signal.

The adaptive smoothing processing means outputs the pixel signal included in the second image data when the edge detection signal is not output, and outputs the output signal of the matching processing means otherwise, or the output of the matching processing means Conversion means for converting the signal into a predetermined number of bits with reference to a lookup table may be included.

Edge detection means compares the predetermined and the sum of the pixel values in the region of a predetermined size including a target pixel threshold, when the sum of the pixel values is less than the threshold, outputs an edge detection signal May be.

  When the bit number of the pixel signal of the second image data and the pixel signal of the edge correction data output from the edge correction generation unit are different, the selection unit packs “1” in the lower bits of the pixel signal with a small number of bits. The comparison may be made with the same number of bits.

The area having a predetermined size in the smoothing means and the matching processing means may be an area of 3 × 3 or more. Furthermore, a predetermined threshold value can be changed, and the degree of jaggy improvement may be adjusted by changing the predetermined threshold value.

  The above object can also be achieved by an image processing method having steps corresponding to each means of the above-described image processing apparatus.

  According to the present invention, jaggy generated by halftone processing can be improved with a simple configuration.

  This is effective for image data that has undergone image formation processing such as screen processing, image data that has image quality degradation at the edge, such as JPEG, and jaggies included in image data that has undergone error diffusion processing. Thus, image degradation can be reliably prevented.

  Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the components described in the following embodiments are merely examples, and are not intended to limit the scope of the present invention only to them.

<First Embodiment>
FIG. 2 is a schematic cross-sectional view showing a configuration example of a multi-function peripheral as an embodiment of the image processing apparatus according to the present invention. The multi-function peripheral includes a color scanner unit A and a printer unit B as a mechanical configuration. ing. Here, as a preferred embodiment, a multifunction apparatus with a scanner using an electrophotographic technique will be described, but the image data targeted by the present invention is an image signal representing vector information. An image signal representing vector information is not only PDL data sent from a computer such as a PC, but also primitive intermediate data generated by interpreting PDL, as well as a vectorized image signal read by a scanner. include. Note that PDL is an abbreviation for Page Description Language. These vector information are data for indicating various objects such as text and graphics, and are finally converted into bitmap data. In the following embodiments, a copying machine or a printer for an electrophotographic process is particularly targeted. However, the present invention can also be applied to a device using another process such as an ink jet or a display.

  In the color scanner section A shown in FIG. 2, the document feeder 201A feeds documents one by one from the last page onto the platen glass 202A. Then, after the original reading operation is finished, the original on the platen glass 202A is discharged. When the document is conveyed onto the platen glass 202A, the lamp 203A is turned on, and the scanner unit 204A on which the lamp 203A is mounted is moved to scan the document for exposure. Reflected light from the original by this scanning is guided to a CCD color image sensor (hereinafter simply referred to as “CCD”) 209A by mirrors 205A, 206A, 207A and a lens 208A.

  The reflected light incident on the CCD 209A is color-separated into three colors R, G, and B and read as a luminance signal for each color. Further, the luminance signal output from the CCD 209A is input to the image processing unit (see 304 in FIG. 3) as digital signal image data by A / D conversion. Then, after performing known image processing such as shading correction, gradation correction, quantization (N-value conversion), and smoothing processing, the image is transferred to the printer unit B (305).

  In the printer unit B shown in FIG. 2, the laser driver 221B drives the laser light emitting unit 201B, and the laser light emitting unit 201B emits laser light corresponding to the image data for each color output from the image processing unit 304. Let The laser beam is irradiated onto the photosensitive drum 202B, and a latent image corresponding to the laser beam is formed on the photosensitive drum 202B.

  Then, a toner as a developer is attached to the latent image portion of the photosensitive drum 202B by the developing unit 203B. In FIG. 2, only one developing device is shown for simplification, but toner is prepared for each color of C, M, Y, and K, and four developing devices are provided accordingly. Of course, it is provided. Further, instead of the above configuration, four sets of photosensitive drums, developing devices, and the like may be provided for each color.

  The recording paper is fed from either the cassette 204B or the cassette 205B at a timing synchronized with the start of the laser beam irradiation described above, and conveyed to the transfer unit 206B.

  Thereby, the developer attached to the photosensitive drum 202B can be transferred to the recording paper. The recording sheet to which the developer has been transferred is conveyed to the fixing unit 207B, and the developer is fixed to the recording sheet by the heat and pressure of the fixing unit 207B. Then, the recording paper that has passed through the fixing unit 207B is discharged by the discharge roller 208B, and the sorter 220B stores the discharged recording paper in a predetermined bin and sorts the recording paper.

  The sorter 220B stores the recording paper in the uppermost bin when the sorting is not set. When double-sided recording is set, the recording paper is conveyed to the discharge roller 208B, and then the rotation direction of the discharge roller 208B is reversed and guided to the refeed conveyance path by the flapper 209B. When multiple recording is set, the recording paper is guided to the refeed conveyance path 210B by the flapper 209B so as not to be conveyed to the discharge roller 208B. The recording sheet guided to the refeed conveyance path is fed to the transfer unit 206B at the timing described above.

  As is well known, the latent image and development processing and fixing for each color are realized by repeating the latent image formation and the like four times using the recording paper transport mechanism described above.

  Incidentally, reference numeral 314 denotes a network cable, which is a system generally called Ethernet (registered trademark). This allows information exchange and data transfer between connected units using a physical cable such as 10BaseT or 10Base5 by a protocol such as TCP / IP. Of course, it is not limited to wired using a network cable, and it goes without saying that a similar environment can be constructed even if wireless is used.

  PDL data, a display list, and the like transmitted from the host computer or the like via such a network cable 314 are received by a network signal receiving unit 315 as an interface provided in the printer. The network signal receiving unit 315 includes a rasterizing unit (not shown) that interprets data transmitted from the host computer and generates bitmap data in units of pixels indicating an image. Further, the PDL data or the display list holds data indicating attributes for each object such as text (characters), fluffy, and images. In the rasterizing unit, the attribute data is used to convert the image data into an image and also generate an image area signal for each pixel. The image area signal will be described in detail later.

  Then, the image data generated by the rasterizing unit is input to the image processing unit 304 as in the case of the data input from the image reading unit 309, and is input to the filter processing unit 1604 as indicated by the arrow. Image processing is executed. The image area signal is input to the smoothing processing unit 1605. In the case of color image data, density data for each color of CMYK is generated, and subsequent processing is executed for each color data.

  Note that the rasterizing unit may be provided outside the network signal receiving unit 315. In the present embodiment, a configuration for processing data received via this 314 will be described later.

  FIG. 3 is a block diagram illustrating the data processing configuration of the image processing apparatus included in FIG. 2, and the same components as those in FIG. 2 are denoted by the same reference numerals.

  In FIG. 3, the image reading unit 309 includes a lens 301, a CCD sensor 302, an analog signal processing unit 303, and the like. The document image 300 formed on the CCD sensor 302 via the lens 301 is converted into an analog electric signal by the CCD sensor 302. The converted image information is input to the analog signal processing unit 303 and subjected to analog-digital conversion (A / D conversion) after sample & hold, dark level correction, and the like.

  The digital signal thus converted is subjected to shading correction 401, color correction processing 402, filter processing 403, γ correction processing 404, image forming processing 405, smoothing processing 406, etc. in the image processing unit 304 shown in detail in FIG. Is performed in each part. Thereafter, the data is output to the printer 305. The image forming process 405 performs a process of converting input N-bit image data per pixel into an M-bit image per pixel. Specifically, in this embodiment, N is 8 and M is 4. The details of the image forming process are well-known processes and will not be described, but they refer to a screen (dither) process, an error diffusion process, and the like.

  Since processes other than the smoothing process 406 including the points of the present invention are also well known, the description thereof will be omitted.

  In FIG. 4, the signal from the network signal receiving unit 315 is connected behind the color correction process 402. This is based on the assumption that the signal received via the network is CMYK density data. Because it is. If the received signal is an RGB luminance signal, it is needless to say that the signal is connected before the color correction process 402 (not shown). Furthermore, when the signal received via the network is a PDL signal, it goes without saying that the signal is converted into a bitmap signal by the network signal receiving unit 315 and then input to the image processing unit 304. In these processes, the signal received via the network is precisely via the CPU 310, but here, the signal flow is shown in a simplified manner as shown in FIG.

  On the other hand, the printer 305 shown in FIG. 3 includes an exposure control unit (not shown) made of a laser or the like, an image forming unit (not shown), a transfer paper conveyance control unit (not shown), and the like. The recorded image signal is recorded on the transfer paper.

  The CPU circuit unit 310 includes a CPU 306, a ROM 307, a RAM 308, and the like, and controls the image reading unit 309, the image processing unit 304, the printer unit 305, the operation unit 313, and the like, and comprehensively controls the sequence of the multifunction peripheral. .

  The operation unit 313 is provided with a RAM 311 and a ROM 312 in advance, and is configured to be able to display characters on the UI, store and display information set by the user.

  Information set by the operation unit 313 by the user is sent to the image reading unit 309, the image processing unit 304, the printer 305, and the like via the CPU circuit unit 310.

  In the flow described above, the point of the present invention is included in the image processing unit 304. Hereinafter, the smoothing processing unit 406 in the image processing unit will be described. The following constituent elements are assumed to be realized by software, and are represented by programs created in C language, but these may have equivalent functions constructed by hardware or firmware. That is, even if each component or some components are configured using dedicated hardware such as ASIC, the same effect as that obtained by software can be obtained.

  FIG. 5 is a schematic block diagram for explaining the configuration of the smoothing processing unit 406 shown in FIG. 4. The same components as those in FIG. 4 are denoted by the same reference numerals.

  In FIG. 5, only processing for one color (ImageData) is shown, but as shown in FIG. 4, data for four colors is input to this processing. In other words, each CMYK color is processed independently, and processing for one of the colors is shown.

  First, a schematic operation flow of the smoothing processing unit 406, which is a point of the present invention, will be described with reference to FIG.

  The smoothing processing unit 406 includes the upper 3 bits of N = 8 bits, which are signals before image forming processing (for example, pseudo halftone processing such as screen processing), an image area signal 4 bits indicating the attribute of each pixel, and image formation The processed signal M = 4 bits is input. Here, the signal before image formation processing is represented by ImageData (first image data), the image area signal is represented by AttributeData (attribute data), and the signal after image formation processing is represented by ScreenData (InDataS) (second image data). Yes.

  The image area signal (AttributeData) is data indicating which attribute corresponds to which attribute among the image attributes such as text (character), image (photo), and graphic. This signal is 4 bits, and is converted into an 8-bit image area signal by an attribute decoder 510 as described later.

  A determination unit (make_ZSG_sig) 501 serving as a determination unit generates a determination signal (OutDataZ) that is a basis for determining whether to perform smoothing processing. Then, after a smoothing process corresponding to the discrimination signal is performed by a process execution unit (make_AST_sig) 502 as an edge correction generation unit, the output is compared with ScreenData by a selector 503 as a selection unit. The pixel data value subjected to the smoothing process according to the discrimination signal and the data having the higher pixel value out of the ScreenData values are output as output data (OutputData).

  Hereinafter, the process in each part of the smoothing process part 406 mentioned above is demonstrated in detail.

  FIG. 6 is a diagram for explaining processing performed by the attribute decoding unit 510 shown in FIG. The part indicated by 601 (Attribute Decoder input) in FIG. 6A is attribute data (AttributeData) input to the attribute decoding unit. Each bit of the input signal 601 indicates line thickness, presence / absence of an object, and attributes such as character / non-character and vector / non-vector. For example, bit 4 is a flag indicating the thickness of a line or character, bit 5 is a flag indicating the presence or absence of an object, bit 2 is a flag indicating a character / non-character, bit 0 is a flag indicating a vector / non-vector, and the like. The reason why the four bits are not arranged in order from bit0 to bit3 is that the signal is arbitrarily selected from signals having four or more bits.

  Based on these signals, an attribute decoding unit 510 generates an 8-bit signal. The details of the signal generated in the present embodiment are as shown in the table of FIG. 6B, but when only the points are written out, they are as follows.

ImageType0: 00000001 (0x01): Not used
ImageType1: 00000010 (0x02): Not used
ImageType2: 00000100 (0x04): Graphic
ImageType3: 00001000 (0x08): Line
ImageType4: 00010000 (0x10): Character
ImageType5: 00100000 (0x20): Small graphic
ImageType6: 01000000 (0x40): Thin line
ImageType7: 10000000 (0x80): small character Here, the character REOS in the table of (b) means that the line and the character are thin / small. This thin / small indicates the determination result already made by the printer driver provided in the host computer that generates image data such as PDL and transmits it to the printer. It goes without saying that the threshold value determined to be thin / small is arbitrary depending on the setting of the printer driver. Further, the network signal receiving unit 315 may be configured to determine.

  As described above, the attribute decoding unit (AttributeDecoder) 510 includes a table conversion memory that converts a 4-bit input into an 8-bit output.

  Next, the operation of the determination unit (make_ZSG_sig) 501 will be described with reference to FIGS. FIG. 7A is a block diagram showing input / output signals, and FIGS. 7B and 7C show examples in which the processing in the determination unit 501 is described in a program language (C language).

  As shown in FIG. 7A, the discrimination unit 501 of the present embodiment includes an 8-bit signal (AttributeDec.) Output from the attribute decoding unit (AttribureDecoder) 510 (described as attrdec in the program of FIG. 7B). Sig.) And a high-order 3-bit signal InData (= InData ′) of ImageData that is a signal before image formation processing, a discrimination signal (OutDataZ) is generated by processing as shown in FIG. 7B. Note that reg_atb is a mode selector (register).

  With respect to the InData signal, in the part indicated by A in FIG. 7B, processing for controlling the determination signal (OutDataZ) according to the magnitude relationship is performed in comparison with an arbitrary numerical value (register: reg_Zcheck). In addition, for the AttibuteDecoder signal, processing for controlling the discrimination signal (OutDataZ) is performed in the part indicated by B in FIG. 7B in accordance with an arbitrary object. In FIG. 7B, ThinJudge is a register, and from this, it is possible to perform control so that smoothing processing is performed only on an arbitrary object having an arbitrary density or higher. For example, it is possible to perform control such as performing a smoothing process only on characters having a certain value or more.

  By the way, the determination unit 501 of the present embodiment is not limited to this control, and is configured to be capable of some other control. These controls are switched in accordance with the signal of the mode selector (register reg_atb) described above.

  For example, in the part indicated by C in FIG. 7C, when reg_atb = 1, the determination signal (OutDataZ) is controlled only according to the magnitude of the signal (InData) before image formation. Needless to say, it can be arbitrarily controlled according to reg_Zcheck (register).

  In the portion indicated by D in FIG. 7C, when reg_atb = 2, the determination signal (OutDataZ) is controlled only in accordance with the magnitude of the image-formed signal (InDataS). Similarly, this can be arbitrarily controlled according to reg_air (register).

  Finally, the processing when the value of the register reg_atb is other is the part indicated by E in FIG. 7C. Since all the output signals are 0, this is prepared for realizing the through output while maintaining the output phase (timing) of this processing.

  Next, the process execution unit (make_AST_sig) 502 will be described with reference to FIG. 1 includes the selector 503 for convenience of explanation. This part is the block having the greatest cost reduction effect as compared with the conventional example.

  As shown in FIG. 1, the processing execution unit (make_AST_sig) 502 includes a 1-bit determination signal (OutDataZ) generated by the above-described determination unit (make_ZSG_sig), and a high-order 3 bit signal (InData) before image formation processing. In addition, a 4-bit signal (InDataS) after image formation processing (for example, after pseudo halftone processing such as screen processing) is input, and a 4-bit signal is output. Each of these three signals is input to FiFo memories 521 to 523 as shown in the figure, and is delayed by a predetermined number of lines. In this embodiment, the size of this memory is greatly reduced as compared with the conventional case. Furthermore, the processing system is simplified while maintaining the same effect as the conventional one.

  Then, the discrimination signal (OutDataZ) and the upper 3 bits signal (InData) before the image forming process are input to the reproduction unit (Zexistence) 524 via the FiFo memories 521 and 522, and only the signal at the edge portion is reproduced. . Then, according to the output of the selection unit (make_select_sig) 525, the selector (selector) 503 selects and outputs either the 4-bit signal (InDataS) after the image forming process or the output signal of the reproduction unit (Zexistence). It becomes the composition which is done. Note that the selection unit (make_select_shig) 525 generates a selection signal according to the difference (density value difference) between the upper 3 bits signal (InData) before the image formation process and the 4 bits signal (InDataS) after the image formation process. Generated. In the present embodiment, cost reduction is realized by simplifying the processing in this way. Specific processing will be described later.

  First, the selection unit (make_select_sig) 525 will be described with reference to FIGS. 8A and 8B. FIG. 8A is a block diagram showing input / output of the selection unit 525, and FIG. 8B shows an example in which processing in the selection unit 525 is described in a program language (C language).

  As described above, InData and InDataS are input to the selection unit 525. Basically, the magnitude relationship of these signals is compared, and if InData is larger, 1 is output, and if it is smaller, 0 is output. However, since the comparison between InData and InDataS is a comparison between 3 bits and 4 bits, the comparison is performed after performing the bit alignment processing as shown in the program example of FIG. 8B. In the program, InData is converted to sel_InData, InDataS is converted to sel_InDataS, and then compared.

  In this way, by comparing InData and InDataS and selecting a signal with a higher density, that is, a signal with a larger bit value, the edge becomes thinner or the density becomes lower, resulting in an overall image quality. You can prevent the level from going down.

  That is, when the edge signal reproduced by the reproduction unit (Zexistence) 524 described later is thinner than the original InDataS edge signal, when the output signal of the reproduction unit is output, the edge portion becomes thin as described above. The overall image quality level is lowered. A selection unit (make_select_sig) 525 is provided to prevent this.

  Further, processing in the reproduction unit (Zexistence) 524, which is also a feature of the present embodiment, will be described in detail with reference to the block diagram of FIG.

  The reproduction unit (Zexistence) 524 receives three lines of InData and OutDataZ, and an attention line InDataS. It has a 3 × 3 smoothing processing unit (x3smooth) 5241, a pattern matching processing unit (miniSST) 5242, an edge detection processing unit (BorderCount & DensCheck) 5243, and an adaptive smoothing processing unit (AdaptiveSmoothing) 5244. To generate a 4-bit output signal. Hereinafter, the process in each part is demonstrated in order.

  First, the 3 × 3 smoothing processing unit (x3 smooth) 5241 calculates the average density of the pixels in the 3 × 3 region included in InData. Since the process for obtaining the density average is well known, detailed description is omitted. For example, the number of density 1 pixels (recording pixels) in 9 pixels is obtained and divided by 9. However, in this embodiment, in order to reduce the load on the arithmetic processing unit, after obtaining the number of recording pixels in the 3 × 3 area, a 3-bit shift (corresponding to ÷ 8) is performed to output the output signal (smoothData )

  Next, a pattern matching processing unit (miniSST) 5242 performs a smoothing process for improving jaggy depending on the printer resolution by pattern matching. For example, if the printer resolution is 300 dpi, the jaggy depending on the printer resolution generates an L-shaped portion as shown in FIG. Therefore, the pattern as shown in FIG. 12 and a signal (not shown) obtained by binarizing InData with an arbitrary threshold value are matched in a 3 × 3 region. Then, a process of replacing the coincident portion with the output signal (smoothData) of the 3 × 3 smoothing processing unit (x3 smooth) 5241 shown in FIG. 9 is performed. Needless to say, the pattern shown in FIG. 12 is only an example used in the present embodiment, and the present invention is not limited to this. In this way, a 3-bit signal (patternCK) with improved jaggy depending on the printer resolution is input to an adaptive smoothing processing unit (Adaptive Smoothing) 5244 described later.

  On the other hand, the edge detection processing unit (BorderCount & DensCheck) 5243 generates an edge detection signal using the OutDataZ signal. 10A shows input / output of the edge detection processing unit 5243, and FIG. 10B shows an example in which the processing of the edge detection processing unit 5243 is described in a program language (C language).

  As shown in FIG. 10A, the edge detection processing unit 5243 receives 3 lines of OutDataZ (= DataZ) signal and 1 line of InData signal (line of interest), and receives an edge detection signal bc (= out). Is generated. Specifically, first, in the portion indicated by A in FIG. 10B, the number of pixels (recording pixels) having a density of 1 in a 3 × 3 region is counted using a 1-bit signal of OutDataZ (= DataZ) (sum = bc). Since the area is 3 × 3, the total 9 is the maximum. That is, it is a 4-bit signal. Note that the function indicated by valCheck () in the program of FIG. 10B only determines the edge of the image, and is not an essential process, so a description thereof is omitted here. Then, the above-described sum = bc is re-processed at a portion indicated by B in FIG. 10B to generate and output a final 4-bit signal bc.

  Here, if the density value stored in an arbitrary register (reg_Zcheck) is close to the density value of the pixel included in InData (= data) and InData (= data) is 0, it is obtained as described above. Processing to clear sum value (replace value with zero) is performed. As a result, in a region where the density gradually changes, such as gradation, it is possible to improve that the gradation becomes discontinuous due to an erroneous edge signal. That is, when the process indicated by A in FIG. 7B is executed from the InData density and the output signal of the attribute decoding unit described in FIG. 7B, the output signal (OutDataZ) may be set to 1 in the middle of the gradation. The clearing process is performed here.

  Finally, details of the adaptive smoothing processing unit (AdaptiveSmoothing) 5244 will be described with reference to FIGS. 11A and 11B. 11A shows input / output of the adaptive smoothing processing unit 5244, and FIG. 11B shows an example in which the processing of the adaptive smoothing processing unit 5244 is described in a program language (C language).

  The adaptive smoothing processing unit 5244 is configured to receive the above-described PatternCK, InData, InDataS, and bc as input signals and output a 4-bit signal. Specifically, when the condition “(bc == 0 || bc> = astPower) and (InData! = 0)” is satisfied, the image-formed signal InDataS is output through. In other cases, when the condition “ast_params-> sstAllOffSW == 0 (register)” is satisfied, InDataS is output via a table called LUTE. When neither of the above two conditions is satisfied, patternCK is output via a table called LUTE.

  Here, LUTE is a look-up table configured by a memory, and has a memory space of 3 bits input and 4 bits output, but is basically set to perform linear output conversion. However, it is of course possible to set the output to be nonlinear according to the recording characteristics of the printer. Also, when it is desired to change the number of output bits of the edge portion to other than 4 bits, conversion is possible using this table.

Incidentally, “astPower” in the second conditional expression described above is a register, and this embodiment is also characterized in that the replacement width to the edge reprocessing signal can be adjusted according to this value. An example of an image in which the replacement width of the edge reprocessed signal is actually changed is shown in FIG. When the value of astPower is reduced (lebel1) is shown in (a), and as the value of astPower is increased, it becomes as shown in (b) (level2), (c) (level3). In the image data at this time, the number of halftone pixels in the edge portion increases from (a) → (b) → (c). As the number of pixels increases, the smoothness of the edge portion also increases. This parameter is used after being adjusted to such an extent that the image does not appear as if the character is trimmed by the addition of halftone pixels.
This function is not present in the conventional method, and thereby realizes more sophisticated processing.

  On the other hand, “ast_params-> sstAllOffSW” in the second conditional expression is also a register, and when it is set to 0 as described above, InData is output via LUTE. That is, smoothing that does not reflect the processing result in the pattern matching processing unit (miniSST) 5242 described above can be performed. Not reflecting the process in the pattern matching processing unit 5242 means that the smoothing process is not performed at a resolution higher than the printer resolution.

  The result of performing the processing in each unit described above is output from the reproduction unit (Zexistence) 524 shown in FIG. 1, and the selector (selector) 503 outputs each pixel in accordance with the output of the selection unit (make_select_shig) 525. Either the 4-bit signal (InDataS) after the image forming process or the output signal of the reproduction unit (Zexistence) is selected and output to the printer 305 as a result of the smoothing process 406. The output image is as shown in FIG.

  FIG. 13 is a diagram illustrating an edge processing result in the image processing apparatus according to the present embodiment, and a point of interest is an edge portion. As shown in FIG. 13, the data is thin and is output with a variable width so as to fill the space between the screen patterns. With the configuration of the present embodiment, this process can be realized at a lower cost and with higher functionality than in the prior art.

  Although not shown, there is also a feature that the edge portion can be improved without problems even for an image subjected to irreversible compression processing such as JPEG.

  The reason is that, when creating edge detection data, a 1-bit image area signal is created from the upper 3-bit signal of 8-bit image data, so that it is possible to remove subtle deterioration information due to compression. It is because it is obtained.

  As described above, according to the present embodiment, not only jaggy due to the resolution of the printer but also the jaggy generated at the edge portion by the pseudo halftone process using a screen such as 175 line or 133 line is improved. Is possible. Since such screen jaggies occur at a resolution much lower than the resolution of the printer, it was conspicuous in halftone characters and lines, but this can be improved.

  Furthermore, processing with higher latitude was realized by making it possible to adjust the width of replacement with edge reprocessed signals. The effect shown in FIG. 13 can be obtained by adjusting the replacement width. As a result, various printer characteristics can be accommodated.

  Furthermore, when this embodiment is used, it is possible to easily cope with a vectorized image read by a scanner. Note that vectorization means converting bitmap data into outline data.

<Second Embodiment>
Hereinafter, a second embodiment of the image processing apparatus according to the present invention will be described. In the following description, description of parts similar to those of the first embodiment will be omitted, and description will be made focusing on characteristic parts of the second embodiment.

  In the first embodiment, the resolution of the input image signal is 600 dpi, whereas in the present embodiment, the input resolution signal is configured to support both 1200 dpi and 600 dpi resolution.

  FIG. 17 is a schematic block diagram illustrating the configuration of the smoothing processing unit 406 ′, which is the point of the present invention, and corresponds to FIG. 5 described in regard to the first embodiment, and similar parts are denoted by the same reference numerals. Show.

  The smoothing processing unit 406 'shown in FIG. 17 is compared with the smoothing processing unit 406 shown in FIG. Then, in order to support 1200 dpi, a bit mask part (ScreenBitMask) indicated by 1701 and a bit conversion part (bit32_conv) indicated by 1702 are added. Further, as will be described later, the processing execution unit (make_AST_sig) 502 'has also been changed to support 1200 dpi.

  By adding and changing these blocks, 1200 dpi is realized with the same basic configuration as in the first embodiment. As described above, the present embodiment is characterized in that both the resolutions of 600 dpi and 1200 dpi can be handled with the same hardware configuration.

  Hereinafter, each block different from the configuration of FIG. 5 described in regard to the first embodiment will be described in detail.

  FIG. 18A is a block diagram showing input / output signals of the bit mask unit (ScreenBitMask) 1701, and FIG. 18B shows an example in which processing in the bit mask unit 1701 is described in a program language (C language).

  In FIG. 18B, “ast_params-> bit_select” indicates a parameter, and 2/3 or 0/1 is selected depending on whether the processing resolution is 1200 dpi or 600 dpi. .

  This is because the lower bits are masked using only the upper bits in the 1200 dpi mode in order to reduce the capacity of the FiFo memory described later. However, because of the hardware configuration, the number of bits of the signal line connecting each block is adjusted to the number of bits (4 bits) of 600 dpi. For this reason, the number of output bits is also described as 4 bits even during 1200 dpi processing. Again, the bit mask unit is configured to reduce the amount of effective data to be stored in the FiFo memory during 1200 dpi processing.

  As described in the first embodiment, a signal input to this block is quantized by a screening process or an error diffusion process.

  Next, the bit conversion unit (bit32_conv) 1702 will be described with reference to a block diagram showing input / output signals in FIG. 19A and an example in which processing in the bit conversion unit 1702 in FIG. 19B is described in a program language (C language). To do.

  In FIG. 19B, the parameter indicated by “ast_params-> dpi_select” is set to 1 only when 1200 dpi is output.

  Since it is a common block with 600 dpi processing, the number of input / output bits is 3 bits as shown in FIG. 19A. However, at the time of 1200 dpi processing, as shown in FIG. 19B, the value set in the parameter ast_params-> bit32_conv1-7 is output and converted into 2 bits. The 2-bit signal is output in a packed state. The output signal is input to a process execution unit (make_AST_sig) 502 'described later and stored in the FiFo memory.

  FIG. 20 is a block diagram illustrating a configuration of the processing execution unit (make_AST_sig) 502 ′ according to the present embodiment. Compared to the process execution unit 502 of the first embodiment shown in FIG. 1, the process execution unit 502 'of the present embodiment includes a block that delays data using the FiFo memory. Hereinafter, this delay will be described.

  First, the discrimination signal (OutDataZ) does not depend on the resolution of 1200/600 dpi, and is configured to delay the 1-bit signal by two lines by the FiFo memory 521 as in the first embodiment. Therefore, the memory capacity does not increase even if 1200 dpi processing is performed.

  On the other hand, the 4-bit signal InDataS after the image forming process is configured to delay the 4-bit 1 line when processing at 600 dpi and to delay the 2-bit 1 line when processing at 1200 dpi. That is, one FiFo memory is used as the memory 523 that delays the 4 bit 1 line when processing at 600 dpi, and is used as the memory 523 ′ that delays the 2 bit 1 line when processing at 1200 dpi. As described above, the memory length direction (width) is doubled during processing at 1200 dpi, but the total memory capacity becomes the same by halving the number of bits in the depth direction (height). It is like that. Thus, regarding InDataS, it is not necessary to increase the total memory capacity while enabling processing at 1200 dpi.

  Needless to say, a 1200-bit 1-bit signal is input to this block when the parameter ast_params-> bit_select is set to 3 in the bit mask part (ScreenBitMask) 1701, as described with reference to FIGS. 18A and 18B. It is.

  Next, the FiFo memory 522 'related to the 3-bit signal InData before the image forming process will be described. When processing at 600 dpi, the 3 bit signal is delayed by two lines as shown in the figure. However, when processing at 1200 dpi, as will be described later with reference to FIG. 21, the input / output conversion unit 2001 is configured to perform bit conversion before and after the FiFo memory.

  With reference to FIGS. 21A to 21C, processing at 1200 dpi by the input / output conversion unit 2001 will be described. FIG. 21A is a block diagram showing the configuration of the input / output conversion unit 2001 together with the FiFo memory 522 '.

  First, the input conversion unit (bit21_conv) 2101 generates a 1-bit signal and a 2-bit signal from InData. FIG. 21B shows an example in which processing in the bit21_conv module included in the input conversion unit 2101 is described in a program language (C language). The 1-bit and 2-bit signals are composed of a 2-bit signal delayed by one line and a 1-bit signal further delayed by one line. That is, the bit accuracy decreases as the distance from the pixel of interest decreases. By inputting to the FiFo memory 522 'in this state, the memory capacity is not increased from the time of 600 dpi processing.

  On the other hand, when reading from the FiFo memory 522 ', it is converted into a 3-bit signal by the output conversion unit 2102 including two modules of bit21_conv and bit23_conv. The processing in the bit21_conv module is as shown in FIG. 21B, and the processing in the bit23_conv module is as shown in the example described in the program language (C language) in FIG. 21C. To summarize the points of conversion at the time of output, when the parameter ast_params-> dpi_select is 1, that is, when 1200 dpi is specified, each line delay according to the parameters of ast_params-> bit21_conv and ast_params-> bit23_conv1-3 Data is converted (replaced) into a 3-bit signal.

  Finally, with respect to the bit shift unit (ScreenBitShift) 2002 that bit-shifts the signal output from the FiFo memory 523 or 523 ′, the block diagram showing the input / output signals of FIG. 22A and the processing of FIG. ) With reference to the example described in

  Details of the processing in the bit shift unit 2002 are as described in FIG. 22B, and detailed description thereof is omitted. However, as a point, even if the number of input InDataS bits is different, bit shift is performed so that the number of bits is aligned to 4 bits so that the 600 dpi hardware configuration described in the first embodiment can be used in common. Yes.

  As described above, according to the present embodiment, 1200 dpi processing can be performed using the same hardware configuration as the first embodiment that performs processing at 600 dpi and the same capacity of the FiFo memory. it can. That is, according to the present embodiment, processing at both 600 dpi and 1200 dpi can be realized without increasing costs.

<Other embodiments>
As described above, the present invention uses the data after the image forming process, and is characterized in that correction faithful to the image forming process can be performed. In other words, it can also be said to be suitable for a printer with a low resolution such as Fax. However, unlike the conventional method, according to the present invention, it is possible to output an image that has been subjected to an irreversible compression method such as JPEG so as to compensate for image quality degradation at the edge portion. .

  Further, it is effective not only for image forming processing such as screen processing, but also for images subjected to error diffusion type image forming processing. Halftone characters and lines that have been subjected to error diffusion processing have a backlash that is different from jaggies, but this can also be improved.

  Furthermore, it is also effective against mosquito noise at the edge portion that is generated by irreversible compression such as JPEG. That is, the degradation of the edge portion caused by the compression can be improved in the present invention.

  The present invention may be applied to a system composed of a plurality of devices, or may be applied to an apparatus composed of a single device.

  For example, when the present invention is applied to an image processing apparatus, it is possible to improve the image quality of an edge portion in both an image image read by a scanner and a PDL image transmitted from a computer device.

  In the present invention, a software program that realizes the functions of the above-described embodiments is directly or remotely supplied to a system or apparatus, and the computer of the system or apparatus reads and executes the supplied program code. Including the case where it is also achieved by. In that case, as long as it has the function of a program, the form does not need to be a program. Further, as described above, similar processing can be executed by hardware such as ASIC designed based on the program.

  Accordingly, since the functions and processes of the present invention are implemented by a computer, the program code installed in the computer also implements the present invention. That is, the claims of the present invention include the computer program itself for realizing the functional processing of the present invention.

  In this case, the program may be in any form as long as it has a program function, such as an object code, a program executed by an interpreter, or script data supplied to the OS.

  Examples of the recording medium for supplying the program include a flexible disk, hard disk, optical disk, magneto-optical disk, MO, CD-ROM, CD-R, and CD-RW. Alternatively, there are a magnetic tape, a nonvolatile memory card, a ROM, a DVD (DVD-ROM, DVD-R), and the like.

  As another program supply method, a client computer browser is used to connect to an Internet site, and the computer program itself of the present invention or a compressed file including an automatic installation function is downloaded from the site to a recording medium such as a hard disk. Can also be supplied. It can also be realized by dividing the program code constituting the program of the present invention into a plurality of files and downloading each file from a different site. That is, a WWW server that allows a plurality of users to download a program file for realizing the functional processing of the present invention on a computer is also included in the scope of the present invention.

  In addition, the program of the present invention is encrypted, stored in a storage medium such as a CD-ROM, distributed to users, and key information for decryption is downloaded from the site via the Internet to users who have cleared predetermined conditions. It is also possible to execute the encrypted program by using the key information and install the program on a computer.

  In addition to the functions of the above-described embodiments being realized by the computer executing the read program, the OS running on the computer based on the instruction of the program is a part of the actual processing. Alternatively, the functions of the above-described embodiment can be realized by performing all of them and performing the processing.

  Furthermore, after the program read from the recording medium is written in a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function expansion board or The CPU or the like provided in the function expansion unit performs part or all of the actual processing, and the functions of the above-described embodiments are realized by the processing.

  For example, this corresponds to the case where these processes are performed by a driver of a recording apparatus installed in a personal computer.

It is a block diagram which shows the structure of the process execution part of embodiment of this invention. 1 is a schematic cross-sectional view showing an example of a multifunction machine to which an image processing apparatus according to the present invention can be applied. FIG. 3 is a block diagram illustrating a data processing configuration of the image processing apparatus illustrated in FIG. 2. FIG. 4 is a block diagram illustrating a general configuration of an image processing unit illustrated in FIG. 3. It is a block diagram which shows the structure of the smoothing process part of FIG. It is a figure explaining the process performed in the attribute decoding part (Attribute Decoder) 510 shown in FIG. FIG. 6 is a block diagram illustrating input / output signals of a determination unit (make_ZSG_sig) 501 in FIG. 5. It is a figure which shows the example which described the process in the determination part 501 in the program language. It is a figure which shows the example which described the process in the determination part 501 in the program language. It is a block diagram which shows the input / output of the selection part (make_select_sig) 525. FIG. It is a figure which shows the example which described the process in the selection part 525 in the program language. FIG. 2 is a block diagram illustrating a configuration of a reproduction unit (Zexistence) 524 of FIG. 1. FIG. 10 is a block diagram illustrating input / output of an edge detection processing unit (BorderCount & DensCheck) 5243 in FIG. 9. It is a figure which shows the example which described the process in the edge detection process part 5243 in the program language. It is a block diagram which shows the input / output of the adaptive smoothing process part (AdaptiveSmoothing) 5244 of FIG. It is a figure which shows the example which described the process in the adaptive smoothing process part 5244 in the program language. It is a figure which shows the example of the pattern used by the pattern matching process part (miniSST) 5242 of FIG. It is a figure which shows the result of the edge process in the image processing apparatus of embodiment of this invention. It is the figure which showed the mode of jaggy which generate | occur | produces in the edge part etc. of a character. It is a schematic diagram explaining the character processing state in the conventional image processing apparatus. It is the figure which showed the conventional example which improves the jaggy which generate | occur | produced in the pseudo halftone processes like a screen process. It is a block diagram which shows the structure of the smoothing process part in 2nd Embodiment. FIG. 18 is a block diagram illustrating input / output of the bit mask unit 1701 of FIG. 17. It is a figure which shows the example which described the process in the bit mask part 1701 in the program language. It is a block diagram which shows the input / output of the bit converter 1702 of FIG. It is a figure which shows the example which described the process in the bit conversion part 1702 in the program language. It is a block diagram which shows the structure of the process execution part of the 2nd Embodiment of this invention. FIG. 21 is a block diagram showing a configuration of an input / output conversion unit 2001 in FIG. It is a figure which shows the example which described the process by the bit21_conv module of FIG. 21A in the program language. It is a figure which shows the example which described the process by the bit23_conv module of FIG. 21A in the program language. FIG. 21 is a block diagram showing input / output of the bit shift unit 2002 of FIG. 20. It is a figure which shows the example which described the process in the bit shift part 2002 of FIG. 20 in the program language.

Claims (10)

Based on first image data, second image data obtained by performing pseudo halftone processing on the first image data, and attribute data representing an attribute of each pixel included in the first image data. An image processing apparatus for improving jaggies in the second image data,
Determination means for outputting a determination signal indicating whether or not to perform a smoothing process based on the attribute data;
Edge correction generating means for generating edge correction data from the first image data by performing a smoothing process according to the discrimination signal ;
Selecting means for comparing the pixel signal of the second image data with the pixel signal of the edge correction data output from the edge correction generating means, and outputting a pixel signal having a higher density. A featured image processing apparatus. The edge correction generation means includes
Smoothing means for performing a smoothing process on pixels in a region of a predetermined size;
Wherein the first image data is quantized with a given threshold, it matches the pattern in the region of a predetermined size including a target pixel, the data from said smoothing means of the pixel of interest if they match Matching processing means to output;
Edge detection means for outputting an edge detection signal based on the determination signal and the first image data;
The adaptive smoothing means for outputting one of a pixel signal included in the second image data and an output signal of the matching processing means in accordance with the edge detection signal. Image processing device.   The adaptive smoothing processing unit outputs a pixel signal included in the second image data when the edge detection signal is not output, and outputs an output signal of the matching processing unit otherwise. The image processing apparatus according to claim 2.   The image processing apparatus according to claim 2, wherein the adaptive smoothing processing means includes conversion means for converting an output signal of the matching processing means into a predetermined number of bits with reference to a lookup table.   The edge detection means compares the sum of pixel values in a region of a predetermined size including the target pixel with a predetermined threshold, and detects an edge when the sum of the pixel values is less than the threshold. The image processing apparatus according to claim 2, wherein a signal is output.   When the number of bits of the pixel signal of the second image data and the pixel signal of the edge correction data output from the edge correction generation unit are different, the selection unit sets a lower bit of the pixel signal with a small number of bits to “ 2. The image processing apparatus according to claim 1, wherein the comparison is performed by packing up “1” to the same number of bits.   The image processing apparatus according to claim 2, wherein a region having a predetermined size in the smoothing unit and the matching processing unit is a region of 3 × 3 or more. Wherein it is possible to change a predetermined threshold value, the image processing according to claim 5, wherein it is possible to adjust the degree of improvement of jaggy by changing the predetermined threshold value apparatus. When the resolution of the first image data is different from a predetermined resolution,
Data conversion means for performing conversion processing on the first image data and the second image data so that the processing in the edge correction generation means is the same as the processing on the data of the predetermined resolution. The image processing apparatus according to claim 1, further comprising: Based on first image data, second image data obtained by performing pseudo halftone processing on the first image data, and attribute data representing an attribute of each pixel included in the first image data. An image processing method in an image processing apparatus for improving jaggy in the second image data,
A determination step of outputting a determination signal indicating whether or not to perform a smoothing process based on the attribute data;
An edge correction generation step of performing edge smoothing processing according to the discrimination signal and generating edge correction data from the first image data;
A selection step of comparing the pixel signal of the second image data with the pixel signal of the edge correction data output in the edge correction generation step and outputting a pixel signal having a higher density. A featured image processing method.

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