JP4202962B2 - 基板処理方法及び半導体装置の製造方法 - Google Patents
基板処理方法及び半導体装置の製造方法 Download PDFInfo
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- JP4202962B2 JP4202962B2 JP2004131647A JP2004131647A JP4202962B2 JP 4202962 B2 JP4202962 B2 JP 4202962B2 JP 2004131647 A JP2004131647 A JP 2004131647A JP 2004131647 A JP2004131647 A JP 2004131647A JP 4202962 B2 JP4202962 B2 JP 4202962B2
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- 239000000758 substrate Substances 0.000 title claims description 28
- 238000003672 processing method Methods 0.000 title claims description 14
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 12
- 230000007704 transition Effects 0.000 claims 2
- 230000020169 heat generation Effects 0.000 claims 1
- 230000035945 sensitivity Effects 0.000 description 8
- 239000002253 acid Substances 0.000 description 7
- 238000012545 processing Methods 0.000 description 5
- 238000010926 purge Methods 0.000 description 5
- 238000010894 electron beam technology Methods 0.000 description 4
- 238000001459 lithography Methods 0.000 description 3
- 239000003513 alkali Substances 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 238000002791 soaking Methods 0.000 description 2
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/38—Treatment before imagewise removal, e.g. prebaking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
M.Cheng et.al, J.Vac Sci Tech. 18(6), pp.3318, Nov/Dev 2000
Claims (7)
- 被処理基板上に、エネルギー線照射によって所望の潜像が形成されている化学増幅型レジスト膜を形成する工程と、
前記化学増幅型レジスト膜に熱を供給して熱処理を行う工程とを含む基板処理方法において、
前記熱処理は、
前記化学増幅型レジスト膜の表面部の温度をTT、前記化学増幅型レジスト膜の前記被処理基板との界面部の温度をTBとしたとき、
TT<TBを満たす第1の温度状態にする工程と、TT>TBを満たす第2の温度状態にする工程とを含むことを特徴とする基板処理方法。 - 前記第1の温度状態と前記第2の温度状態とは、
前記被処理基板の上部及び下部にそれぞれ配置された熱源からの熱の供給量を制御することによって作り出されることを特徴とする請求項1記載の基板処理方法。 - 前記熱の供給量の制御が、前記熱源の発熱量、前記被処理基板と熱源の距離の少なくとも一方が制御されることによって行われることを特徴とする請求項2記載の基板処理方法。
- 前記第1の温度状態と前記第2の温度状態とは、前記熱処理時の圧力を制御することによって、作り出されることを特徴とする請求項1記載の基板処理方法。
- 前記第1の温度状態と前記第2の温度状態とが、交互に現れることを特徴とする前記請求項1記載の基板処理方法。
- 前記第1の温度状態から前記第2の温度状態への遷移、または前記第2の温度状態から前記第1の温度状態への遷移が、前記TT、TBのどちらか一方の温度が変更されることによって行われることを特徴とする前記請求項1記載の基板処理方法。
- 請求項1に記載された基板処理方法を用いた半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004131647A JP4202962B2 (ja) | 2004-04-27 | 2004-04-27 | 基板処理方法及び半導体装置の製造方法 |
US11/114,043 US20050250056A1 (en) | 2004-04-27 | 2005-04-26 | Substrate treatment method, substrate treatment apparatus, and method of manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004131647A JP4202962B2 (ja) | 2004-04-27 | 2004-04-27 | 基板処理方法及び半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005317652A JP2005317652A (ja) | 2005-11-10 |
JP4202962B2 true JP4202962B2 (ja) | 2008-12-24 |
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JP2004131647A Expired - Fee Related JP4202962B2 (ja) | 2004-04-27 | 2004-04-27 | 基板処理方法及び半導体装置の製造方法 |
Country Status (2)
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US (1) | US20050250056A1 (ja) |
JP (1) | JP4202962B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5890255B2 (ja) * | 2012-04-02 | 2016-03-22 | 株式会社Screenセミコンダクターソリューションズ | 露光装置、基板処理装置、基板の露光方法および基板処理方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW301037B (ja) * | 1993-11-19 | 1997-03-21 | Sony Co Ltd | |
JP3764278B2 (ja) * | 1998-07-13 | 2006-04-05 | 株式会社東芝 | 基板加熱装置、基板加熱方法及び基板処理方法 |
JP2000056474A (ja) * | 1998-08-05 | 2000-02-25 | Tokyo Electron Ltd | 基板処理方法 |
US20020092839A1 (en) * | 2000-08-01 | 2002-07-18 | Bing Lu | Method of making an integrated circuit |
EP1207048A1 (en) * | 2000-11-08 | 2002-05-22 | Applied NanoSystems B.V. | A process and an apparatus for the formation of patterns in films using temperature gradients |
JP3696156B2 (ja) * | 2000-12-26 | 2005-09-14 | 株式会社東芝 | 塗布膜の加熱装置、レジスト膜の処理方法 |
JP2004134674A (ja) * | 2002-10-11 | 2004-04-30 | Toshiba Corp | 基板処理方法、加熱処理装置、パターン形成方法 |
-
2004
- 2004-04-27 JP JP2004131647A patent/JP4202962B2/ja not_active Expired - Fee Related
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2005
- 2005-04-26 US US11/114,043 patent/US20050250056A1/en not_active Abandoned
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JP2005317652A (ja) | 2005-11-10 |
US20050250056A1 (en) | 2005-11-10 |
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