JP4200213B2 - Wide energy range radiation detector - Google Patents

Wide energy range radiation detector Download PDF

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JP4200213B2
JP4200213B2 JP2003418086A JP2003418086A JP4200213B2 JP 4200213 B2 JP4200213 B2 JP 4200213B2 JP 2003418086 A JP2003418086 A JP 2003418086A JP 2003418086 A JP2003418086 A JP 2003418086A JP 4200213 B2 JP4200213 B2 JP 4200213B2
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義式 畑中
徹 青木
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Shizuoka University NUC
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Description

この技術は、X線のような高エネルギーの電磁波を検出する半導体素子に関する。   This technology relates to a semiconductor element that detects high-energy electromagnetic waves such as X-rays.

これまで、軟X線に対してはSi(シリコン)、硬X線に対してはCdTe(カドミウム・テルル)を主材料とする半導体素子により、検出素子を構成していた(特許文献1参照)。
しかしながら、軟X線及び硬X線の双方に対して良好な感度を得ることは困難であった。
一方で、CdTeは結晶の機械的強度が弱いため、微細なチップに加工し平面上に2次元に配列することが困難である。そのため、図6に示されるようにSi基板3上に接着層5を介してCdTe基板4を固定し、機械的強度を保ったうえで切断加工を行っていた。この技術においては、切断後の加工に際し接着層が障害となり、接着層を除去するなどの手間がかかっていた。このため製造段階で工程が複雑になり、コスト面での不利な状況が存在した。
特表平10−512398号
Up to now, a detection element is composed of a semiconductor element mainly composed of Si (silicon) for soft X-rays and CdTe (cadmium tellurium) for hard X-rays (see Patent Document 1). .
However, it has been difficult to obtain good sensitivity to both soft X-rays and hard X-rays.
On the other hand, since CdTe has a weak crystal mechanical strength, it is difficult to process it into a fine chip and arrange it two-dimensionally on a plane. Therefore, as shown in FIG. 6, the CdTe substrate 4 is fixed on the Si substrate 3 via the adhesive layer 5, and the cutting process is performed while maintaining the mechanical strength. In this technique, the adhesive layer becomes an obstacle during processing after cutting, and it takes time and effort to remove the adhesive layer. This complicates the process in the manufacturing stage and has a disadvantageous situation in terms of cost.
Special table hei 10-512398

この発明では、広域エネルギーレンジのためにタンデム構造を採用することを提案する。
図1のようにSi基板3とCdTe(またはCdZnTe)基板4とをタンデムに配置し、Si基板3側からX線を入射すると、軟X線1はSi基板3の内部で吸収されるが、硬X線2はSi基板3を透過しCdTe(またはCdZnTe)基板4の内部に浸透し消滅する。それぞれの基板に電極を設けることにより、X線の消滅に伴う電荷を検出できる。
さらに、この発明ではSi基板3とCdTe基板4との間にIn(インジウム)を間挿して一体化を図ることにより、強度を高めるとともに各検出素子を分離独立できる構造を提案する。強度が高まれば、切削又はエッチングなどの機械的あるいは化学的処理により、CdTe基板に分離帯を設ける加工を行い得る。この加工により各検出素子を電気的に分離独立できるため、2次元画像センサとして利用できる。
In the present invention, it is proposed to adopt a tandem structure for a wide energy range.
When the Si substrate 3 and the CdTe (or CdZnTe) substrate 4 are arranged in tandem as shown in FIG. 1 and X-rays are incident from the Si substrate 3 side, the soft X-rays 1 are absorbed inside the Si substrate 3. The hard X-ray 2 passes through the Si substrate 3 and penetrates into the CdTe (or CdZnTe) substrate 4 and disappears. By providing an electrode on each substrate, charges associated with the disappearance of X-rays can be detected.
Furthermore, the present invention proposes a structure that can increase the strength and separate each detection element by interposing In (indium) between the Si substrate 3 and the CdTe substrate 4 for integration. If the strength is increased, the CdTe substrate can be provided with a separation band by mechanical or chemical treatment such as cutting or etching. Since each detection element can be electrically separated and independent by this processing, it can be used as a two-dimensional image sensor.

この発明では、IV族の半導体としてSi(シリコン)を軟X線検出に用いるとともに、II−VI族の半導体としてCdTe(カドミウム・テルル)またはCdZnTe(カドミウム・ジンク・テルル)を硬X線検出に用いるものとする。この2材料をIII族のIn(インジウム)で接着する。
接合時において、接合面にInをはさみ込み加熱圧着することにより、CdTe側はn型半導体となり、Si側はp型半導体となる。
タンデム構造を採用する際に、接着材料としてInを用いることによって、両半導体における不純物金属としての効果をも有することとなり、CdTe−pin(p型−insulator−n型)半導体と、Si−pin半導体とを直列に接続する構造が容易に作成できる。
この発明の広域エネルギーレンジ放射線検出器は、CdTe基板、Inの拡散によりn型となったn型CdTe層、In層、Inの拡散によりp型となったp型Si層、Si基板をこの順に有し、CdTe基板におけるIn層と反対側の外面から、Si基板の一部にかけて分離帯が設けられ、Si基板側は機械的に結合された状態で共通端子に接続され、分離帯によって複数の検出素子に分離されたCdTe基板側は個々の信号端子に接続されて、1次元あるいは2次元センサーとして配列されてなることを特徴とする。
In this invention, Si (silicon) is used for soft X-ray detection as a group IV semiconductor, and CdTe (cadmium tellurium) or CdZnTe (cadmium zinc tellurium) is used for hard X-ray detection as a group II-VI semiconductor. Shall be used. These two materials are bonded with Group III In (indium).
At the time of bonding, In is sandwiched between the bonding surfaces and thermocompression bonded, the CdTe side becomes an n-type semiconductor and the Si side becomes a p-type semiconductor.
When In is used as an adhesive material when adopting the tandem structure, it also has an effect as an impurity metal in both semiconductors, and a CdTe-pin (p-type-insulator-n-type) semiconductor and a Si-pin semiconductor. Can be easily created.
The wide energy range radiation detector according to the present invention includes a CdTe substrate, an n-type CdTe layer that becomes n-type by diffusion of In, an In layer, a p-type Si layer that becomes p-type by diffusion of In, and an Si substrate in this order. And a separation band is provided from the outer surface of the CdTe substrate opposite to the In layer to a part of the Si substrate, and the Si substrate side is mechanically coupled and connected to a common terminal. The CdTe substrate side separated by the detection elements is connected to individual signal terminals and is arranged as a one-dimensional or two-dimensional sensor.

II-VI族半導体であるCdTeまたはCdZnTeの基板にInを薄く蒸着し、エキシマレーザーでのドーピングまたは加熱による拡散ドーピングにより、n型CdTeまたはCdZnTe層を形成する。他の面には金(Au)又はプラチナ(Pt)などによるショットキー接合、またはアンチモン(Sb)などのV族元素の拡散によるp型のCdTeまたはCdZnTe層を形成する。
また一方で、IV族であるSiの基板にInを薄く蒸着し、エキシマレーザーでのドーピングまたは加熱による拡散ドーピング処理により、p型Si層を形成する。このとき、Siのp型ドーピングはあらかじめIn以外のボロン(B)などの不純物によってp型を形成しておいたものを用いてもよい。他の面にはあらかじめ燐(P)などにより、n型のSi層が形成されているものを用いる。
Si基板のp型層と、CdTe基板(またはCdZnTeの基板)のn型層とを加熱しながら張り合わせると、Inを接着層として、Si基板とCdTe基板(またはCdZnTeの基板)とが結合される。これにより、CdTeとSiの2つのpinダイオードがシリーズ接続された構造体が形成される。In層の反対側にはp型のSi層及びn型CdTe層を形成するものであってもよい。この場合には、n型CdTeとp型Siによりnin−pipダイオードが形成された構造体となる。
In is thinly deposited on a substrate of CdTe or CdZnTe, which is a II-VI group semiconductor, and an n-type CdTe or CdZnTe layer is formed by doping with an excimer laser or diffusion doping by heating. On the other surface, a p-type CdTe or CdZnTe layer is formed by diffusion of a group V element such as antimony (Sb) or a Schottky junction made of gold (Au) or platinum (Pt).
On the other hand, In is thinly deposited on a Si substrate which is a group IV, and a p-type Si layer is formed by doping with an excimer laser or diffusion doping by heating. At this time, the p-type doping of Si may be a p-type doped with an impurity such as boron (B) other than In. On the other surface, an n-type Si layer previously formed of phosphorus (P) or the like is used.
When the p-type layer of the Si substrate and the n-type layer of the CdTe substrate (or CdZnTe substrate) are bonded together by heating, the Si substrate and the CdTe substrate (or CdZnTe substrate) are bonded using In as an adhesive layer. The As a result, a structure in which two pin diodes of CdTe and Si are connected in series is formed. A p-type Si layer and an n-type CdTe layer may be formed on the opposite side of the In layer. In this case, a structure in which a nin-pip diode is formed by n-type CdTe and p-type Si is obtained.

構造体形成の一例を図を参照しながら説明する。
形成に用いる2つの基板を図2の左に示す。図2の左上がSi基板3上にIn層6を蒸着したものを示している。図2の左下がCdTe基板4上にIn層6を蒸着したものを示している。それぞれのIn面を張り合わせて加熱すると、In層6を接着層として、Si基板3とCdTe基板4とが結合される。この段階での構造体を図の右に示す。Inは、Si基板3とCdTe基板4とに拡散し、それぞれp型層とn型層を形成する。In層の反対側にはn型のSi層及びp型CdTe層を形成する。
最初のInの蒸着は片方の基板にのみ施されるものであってもよい。
また、この場合においてもIn層の反対側にはp型のSi層及びn型CdTe層を形成するものであってもよい。
An example of structure formation will be described with reference to the drawings.
Two substrates used for formation are shown on the left of FIG. The upper left of FIG. 2 shows the In layer 6 deposited on the Si substrate 3. The lower left of FIG. 2 shows an In layer 6 deposited on a CdTe substrate 4. When each In surface is bonded and heated, the Si substrate 3 and the CdTe substrate 4 are bonded using the In layer 6 as an adhesive layer. It shows the structure at this stage in the right of FIG. In diffuses into the Si substrate 3 and the CdTe substrate 4 to form a p-type layer and an n-type layer, respectively. An n-type Si layer and a p-type CdTe layer are formed on the opposite side of the In layer.
The initial deposition of In may be performed only on one substrate.
Also in this case, a p-type Si layer and an n-type CdTe layer may be formed on the opposite side of the In layer.

次に、この構造体を用いるX線検出方法を述べる。
n型のSi層9及びp型CdTe層10を形成後の構造体を図3に示す。構造体から信号を取り出すために、n-Si層9(Si基板のn型層)を信号端子11へ接続し、p-CdTe層10(カドミウム・テルル基板のp型層)を他の信号端子12へ接続する。
信号端子11を経由してSi基板のn型層9に正電位を、信号端子12を経由してCdTe基板のp型層10に負電位を印加し、両pinダイオードに逆バイアスを与える。X線又はガンマ線をシリコン(Si)側から入射すると、軟X線は主としてシリコン3で吸収され、硬X線はCdTe4で吸収される。これにより、各X線は吸収された半導体層内で電子と正孔とを発生させて消滅し、外部に信号を出力することとなる。
このように、タンデム構造を採用したことにより、ワイドレンジの検出器となる。また、静電容量が小さくなり、高感度の素子が得られる。
Next, an X-ray detection method using this structure will be described.
The structure after the n-type Si layer 9 and the p-type CdTe layer 10 are formed is shown in FIG. In order to extract a signal from the structure, the n-Si layer 9 (the n-type layer of the Si substrate) is connected to the signal terminal 11, and the p-CdTe layer 10 (the p-type layer of the cadmium tellurium substrate) is connected to another signal terminal. 12 is connected.
A positive potential is applied to the n-type layer 9 of the Si substrate via the signal terminal 11 and a negative potential is applied to the p-type layer 10 of the CdTe substrate via the signal terminal 12 to apply a reverse bias to both pin diodes. When X-rays or gamma rays are incident from the silicon (Si) side, soft X-rays are mainly absorbed by silicon 3 and hard X-rays are absorbed by CdTe4. As a result, each X-ray generates and disappears electrons and holes in the absorbed semiconductor layer, and outputs a signal to the outside.
Thus, it becomes a wide range detector by adopting a tandem structure. In addition, the capacitance is reduced, and a highly sensitive element can be obtained.

次に、上記検出器を2次元センサーとするときの製造法について述べる。
CdTe基板は結晶の機械的強度が弱いため、微細なチップに加工し平面上に2次元に配列することが困難であった。この発明で得られるCdTe基板とSi基板の積層構造は、Si基板がCdTe基板の支持層となっており強靭である。したがって、2次元配置構造とする際には、切削又はエッチングなどの機械的あるいは化学的処理により、CdTe基板側からSi層の一部までの分離帯を設ける加工を行い得る。これにより、平面上に分離された検出素子が2次元に配列した構造が容易に作成できる。
このような加工を行った検出器の断面図を図4に示す。Si側に共通端子13を設け、CdTe側からは分離帯14により分離された個々の検出素子から信号線を引き出して信号端子12に接続する。
この信号線の引出しは、セラミック基板上に配線を行い、CdTeの各素子に対応するバンプを金属あるいは導電性接着剤で形成したものを、検出器に圧接することにより行うのがよい。セラミック基板上の配線は、所望により1層または多層基板とする。
図4のようなSiの壁面の露出は暗電流の増加を招くので、あらかじめSi基板3に切削加工を施し、作成された溝にSiO2を埋設あるいは酸化反応によりSiO2を溝の壁面に形成してなる基板に、In層6を設けたCdTe基板4を張り合わせて加熱した後に、さらにCdTe基板4に対し切削加工を施して分離帯14を作成する方法も考えられる。この模式図を図5に示す。
Next, a manufacturing method when the detector is a two-dimensional sensor will be described.
Since the CdTe substrate has a weak mechanical strength, it is difficult to process it into a fine chip and arrange it two-dimensionally on a plane. The laminated structure of the CdTe substrate and the Si substrate obtained by the present invention is strong because the Si substrate serves as a support layer for the CdTe substrate. Therefore, when a two-dimensional arrangement structure is formed, a process of providing a separation band from the CdTe substrate side to a part of the Si layer can be performed by mechanical or chemical treatment such as cutting or etching. Thereby, a structure in which detection elements separated on a plane are two-dimensionally arranged can be easily created.
FIG. 4 shows a cross-sectional view of the detector subjected to such processing. A common terminal 13 is provided on the Si side, and a signal line is drawn from each detection element separated by the separation band 14 from the CdTe side and connected to the signal terminal 12.
The signal lines are preferably drawn by wiring on a ceramic substrate and pressing a detector with bumps corresponding to each element of CdTe formed of metal or conductive adhesive. The wiring on the ceramic substrate may be a single layer or a multilayer substrate as desired.
Since exposure of the Si wall surface as shown in FIG. 4 causes an increase in dark current, the Si substrate 3 is cut in advance, and SiO2 is embedded in the formed groove or formed on the wall surface of the groove by an oxidation reaction. A method is also conceivable in which, after the CdTe substrate 4 provided with the In layer 6 is bonded to the substrate and heated, the CdTe substrate 4 is further cut to form the separation band 14. This schematic diagram is shown in FIG.

ここでは、2次元配列として説明したが、1次元配列であっても可能なことは説明するまでもなく自明である。
また、II−VI族の半導体としてCdTeを、IV族の半導体としてシリコンを用いるものとして説明したが、他にII−VI族の半導体としてCdZnTeなどが利用できる。また、IV族の代わりにIII−V族であるGaAsの表面のドーピング処理をあらかじめ行っておくことにより、Inを介しての接着とタンデム構造を採用する広域レンジの検出器構成として利用できる。
Although a two-dimensional array has been described here, it is obvious that a one-dimensional array is possible without needing to be described.
Further, although CdTe is used as the II-VI group semiconductor and silicon is used as the IV group semiconductor, CdZnTe or the like can be used as the II-VI group semiconductor. In addition, by performing a doping process on the surface of GaAs which is a group III-V instead of a group IV in advance, it can be used as a wide-range detector configuration which employs adhesion via In and a tandem structure.

これまでに説明した構造のX線検出素子により、軟X線から硬X線、ガンマ線まで広域のエネルギー幅における電磁波が検出可能となる。また、機械的強度が弱いII−VI族の半導体に対し分割構造が容易に作成可能であるので、2次元画像検出素子としての製造が低コストで可能となる。   The X-ray detection element having the structure described so far can detect electromagnetic waves in a wide energy range from soft X-rays to hard X-rays and gamma rays. In addition, since a divided structure can be easily created for a II-VI group semiconductor having a low mechanical strength, manufacturing as a two-dimensional image detection element is possible at low cost.

X線の吸収位置を表す図Diagram showing X-ray absorption position In(インジウム)を接着層として用いる図Figure using In (indium) as adhesive layer Inによる接着後のX線検出素子を示す図The figure which shows the X-ray detection element after adhesion | attachment by In 検出素子にCdTe側から分離帯を設けた断面を表す図The figure showing the section which provided the separation zone from the CdTe side to the detection element あらかじめ分離帯の一部をSiO2で被覆した例を示す図The figure which shows the example which covered a part of the separation band with SiO2 beforehand CdTeの切断にSiからなる加工台を用いる従来技術を示す図The figure which shows the prior art which uses the processing stand which consists of Si for the cutting | disconnection of CdTe

符号の説明Explanation of symbols

1 軟X線
2 硬X線
3 Si(シリコン)基板
4 CdTe(カドミウム・テルル)基板
5 接着層
6 In(インジウム)層
7 p−Si(p型シリコン)層
8 n−CdTe(n型カドミウム・テルル)層
9 n−Si(n型シリコン)層
10 p−CdTe(p型カドミウム・テルル)層
11,12 信号端子
13 共通端子
14 分離帯
15 SiO2(酸化シリコン)
DESCRIPTION OF SYMBOLS 1 Soft X-ray 2 Hard X-ray 3 Si (silicon) substrate 4 CdTe (cadmium tellurium) substrate 5 Adhesion layer 6 In (indium) layer 7 p-Si (p-type silicon) layer 8 n-CdTe (n-type cadmium Tellurium) layer 9 n-Si (n-type silicon) layer 10 p-CdTe (p-type cadmium tellurium) layer 11, 12 signal terminal 13 common terminal 14 separation band 15 SiO2 (silicon oxide)

Claims (2)

CdTe基板、Inの拡散によりn型となったn型CdTe層、In層、Inの拡散によりp型となったp型Si層、Si基板をこの順に有し、
前記CdTe基板におけるIn層と反対側の外面から、前記Si基板の一部にかけて分離帯が設けられ、
前記Si基板側は機械的に結合された状態で共通端子に接続され、
前記分離帯によって複数の検出素子に分離された前記CdTe基板側は個々の信号端子に接続されて、1次元あるいは2次元センサーとして配列されてなる、
広域エネルギーレンジ放射線検出器。
A CdTe substrate, an n-type CdTe layer that becomes n-type by diffusion of In, an In layer, a p-type Si layer that becomes p-type by diffusion of In, and a Si substrate in this order,
A separation band is provided from the outer surface opposite to the In layer in the CdTe substrate to a part of the Si substrate,
The Si substrate side is connected to a common terminal in a mechanically coupled state,
The CdTe substrate side separated into a plurality of detection elements by the separation band is connected to individual signal terminals and arranged as a one-dimensional or two-dimensional sensor.
Wide energy range radiation detector.
前記CdTeに替えて、CdZnTeとする請求項1に記載の広域エネルギーレンジ放射線検出器。 The wide energy range radiation detector according to claim 1, wherein CdZnTe is used instead of CdTe .
JP2003418086A 2003-12-16 2003-12-16 Wide energy range radiation detector Expired - Lifetime JP4200213B2 (en)

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US11/454,522 US8044476B2 (en) 2003-12-16 2006-06-16 Wide range radiation detector and manufacturing method

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KR101654140B1 (en) 2010-03-30 2016-09-09 삼성전자주식회사 X-ray detector with oxide semiconductor transistor
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