JP4197356B2 - Liquid crystal display - Google Patents

Description

  The invention disclosed in this specification relates to an electro-optical device using a thin film transistor (referred to as a TFT). The present invention also relates to a method for manufacturing the electro-optical device.

  Recently, a technique for manufacturing a semiconductor device in which a semiconductor thin film is formed on an inexpensive glass substrate, for example, a thin film transistor (TFT) has been rapidly developed. The reason is that the demand for active matrix liquid crystal display devices has increased.

  In an active matrix liquid crystal display device, TFTs are arranged in several tens to several millions of pixel regions arranged in a matrix, and charges entering and exiting each pixel electrode are controlled by a switching function of the TFTs.

  Here, a basic configuration of an active matrix liquid crystal display device in which thin film transistors are arranged will be described with reference to FIG. First, a cross-sectional view of the liquid crystal display device cut in a direction perpendicular to the substrate is shown in FIG. This cross-section corresponds to a cross-sectional view taken along a broken line indicated by AA ′ in FIG.

  The base substrate 101 is translucent, and an insulating film is formed on the substrate surface (not shown). 102 is a TFT active layer, 103 is a gate electrode, 104 is a data line, 105 is a drain electrode, 106 is an interlayer insulating film, 107 is a black matrix, 108 is a pixel electrode made of a transparent conductive film, and 109 is an alignment film. .

  The entire substrate on which the TFT having the above configuration is arranged is called an active matrix substrate. In FIG. 1A, attention is focused on only one pixel, but actually, a pixel region including several tens to several millions of pixel switching TFTs (referred to as pixel TFTs) and driving them are driven. An active matrix substrate is constituted by a peripheral drive circuit region including a plurality of TFTs.

  On the other hand, 110 is a transparent substrate, 111 is a counter electrode made of a transparent conductive film, and 112 is an alignment film. The entire substrate facing the active matrix substrate having such a configuration is referred to as a counter substrate.

  As shown in FIG. 2A, the active matrix substrate and the counter substrate are subjected to an alignment process such as rubbing for adjusting the alignment of the liquid crystal material. Thereafter, in order to control the substrate interval (cell gap) between the active matrix substrate and the counter substrate, the granular spacers 201 are uniformly distributed on the entire surface of the active matrix substrate. Next, the sealant 202 is printed. The sealant 202 serves as an adhesive that bonds the substrates together and serves as a sealant for enclosing the liquid crystal material injected between the substrates so as not to leak outside the substrates.

  Next, the active matrix substrate and the counter substrate are bonded together. Thereafter, a liquid crystal material is filled between the active matrix substrate and the counter substrate, and the liquid crystal injection port is sealed with a sealing material. Thus, an active matrix liquid crystal display device having a structure as shown in FIG. 1A is manufactured.

  However, the liquid crystal display device having the above configuration has the following problems.

  The upper surfaces of the active matrix substrate and the counter substrate are not completely flat. Therefore, even if a granular spacer is dispersed on the upper surface of the active matrix substrate to ensure a cell gap, cell gap unevenness occurs, and a uniform cell thickness cannot be realized over the entire substrate. As a result, the counter substrate is distorted. In the liquid crystal display device in which the cell thickness unevenness or the counter substrate is distorted, defects such as display unevenness and interference fringes appear on the upper surface of the counter substrate.

  In particular, when the display is performed using the birefringence of the liquid crystal, the non-uniformity of the cell gap appears remarkably in display deterioration.

  In addition, as shown in FIG. 1B, when the granular spacer 115 is present in the pixel region, the alignment of the liquid crystal material is disturbed in the vicinity of the spacer 115, and thus the image display disorder (disclination) is observed. May be.

  As described above, when the cell gap is controlled using a conventional grain-shaped spacer, a good display may not be obtained.

  In addition, liquid crystal display devices that are generally manufactured or prototyped seem to have a cell gap of about 4 to 6 μm regardless of the pixel pitch, but in the future, higher definition of liquid crystal panels will be required. There is an increasing tendency to further reduce the pixel pitch.

  For example, it is desirable that a projection type liquid crystal display device (projection) can display an image as fine as possible in consideration of enlarging and projecting an image on a screen. Further, from the viewpoint of cost, it is necessary to reduce the size of the optical system, and it is necessary to reduce the panel size. Therefore, in the future, it is necessary to manufacture a liquid crystal display device having a pixel pitch of 40 μm or less, preferably 30 μm or less.

  In such a liquid crystal display device that requires a high-definition image, even a granular spacer of several μm exists in the effective display area, leading to a deterioration in display quality.

  Furthermore, in the conventional granular spacer, when the liquid crystal material is injected, the granular spacer itself also flows due to the flow of the liquid crystal material. As a result, a uniform spacer distribution density cannot be obtained, which causes cell thickness unevenness. There was.

  In addition, a liquid crystal display device using a ferroelectric liquid crystal and a reflective liquid crystal display device, which have been attracting attention recently, are required to have a small cell gap due to their characteristics.

  However, it is generally difficult to produce a cell having a small and uniform cell gap using a conventional granular spacer.

  SUMMARY OF THE INVENTION It is an object of the present invention to provide an electro-optical device free from cell thickness unevenness and display unevenness by manufacturing a cell having a small and uniform cell gap, which has been difficult using a conventional grain-shaped spacer. And It is another object of the present invention to provide an electro-optical device capable of accurately arranging spacers at predetermined positions.

According to an embodiment of the present invention, a first substrate having at least a plurality of TFTs and a plurality of pixel electrodes electrically connected to the TFTs, a second substrate, and the first substrate A plurality of gap holding materials for holding a substrate distance from the second substrate;
At least one upper surface of the plurality of gap holding members on the first substrate side or the second substrate side is planarized by chemical mechanical polishing. An electro-optical device is provided. This achieves the above object.

  A display medium may be further provided between the first substrate and the second substrate.

  The display medium may have optical characteristics modulated in response to an applied voltage.

  The display medium may be a liquid crystal material.

  The display medium may be a mixed layer of a liquid crystal material and a polymer.

  The display medium may be an electroluminescent element.

  The gap retaining material may be made of an ultraviolet curable resin or a thermosetting resin.

  The gap retaining material may be made of any one of polyimide, acrylic, polyamide, or polyimide amide.

  According to another embodiment of the present invention, a pixel region having at least a plurality of TFTs and a plurality of pixel electrodes electrically connected to the plurality of TFTs, and a plurality of thin film transistors driving the plurality of thin film transistors A first substrate having at least a drive circuit region provided at a location different from the pixel region, and a second substrate facing the first substrate A plurality of gap holding materials, wherein the upper surface of either the first substrate or the second substrate side of the plurality of gap holding materials is flattened by chemical mechanical polishing. An electro-optical device is provided. This achieves the above object.

  The plurality of gap retaining materials may be formed in a region excluding the pixel region.

  The plurality of gap retaining materials may be formed in a region excluding the pixel region and the drive circuit region.

  The gap retaining material may be cylindrical, elliptical, or polygonal.

  According to another embodiment of the present invention, an active matrix substrate having at least a plurality of TFTs and a plurality of pixel electrodes electrically connected to the TFTs, and a counter substrate having at least a counter electrode And a plurality of gap holding materials for holding a gap between the active matrix substrate and the counter substrate, wherein the plurality of gap holding materials are formed on the counter substrate, An electro-optical device is provided in which an upper surface of the gap retaining member is planarized by chemical mechanical polishing. This achieves the above object.

  According to another embodiment of the present invention, a step of forming a plurality of TFTs on the first substrate and an insulating material on at least one of the first substrate and the second substrate are provided. Manufacturing an electro-optical device including at least a step of forming a film, and a step of chemically mechanically polishing a surface of the film made of the insulating material and then forming a plurality of gap holding members from the film made of the insulating material A method is provided.

  Further, according to another embodiment of the present invention, there is provided an electro-optical device having at least a pair of substrates and a plurality of gap holding members disposed between the pair of substrates, At least an electrode is provided on the inner surface of the substrate, the gap retaining material is formed on at least one inner surface of the pair of substrates, and the upper surface of the gap retaining material is planarized by chemical mechanical polishing. An electro-optical device is provided. This achieves the above object.

  According to the present invention, the upper surface of the gap retaining material is flattened. In addition, the accuracy of the cell gap is increased by chemically mechanically polishing the upper surface of the gap retaining material. Therefore, an electro-optical device having a uniform cell thickness with no cell thickness distribution can be obtained. In addition, according to the present invention, since the cell gap can be secured without spraying the spacers on the particle shape, it is possible to prevent unnecessary force from being applied to the TFT when the substrates are bonded together. Yield improves

(Function)
According to the present invention, since the upper surfaces of the plurality of gap holding members are flattened and the cell gap is controlled, a small and uniform cell thickness can be obtained over the entire electro-optical device.

  In the present invention, the pixel switching TFT and the drive circuit TFT are integrally formed on the same substrate to manufacture an electro-optical device.

  A method for manufacturing a reflective electro-optical device using the liquid crystal of this embodiment will be described below. First, production of an active matrix substrate will be described with reference to FIGS. The manufacturing process of the drive circuit TFT is shown on the left side of each figure, and the manufacturing process of the pixel TFT is shown on the right side.

  First, reference is made to FIG. A silicon oxide film 302 is formed as a base oxide film on a quartz substrate or a glass substrate 301 to a thickness of 100 to 300 nm. As a method for forming the silicon oxide film 302, a sputtering method or a plasma CVD method in an oxygen atmosphere may be used.

  Next, an amorphous or polycrystalline silicon film is formed to a thickness of 30 to 150 nm, preferably 50 to 100 nm, by plasma CVD or LPCVD. Then, thermal annealing is performed to crystallize the silicon film. The thermal annealing is performed at a temperature of 500 ° C. or higher, preferably 800 to 900 ° C. Crystallization may be further enhanced by crystallizing the silicon film by thermal annealing and then performing optical annealing. Further, when the silicon film is crystallized by thermal annealing, the crystallization of silicon is promoted by adding an element (catalyst element) such as nickel as disclosed in JP-A-6-244104. May be.

  Next, an active layer (P-channel TFT active layer 303, N-channel TFT active layer 304) of the island-shaped peripheral drive circuit TFT and a pixel TFT active layer 305 are formed. In FIG. 3, for convenience, three TFTs are shown, but actually, millions of TFTs are formed simultaneously.

Furthermore, a gate insulating film 306 of silicon oxide having a thickness of 50 to 200 nm is formed by sputtering in an oxygen atmosphere. Plasma CVD may be used as a method for forming the gate insulating film. In the case of forming a silicon oxide film by a plasma CVD method, it is preferable to use dinitrogen monoxide (N ₂ O) or a mixed gas of oxygen (O ₂ ) and monosilane (SiH ₄ ) as a source gas.

  Thereafter, a polycrystalline silicon film is formed on the entire surface of the substrate with a thickness of 200 nm to 500 nm, preferably 200 to 600 nm, by LPCVD. This polycrystalline silicon film may contain a small amount of phosphorus in order to enhance conductivity. The polycrystalline silicon film is etched to form gate electrodes 307, 308 and 309.

Next, as shown in FIG. 3B, self-aligned phosphorus doping is performed on all island-like active layers by using a gate electrode as a mask by ion doping. As the doping gas, phosphine (PH ₄ ) is used. The dose amount at this time is 1 × 10 ^{12 to} 5 × 10 ¹³ atoms / cm ² . As a result, weak N-type regions (N− regions) 310, 311, and 312 are formed.

Next, as shown in FIG. 3C, a photoresist mask 313 covering the active layer 303 of the P-channel TFT and a photoresist mask 314 covering the gate electrode 309 in the active layer 305 of the pixel TFT are formed. To do. The photoresist mask covering the gate electrode covers the portion 3 μm away from the end of the gate electrode in parallel with the gate electrode. Then, phosphorus is again implanted by ion doping. As the doping gas, phosphine is used. The dose is 1 × 10 ^{14 to} 5 × 10 ¹⁵ atoms / cm ² . As a result, source / drains 315 and 316 of strong N-type regions (N + regions) are formed. Of the weak N-type region (N− region) 312 of the active layer 305 of the pixel TFT, the region 317 covered with the mask 314 is not implanted with phosphorus in this doping. Therefore, the region 317 remains a weak N-type region.

Next, as shown in FIG. 4A, the active layers 304 and 305 of the N-channel TFT are covered with a photoresist mask 318. Then, ion doping is performed using diborane (B ₂ H ₆ ) as a doping gas, and boron is implanted into the island regions 303. The dose is 5 × 10 ¹⁴ to 8 × 10 ¹⁵ atoms / cm ² . In this doping, the dose of boron exceeds the dose of phosphorus doped in the process shown in FIG. 3C, so that the weak N-type region 310 previously formed is a strong P-type region. Invert to 319.

  By the above doping, strong N-type regions (source / drain) 315, 316, strong P-type region (source / drain) 319, and weak N-type region (low-concentration impurity region) 317 are formed. In this embodiment, the width x of the low concentration impurity region 317 is about 3 μm (FIG. 4A).

  Thereafter, thermal annealing is performed at 450 to 850 ° C. for 0.5 to 3 hours to activate the doping impurities and restore the crystallinity of silicon. By this thermal annealing treatment, damage to the silicon film due to doping is recovered.

  Next, as shown in FIG. 4B, an interlayer insulating film 320 of silicon oxide is formed on the entire surface by plasma CVD. The thickness of the interlayer insulating film 320 is 300 to 6000 nm. This interlayer insulating film 320 may be a silicon nitride film or a multilayer film of a silicon oxide film and a silicon nitride film. Next, the interlayer insulating film 320 is etched by a wet etching method to form contact holes in the source / drain.

  Thereafter, a titanium film having a thickness of 200 to 600 nm is formed by sputtering, and this is etched to form electrodes / wirings 321, 322, and 323 for driving circuits and electrodes / wirings 324 and 325 for pixel TFTs. The electrodes / wirings 321, 322, and 323 of the driving circuit and the electrodes / wirings 324 and 325 of the pixel TFT may be formed of a multilayer film such as Ti—Al—Ti. Further, as shown in FIG. 4C, a polyimide film 326 having a thickness of 100 to 300 nm is formed. A photoresist 327 is formed on the polyimide film, and a contact hole reaching the pixel TFT electrode 325 is formed by photolithography.

  Next, a pixel electrode is formed. As shown in FIG. 5A, a film 328 containing aluminum as a main component is formed to a thickness of 50 to 150 nm by sputtering. After that, as shown in FIG. 5B, a mask 329 is formed and etched to form the pixel electrode 330 (FIG. 5C).

  In this embodiment, the pixel electrode 330 is made of a highly reflective material. In this embodiment, a material mainly composed of aluminum is used for the pixel electrode 330, but other than that, titanium, an alloy of aluminum and silicon, an alloy of aluminum and titanium, an alloy of aluminum and scandium, or the like is used. Also good. Alternatively, the pixel electrode 33 may have a stacked structure of these plural materials.

  In the pixel region, at least one TFT is disposed and electrically connected to each pixel electrode. As the drive circuit, a shift register, an address decoder, or the like is used. Further, other circuits are configured as necessary.

  In this manner, an active matrix substrate in which a plurality of driving circuit TFTs (driving circuit regions) and a plurality of pixel TFTs (pixel regions) are integrally formed on the same substrate is manufactured. In this embodiment, the number of pixels is 1024 vertical × horizontal 768. In this specification, the region where the pixel TFT including the pixel TFT at the endmost portion is present is referred to as a pixel region, and the region where the drive circuit TFT including the drive circuit TFT at the endmost portion is present is referred to as a drive circuit region. To.

  The TFT substrate is thoroughly cleaned, and various chemicals such as an etching solution and a resist stripping solution used for the surface treatment at the time of TFT formation are sufficiently cleaned.

  Next, the gap retaining material forming step will be described with reference to FIGS. 6 and 7. For convenience, the scales of the gap holding material and the TFT formed are different.

  A TFT substrate obtained by the above-described process is shown in FIG. As shown in FIG. 6B, a photosensitive polyimide film 601 was formed to a thickness of 4.2 μm by spin coating. Thereafter, in order to make the film thickness of the photosensitive polyimide film 601 uniform over the entire surface of the active matrix substrate, it was left at room temperature for 30 minutes (leveling). Then, the active matrix substrate on which the photosensitive polyimide film 601 was formed was pre-baked at 120 ° C. for 3 minutes.

Next, the upper surface of the photosensitive polyimide film 601 is polished and planarized by CMP (chemical mechanical polishing). In this example, a colloidal material in which silica (SiO ₂ ) fine powder was dispersed in an acidic solution was used as the slurry in the CMP process. As conditions for the CMP treatment, the substrate was rotated at 50 rpm, the polishing cloth was rotated at 50 rpm, and the polishing time was 3 minutes. By this CMP process, the upper surface of the photosensitive polyimide film 601 was flattened, and the film thickness was 3.2 μm. Further, the processing accuracy of the photosensitive polyimide film 601 subjected to the CMP treatment was 0.1 μm.

In this embodiment, the slurry used in the CMP process was prepared by dispersing silica fine powder in an acidic solution. However, an acidic solution such as aluminum oxide (Al ₂ O ₃ ) or cerium oxide (CeO ₂ ) was used. You may use what was disperse | distributed in. It is desirable to change the slurry depending on the material to be subjected to the CMP process. In this embodiment, the substrate is rotated at 50 rpm and the polishing cloth is rotated at 50 rpm, and the CMP process is performed for 3 minutes.

  Note that since the cell gap (substrate interval) is determined by the film thickness of the photosensitive polyimide film 601 that has been subjected to the CMP process, the film thickness of the photosensitive polyimide film 601 is appropriately set according to the desired cell gap, and the CMP is performed. The film thickness to be polished may be adjusted by the treatment. In other words, a highly accurate cell gap can be realized.

  In this embodiment, CMP is used for the polishing and planarization process of the photosensitive polyimide film 601, but any processing method can be used as long as the upper surface of the photosensitive polyimide film 601 can be accurately planarized. May be performed. For example, it may be processed by etch back.

  Next, the photosensitive polyimide film 601 is patterned. As shown in FIG. 7A, the photosensitive polyimide film 601 was covered with a photomask 701, and ultraviolet rays were irradiated from above the active matrix substrate. Thereafter, development processing was performed, and post-baking was performed at 280 ° C. for 1 hour. Thus, as shown in FIG. 7B, a patterned cell gap retaining material 702 was formed. In the present specification, the surface of the gap retaining material that has been subjected to the CMP treatment is referred to as an upper surface.

FIG. 8A shows a top view of the active matrix substrate 801 of this embodiment. FIG. 8B is an enlarged perspective view of a portion indicated by a dotted line in FIG. 8A and 8B, for the sake of convenience, the scales of the gap holding member 702, the pixel region 802, and the driver circuit regions 803 and 804 are shown differently. In this embodiment, as shown in FIGS. 8A and 8B, the shape of the gap retaining member 702 is a cylinder, and the diameter of the cylinder is 4 μm and the height is 3.2 μm. In the present embodiment, the gap retaining material 702 is randomly arranged. The arrangement density of the gap retaining members 702 may be 40 to 160 pieces / mm ² . In the present embodiment, the gap holding members 702 are arranged at 50 pieces / mm ² .

  In this embodiment, the shape of the gap retaining material is a cylindrical shape, but the shape of the gap retaining material may be an ellipse, a streamline, or a polygon such as a triangle or a quadrangle. Any shape is acceptable as long as the gap between the first substrate) and the counter substrate (second substrate) can be controlled. Further, in this embodiment, all the gap retaining materials have the same shape, but gap retaining materials having a plurality of types of shapes may be formed. In this embodiment, the plurality of cell gap holding materials are formed on the front surface of the active matrix substrate so that the arrangement density is uniform. However, the number of gap holding materials formed in a certain region may be increased. .

  Next, a counter substrate (not shown) on which a counter electrode is formed is prepared. In this example, ITO (indium tin oxide) was used for the counter electrode.

  Next, an alignment film (not shown) is formed on the active matrix substrate and the counter substrate. A polyimide-based vertical alignment film was used as the alignment film. This polyimide-based vertical alignment film is coated on the active matrix substrate and the counter substrate by spin coating. In this example, the alignment film was formed by spin coating. The thickness of the alignment film was 100 nm. Then, it heated (baked) by sending a hot air of 180 degreeC, and hardened the polyimide.

  Next, a rubbing process was performed in which the counter substrate surface on which the alignment film was formed was rubbed in a certain direction with a buff cloth (fibers such as rayon or nylon) having a length of 2 to 3 mm. In this embodiment, the rubbing process on the active matrix substrate side is not performed.

  Next, a sealant 805 was applied on the outer frame of the active matrix substrate (FIG. 8A). Thereafter, the active matrix substrate and the counter substrate were bonded together.

  Next, a liquid crystal material as a display medium is injected from a liquid crystal injection port 806. Accordingly, the liquid crystal material is sandwiched between the active matrix substrate and the counter substrate. In the present embodiment, since the shape of the gap retaining material is a columnar shape, the flow resistance between the liquid crystal material and the surface of the gap retaining material generated when the liquid crystal material is injected is small. Therefore, the liquid crystal material could be uniformly injected over the entire surface of the substrate. In addition, it is preferable that the shape and arrangement of the gap retaining agent reduce this flow resistance.

  Thereafter, a sealant (not shown) was applied to the liquid crystal material injection port, and the sealant was cured by irradiating with ultraviolet rays to completely seal the liquid crystal material in the cell.

  When the display characteristics were actually examined using the fabricated cell, no interference fringes were observed on the cell surface. Moreover, a good display without disclination was obtained.

  The present embodiment is different from the first embodiment in the region where the gap retaining material is formed. Please refer to FIG. 900 is a gap holding material, 901 is an active matrix substrate, 902 is a pixel region, 903 and 904 are drive circuit regions, 905 is a sealant, and 906 is a liquid crystal injection port.

  As shown in FIG. 9, in this embodiment, the gap retaining member 900 is formed at a certain interval in the pixel region or the drive circuit region. In the pixel region, preferably, the gap maintaining material 900 is formed in a region where the signal line of the TFT and the selection line intersect. Further, the gap forming material 900 may be formed at different intervals between the pixel region and the drive circuit region.

  The present embodiment is different from the first and second embodiments in the region where the gap retaining material is formed. Please refer to FIG. Reference numeral 1000 denotes a gap holding material, 1001 denotes an active matrix substrate, 1002 denotes a pixel region, 1003 and 1004 denote drive circuit regions, 1005 denotes a sealant, and 1006 denotes a liquid crystal injection port.

  As shown in FIG. 10, in this embodiment, the gap retaining material 1000 is disposed in a region excluding the pixel region 1002 and the drive circuit regions 1003 and 1004.

  In this embodiment, since the gap retaining material 1000 is not present in the pixel region and the drive circuit region, the substantial aperture ratio of the pixel is not reduced, and the pixel region and the counter substrate are bonded together when the active matrix substrate and the counter substrate are bonded. Unnecessary stress does not occur in the TFT in the drive circuit area. Therefore, the TFT is not damaged, leading to an improvement in product yield.

  In this embodiment, the configuration on the active matrix side is the same as that of the first, second, or third embodiment. However, the configuration on the counter substrate side is different.

  In the electro-optical device according to the present exemplary embodiment, after the pixel electrode is formed on the counter substrate side, the organic resin film is formed. In this embodiment, polyimide is used for the organic resin film. In addition to polyimide, resins such as acrylic, polyamide, and polyimide amide may be used for the organic resin film.

  Next, the organic resin film is subjected to CMP treatment in the same manner as in Example 1. Therefore, the organic resin film is planarized.

  Thereafter, an alignment film is formed on the active matrix substrate and the counter substrate, and a rubbing process is performed on the counter substrate side. The subsequent steps are the same as those in the first embodiment.

  In this embodiment, not only the upper surface of the gap holding material provided on the active matrix substrate side is flat, but also the upper surface of the organic resin film provided on the counter substrate is ensured to be more uniform. Cell gap can be realized.

  In the first to fourth embodiments, the planar type TFT has been described as an example, but the present invention is not affected by the TFT structure as a matter of course. Therefore, the individual TFTs in the pixel region and the drive circuit region may be inverted stagger type TFTs or multigate type TFTs.

  In Examples 1 to 4, polyimide is used for the gap retaining material, but a resin such as acrylic, polyamide, or polyimide amide may be used. Moreover, you may use a thermosetting resin for a gap maintenance material.

  Furthermore, in Examples 1 to 4 described above, the gap retaining material is formed on the active matrix substrate side, but may be formed on the counter substrate side. Further, the gap retaining material may be formed on both the active matrix substrate and the counter substrate. Also in these cases, the method of forming the gap retaining material may follow the method of the first embodiment.

  Moreover, in the said Examples 1-4, although the gap holding material was formed using the polyimide, you may form a gap holding material with another insulating material.

  In the first to fourth embodiments, the reflective electro-optical device has been described. However, a transmissive electro-optical device may be formed by adding a change such as a transparent pixel electrode.

  In the first to fourth embodiments, the case where a liquid crystal material is used as the display medium has been described. However, the gap maintaining material of the present invention is a mixed layer of a liquid crystal material and a polymer, so-called polymer dispersion type liquid crystal display. It can also be used for devices. The display medium of the electro-optical device according to the present invention may be any other display medium whose optical characteristics can be modulated in response to an applied voltage. For example, an electroluminescence element or the like may be used as the display medium.

  Further, although not particularly shown in the first to fourth embodiments, a color filter may be provided on the counter substrate side when it is necessary to perform color display. The color filter is required to have a uniform and flat thickness, excellent heat resistance and chemical resistance, and the like.

  In Examples 1 to 4, the rubbing process is performed only on the counter substrate side, but the rubbing process may be performed on the active matrix substrate side. Further, rubbing treatment may be performed on both sides of the active matrix substrate and the counter substrate.

  In the above-described embodiments, the active matrix type electro-optical device has been described. Needless to say, the present invention can also be applied to a passive type electro-optical device having no active element such as a TFT.

It is sectional drawing and a top view of the conventional active matrix type liquid crystal display device. It is a figure which shows the manufacturing process of the conventional active matrix liquid crystal display device. It is a figure which shows the manufacturing process of the active matrix type liquid crystal display device by this invention. It is a figure which shows the manufacturing process of the active matrix type liquid crystal display device by this invention. It is a figure which shows the manufacturing process of the active matrix type liquid crystal display device by this invention. It is a figure which shows the preparation processes of the gap holding material by this invention. It is a figure which shows the preparation processes of the gap holding material by this invention. FIG. 2 is a top view and a perspective view of an active matrix liquid crystal display device according to the present invention. 1 is a top view of an active matrix liquid crystal display device according to the present invention. 1 is a top view of an active matrix liquid crystal display device according to the present invention.

Explanation of symbols

101, 110, 401 Substrate 102 TFT active layer 103 Gate electrode 104 Data line 105 Drain electrode 106 Interlayer insulating film 107 Black matrix 108 Pixel electrode 109, 112 Alignment film 111 Counter electrode 702, 900, 1000 Gap holding material

Claims (13)

A first substrate;
A second substrate provided facing the first substrate;
A plurality of gap holding members provided on the first substrate and holding a substrate interval between the first substrate and the second substrate;
The first substrate is
A pixel region having a plurality of pixel electrodes and thin film transistors electrically connected to the pixel electrodes;
A drive circuit region provided with a drive circuit for driving the thin film transistor,
In the pixel region , the plurality of gap holding materials are formed at a first constant interval, and in the driving circuit region , the plurality of gap holding materials are formed at a second constant interval. The liquid crystal display device is characterized in that the first constant interval is different from the second constant interval . A first substrate;
A second substrate provided facing the first substrate;
A plurality of gap holding members provided on the second substrate and holding a substrate interval between the first substrate and the second substrate;
The first substrate is
A pixel region having a plurality of pixel electrodes and thin film transistors electrically connected to the pixel electrodes;
A drive circuit region provided with a drive circuit for driving the thin film transistor,
In the region facing the pixel region, the plurality of gap retaining materials are formed at a first constant interval, and in the region facing the drive circuit region, the plurality of gap retaining members are a second constant constant. A liquid crystal display device, wherein the liquid crystal display device is formed with an interval, and the first constant interval and the second constant interval are different. In claim 1,
A first vertical alignment film provided after forming the plurality of gap retaining materials on the side of the first substrate on which the plurality of gap retaining materials are formed;
A liquid crystal display device comprising: a second vertical alignment film provided on a side of the second substrate facing the first substrate. In claim 2,
A first vertical alignment film provided after forming the plurality of gap holding materials on the side on which the plurality of gap holding materials are formed of the second substrate;
A liquid crystal display device comprising: a second vertical alignment film provided on a side of the first substrate facing the second substrate. In claim 1 or claim 3 ,
In the pixel region, the plurality of gap maintaining materials are formed in a region where a signal line for inputting a signal to the thin film transistor and a selection line cross each other. In claim 2 or claim 4,
In the region facing the pixel region, the plurality of gap maintaining materials are formed so as to overlap with a region where a signal line for inputting a signal to the thin film transistor and a selection line intersect. . In any one of Claims 1 thru | or 6,
The liquid crystal display device, wherein the plurality of gap maintaining members have a columnar shape. In any one of Claims 1 thru | or 7,
The liquid crystal display device, wherein the plurality of gap holding members have a plurality of types of shapes. In any one of Claims 1 thru | or 8 ,
The liquid crystal display device, wherein the plurality of gap maintaining members are made of a photosensitive resin. In any one of Claims 1 thru | or 9 ,
The liquid crystal display device, wherein the pixel electrode is formed on a polyimide film. In any one of Claims 1 thru | or 9 ,
The pixel electrode is formed on a polyimide film,
The polyimide film is formed on a silicon nitride film,
The liquid crystal display device, wherein the silicon nitride film is formed on a silicon oxide film. In any one of Claims 1 thru | or 11 ,
A liquid crystal display device comprising a color filter on the second substrate. In any one of Claims 1 to 12 ,
The liquid crystal display device, wherein the thin film transistor is an inverted stagger type.

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