JP4197193B2 - Method for manufacturing photoelectric conversion device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a photoelectric conversion device using a semiconductor substrate, and specifically to a solar cell. The solar cell structure can be applied to various types of solar cells using a bulk semiconductor such as a known single crystal wafer or polycrystalline wafer.
[0002]
Furthermore, the present invention relates to a photoelectric conversion device using a thin film semiconductor formed on an insulating or conductive substrate as a photoelectric conversion layer, and can be applied to a solar cell using the thin film semiconductor.
[0003]
The present invention can be applied to a junction type solar cell based on a PN junction, a non-junction type solar cell with a Schottky barrier or MIS structure, a multilayer junction type solar cell, a heterojunction type solar cell, and the like.
[0004]
[Prior art]
Solar cells can be manufactured using various semiconductor materials and organic compound materials, but silicon (silicon), which is a semiconductor, is mainly used industrially. Solar cells using silicon can be broadly classified into bulk solar cells using a wafer such as single crystal silicon or polycrystalline silicon, and thin film solar cells in which a silicon thin film is formed on a substrate.
[0005]
In addition, the spread of solar cells requires a reduction in manufacturing costs. In particular, thin-film solar cells require less raw materials than bulk solar cells, and are expected to reduce costs. Has been.
[0006]
At present, in the field of thin film solar cells, amorphous silicon solar cells have been put into practical use. However, conversion efficiency is low compared to solar cells using single crystal silicon or polycrystalline silicon, and photodegradation, etc. Applications are limited due to problems. For this reason, development of a thin film solar cell using a crystalline silicon film has been carried out as another means.
[0007]
In this way, solar cells are required to have high conversion efficiency and reduction in manufacturing cost at the same time, but both are substantially contradictory. For example, when pursuing conversion efficiency, it can be achieved relatively easily by using a high-grade single crystal wafer (having very few defects), but the manufacturing cost is increased accordingly.
[0008]
Conversely, even if the cost can be reduced by using a low-grade (so-called solar cell grade) single crystal wafer, the conversion efficiency is inevitably reduced to some extent. In particular, polycrystalline wafers, thin film solar cells, and the like have been developed mainly for cost reduction, and conversion efficiency is secondary.
[0009]
Moreover, the thin film solar cell using a crystalline silicon thin film attracts attention especially at a low cost. However, since a crystalline silicon thin film, for example, a polycrystalline silicon thin film has a small absorption coefficient, there is a problem that a sufficient function as a photoelectric conversion element is not achieved unless the film thickness is increased.
[0010]
In general, the polycrystalline silicon thin film obtained always has a crystal grain boundary, so that the crystal grain boundary forms an electronic state having an energy corresponding to a forbidden band, thereby reducing the lifetime of carriers. That is, when the film thickness is increased, recombination occurs before reaching the electrode, and it is difficult to secure a sufficient photoelectric conversion rate.
[0011]
[Problems to be solved by the invention]
As described above, the development of solar cells, which have attracted attention as a new energy source in recent years, has been regarded as important, and how to manufacture solar cells with high conversion efficiency at a lower cost is the key to future energy development. Is a big issue.
[0012]
Therefore, in order to solve the above-described problems, the present invention provides. Low crystalline silicon substrate (for example, solar cell grade) often used for bulk solar cells, crystallinity with high degree of crystallinity (eg, semiconductor grade) with less defects It is a first problem to provide a technique for transforming into the first.
And it aims at providing the bulk type solar cell which achieves high conversion efficiency and low cost simultaneously by manufacturing a solar cell using the crystalline silicon substrate which has the high crystallinity.
[0013]
Furthermore, the present invention provides a technique for forming a crystalline silicon thin film that becomes a photoelectric conversion region in a thin film solar cell into a crystalline silicon thin film having high crystallinity with fewer defects and the like. It is an issue.
And it aims at providing a thin film solar cell which manufactures a solar cell using the crystalline silicon which has the high crystallinity, and can achieve high conversion efficiency and low cost simultaneously.
[0014]
[Means for Solving the Problems]
(A) In order to solve the above-described problems, the structure of the invention disclosed in this specification causes the catalytic element to segregate to defects inside the semiconductor substrate in a photoelectric conversion device using a crystalline semiconductor substrate. Thereafter, the main component is to getter the catalytic element in the semiconductor substrate with a halogen element or a group 15 element and simultaneously remove defects in the semiconductor substrate.
[0015]
Examples of the semiconductor substrate include substrates using Si-based, GaAs-based, and CdS-based materials. Particularly common examples include a single crystal silicon wafer and a polycrystalline silicon wafer. At present, various means are known as means for forming solar cells on a silicon wafer.
[0016]
For example, generally, for example, a layer having a shallow reverse conductivity type (N-type layer) is formed on the surface of a P-type silicon wafer to form a PN junction, and carriers collected in the N-type layer are drawn out by an electrode to supply current. It is the composition which obtains. Further, not only a PN junction but also a PIN junction (in the case of crystalline silicon, P ⁺ PN junction, P ⁺ P ^- In some cases, a bonding form such as N junction) is used.
[0017]
(B) The structure of the invention disclosed in the specification is that the semiconductor includes a semiconductor substrate having crystallinity and a layer containing a catalytic element held in close contact with the semiconductor substrate, and the semiconductor The catalyst element is segregated to defects inside the thin film. After that, the main structure is to getter the catalytic element in the crystalline semiconductor thin film with a halogen element or a group 15 element and to remove defects inside the semiconductor thin film.
[0018]
In the above (b), as the substrate material, for example, ceramic, stainless steel, metal silicon, tungsten, quartz, sapphire, or the like can be used. Various means have been reported for a method for manufacturing a thin film solar cell, but the present invention can be applied in a wide range regardless of the structure and the manufacturing method of the solar cell.
[0019]
For example, an impurity imparting a reverse conductivity type such as P (phosphorus) in the vicinity of the main surface (the side on which sunlight is incident) of a crystalline silicon thin film having a substantially intrinsic I type (or weak P type) There is a method of forming an IN (or PN) junction by adding (forming an N-type layer). In some cases, an IN (or PN) junction is formed by stacking an N-type crystalline silicon layer on a crystalline silicon thin film. Further, in some cases, a PIN junction in which a P-type conductive layer, a substantially intrinsic I-type conductive layer, and an N-type conductive layer are stacked may be formed.
[0020]
The solar cell formed in this way generates carriers by photoexcitation at the junction between the I-type (or P-type) layer and the N-type layer, and draws the carriers collected in the N-type layer with an electrode to generate current. It is the structure to obtain. Moreover, not only PN junction and PIN junction but also P ⁺ In some cases, a junction such as a PN junction is used.
[0021]
The basic configuration of the present invention is to use an effect of promoting crystallization of a catalytic element in order to improve crystallinity of a photoelectric conversion region in a photoelectric conversion device such as a bulk type solar cell or a thin film solar cell. is there.
[0022]
However, although this catalytic element has an action of promoting crystallization, if it is contained in the photoelectric conversion region, there is a risk of impairing electrical characteristics and reliability. Therefore, in the present invention, a gettering action of a halogen element or a group 15 element is used in order to remove the catalytic element from the photoelectric conversion region.
[0023]
In the above (a) and (b), Fe, Co, Pt, Cu, Au or the like can be used as the catalyst element, and a plasma treatment method, a vapor deposition method, a spin coat method or the like can be used as a method for forming the catalyst element layer. Can be used. Preferably, the vapor deposition method and the spin coating method are advantageous in that the semiconductor substrate surface or the semiconductor thin film is hardly damaged. In particular, the spin coating method has good controllability of the addition amount of the catalytic element, and the present inventors mainly use this method.
[0024]
In the above (a) and (b), there are roughly two types of methods for gettering the catalyst element. First, a method of heat treatment in an atmosphere containing a halogen element is raised. As halogen elements that can be used for gettering, Cl (chlorine) and F (fluorine) are particularly preferable. Gases for adding halogen elements to the atmosphere include HCl, HF, HBr, Cl. ₂ , NF _Three , ClF _Three , F ₂ , Br ₂ One kind or plural kinds of gases selected from the above.
[0025]
Second, there is a method in which a layer containing an element belonging to Group 15 is formed on the surface of a semiconductor substrate or a semiconductor thin film, and the semiconductor substrate surface or semiconductor thin film surface and a layer containing an element belonging to Group 15 are heat-treated. In order to form a layer containing an element belonging to Group 15, a liquid phase method or a gas phase method can be used. For example, a silicon oxide film or a silicon film to which an element belonging to Group 15 is added may be formed. Alternatively, a method of introducing an element belonging to Group 15 into a semiconductor substrate or a semiconductor thin film by an ion implantation method, a plasma doping method, or the like can be used.
[0026]
Examples of elements belonging to Group 15 include N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth). According to the inventor's research, P has a remarkable gettering effect.
[0027]
In addition, it is important that the concentration of the element belonging to Group 15 in the layer containing the element belonging to Group 15 is at least one order of magnitude higher than the catalyst concentration in the semiconductor substrate or semiconductor thin film. For example, the catalyst concentration of the semiconductor substrate on which the catalyst is segregated is about 1 × 10 ¹⁹ /cm ^Three If so, the concentration of the Group 15 element in the layer containing the element belonging to Group 15 is 1 × 10 ²⁰ /cm ^Three That's it.
[0028]
In the gettering using a halogen element or an element belonging to Group 15, the effect of gettering changes depending on the heating temperature and the heating time. Therefore, the heat treatment conditions for gettering may be set as appropriate in consideration of material properties such as heat resistance of the substrate, productivity, economy, and the like.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 This embodiment will be described with reference to FIG. The embodiment of the present invention relates to a bulk type solar cell, and uses Ni as a catalytic element. An example in which a halogen element is used to remove Ni is shown.
[0030]
In FIG. 1A, reference numeral 101 denotes a semiconductor substrate, here a solar cell grade single crystal silicon substrate. Note that in FIG. 1A, the defects indicated by crosses in the semiconductor substrate 101 are defects that remain slightly in the single crystal silicon. These defects are dislocations, dangling bonds, and the like, and are difficult to remove without heat treatment at a considerably high temperature of 1100 ° C. or higher.
[0031]
Of course, other silicon substrates having crystallinity can also be used. Therefore, although an example using a single crystal silicon substrate is shown here as an example, the present invention can be similarly applied to, for example, a polycrystalline silicon substrate.
[0032]
Next, a layer containing Ni (nickel) element is formed on the surface of the semiconductor substrate 101. The Ni layer 102 can be formed using a plasma treatment method, a vapor deposition method, a spin coating method, or the like. Preferably, the vapor deposition method and the spin coating method are advantageous in that they do not easily damage the substrate surface. In particular, the spin coating method has good controllability when adding a very small amount of Ni to the semiconductor substrate, and the present inventors mainly use this method.
[0033]
When the state shown in FIG. 1A is thus obtained, heat treatment is performed in a temperature range of 450 to 700 ° C. The heat treatment is preferably performed in an inert atmosphere. By this heat treatment, Ni element diffuses from the Ni layer 102, and Si—Ni bonds are preferentially generated in the defects indicated by crosses. The defect indicated by the cross mark in FIG. 1A is indicated by the circle mark in FIG. 1B in order to show that the Ni element is bonded by the defect and the defect is substantially compensated.
[0034]
By the heat treatment shown in FIG. 1B, the Ni layer 102 and the semiconductor substrate 101 react on the surface of the semiconductor substrate 101 to form a nickel silicide layer 103. Since this nickel silicide layer 103 contains Ni element at a high concentration, it is desirable that the nickel silicide layer 103 be removed by etching with a chemical solution such as hydrofluoric acid in advance before the next Ni gettering process.
[0035]
Next, gettering removal of the Ni element diffused inside the semiconductor substrate 101 is performed. As elements that can be used for gettering, halogen elements such as Cl and F are preferable. Gases for introducing halogen elements include HCl, HF, HBr, Cl. ₂ , NF _Three , F ₂ , Br ₂ One kind or plural kinds of gases selected from the above.
[0036]
Here, a gas containing the above halogen element in its composition, typically HCl, NF _Three An example in which gettering processing is performed by a vapor phase method using a gas such as the above will be described. This treatment is performed in a temperature range of 700 to 1100 ° C., and HCl, NF is used in the heat treatment treatment atmosphere. _Three Etc. are performed in a state in which the gas is contained.
[0037]
In the state shown in FIG. 1C obtained in this manner, the Ni element existing in the semiconductor substrate 101 is almost gettered and removed by the halogen element, and the oxide element 104 formed on the surface of the semiconductor substrate 101 is removed. It is taken in or becomes gaseous and volatilizes. Therefore, substantially no Ni element remains in the semiconductor substrate 101, and even if it remains, its concentration is reduced to 1/10 to 1/1000. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows. In addition, the element concentration in this specification is defined as the minimum value of the measured value measured by SIMS (secondary ion mass spectrometry).
[0038]
Further, since the semiconductor substrate 101 is a solar cell grade, it contains some metal elements from the beginning, but these metal elements are gettered simultaneously with the removal of the Ni element, so the impurities inside the semiconductor substrate 101 are almost removed. It is thought that it is done.
[0039]
In addition, the following may occur inside the semiconductor substrate 101 simultaneously with the heat treatment. First, when the Ni element is gettered by the halogen element and desorbed, it is considered that the following reaction typically occurs.
2Si-Ni + 4Cl (or F) → Si-Si + 2NiCl ₂ (Or NiF ₂ )
As shown in the above equation, since the Si dangling bonds formed by the elimination of Ni are adjacent to each other, the energy less than the dangling bonds indicated by crosses in FIG. To recombine with each other to form Si-Si bonds.
[0040]
In particular, NiCl ₂ Because of its high volatility, most of it diffuses into the gas phase other than being taken into the thermal oxide film during the heat treatment. FIG. 20 shows NiCl as a reference material. ₂ The relationship between the vapor pressure of (nickel chloride) and temperature is shown. For example, NiCl at 950 ° C ₂ The vapor pressure of is about 0.8 atm, indicating a pressure close to atmospheric pressure.
[0041]
As described above, in the process shown in FIG. 1C, gettering of Ni element and recombination of Si are performed at the same time, and defects existing in the semiconductor substrate 101 can be almost eliminated. . Accordingly, as shown in FIG. 1D, the semiconductor substrate 105 obtained by etching away the oxide film 104 has a smaller defect density than the semiconductor substrate 101 in the state shown in FIG. A high-grade silicon substrate comparable to a high-grade silicon substrate can be obtained.
[0042]
Note that in this gettering step, a halogen element is contained in the semiconductor substrate 101 at 1 × 10 6. ¹⁶ ~ 1 × 10 ²⁰ /cm ^Three Remains at a concentration of. This halogen element often exists in the form of terminating a dangling bond of Si.
[0043]
Further, although an example in which Ni element is used as a catalyst element and gettering is performed with a halogen element is shown here, Fe, Co, Pt, Cu, Au, or the like can be used as a catalyst element that can obtain the same effect. .
[0044]
As described above, by using the present invention, it is possible to convert a low-grade silicon substrate such as a solar cell class into a highly crystalline silicon substrate comparable to a high-grade silicon substrate such as a semiconductor grade. Become. Therefore, a solar cell that achieves high conversion efficiency can be manufactured using a material that is as inexpensive as possible.
[0045]
When the semiconductor substrate 105 as shown in FIG. 1D is obtained, impurity ions having a conductivity type opposite to that of the semiconductor substrate 105 are implanted into the surface (the upper surface in FIG. 1D). In the following description, it is assumed that the semiconductor substrate 105 is a P-type silicon substrate.
[0046]
Then, the impurity ions (in this case, P (phosphorus)) are diffused by heat treatment to form a shallow N-type layer on the surface layer of the semiconductor substrate 105. Since the outermost surface layer of the N-type layer is damaged by ion implantation, it is desirable to remove it by etching using a wet method. At that time, if the texture structure is intentionally provided with unevenness on the surface of the N-type layer, sunlight can be used efficiently. Moreover, you may form an anti-reflective film on it as needed.
[0047]
Finally, extraction electrodes are formed on the front and back surfaces of the semiconductor substrate 105 to complete the solar cell. The extraction electrode on the side on which sunlight is incident needs to have a shape (for example, a comb shape) that does not shield sunlight. A transparent electrode can also be used as the extraction electrode.
[0048]
Since the solar cell manufactured in this way is formed using an inexpensive silicon substrate, the manufacturing cost can be reduced. Furthermore, since it is an inexpensive low-grade silicon substrate, it has crystallinity comparable to that of a high-grade grade, so that it is possible to manufacture a bulk type solar cell that achieves high conversion efficiency.
[0049]
In the present embodiment, the method for improving the crystallinity of the semiconductor substrate of the bulk type solar cell has been described. However, the thin film solar cell that achieves high conversion efficiency by performing the same treatment on the semiconductor thin film of the thin film solar cell. It is possible to manufacture a battery.
[0050]
[Embodiment 2]
This embodiment will be described with reference to FIG. The present embodiment relates to a bulk type solar cell, and shows an example in which Ni is used as a catalyst element and a group 15 element is used to remove Ni.
[0051]
In FIG. 3A, first, a catalyst element (for example, Ni element) is held on the surface of the semiconductor substrate 201 and heat treatment is performed to diffuse the Ni element into the semiconductor substrate 201. Then, Ni element is preferentially segregated with respect to defects inside the semiconductor substrate 201.
[0052]
Next, a layer 202 containing phosphorus is formed on the surface of the semiconductor substrate 201 by a vapor phase method or a liquid phase method. As the layer 202 containing phosphorus, phosphorus silicate and glass (PSG) or phosphorus-doped polycrystalline silicon may be formed. Alternatively, phosphorus can be implanted shallowly into the semiconductor substrate 201 by an ion implantation method to form an N-type layer.
[0053]
Then, as shown in FIG. 3B, the semiconductor substrate 201 and the layer 202 containing phosphorus are subjected to heat treatment. When nickel is used as the catalytic element and phosphorus is used as the gettering element, nickel and phosphorus are stably bonded by heating at around 600 ° C., Ni _Three P, Ni _Five P ₂ , Ni ₂ P, Ni _Three P ₂ , Ni ₂ P _Three , NiP _Three And
Yes.
[0054]
For this reason, nickel in the semiconductor substrate 201 is absorbed by the layer 202 containing phosphorus by the heat treatment shown in FIG.
[0055]
At the grain boundary of the semiconductor substrate 201, silicon dangling bonds and nickel are bonded and silicified as shown in a bonded state such as Si-Ni-Si. However, heat treatment for gettering is performed. As a result, the bond between nickel and silicon is broken. Since the Si dangling bonds formed by the elimination of Ni are adjacent to each other, they recombine with each other with less energy than the dangling bonds to form Si-Si bonds.
[0056]
As described above, in the step shown in FIG. 3B, gettering of Ni element and recombination of Si are performed at the same time, and defects existing in the semiconductor substrate 201 can be almost eliminated. . Therefore, the semiconductor substrate 203 obtained by etching and removing the phosphorus-containing layer 202 illustrated in FIG. 3C has a smaller defect density than the semiconductor substrate 201 in the state illustrated in FIG. A high-grade silicon substrate comparable to a high-grade silicon substrate can be obtained.
[0057]
Note that heat treatment for gettering is performed in an electric furnace at 500 ° C. or more, preferably 550 to 650 ° C., and the heating temperature is 2 hours or more, preferably 4 to 12 hours.
And In addition, when heated at a temperature of 650 ° C. or higher, phosphorus gettered with Ni re-diffuses, and a desired effect cannot be obtained. As an atmosphere for the heat treatment, an inert atmosphere, a hydrogen atmosphere, or an oxidizing atmosphere may be used. In particular, the effect of gettering can be increased by adding a halogen element to the oxidizing atmosphere.
[0058]
The semiconductor substrate 203 obtained as described above has improved crystallinity than the original state. For example, a lower grade silicon substrate can be a substrate having the same crystallinity as a higher grade silicon substrate.
[0059]
In the present embodiment, the method for improving the crystallinity of the semiconductor substrate of the bulk type solar cell has been described. However, the thin film solar cell that achieves high conversion efficiency by performing the same treatment on the semiconductor thin film of the thin film solar cell. It is possible to manufacture a battery.
[0060]
【Example】
Example 1 In this example, a photoelectric conversion element such as a solar cell is manufactured on a low-grade semiconductor substrate, specifically, a single crystal silicon substrate (silicon wafer) called a solar cell class.
[0061]
In addition, since this invention is a technique which improves the crystallinity of the semiconductor which is the main part which comprises a solar cell, it can apply to the solar cell of all the structures and structures which are all known. Therefore, the present embodiment shows an example thereof, and the configuration and numerical values in the embodiment are not limited thereto.
[0062]
First, pretreatment of a silicon substrate will be described with reference to FIG. First, a solar cell grade silicon substrate 101 having a main surface (upper surface side in the drawing) having a (100) plane orientation is prepared. The film thickness is 300 μm. In addition, what is indicated by a cross is a defect remaining inside. Since the silicon substrate for solar cells has a somewhat wide tolerance for internal defect density, impurities, etc., there is a merit that the purification at the stage of producing the ingot is rough and the cost is relatively low.
[0063]
In this embodiment, a commonly used P-type silicon substrate is used. It should be noted that the N-type may be used, but when the N-type is used, it is necessary to reverse the conductivity type of this embodiment. That is, the N type may be replaced with the P type, and the P type may be replaced with the N type.
[0064]
Next, a solution containing a catalytic element (Ni element is taken as an example in this embodiment) is applied to the surface of the silicon substrate 101 by spin coating. The coating process is performed as follows.
[0065]
First, a thin oxide film layer (not shown) is formed on the surface of the silicon substrate 101. A method of forming an oxide film layer (not shown) may be a method of immersing the substrate in a perwater ammonia solution and treating at 70 ° C. for 5 minutes, a method of treating for 5 minutes by UV treatment, or the like. The oxide film layer (not shown) formed in this way improves the wettability of the silicon surface when a nickel salt solution containing Ni element (for example, nickel acetate salt or nickel nitrate salt) is applied.
[0066]
Next, a nickel salt solution is dropped on the center of the substrate that spins on a rotating support (not shown) to form a thin nickel salt solution water film on the entire surface of the substrate. Then, the rotation speed of the spinner is increased and the water film is blown off to form the nickel layer 102. Thus, the state shown in FIG.
[0067]
Next, in a nitrogen atmosphere, heat treatment is performed in a temperature range of 450 to 700 ° C., typically 550 to 650 ° C., and Ni element is diffused. In this embodiment, heat treatment is performed at 600 ° C. for 4 hours. By this heat treatment, Ni element diffuses into the silicon substrate 101 and preferentially segregates into defects inside the silicon substrate 101.
[0068]
The amount of introduced Ni element is 1 × 10 5 in the semiconductor film. ¹⁹ ~ 1 × 10 ²⁰ /cm ^Three Then, conditions such as Ni concentration and coating amount are adjusted in the coating solution. Below this concentration, Ni elements cannot be segregated efficiently in the defects, and it is difficult to obtain the effects of the present invention. On the other hand, if the concentration is higher than this, gettering becomes difficult later, which is not preferable.
[0069]
In addition, since nickel silicide formed in the defect has a lattice constant close to that of silicon, the nickel silicide is in a bonded state with good matching. Further, the Ni layer 102 reacts with the silicon substrate 101 in contact therewith to become a nickel silicide layer 103 containing Ni element at a high concentration (FIG. 1B).
[0070]
A major feature of the present invention is that the Ni element, which is a catalytic element, is intentionally segregated with respect to defects, and the reason is that defects having irregular bonding states as described above have good consistency. It is in a combined state. This is important in the subsequent gettering process of the Ni element by the halogen element.
[0071]
In this embodiment, the silicon substrate has been described as an example, and thus it has been described that the Ni element is effective. However, even if another semiconductor substrate (for example, GaAs-based or CdS-based) is used, By using a catalyst element having a close proximity (preferably a transition metal), the same effect as in this embodiment can be obtained.
[0072]
Next, the nickel silicide layer 103 is removed by etching the silicon substrate 101 with a hydrofluoric acid solution or the like. This is because the nickel silicide layer 103 contains Ni element at a high concentration, which is inconvenient in the Ni element removal process by gettering later.
[0073]
Next, heat treatment is performed in a temperature range of 700 to 1100 ° C., typically 800 to 950 ° C., in an atmosphere containing a halogen element. In this embodiment, heat treatment is performed at 950 ° C. for 30 minutes in an oxidizing atmosphere in which 0.1 to 10 wt%, typically 3 wt% HCl (hydrogen chloride) is mixed with respect to oxygen. By this heat treatment, the Ni element that has compensated for defects in the silicon substrate 101 is gettered by the Cl element and desorbed.
[0074]
The Ni element gettered by the Cl element is diffused into the air as nickel chloride, which is a volatile gas, or is taken into the oxide film 104 formed on the surface of the silicon substrate 101 to form a silicon substrate. 101 is removed from the inside.
[0075]
Accordingly, the concentration of Ni element remaining in the silicon substrate 101 is extremely low, and is reduced to 1/10 to 1/1000 of the original state after processing. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows. This Ni element is 5 × 10 ¹⁸ /cm ^Three In the state of being included above, the characteristics as a metal appear in the semiconductor, which is not preferable. That is, the Ni concentration is set to 5 × 10 5 by gettering. ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three By reducing to the following, it can be set as the silicon substrate which does not affect the function as a solar cell at all.
[0076]
Furthermore, since the Si dangling bonds left after the Ni element is desorbed are close to each other and in an active state, a Si—Si bond is formed during the heat treatment, and the consistency is excellent. Achieve crystallinity. That is, the defect is substantially removed.
[0077]
It should be noted that this process is not intended only for Ni element gettering. Although the gettering process itself is a known means, it is not until the introduction of the Ni element described above, the gettering of the Ni element by the halogen element, and the removal (recombination) of defects performed simultaneously with the gettering. The object of the present invention is achieved.
[0078]
In addition, as illustrated in FIG. 1C, the surface of the semiconductor substrate 101 is oxidized by heat treatment for gettering, so that an oxide film 104 is formed. In this state, reverse diffusion occurs from the oxide film 104 containing Ni element at a relatively high concentration. Therefore, the oxide film 104 is removed by etching with a hydrofluoric acid solution or the like, and a silicon substrate as shown in FIG. 105 can be obtained.
[0079]
Further, when the surface layer of the semiconductor substrate 105 is removed by about 0.1 to 1 μm by a dry etching method or a wet etching method such as hydrazine or sodium hydroxide, Ni element segregated at the interface between the semiconductor substrate 105 and the oxide film 103 is also removed. This is preferable because it can be removed.
[0080]
The silicon substrate 105 in the state of FIG. 1D is originally of a lower grade, but the internal defects are reduced as much as possible, so that it has a crystallinity equivalent to that of a so-called semiconductor grade single crystal silicon substrate. have. Thus, the pretreatment of the silicon substrate is completed. Described below is an example of manufacturing a solar cell. This will be described with reference to FIG.
[0081]
First, in this embodiment, the silicon substrate 105 having the (100) plane as the main surface (the upper surface in the figure) is subjected to an alkali etching process using a chemical solution such as NaOH, so that only the (111) plane is selectively used. Is exposed, and a texture structure is formed in which uneven portions (texture portions) 106 are intentionally formed on the outermost surface of the silicon substrate 105. As shown in FIG. 2A, the texture structure in which the concavo-convex portion 106 is formed on the surface is effective because it can scatter sunlight to increase the optical path length and efficiently absorb sunlight.
[0082]
In this embodiment, a 2% NaOH aqueous solution is heated to 80 ° C., and the texture layer is processed by etching the surface layer of the silicon substrate 105. Etching is carried out for 5 minutes, and then immersed in boiling water to stop the reaction instantaneously, and further thoroughly washed with pure water. In the surface observation with an electron microscope, irregularities of about 0.1 to 5 μm were observed although they were irregular.
[0083]
Next, in FIG. 2B, the surface (upper surface in the drawing) of the silicon substrate 105 obtained through the above steps has conductivity opposite to that of the silicon substrate 105 (N-type in this embodiment). Form a region. This formation method includes a method of depositing a silicon film having N-type conductivity, a method of adding an impurity element imparting N-type (for example, P (phosphorus)), and the latter is adopted in this embodiment. .
[0084]
In this embodiment, as shown in FIG. 2B, P ions are implanted into the silicon substrate 105 by ion doping or plasma doping. Then, P ions implanted in the vicinity of the surface of the silicon substrate 105 are diffused by heat treatment to form an N-type conductive region 107.
[0085]
Thus, a good PN junction 108 is formed at the junction between the silicon substrate 105 and the conductive region 107. This junction depth is 0.5 μm here. Note that in the above-described ion implantation process, the ion doping method is preferable because it is easy to control the junction depth.
[0086]
It should be noted that the outermost surface of the N-type conductive region 107 formed as described above is damaged during ion implantation and has poor crystallinity. Therefore, hydrazine, sodium hydroxide, hydrofluoric acid ( It is preferable to remove the region having poor crystallinity by etching with a mixture of hydrofluoric acid and nitric acid.
[0087]
Next, an antireflection film 109 is formed on the N-type conductive region 107. In this embodiment, as the antireflection film 109, SiO having a thickness of 0.1 to 1 μm formed by the CVD method. ₂ Use a membrane. It is necessary to select an optimum value for the film thickness based on the refractive index of the silicon substrate 105 and the refractive index of the antireflection film 108. In addition, as the antireflection film 109, SiO, SiN, TiO are also used. ₂ , ITO, MgF ₂ Various materials such as can be used.
[0088]
Next, in FIG. 2C, a PSF having a P-type conductivity higher than that of the semiconductor substrate 105 is used as a BSF (back surface field) on the back surface (lower surface in the drawing) of the silicon substrate 105. ⁺ Region 110 is formed. The formation method includes a solid phase diffusion method and an ion implantation method. In this embodiment, the film is formed to a depth of 0.2 μm by ion implantation.
[0089]
With such a BSF structure, the silicon substrate 105 and P ⁺ Since an electric field is generated between the region 110 and the region 110 due to the difference in Fermi level, the minority carriers generated in the substrate 105 that are directed to the inner and rear surfaces are easily reflected there and reach the PN junction. In particular, since single crystal silicon has a small light absorption coefficient with respect to long-wavelength light, it is easy to generate decimal carriers deep in the silicon substrate 105 (near the back surface). Since the BSF structure can effectively use such carriers, it is effective in improving sensitivity to sunlight in a long wavelength region.
[0090]
Finally, conductive region 107 and P ⁺ Extraction electrodes 111 and 112 made of a conductive film such as an aluminum film are formed in the region 110. The conductive film may be formed by sputtering or vapor deposition. In addition, when the electrodes 111 and 112 are formed and then heat treatment is performed at 150 to 300 ° C. for several minutes, adhesion with the base film is increased, and good electrical characteristics can be obtained.
[0091]
Further, if necessary, a back surface reflection film such as Al, Au, Ag, Cu or the like can be provided on the back surface side of the silicon substrate 105 (when sunlight enters from the top surface side of the substrate 105 in the figure). By doing so, sunlight that has not been absorbed in the silicon substrate 105 can be reflected on the back surface, and the utilization efficiency of sunlight can be improved.
[0092]
As described above, a solar cell as shown in FIG. 2D can be manufactured. The solar cell manufactured in this way has the following advantages. (1) Since the base silicon substrate is low in cost, the manufacturing cost of the solar cell itself can be reduced. (2) Although the silicon substrate is low in cost, crystallinity is remarkably improved by the present invention, so that high conversion efficiency can be realized.
[0093]
Therefore, it is possible to manufacture a solar cell having high conversion efficiency at a low price by using the present invention. In other words, it can be said that this technology greatly contributes to the penetration rate when solar cells are used as a next-generation energy medium in daily life.
[0094]
Example 2 In this example, an example in which a polycrystalline silicon substrate is used as a silicon substrate is shown. Since the method for manufacturing a solar cell according to this example is the same as that of Example 1, only the characteristics when a polycrystalline silicon substrate is used will be described.
[0095]
Since a polycrystalline silicon substrate is cheaper than a single crystal silicon substrate, it is considered promising in reducing the manufacturing cost of solar cells. However, since grain boundaries always exist in polycrystalline silicon, there is a problem that carriers generated at the PN junction are trapped in the grain boundaries and recombined.
[0096]
When the crystallinity of the polycrystalline silicon substrate is improved by using the present invention, the same effect can be expected at the grain boundaries as well as the crystallinity within the crystal grains. That is, the Ni element added in the silicon substrate is segregated at the grain boundary to form nickel silicide. And at the same time as the gettering process with a halogen element or a phosphorus element, the Si dangling bonds formed at the grain boundaries can be recombined with good consistency, substantially reducing the energy gap at the grain boundaries. it can.
[0097]
As described above, the present invention is a technique that can be sufficiently applied not only to a single crystal silicon substrate but also to a polycrystalline silicon substrate. When a solar cell is formed using a polycrystalline silicon substrate, the manufacturing cost of the solar cell can be greatly reduced.
[0098]
[Example 3] In Example 1, gettering of a catalytic element (Ni element) was performed using HCl gas. _Three , ClF _Three A fluorine-based gas such as a gas can also be used. In this case, the dangling bond is terminated with fluorine in the gettering process, but the Si—F bond is preferable because the bonding force is stronger than the Si—H bond.
[0099]
Also, NF _Three Since the gas decomposes at a lower temperature than the HCl gas of Example 1, the temperature of the heat treatment can be lowered. However, when it is necessary to recombine Si by heat treatment at a relatively high temperature as in the present invention, the advantage cannot be utilized. Therefore, in this embodiment, HCl is 0.1 to 10 wt%, typically 3 wt%, NF with respect to oxygen. _Three In an atmosphere in which a gas is mixed at 0.1 to 3 wt%, typically 0.3 wt%, heat treatment is performed at 800 ° C. for 30 to 60 minutes to getter Ni elements and remove defects in the silicon substrate.
[0100]
As described above, after removing the catalytic element, the dangling bonds of Si are recombined with each other, and the dangling bonds that could not be recombined are terminated with fluorine, thereby efficiently removing defects.
[0101]
Also, 3 wt% hydrogen with respect to oxygen, ClF _Three A similar effect can be obtained by performing a wet oxidation treatment for 30 to 60 minutes in a temperature range of 500 to 600 ° C. in an atmosphere containing 0.3 wt% of gas. In this case, gettering of the Ni element is further performed by the Cl element and the F element, so that the defect removal can be achieved more effectively. However, since the temperature is low, the efficiency of recombination of Si is sacrificed.
[0102]
[Example 4] In Examples 1 to 3, examples in which chlorine and fluorine which are halogen elements were used as gettering elements were shown. In this embodiment, an example in which phosphorus belonging to a group 15 element is used as a gettering element is shown, and an example in which a layer containing phosphorus is formed by a vapor phase method or a liquid phase method is shown. This embodiment will be described with reference to FIG.
[0103]
First, a solar cell-grade P-type silicon substrate 201 having a (100) plane orientation on the main surface (upper surface side in the drawing) is prepared. The film thickness is 300 μm. Then, similarly to Example 1, nickel is introduced into the silicon substrate 201 to segregate nickel into defects.
[0104]
Next, a PSG film 202 is formed on the surface of the silicon substrate 201 as a layer containing phosphorus. If nickel silicide is formed on the surface of the silicon substrate, the nickel silicide is removed before the PSG film 202 is formed. The PSG film 202 was formed using silane, phosphine, and oxygen as raw materials by an atmospheric pressure CVD method. It is important that the phosphorus concentration in the PSG film 202 is at least an order of magnitude higher than the nickel concentration in the silicon substrate. For example, the nickel concentration of a silicon substrate on which nickel is segregated is about 1 × 10 ¹⁹ /cm ^Three Then, the phosphorus concentration in the PSG film 202 is 1 × 10 ²⁰ /cm ^Three This is done (FIG. 3A).
[0105]
Next, as shown in FIG. 3B, heat treatment is performed at 550 ° C. to 650 ° C. for several hours for gettering. In this example, heating was performed at 600 ° C. for 8 hours in an electric furnace in a nitrogen atmosphere. By this heat treatment, Ni element diffused into the silicon substrate 201 and compensated for defects is gettered by phosphorus in the PSG film 202 and removed from the silicon substrate 201.
[0106]
Therefore, the concentration of Ni element remaining in the silicon substrate 201 is extremely low, and is reduced to 1/10 to 1/1000 of the original state after processing. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows. This Ni element is 5 × 10 ¹⁸ /cm ^Three In the state of being included above, the characteristics as a metal appear in the semiconductor, which is not preferable. That is, the Ni concentration is set to 5 × 10 5 by gettering. ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three By reducing to the following, it can be set as the silicon substrate which does not affect the function as a solar cell at all.
[0107]
Furthermore, since the Si dangling bonds left after the Ni element is desorbed are close to each other and in an active state, Si-Si bonds are formed during the heat treatment, and excellent consistency is achieved. Realize crystallinity. That is, the defect is substantially removed.
[0108]
In this state, reverse diffusion occurs from the PSG film 202 containing Ni element at a relatively high concentration. Therefore, by removing the PSG film 202 by etching with a hydrofluoric acid solution or the like, the crystallinity shown in FIG. Can be obtained.
[0109]
Further, when the surface layer of the silicon substrate 203 is removed by about 0.1 to 1 μm by a dry etching method or a wet etching method such as hydrazine or sodium hydroxide, Ni element segregated at the interface between the silicon substrate 203 and the PSG film 202 is also removed. This is preferable because it can be removed.
[0110]
In this embodiment, the silicon substrate 203 is originally of a lower grade, but defects inside the silicon substrate 201 are reduced as much as possible by the gettering action of phosphorus, so that the crystal of the same degree as that of a so-called semiconductor grade single crystal silicon substrate is obtained. It has sex. Thus, the pretreatment of the silicon substrate is completed. For example, the solar cell described in Example 1 may be manufactured using the obtained silicon substrate 203.
[0111]
[Embodiment 5] In Embodiment 4, an example in which the PSG film 202 is formed by a vapor phase method as the gettering film is shown, but another layer containing phosphorus can be used.
[0112]
For example, a film can be formed using a liquid phase method. For example, an organosilicide solution to which phosphorus is added is applied to the surface of the silicon substrate 201 by a spin coating method, and then baked to form a silicon oxide film to which phosphorus is added.
[0113]
Alternatively, an amorphous or polycrystalline silicon film to which phosphorus is added can be formed by a vapor phase method. Since the gettering film is removed by etching after the gettering step, it is preferable that the gettering film has a high etching selectivity with the semiconductor substrate. Therefore, when a phosphorus-added silicon film is used as the gettering film, care must be taken in removing the gettering film.
[0114]
As a method for facilitating the etching of the phosphorus-added silicon film, there is a method of oxidizing the phosphorus-added silicon film in the heating step for gettering. As a result, only the oxidized silicon film can be selectively removed. In order to oxidize silicon, the heat treatment atmosphere may be an oxidizing atmosphere. For example, a mixed gas atmosphere of nitrogen (partial pressure ratio 89%), oxygen (partial pressure ratio 10%), and hydrogen chloride (partial pressure ratio 1%) may be used. Alternatively, the silicon film may be oxidized by controlling the heating time and the heating temperature.
[0115]
[Embodiment 6] In Embodiments 4 and 5, a method for forming a layer containing phosphorus to be a gettering film by a vapor phase method or a liquid phase method has been shown. In this embodiment, this layer containing phosphorus. An example in which a semiconductor substrate is manufactured by a method of doping phosphorus into a semiconductor substrate is shown. Further, in this embodiment, only pretreatment for a semiconductor substrate is shown. This embodiment will be described with reference to FIG.
[0116]
First, a solar cell grade P-type silicon substrate 211 having a main surface (upper surface side in the drawing) having a (100) plane orientation is prepared. The film thickness is 300 μm. Then, nickel is segregated in the silicon substrate 211 by the same process as in the first embodiment.
At this time, since a silicide layer (not shown) is formed on the surface of the silicon substrate 211, the nickel silicide layer is removed by performing an etching process.
[0117]
Next, as illustrated in FIG. 4A, phosphorus is introduced into the surface of the silicon substrate 211 by an ion implantation method or a plasma doping method, so that a phosphorus-added region 212 is formed. In this embodiment, phosphorus is doped using an ion implantation method. As a result, the phosphorus-added region 212 becomes a region containing phosphorus at a high concentration and is made amorphous by the impact of doping. It is important that the phosphorus concentration in the phosphorus addition region 212 is at least an order of magnitude higher than the nickel concentration in the semiconductor substrate 211. For example, the nickel concentration of the semiconductor substrate 211 on which nickel is segregated is about 1 × 10 ¹⁹ /cm ^Three If so, the phosphorus concentration in the phosphorus addition region 212 is 1 × 10 ²⁰ /cm ^Three That's it.
[0118]
Next, heat treatment for gettering was performed as illustrated in FIG. In this example, heating is performed at 600 ° C. for 4 hours in an electric furnace having an oxidizing atmosphere composed of a mixed gas of nitrogen (partial pressure ratio 89%), oxygen (partial pressure ratio 10%), and hydrogen chloride (partial pressure ratio 1%). did. By this heat treatment, Ni element that has diffused into the silicon substrate 211 and compensated for defects is gettered by phosphorus in the phosphorus addition region 212 and removed from the silicon substrate 211. Further, at the same time as the gettering of nickel, defects in the silicon substrate 211 are substantially removed. In this embodiment, since the phosphorus-added region 212 is made amorphous, not only the phosphorus gettering effect, but also the synergistic effect of the crystal structure defects, the gettering effect due to dislocations, and the gettering effect of chlorine added to the atmosphere. Can be obtained.
[0119]
In addition, the phosphorus-added region 212 is oxidized by the heat treatment, and a thermal oxide film 213 is formed. Note that depending on the heat treatment conditions, the thermal oxide film 213 includes a portion where the semiconductor substrate 211 to which phosphorus is not added is oxidized. By oxidizing the phosphorus-added region 212, the etching selectivity with respect to the silicon substrate 211 can be increased.
[0120]
If the thermal oxide film 213 remains, reverse diffusion occurs from the oxide film 213 containing Ni element at a relatively high concentration. Therefore, the oxide film 213 is removed by etching with a hydrofluoric acid solution or the like, as shown in FIG. The silicon substrate 214 from which defects are removed as shown in FIG.
[0121]
Thus, the pretreatment of the silicon substrate is completed. For example, the solar cell described in Example 1 may be manufactured using the obtained silicon substrate 214.
[0122]
[Embodiment 7] This embodiment also shows an example in which phosphorus is used for gettering as in Embodiment 6. In Example 6, phosphorus ions were added to the entire surface of the semiconductor substrate. However, in this example, an example in which a phosphorus addition region is selectively formed in the semiconductor substrate is shown. Hereinafter, this embodiment will be described with reference to FIG.
[0123]
First, a solar cell grade P-type silicon substrate 221 having a main surface (upper surface side in the drawing) having a (100) plane orientation and a film thickness of 300 μm is prepared. In the same manner as in Example 1, nickel was segregated to defects in the silicon substrate 221.
[0124]
Then, phosphorus ions are selectively introduced into the silicon substrate 221 as shown in FIG. For this purpose, a mask 222 made of silicon oxide is formed on the surface of the silicon substrate 221.
[0125]
After forming the mask 222, phosphorus ions were doped using a plasma doping method. As a result, the phosphorus added region 223 was selectively formed in the silicon substrate 221. The phosphorus concentration in the phosphorus addition region 223 needs to be at least higher than the nickel concentration in the silicon substrate 221, and it is important to make it higher by one digit or more than the nickel concentration.
[0126]
Next, heat treatment for gettering was performed as shown in FIG. In this example, heating was performed at 600 ° C. for 8 hours in an electric furnace in a nitrogen atmosphere. By this heat treatment, Ni element diffused into the silicon substrate 401 and compensated for defects is gettered by phosphorus in the phosphorus added region 223 and removed from the silicon substrate 221, and defects in the silicon substrate 221 are removed. Substantially eliminated. As a result, a semiconductor grade silicon substrate 224 can be obtained.
[0127]
Thus, the pretreatment of the silicon substrate is completed. For example, the solar cell described in Example 1 is manufactured using the obtained silicon substrate 224. First, as shown in FIG. 5C, texture treatment was performed in the same manner as in Example 1 to form an uneven portion 225 on the silicon substrate 224. In the surface observation with an electron microscope, irregularities of about 0.1 to 5 μm were observed although they were irregular.
[0128]
Next, P ions are implanted into the silicon substrate 224 by ion doping or plasma doping. Then, P ions implanted in the vicinity of the surface of the silicon substrate 224 are diffused by heat treatment to form an N-type conductive region 226. The junction depth of the N-type conductive region 226 is 0.5 μm. As the ion implantation method, the ion doping method is preferable because the junction depth can be easily controlled.
[0129]
Here, the phosphorus added region 223 used for the gettering sink also functions as an N-type conductive region since phosphorus is added to the semiconductor. Thus, a PN junction 227 is formed at the junction between the silicon substrate 224 and the conductive region 226 and at the junction between the silicon substrate 224 and the phosphorus-added region 223.
[0130]
Next, an antireflection film 228 is formed on the N-type conductive region 226. In this embodiment, as the antireflection film 228, SiO having a thickness of 0.1 to 1 μm formed by the CVD method. ₂ Use a membrane. It is necessary to select an optimum value for the film thickness according to the refractive index of the silicon substrate 105 and the refractive index of the antireflection film 228. In addition, as the antireflection film 228, other than that, SiO, SiN, TiO ₂ , ITO, MgF ₂ Various materials such as can be used.
[0131]
Next, P is ion-implanted into the back surface of the silicon substrate 224 (the lower surface in the figure). ⁺ The region 229 is formed to a depth of 0.2 μm to obtain the structure shown in FIG.
[0132]
Finally, N-type conductive region 226, P ⁺ Extraction electrodes 230 and 231 made of a conductive film such as an aluminum film connected to the region 229 are formed. As described above, a solar cell as shown in FIG. 5E can be manufactured.
[0133]
In this embodiment, the phosphorus-added region 223 used for the gettering sink is also used for the N-type conductive region of the solar cell. However, the phosphorus-added region 223 contains nickel, and this nickel is diffused back into the semiconductor substrate. Therefore, the phosphorus-added region 223 may be removed. For example, when removing without increasing the number of steps, the removal may be performed simultaneously with the surface layer removal step by etching of the semiconductor substrate 226 after gettering or the texture treatment step.
[0134]
[Example 8] In Examples 1 to 7, before manufacturing a solar cell, nickel is added to the semiconductor substrate, and then nickel is gettered to thereby make the solar cell-class semiconductor substrate crystalline. In this example, a method for manufacturing a solar cell in which the nickel concentration in the semiconductor substrate thus obtained is further reduced will be described. This embodiment will be described with reference to FIG.
[0135]
First, as shown in FIG. 6A, the N-type semiconductor substrate subjected to the pretreatment described in the first to seventh embodiments is subjected to texture treatment in the same manner as in the first embodiment to obtain a silicon substrate 241. An uneven portion 242 was formed on the surface.
[0136]
Next, as shown in FIG. 5B, N ions are implanted into the silicon substrate 241 to a depth of 0.5 μm to form an N-type conductive region 243. After that, heat treatment is performed in a nitrogen atmosphere, and nickel remaining on the silicon substrate 241 is gettered to the N-type conductive region 243. Note that the heating temperature may be about 600 ° C. at which a gettering effect can be obtained.
[0137]
The concentration of nickel in the silicon substrate 241 is equal to or lower than the SIMS measurement limit by pretreatment. ¹⁶ /cm ^Three The concentration can be further reduced by this heat treatment.
[0138]
Hereinafter, as shown in FIG. 6D, the antireflection film 244, P ⁺ Regions 245 are sequentially formed, and finally, N-type conductive regions 243, P ⁺ Extraction electrodes 246 and 247 made of a conductive film such as an aluminum film connected to the region 245 are formed.
[0139]
[Example 9] In this example, an example of manufacturing a solar cell having a structure different from that of Example 1 is shown. The description will be given with reference to FIG.
[0140]
First, the state shown in FIG. 7A (same as the state shown in FIG. 2A) is obtained in the same procedure as in the first embodiment. In this state, a texture is formed on the surface of the P-type silicon substrate 301.
[0141]
In this state, the silicon substrate 301 is subjected to thermal oxidation treatment. The heat treatment for thermal oxidation is performed at 1000 ° C. for 30 minutes in an atmosphere in which 3 wt% HCl is added to oxygen. By this thermal oxidation treatment, a thermal oxide film 302 is formed on the entire surface of the silicon substrate 301 to a thickness of 1000 mm. The thermal oxidation method is not limited to this, and various known means can be used. For example, dry or wet O ₂ Oxidation, pyrogenic oxidation, etc. may be used. By setting the atmosphere to which a halogen element is added, an effect of further reducing the nickel element remaining in the semiconductor substrate 301 can be obtained (FIG. 7A).
[0142]
Next, the thermal oxide film 302 is selectively removed so as to leave only the region formed on the side surface of the silicon substrate 301 in the thermal oxide film 302. As this method, for example, it may be removed by dry etching using a mask that leaves only the side surfaces. By this step, the thermal oxide film 303 remains in the state shown in FIG.
[0143]
In the state shown in FIG. 7B, P-type ions imparting N-type are implanted into the surface side of the silicon substrate 301 to form an N-type conductive region (N + region) 304. Further, B ions imparting P-type are implanted on the back surface side, and a conductive region (P ⁺ Region) 305 is formed.
[0144]
Conventionally, when the conductive region is formed, a small amount of ions are also implanted into the side surface of the silicon substrate by wraparound, and a conductive region, that is, a current path is formed, causing a leakage current. It was a problem. However, according to this embodiment, since the thermal oxide film 303 functions as a protective film, a conductive layer serving as a current path is not formed on the side surface.
[0145]
That is, since the side surface of the silicon substrate 301 is protected by the oxide film 303, ions imparting N-type or P-type cannot reach the silicon substrate 303 and stop in the oxide film 303. Therefore, in the oxide film 303 formed on the side surface, P and / or B ions are 1 × 10 6. ¹⁶ ~ 1 × 10 ²⁰ /cm ^Three Will be included at a concentration of.
[0146]
Next, a silicon nitride film 306 is formed to a thickness of 1000 mm as a passivation film so as to cover the surface side of the silicon substrate 301. The film forming method is preferably performed by a low pressure thermal CVD method while avoiding plasma damage. Further, by appropriately setting the film thickness, the silicon nitride film 306 also functions as an antireflection film.
[0147]
Next, a contact hole (having a groove shape extending in the depth direction toward the paper surface) is formed in the silicon nitride film 306, and an extraction electrode 307 is formed on the front surface side of the silicon substrate 301, and an extraction electrode 308 is formed on the back surface side. In this embodiment, the electrode 307 on the front side is formed in a comb shape so that sunlight can be easily taken. In addition, the back-side electrode 308 is also shaped like a comb. Although it is possible to form the back electrode 308 over the entire surface of the substrate, it is desirable that the contact area be as small as possible because the generated carriers are likely to recombine at the interface between the electrode and the semiconductor.
[0148]
As described above, the solar cell having the structure shown in FIG. 7D is completed. In this structure, as described above, a conductive region that forms a current path is not formed on the side surface of the silicon substrate 301, so that there is no leakage current and a high-performance solar cell can be realized.
[0149]
[Example 10] In this example, an example in the case of manufacturing a bulk type solar cell having a structure different from those of Examples 1 to 9 will be described. The description will be given with reference to FIG.
[0150]
First, the state shown in FIG. 8A (same as the state shown in FIG. 2A) is obtained in the same procedure as in the first embodiment. In this state, a texture is formed on the surface of the P-type silicon substrate 311.
[0151]
In this state, a thermal oxidation process is performed on the silicon substrate 311 to form a thermal oxide film 312. The conditions for thermal oxidation may be the same as those in Example 9, or may be other thermal oxidation methods or thermal oxidation conditions. That is, it can be changed according to the film quality and film thickness of the thermal oxide film to be formed (FIG. 8A).
[0152]
Next, a contact hole 313 for forming a later extraction electrode is formed in part of the thermal oxide film 312. The contact hole 313 may be formed using a known photolithography technique using a resist. Further, the groove shape is long in the depth direction toward the paper surface.
[0153]
Next, in the state shown in FIG. 8B, P ions for imparting N-type are implanted into the surface side of the silicon substrate 311 to form an N-type conductive region (N ⁺ Region) 314 is formed. Also, B ions imparting P-type are implanted on the back surface side, and a conductive region (P ⁺ Region) 315 is formed (FIG. 8B).
[0154]
In this embodiment, the region other than the contact hole 313 is subjected to through doping through the thermal oxide film 312 during ion implantation. Therefore, since the region implanted by through doping is not directly damaged by the ion implantation, there is an advantage that a recombination center is not formed in a defect or the like in the semiconductor layer.
[0155]
Further, since the remaining thermal oxide film 312 functions as an antireflection film as it is, it can be provided separately, but the antireflection film can be omitted.
[0156]
Also in the present embodiment, since the thermal oxide film 312 functions as a protective film as in the ninth embodiment, a conductive layer serving as a current path is not formed on the side surface.
[0157]
Next, an extraction electrode 316 is formed on the front surface side of the silicon substrate 311 and an extraction electrode 317 is formed on the rear surface side. Also in the present embodiment, the shape of the extraction electrodes on the front surface side and the back surface side is a comb tooth shape. As described above, the solar cell having the structure shown in FIG. 8C is completed.
[0158]
In this embodiment, as is clear from FIG. 8C, the conductive region 314 (or 315) has an ion concentration distribution in the depth direction between the region in contact with the electrode 316 (or 317) and the region not in contact with the electrode 316 (or 317). Is different.
[0159]
[Example 11] In this example, an example in which the material of the extraction electrodes 307 and 308 formed on the front surface side and the back surface side of the silicon substrate 301 in Example 9 is changed will be described. Since the basic structure is the same as FIG. 7D, description will be made with reference to FIG. 7D as necessary.
[0160]
First, in Example 9, an example in which the extraction electrode 307 shown in FIG. 7D is a transparent electrode (for example, an indium and tin oxide compound typified by an ITO film) 321 is shown in FIG. Shown in In this case, an advantage of using the transparent electrode 501 is that it can be effectively utilized without first shielding sunlight.
[0161]
Therefore, as shown in FIG. 9A, the transparent electrode 321 can be formed over the entire surface of the silicon substrate. That is, it is not necessary to pattern the transparent electrode 321 and the manufacturing process can be simplified.
[0162]
Further, since a transparent electrode such as an ITO film also functions as an antireflection film, a laminated film of the transparent electrode 321 and the silicon nitride film 306 can be used as the antireflection film.
[0163]
Next, FIG. 9B shows an example in which the extraction electrode 308 shown in FIG. 7D is formed on the entire back surface in Example 9. As shown in FIG. 9B, the advantage of providing the extraction electrode 322 over the entire back surface of the silicon substrate is ⁺ There is no need to form the region 305 by ion implantation.
[0164]
Specifically, the extraction electrode 322 formed on the entire back surface of the silicon substrate is formed by using a solid phase diffusion method as a diffusion source of an impurity imparting P-type. ⁺ Region 323 can be formed. That is, since there is no damage of the semiconductor layer due to ion implantation, it is possible to reduce the recombination of the generated carriers.
[0165]
Further, when a metal such as Al, Au, Ag, or Cu is used as the extraction electrode 322, it can function as a reflection film that reflects sunlight that could not be absorbed by the semiconductor layer from the back surface side and returns it to the semiconductor layer again. it can. This is a so-called BSR structure and is effective for effectively utilizing sunlight.
[0166]
[Embodiment 12] This embodiment shows an example in which the formation of a current path on the side surface of a silicon substrate is prevented by a method different from that in Embodiments 9 to 11. The description will be given with reference to FIG. In FIG. 10A, reference numeral 331 denotes a silicon substrate having a texture structure formed through the same process as in the first embodiment.
[0167]
The silicon substrate (P type) 331 is subjected to heat treatment in an atmosphere containing P ions imparting N type conductivity, and the P ions are diffused to form the N type conductive layer 332. In this embodiment, in this heat treatment, an N-type conductive layer 332 is formed to a thickness of 0.3 μm on the entire surface (front surface, back surface, side surface) of the silicon substrate 331.
[0168]
Next, the back surface of the silicon substrate 331 is etched away by a dry etching method or a wet etching method by about 1 to 10 μm to obtain the state shown in FIG. By this step, an exposed surface 333 is generated on the back surface of the silicon substrate 331.
[0169]
At this time, it is preferable to protect the surface side of the silicon substrate 331 with a thin oxide film formed by, for example, UV treatment because contamination can be prevented. However, it must be removed later.
[0170]
After the state shown in FIG. 10B is obtained, the subsequent steps may be performed in accordance with, for example, Embodiment 9, and a silicon nitride film (of course, a silicon oxide film may be used) 334 functioning as a passivation film and an antireflection film. Is deposited.
[0171]
Next, P on the back side of the silicon substrate 331 as necessary. ⁺ Region 336 is formed. At this time, near the side surface of the silicon substrate 331, the N-type conductive region 332 and P ⁺ Care must be taken to avoid contact with region 336. P ⁺ The formation method of the region 336 may be an ion implantation method or a solid phase diffusion method. In this embodiment, the region 336 is formed by a solid phase diffusion method.
[0172]
In this case, as shown in FIG. 10C, for example, an Al electrode 335 is formed by using a photolithography technique, and Al element is diffused by heat treatment, so that P indicated by 336 is obtained. ⁺ Form a region. The reason for using the solid phase diffusion method is that the patterning accuracy is good, so that the distance between the N-type conductive region 332 and the Al electrode 335 can be set accurately.
[0173]
When the state shown in FIG. 10C is obtained, contact holes are formed in necessary portions of the silicon nitride film 334, and comb-shaped extraction electrodes 337 that are in contact with the surface side of the silicon substrate 331 are formed. As described above, a solar cell having the structure illustrated in FIG. 10D can be manufactured.
[0174]
[Example 13] In Examples 1 to 12, a bulk solar cell using a semiconductor substrate was shown. However, in this example, a semiconductor thin film formed on a quartz substrate, specifically, a crystalline silicon thin film was used. An example of manufacturing a thin film solar cell will be described. Although the crystalline silicon thin film can be directly formed by a low pressure thermal CVD method or the like, in this embodiment, the amorphous silicon thin film is obtained by crystallization. The description will be given with reference to FIG.
[0175]
First, a silicon oxide film 402 is formed as a base film on a quartz substrate 401 to a thickness of 0.3 μm. This silicon oxide film is formed by a plasma CVD method using methyl tetrasilicate (TEOS) as a raw material, but can also be formed by a sputtering method or a spin coating method as another method. Further, an insulating film such as a silicon nitride film may be used.
[0176]
Next, an amorphous silicon film (amorphous silicon film) 403 is formed by a plasma CVD method using silane gas as a raw material. In addition to the plasma CVD method, the amorphous silicon thin film may be formed by using a low pressure thermal CVD method, a sputtering method, or a vacuum deposition method. The amorphous silicon film may be a substantially genuine amorphous silicon thin film or an amorphous silicon thin film to which boron (B) is added in an amount of 0.001 to 0.1 atomic%. In this embodiment, the thickness of the amorphous silicon thin film 403 is 10 μm. Of course, this thickness may be a required thickness.
[0177]
Next, a thin oxide film layer (not shown) is formed on the surface of the amorphous silicon thin film 403. A method of forming an oxide film layer (not shown) may be a method of immersing the substrate in a perwater ammonia solution and treating at 70 ° C. for 5 minutes, a method of treating for 5 minutes by UV treatment, or the like. The oxide film layer (not shown) formed in this way improves the wettability of the silicon surface when a nickel salt solution containing Ni element (for example, nickel acetate salt or nickel nitrate salt) is applied.
[0178]
Next, a nickel salt solution is dropped on the center of the substrate that spins on a rotating support (not shown) to form a thin nickel salt solution water film on the entire surface of the substrate. Then, the number of spin rotations is increased and the water film is blown away to form the nickel layer 404. Thus, the state shown in FIG.
[0179]
Note that the Ni element also functions as a catalyst element that promotes crystallization when the amorphous silicon film is crystallized. The effect of promoting crystallization is described in detail in Japanese Patent Application Laid-Open Nos. 6-232059 and 6-244103 by the present applicant. This publication describes that metal elements such as Fe, Co, Pt, Cu, and Au can be used as other elements.
[0180]
Next, hydrogen in the amorphous silicon film 403 is released by holding at 450 ° C. for 1 hour in a nitrogen atmosphere. This is because the threshold energy for subsequent crystallization is lowered by intentionally forming a dangling bond in the amorphous silicon film 403.
[0181]
Then, in a nitrogen atmosphere, the amorphous silicon thin film 403 is crystallized by performing heat treatment at 450 to 700 ° C., typically 550 to 65 ° C. and 4 to 8 hours, whereby a crystalline silicon thin film 405 is obtained. . The reason why the temperature during the crystallization could be set to 550 ° C. is due to the action of Ni element.
[0182]
During the heat treatment, the Ni element moves through the silicon thin film while promoting crystallinity, and preferentially compensates for defects in the grains. In particular, since the crystalline silicon thin film 405 formed in this way has a large number of crystal grain boundaries (represented by lines crossing the crystalline silicon thin film 405), the crystal grain boundaries are discontinuous in terms of energy. In this case, a higher concentration of Ni element is segregated than in other regions. A state in which the Ni element is segregated in this manner is represented by a cross mark in FIG.
[0183]
The amount of introduced Ni element is 1 × 10 5 in the crystalline silicon thin film 405. ¹⁹ ~ 1 × 10 ²⁰ /cm ^Three Then, conditions such as the Ni concentration in the coating solution and the coating amount are adjusted. Below this concentration, Ni elements cannot be segregated efficiently in the defects, and it is difficult to obtain the effects of the present invention. On the other hand, if the concentration is higher than this, it is difficult to getter later, which is not preferable.
[0184]
In addition, since nickel silicide formed in the defect has a lattice constant close to that of silicon, the nickel silicide is in a bonded state with good matching. Further, the Ni layer 404 exists as a nickel silicide layer 406 containing Ni element at a high concentration by reacting with the crystalline silicon thin film 403 in contact therewith (FIG. 11B).
[0185]
A major feature of the present invention is that Ni element which is a catalytic element is intentionally segregated with respect to defects, and the reason is that defects having irregular bonding states as described above have good consistency. It is to make it a combined state. This is important in the subsequent gettering process of the Ni element by the halogen element.
[0186]
Next, an etching process is performed with a hydrofluoric acid solution or the like to remove the nickel silicide layer 406. This is because the nickel silicide layer 406 contains Ni element at a high concentration, which is inconvenient in the Ni element removal step by gettering later.
[0187]
Next, heat treatment is performed in a temperature range of 700 to 1100 ° C., typically 800 to 950 ° C., in an atmosphere containing a halogen element. In this embodiment, heat treatment is performed at 950 ° C. for 30 minutes in an oxidizing atmosphere in which HCl (hydrogen chloride) of 0.1 to 10 wt%, typically 3 wt%, is mixed with respect to oxygen. By this heat treatment, the Ni element that has diffused into the crystalline silicon thin film 405 and compensated for the defects is gettered by the Cl element and desorbed from the polycrystalline silicon thin film 405.
[0188]
The Ni element gettered by the Cl element is diffused into the air as nickel chloride, which is a volatile gas, or is taken into the thermal oxide film 206 formed on the surface of the crystalline silicon thin film 405. The crystalline silicon thin film 405 is removed from the inside. A state in which the Ni element is gettered in this manner is indicated by a cross mark in FIG.
[0189]
Therefore, the concentration of Ni element remaining in the crystalline silicon thin film 405 is extremely low, and is reduced to 1/10 to 1/1000 of the original state after the treatment. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows.
[0190]
This Ni element is 5 × 10 ¹⁸ /cm ^Three In the state of being included above, the characteristics as a metal appear in the semiconductor, which is not preferable. That is, the Ni concentration is set to 5 × 10 5 by gettering. ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three By reducing to the following, a crystalline silicon thin film that does not affect the function as a solar cell can be obtained.
[0191]
Furthermore, since the Si dangling bonds left after the Ni element is desorbed are close to each other and in an active state, Si-Si bonds are formed during the heat treatment, and excellent consistency is achieved. Realize crystallinity. That is, the defect is substantially removed.
[0192]
In addition, since the same phenomenon is also performed at the crystal grain boundary, the energy barrier of the crystal grain boundary becomes extremely low, or it can be regarded that there is substantially no crystal grain boundary. In this embodiment, in order to show the state, the crystal grain boundary after thermal oxidation is shown by a dotted line.
[0193]
It should be noted that this process is not intended only for Ni element gettering. Although the gettering process itself is a known means, it is not until the introduction of the Ni element described above, the gettering of the Ni element by the halogen element, and the removal (recombination) of defects performed simultaneously with the gettering. The object of the present invention is achieved.
[0194]
Thus, as shown in FIG. 11C, the crystalline silicon thin film 405 is a crystalline silicon thin film 407 in which the Ni concentration is extremely low and defects are substantially eliminated. A thermal oxide film 408 containing nickel at a high concentration is formed on the surface of the crystalline silicon thin film 407. In this state, since the reverse diffusion occurs from the thermal oxide film 407 containing Ni element at a relatively high concentration, the thermal oxide film 408 is removed by etching with a hydrofluoric acid solution or the like to expose the crystalline silicon thin film 407.
[0195]
Further, when several hundreds of surface layers of the crystalline silicon thin film 407 are removed by a dry etching method or a wet etching method using hydrazine, sodium hydroxide or the like, segregation occurs at the interface between the crystalline silicon thin film 407 and the thermal oxide film 408. Ni element is also preferable because it can be removed.
[0196]
Next, as shown in FIG. 11D, an N-type crystalline silicon thin film 409 is formed on the surface of the crystalline silicon thin film 407 by low pressure thermal CVD. The film thickness may be 0.01 to 0.5 μm. In this embodiment, the film is formed to a thickness of 0.1 μm. Usually, a crystalline silicon thin film formed directly is not so high in crystallinity, so it is necessary to improve the crystallinity by thermal annealing using laser annealing, lamp annealing or the like.
[0197]
Alternatively, heat treatment may be performed so that the crystalline silicon thin film 409 having N type also functions as a gettering sink. As a result, the nickel concentration in the crystalline silicon thin film 407 can be further reduced by the gettering action of chlorine and the gettering action of phosphorus.
[0198]
Note that the crystalline silicon thin film 409 having N type may be used in a microcrystalline state. In this embodiment, a crystalline silicon thin film is used, but an amorphous silicon thin film may be used depending on circumstances.
[0199]
Next, a transparent electrode 410 is formed on the N-type crystalline silicon film 409. The transparent electrode 410 is formed by sputtering using an indium tin oxide alloy (ITO) with a thickness of 0.1 μm. The transparent electrode 410 has a function as an antireflection film. As the antireflection film, various other materials such as a silicon oxide film, a silicon nitride film, a titanium oxide film, a magnesium fluoride film, a tin oxide film, a tantalum oxide film, cerium oxide, and aluminum oxide can be used. Yes (FIG. 11D).
[0200]
Finally, a step of providing an extraction electrode is performed. In providing the extraction electrode, first, as shown in FIG. 11E, the transparent electrode 410, the N-type crystalline silicon 409, and the crystalline silicon thin film 407 are partially removed. Then, a positive electrode 411 connected to the crystalline silicon thin film 407 is provided. A negative electrode 412 connected to the transparent electrode 410 is formed.
[0201]
The extraction electrodes 411 and 412 can be formed using aluminum, silver, silver paste, or the like formed by sputtering or vacuum deposition. Further, when the electrode is provided and then heat-treated at 150 to 300 ° C. for several minutes, the adhesion with the base film is improved and good electrical characteristics can be obtained. In this embodiment, an oven is used and heat treatment is performed at 200 ° C. for 30 minutes in a nitrogen atmosphere.
[0202]
In this embodiment, the negative electrode 412 has a comb-like structure in order to suppress the light shielding area as much as possible. That is, the cross section of the tooth portion looks like a comb-like shape as shown in FIG. Accordingly, although it appears that there are three electrodes 412 in the drawing, all of them are actually electrically connected.
[0203]
Through the above steps, a thin film solar cell as shown in FIG. 11E can be completed. In this thin film solar cell, defects and crystal grain boundaries that are the recombination centers of the generated carriers are extremely reduced in the crystalline silicon thin film, so that even a crystalline silicon thin film with a small absorption coefficient gains film thickness Thus, sufficient conversion efficiency can be achieved.
[0204]
[Example 14] In Example 13, heat treatment was performed in an atmosphere containing HCl gas, and gettering of the catalytic element with a halogen element (Cl element in Example 1) was performed. _Three Gas or ClF _Three Fluorine-based gas such as can also be used.
[0205]
A characteristic of the fluorine-based gas is that a thermal oxide film can be formed and a gettering effect can be obtained at a temperature lower than that of HCl gas, specifically, a temperature of about 500 to 700 ° C. This means that an inexpensive glass substrate can be used as the substrate, which is very effective in reducing the manufacturing cost. Further, for example, it is possible to form a flexible solar cell by forming a solar cell on a thin stainless steel substrate having flexibility.
[0206]
In addition, obtaining a gettering effect with an introduction amount smaller than that of HCl gas is a great advantage in reducing the manufacturing cost. Actually, a sufficient effect can be expected by introducing about 1/10 of HCl.
[0207]
In this example, 3 wt% of hydrogen with respect to oxygen, NF _Three Wet oxidation treatment is performed for 30 to 60 minutes in a temperature range of 500 to 600 ° C. in an atmosphere mixed with 50 to 200 ppm of gas. However, since the processing temperature is lower than that of Example 1, it cannot be said that the recombination of Si after gettering the Ni element is efficient.
[0208]
However, in this case, a secondary effect of terminating the dangling bonds with fluorine can be expected in the gettering process. That is, dangling bonds that could not be recombined during the heat treatment can be deactivated by terminating with fluorine. In this case, since the Si—F bond has a stronger bonding force than the Si—H bond, it is effective in improving crystallinity.
[0209]
In this way, NF _Three The heat treatment using gas is only for the purpose of gettering of the catalytic element, but it also has the effect of terminating the dangling hands and reducing the manufacturing cost. This is effective in the case of manufacturing a solar cell using a semiconductor layer having a crystal grain boundary.
[0210]
The oxidizing atmosphere containing fluorine may be performed under the following conditions (1) and (2) in addition to the above conditions. (1) 1-5 wt% HCl with respect to oxygen, NF _Three An atmosphere containing 10-200ppm. (2) 3wt% hydrogen with respect to oxygen, ClF _Three Atmosphere containing 50-100ppm. In particular, if it is performed under the condition (2), the gettering effect of both Cl element and F element can be expected.
[0211]
Example 15 In Examples 13 and 14, examples in which chlorine and fluorine, which are halogen elements, were used as gettering elements were shown. In this embodiment, an example is shown in which phosphorus belonging to a group 15 element is used as a gettering element. This embodiment will be described with reference to FIG.
[0212]
First, as in Example 13, a silicon oxide film (not shown) having a thickness of 0.3 μm is formed as a base film on the quartz substrate 421 by plasma CVD. Next, an amorphous silicon film (amorphous silicon film) having a thickness of 10 μm is formed by silane gas as a raw material by plasma CVD, and crystallized by using Ni element as in Example 1, and a crystalline silicon thin film 422 is formed. Form.
[0213]
The amount of Ni element introduced into the crystalline silicon thin film 422 is 1 × 10 6. ¹⁹ ~ 1 × 10 ²⁰ /cm ^Three Then, conditions such as the Ni concentration in the coating solution and the coating amount are adjusted. Further, a higher concentration of Ni element is segregated at the grain boundaries in the crystalline silicon thin film than in other regions. A state in which the Ni element is segregated in this manner is represented by a cross mark in FIG.
[0214]
The amount of introduced Ni element is 1 × 10 5 in the crystalline silicon thin film 422. ¹⁹ ~ 1 × 10 ²⁰ /cm ^Three Then, conditions such as the Ni concentration in the coating solution and the coating amount are adjusted. Below this concentration, Ni elements cannot be segregated efficiently in the defects, and it is difficult to obtain the effects of the present invention. On the other hand, if the concentration is higher than this, it is difficult to getter later, which is not preferable.
[0215]
In addition, since the nickel silicide formed in the defect has a lattice constant close to that of silicon, it becomes a bonded state with good matching.
[0216]
Next, a PSG film 423 is formed on the surface of the crystalline silicon thin film 422 as a layer containing phosphorus. The PSG film 423 was formed using silane, phosphine, and oxygen as raw materials by an atmospheric pressure CVD method. It is important that the phosphorus concentration in the PSG film 423 is at least an order of magnitude higher than the nickel concentration in the crystalline silicon thin film 422. For example, the nickel concentration of the crystalline silicon thin film 422 on which nickel is segregated is about 1 × 10 ¹⁹ /cm ^Three Then, the phosphorus concentration in the PSG film 423 is 1 × 10 ²⁰ /cm ^Three Try to be more.
[0217]
Next, for gettering as shown in FIG.
Heat treatment for several hours. In this example, heating was performed at 600 ° C. for 8 hours in an electric furnace in a nitrogen atmosphere. By this heat treatment, the Ni element that has diffused into the crystalline silicon thin film 422 and compensated for defects is gettered by phosphorus in the PSG film 423 and removed from the crystalline silicon thin film 422.
[0218]
Therefore, the concentration of Ni element remaining in the crystalline silicon thin film 422 is extremely low, and is reduced to 1/10 to 1/1000 of the original state after the treatment. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows. This Ni element is 5 × 10 ¹⁸ /cm ^Three In the state of being included above, the characteristics as a metal appear in the semiconductor, which is not preferable. That is, the Ni concentration is set to 5 × 10 5 by gettering. ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three By reducing to the following, it can be set as the crystalline silicon thin film which does not affect the function as a solar cell at all.
[0219]
Furthermore, since the Si dangling bonds left after the Ni element is desorbed are close to each other and in an active state, Si-Si bonds are formed during the heat treatment, and excellent consistency is achieved. Realize crystallinity. That is, the defect is substantially removed.
[0220]
In this way, the state shown in FIG. In this state, since the reverse diffusion occurs from the PSG film 423 containing Ni element at a relatively high concentration, the PSG film 423 is etched away with a hydrofluoric acid solution or the like, and the crystallinity shown in FIG. An improved crystalline silicon thin film 424 can be obtained.
[0221]
Further, when the surface layer of the crystalline silicon thin film 424 is removed by about 0.1 to 1 μm by a dry etching method or a wet etching method such as hydrazine or sodium hydroxide, it is segregated at the interface between the crystalline silicon thin film 424 and the PSG film 423. Ni element is also preferable because it can be removed.
[0222]
In this embodiment, the defects of the crystalline silicon thin film 424 are reduced as much as possible by the gettering action of phosphorus, and thus the crystallinity is comparable to that of so-called single crystal silicon. What is necessary is just to manufacture the solar cell described in Example 13, for example using this crystalline silicon thin film 424 for a photoelectric converting layer.
[0223]
[Embodiment 16] Although Embodiment 15 shows an example in which a PSG film is formed by a vapor phase method as a gettering sink, another layer containing phosphorus can be used.
[0224]
For example, a film containing phosphorus can be formed using a liquid phase method. A silicon oxide film to which phosphorus is added may be formed by applying a solution of an organic silicide to which phosphorus has been added by a spin coating method and then baking.
[0225]
Alternatively, an amorphous or polycrystalline silicon film to which phosphorus is added can be formed by a vapor phase method. Alternatively, a phosphorus-added layer may be formed by implanting phosphorus ions into the surface of the crystalline silicon thin film using an ion implantation method or a plasma doping method. However, since the gettering film is removed by etching after the gettering step, it is preferable that the gettering film has a large etching selectivity with the semiconductor substrate. Therefore, when a phosphorus-added silicon film is used as the gettering film, care must be taken in removing the gettering film.
[0226]
As a method for facilitating the etching of the phosphorus-added silicon film, there is a method of oxidizing the phosphorus-added silicon film in the heating step for gettering. As a result, only the oxidized silicon film can be selectively removed. In order to oxidize silicon, the heat treatment atmosphere may be an oxidizing atmosphere. For example, a mixed gas atmosphere of nitrogen (partial pressure ratio 89%), oxygen (partial pressure ratio 10%), and hydrogen chloride (partial pressure ratio 1%) may be used. Alternatively, the silicon film may be oxidized by controlling the heating time and the heating temperature.
[0227]
Example 17
In this embodiment, a method for forming a gettering sink by selectively adding phosphorus ions to a crystalline silicon thin film will be described.
[0228]
First, a silicon oxide film 432 is formed as a base film on a quartz substrate 431 by a plasma CVD method to a thickness of 0.3 μm. Next, an amorphous silicon film (amorphous silicon film) having a thickness of 10 μm is formed by silane gas as a raw material by plasma CVD, and crystallized using Ni element as in Example 1, and a crystalline silicon thin film 433 is formed. Form.
[0229]
In the crystalline silicon thin film 433, the introduced amount of Ni element is 1 × 10 6. ¹⁹ ~ 1 × 10 ²⁰ /cm ^Three Then, conditions such as the Ni concentration in the coating solution and the coating amount are adjusted. In addition, a higher concentration of Ni element segregates in the crystal grain boundary in the crystalline silicon thin film 433 than in other regions to compensate for unpaired bonds. A state in which the Ni element is segregated in this manner is represented by a cross mark in FIG.
[0230]
Next, as shown in FIG. 13B, a mask film 434 made of a silicon oxide film is formed over the crystalline silicon thin film 433. Then, phosphorus ions are selectively introduced into the crystalline silicon thin film 433 using a plasma doping method or an ion implantation method, so that a phosphorus-added region 435 is formed.
[0231]
Next, after removing the mask film, heat treatment was performed at 600 ° C. for 8 hours in a mixed gas atmosphere of nitrogen, oxygen, and chlorine. By this heat treatment, Ni element that has diffused into the crystalline silicon thin film 433 and compensated for defects is gettered by phosphorus in the phosphorus-added region 435 and detached from the crystalline silicon thin film 433.
[0232]
As a result, the concentration of Ni element remaining in the crystalline silicon thin film 433 becomes extremely low and is reduced to 1/10 to 1/1000 of the original state after the treatment. Specifically, 5 × 10 ¹⁸ /cm ^Three Below, preferably 5 × 10 ¹⁶ /cm ^Three It can be as follows. Further, since Ni is desorbed, dangling bonds of Si at the grain boundaries form Si-Si bonds, so that the grain boundaries are substantially removed.
[0233]
In the present embodiment, the object of the present invention is achieved only by combining the introduction of Ni element, gettering of Ni element with phosphorus, and the removal (recombination) of defects performed simultaneously with the gettering. .
[0234]
Thus, the crystalline silicon thin film 433 is a crystalline silicon thin film 436 in which the concentration of Ni element is extremely low and defects are substantially removed. Further, since the surfaces of the crystalline silicon thin film 436 and the phosphorous added region 435 are oxidized to form a thin oxide film, the thermal oxide film is removed by etching with a hydrofluoric acid solution or the like. (Fig. 13B)
[0235]
Next, as shown in FIG. 13C, an N-type crystalline silicon film 437 is formed on the surface of the crystalline silicon thin film 436 to a thickness of 0.1 μm by low pressure CVD. Next, a transparent electrode 438 is formed on the N-type crystalline silicon film 437. For the transparent electrode 438, an indium tin oxide alloy (ITO) was formed to a thickness of 0.1 μm by sputtering.
[0236]
Finally, a step of providing an extraction electrode is performed. In providing the extraction electrode, as shown in FIG. 13D, first, a part of the surface layer of the transparent electrode 438, the N-type crystalline silicon 437, and the crystalline silicon thin film 436 is removed (FIG. 13D). ).
[0237]
Then, as shown in FIG. 13E, a negative electrode 439 connected to the transparent electrode 438 using aluminum, silver, silver paste, or the like formed by sputtering or vacuum deposition, A positive electrode 440 connected to the crystalline silicon thin film 436 is provided.
[0238]
In this embodiment, the N-type conductive region is composed of not only the crystalline silicon thin film 437 having N-type but also a part of the phosphorus-added region 435, but the phosphorus-added region 435 is relatively made of nickel. Contained in high concentration. Therefore, when there is a concern about reliability or the like, the phosphorus addition region 435 may be completely removed. For example, the phosphorus-added region 435 may be formed only in a portion where the crystalline silicon thin film 436 shown in FIG. Alternatively, in the case of a solar cell structure in which the crystalline silicon thin film 436 is divided, the phosphorus added region 435 may be formed only in the divided portion.
[0239]
[Example 18] In Example 13 to Example 17, when the texture structure is formed on the surface of the obtained crystalline silicon thin film, the absorption efficiency of sunlight is improved and the photoelectric conversion rate can be increased. This is because the concavo-convex portion (texture) formed on the surface scatters sunlight to increase the optical path length, so that the sunlight can be efficiently absorbed. In this embodiment, the texture structure is formed by the following technique.
[0240]
First, a method is employed in which a 2% NaOH aqueous solution is heated to 80 ° C. and the crystalline silicon thin film surface layer is etched to perform texture treatment. Etching is carried out for 5 minutes, and then immersed in boiling water to stop the reaction instantaneously, and further thoroughly washed with pure water. In the surface observation with an electron microscope, irregularities of about 0.1 to 5 μm are observed although they are irregular.
[0241]
In the solar cell using single crystal silicon, the (100) plane is alkali-etched to selectively etch only the (111) plane to form a pyramid structure texture. In the case of using a crystalline silicon thin film (however, a non-single crystal such as a polycrystal or a microcrystal), the orientation is irregular and the texture structure is also irregular.
[0242]
Therefore, in order to sufficiently bring out the effect of the texture structure, it is also effective to perform the texture processing in combination with patterning and to positively control the pattern structure (texture structure).
[0243]
A cross-sectional view of a solar cell having such a texture structure is shown in FIG. Since the structure is almost the same as that of the thin film solar cell described with reference to FIG. 11, the same reference numerals used in FIG.
[0244]
In FIG. 14A, a base film 402 is formed on a quartz substrate 401, and a crystalline silicon thin film 405 subjected to nickel introduction and gettering processing shown in Example 13 is formed thereon. . The main surface of the crystalline silicon thin film 407 is etched by the texture treatment, and a texture having an uneven shape as indicated by 501 is formed. Then, the N-type conductive layer 409, the transparent conductive film 410, and the electrodes 410 and 411 can be formed to form the solar cell illustrated in FIG.
[0245]
Similarly, it is possible to apply a texture treatment to the substrate to form a texture on the substrate surface. The cross-sectional structure of the solar cell in this case is as shown in FIG. In this case, as shown by 502, the surface layer of the substrate 401 is chemically etched or physically etched by sandblasting or the like to form a texture structure. In the method shown in FIG. 14A, the thickness of the crystalline silicon thin film is reduced, whereas in the method shown in FIG. 14B, a texture structure can be obtained without changing the thickness.
[0246]
The texture structure is a very effective technique for a solar cell using a crystalline silicon thin film having a small absorption coefficient because sunlight can be efficiently used. Therefore, the solar cell shown in FIG. 14 using the texture structure in combination with the present invention has a very high conversion efficiency.
[0247]
[Example 19] The solar cell described in Example 13 utilized sunlight from the upper surface in FIG. Therefore, as shown in FIG. 15A, when a light-shielding thin film 511 such as an aluminum film or a titanium film is formed on the back surface of the substrate 401, the sunlight transmitted without being absorbed by the semiconductor layers 405 and 408 is reflected. Then, it can be used again to improve the absorption efficiency of sunlight.
[0248]
Further, when a translucent substrate (here, a quartz substrate) is used as the substrate 401 as in Example 13, sunlight incident from the back side of the substrate 401 can be used. In that case, as illustrated in FIG. 15B, sunlight can be efficiently used by using a light-blocking thin film 512 instead of the transparent conductive film 409 in FIG. 11D.
[0249]
However, in this case, in order to prevent the reflection of sunlight on the back side of the substrate 401, it is desirable to form a silicon oxide film, a silicon nitride film, or the like as the antireflection film 513.
[0250]
In addition, when this embodiment is used in combination with the texture structure described in Embodiment 3, it is effective in further improving the absorption efficiency of sunlight. In particular, when a crystalline silicon thin film having a small absorption coefficient is used for the photoelectric conversion layer as in this embodiment, this is a very effective technique.
[0251]
[Example 20] In this example, an example in which an N-type crystalline silicon thin film is formed by a method different from that in Example 13 will be described. Specifically, an example in which an impurity element imparting N-type conductivity is added to the main surface of the crystalline silicon thin film is shown in FIG.
[0252]
FIG. 16A shows a state in which a crystalline silicon thin film is formed by the nickel introduction process and the gettering process shown in Examples 13 to 17, and is composed of a substrate 521, a base film 522, and a crystalline silicon thin film 523. ing. In this state, phosphorus is added as an impurity element imparting N-type by an ion implantation method or a plasma doping method. Thus, an N-type conductive layer 524 as shown in FIG. 16B is formed.
[0253]
The amount of the impurity element added is adjusted so that the depth (junction depth) from the main surface of the N-type conductive layer 524 is 0.01 to 0.5 μm. Since the N-type conductive layer 524 has only a function of collecting carriers and sending them to the electrode, it is desirable to reduce the probability that carriers are recombined by making the junction depth as shallow as possible.
[0254]
Furthermore, it is desirable to activate the formed N-type conductive layer 524 by laser annealing, lamp annealing, or the like. This activation also has the effect of restoring crystallinity damaged by ion implantation or the like. Of course, it is very effective to chemically remove the surface (the upper surface side in FIG. 16B) of the N-type conductive layer 524 which is particularly susceptible to damage.
[0255]
When the N-type conductive layer 524 is formed as described above, an antireflection film 525 is formed thereon. In this embodiment, a silicon oxide film having a thickness of 1000 mm is used as the antireflection film.
[0256]
After the formation of the antireflection film 525, contact holes are formed and the crystalline silicon thin film is etched to form extraction electrodes 526 and 527, thereby completing a solar cell having a structure as shown in FIG.
[0257]
Note that an impurity element can be added by through doping after the antireflection film 525 is formed over the crystalline silicon thin film 523. With such a configuration, damage to the main surface of the crystalline silicon thin film 523 (more precisely, the N-type conductive layer 524) can be suppressed, so that defects serving as recombination centers can be reduced.
[0258]
[Example 21] In this example, an example of another structure of a solar cell using the present invention will be described. First, as described in Example 13 and the like, a crystalline silicon thin film with improved crystallinity using the present invention is obtained through a crystallization process using nickel element and a gettering process using halogen element or phosphorus. In FIG. 17A, 531 is an alumina substrate, 532 is a base film made of a silicon oxide film, and 533 is a crystalline silicon thin film obtained by the present invention.
[0259]
A silicon nitride film 534 is formed as an antireflection film on the crystalline silicon thin film 533, and a contact hole 535 is formed in at least a part of the silicon nitride film 534. This contact hole 535 is formed in order to form an extraction electrode later. (Fig. 17 (A))
[0260]
When the state shown in FIG. 17A is thus obtained, P ions are added as an impurity element imparting N-type in this state by an ion implantation (ion doping) method. That is, in this case, P ions are added to the region covered with the silicon nitride film by through doping, and P ions are directly added to the region exposed by the contact hole 535.
[0261]
Therefore, the N-type conductive layer 536 formed by adding P ions has a shape as shown in FIG. That is, the N-type conductive region 536 has regions having different ion concentration distributions in the depth direction when viewed from the main surface of the crystalline silicon thin film 533 (strictly, the N-type conductive layer 536).
[0262]
Then, extraction electrodes 537 and 538 are formed by the same means as in Example 13 to complete the solar cell having the structure shown in FIG. In the solar cell of this embodiment formed as described above, since the impurity element is basically added through the silicon nitride film 534, the N-type is not caused without damaging the crystalline silicon thin film 533. A conductive layer 536 can be formed.
[0263]
Further, since the depth to which the impurity element is added can be adjusted by changing the thickness of the silicon nitride film 534, the junction depth of the PN junction can be easily controlled. Furthermore, since the junction area between the crystalline silicon thin film 533 and the N-type conductive layer 536 is substantially increased, an improvement in conversion efficiency is expected.
[0264]
[Example 22] In this example, an example of another structure of a solar cell using the present invention will be described. First, as described in Examples 13 to 17, a crystalline silicon thin film with improved crystallinity using the present invention is obtained through a crystallization process using nickel element and a gettering process using halogen element or phosphorus. In FIG. 18A, 541 is a ceramic substrate, 542 is a base film made of a silicon nitride film, and 543 is a crystalline silicon thin film obtained by the present invention. The upper surface of the ceramic substrate 541 is artificially formed with irregularities by sandblasting, and has a texture structure.
[0265]
Next, an N-type conductive layer (N-type crystalline silicon thin film) 544 is formed over the crystalline silicon thin film 543, and crystallinity is improved by laser annealing. Further, part of the crystalline silicon thin film 543 and the N-type conductive layer 544 is selectively removed by etching to obtain the state shown in FIG.
[0266]
When the state of FIG. 18B is obtained, thermal oxidation is performed to form a thermal oxide film 545 on the surface of the crystalline silicon thin film 543 and the N-type conductive layer 544. It is sufficient to perform this thermal oxidation treatment in an oxygen atmosphere of about 500 to 700 ° C. Of course, it may be performed at a higher temperature.
[0267]
By this thermal oxidation treatment, a thermal oxide film 545 is also formed on the side surface of the crystalline silicon thin film as indicated by 546, for example. The thermal oxide film 545 formed on such a side surface functions as a protective film that prevents the crystalline silicon thin film from being exposed to the atmosphere. In this way, the state shown in FIG.
[0268]
Next, as the antireflection film 547, for example, TiO. ₂ A titanium oxide film indicated by is formed. Although the thermal oxide film 545 can be used as an antireflection film, it may not function sufficiently when the film thickness is too thin. In such a case, it is preferable that the antireflection film has a two-layer structure as in this embodiment.
[0269]
Then, contact holes are formed in part of the thermal oxide film 545 and the antireflection film 547, and take-out electrodes 548 and 549 are formed, so that the solar cell having the structure shown in FIG. 18D is completed.
[0270]
The solar cell shown in this embodiment is characterized in that there is no surface exposed to the atmosphere because the crystalline silicon thin film 543 is covered with the thermal oxide film 545. With such a structure, it is possible to manufacture a highly reliable solar cell without being affected by atmospheric contamination or moisture.
[0271]
[Example 23] In addition to the PN junction type bulk solar cell described in Examples 1 to 12 or the PN junction type thin film solar cell described in Examples 13 to 22, the present invention has a MINP structure, embedded type. The present invention can also be applied to a structure such as an electrode structure.
[0272]
Since the present invention is a technique for improving the crystallinity of a semiconductor layer (photoelectric conversion layer) serving as a base material, the configuration and structure of a solar cell as an application thereof are not limited. Therefore, the present invention can be applied to a very wide range of solar cells.
[0273]
[Example 24] A solar cell manufactured using the present invention can be used in various fields. For example, not only calculators, watches, solar cars (batteries), home power supply systems, telephone boxes, vending machines, portable devices, power generation systems using artificial satellites, electrolyzers (seawater into oxygen and hydrogen) It is possible to apply to the case of use.
[0274]
Here, an example in which the present invention is used for various purposes will be described with reference to FIG. It should be noted that the example given here is an example, and any other application can be applied as long as it is within the range where sunlight is present.
[0275]
First, FIG. 19A shows a home power supply system. A photoelectric conversion device (solar cell) 602 is installed integrally with the roof of the house 601. Using a roof is convenient for securing a large area. If the conversion efficiency of the photoelectric conversion device 602 is improved, the occupation area can be reduced. Reference numeral 603 denotes a device for temporarily storing surplus power stored in the daytime and effectively using it at night.
[0276]
FIG. 19B shows a telephone BOX. Reference numeral 604 denotes a BOX, 605 denotes a telephone, and 606 denotes a photoelectric conversion device. At present, the telephone BOX is arranged innumerably on the roadside and the like. However, if sunlight is used, power can be saved greatly. Needless to say, it is also effective when applied to a vending machine for the same reason.
[0277]
FIG. 19C shows a portable terminal device (mobile computer or mobile computer), in which 607 is a main body, 608 is a photoelectric conversion device serving as a power source, and 609 is an input pen. That is, this portable terminal device is an example of a touch panel type in which a display screen 611 appears when the input pen 609 is pressed on the screen of the liquid crystal display 610. Since portable terminal devices are required to have low power consumption, the photoelectric conversion device 608 can be used as a power source.
[0278]
FIG. 19D illustrates a power generation system using an artificial satellite, in which 612 is a power transmission unit and 613 is a photoelectric conversion device. The power transmission unit 612 has a function as an artificial satellite, a function of converting direct current obtained by the photoelectric conversion device 613 into a microwave, and the like.
[0279]
In outer space, the radiant energy density of sunlight 614 obtained is 1.4 times greater than the sunlight obtained on the ground, and there is an advantage that there is no distinction between day and night. Therefore, the sunlight 614 is finally received and used on the earth as a microwave 615 via the photoelectric conversion device 613 and the power transmission unit 612.
[0280]
These applied products are basically developed for the purpose of permanently using electrical equipment even in places where power cannot be supplied, or for the effective use of a permanent energy source such as sunlight. In order to be popularized in daily life, reduction of manufacturing costs is always required.
[0281]
The present invention is a very effective technique in such a case, and is a very useful technique in the development of solar cells.
[0282]
【The invention's effect】
Since the bulk solar cell manufactured using the present invention can be formed using an inexpensive silicon substrate or the like, the manufacturing cost can be significantly reduced. Furthermore, even a relatively low-grade silicon substrate (or silicon thin film) has crystallinity comparable to a high-grade grade by reducing traps that are recombination centers of generated carriers such as internal defects. Therefore, it is possible to manufacture a solar cell that achieves high conversion efficiency.
[0283]
In addition, the thin-film solar cell manufactured using the present invention can increase the thickness even if the crystalline silicon thin film is used as the photoelectric conversion layer because the internal defects of the crystalline silicon thin film are extremely small. That is, it is possible to overcome the demerit that the crystalline silicon thin film has a small absorption coefficient and to form a solar cell with very few recombination centers.
[0284]
Further, since the crystalline silicon thin film obtained by utilizing the present invention has very few internal defects and is excellent in crystallinity, it becomes possible to manufacture a solar cell that achieves high conversion efficiency.
[Brief description of the drawings]
FIG. 1 is a view for explaining a process of improving crystallinity of Example 1. FIG.
2 is a diagram for explaining a manufacturing process of the solar cell of Example 1. FIG.
FIG. 3 is a diagram for explaining a process of improving crystallinity in Examples 4 and 5;
4 is a diagram for explaining a process of improving crystallinity in Example 6. FIG.
5 is a diagram for explaining a manufacturing process of the solar cell of Example 7. FIG.
6 is a diagram for explaining a manufacturing process of the solar cell of Example 8. FIG.
7 is a view for explaining a manufacturing process of the solar cell of Example 9. FIG.
8 is a diagram for explaining a manufacturing process for the solar cell of Example 10. FIG.
9 is a diagram for explaining a manufacturing process of the solar cell of Example 11. FIG.
10 is a diagram for explaining a manufacturing process for the solar cell of Example 12. FIG.
11 is a diagram for explaining a manufacturing process for the solar cell of Example 13. FIG.
12 is a view for explaining the process of improving the crystallinity of Example 16. FIG.
13 is a diagram for explaining a manufacturing process for the solar cell of Example 17. FIG.
14 is a diagram for illustrating the structure of a solar cell of Example 18. FIG.
15 is a diagram for illustrating the structure of the solar cell of Example 19. FIG.
16 is a diagram for illustrating the structure of the solar cell of Example 20. FIG.
17 is a diagram for explaining the structure of the solar cell of Example 21. FIG.
18 is a view for explaining the structure of the solar cell of Example 22. FIG.
19 shows an application example of the solar battery of Example 24. FIG.
FIG. 20 is a graph showing vapor pressure characteristics of nickel chloride.
[Explanation of symbols]
101 Semiconductor (silicon) substrate
102 Ni layer
103 nickel silicide
104 Oxide film
105 Silicon substrate with improved crystallinity
106 Texture part
107 N-type conductive region
109 Anti-reflective coating
110 Area showing strong P-type
111, 112 Extraction electrode
401 quartz substrate
402 Base film (silicon oxide film)
403 Amorphous silicon thin film
404 Ni (nickel) layer
405 crystalline silicon thin film
406 Nickel silicide layer
407 Silicon with improved crystallinity
408 Oxide film
409 N-type conductive layer
410 Transparent conductive film
411, 412 Extraction electrode

Claims (9)

Forming an oxide film on a silicon substrate having the first conductivity type and having crystallinity;
A nickel salt solution is applied on the oxide film,
First heating the silicon substrate to 550 ° C. or more and 650 ° C. or less in an inert atmosphere, diffusing nickel element in the silicon substrate, compensating for defects in the silicon substrate;
Removing the nickel silicide layer formed on the silicon substrate by the first heating;
Forming an amorphous silicon film containing phosphorus on the silicon substrate;
Second heating the silicon substrate in an oxidizing atmosphere to getter the nickel element diffused in the silicon substrate into the amorphous silicon film containing phosphorus;
A method for manufacturing a photoelectric conversion device, comprising removing a silicon oxide film containing phosphorus and a nickel element from the silicon substrate formed by the second heating. Forming an oxide film on a silicon substrate having the first conductivity type and having crystallinity;
A nickel salt solution is applied on the oxide film,
First heating the silicon substrate to 550 ° C. or more and 650 ° C. or less in an inert atmosphere, diffusing nickel element in the silicon substrate, compensating for defects in the silicon substrate;
Removing the nickel silicide layer formed on the silicon substrate by the first heating;
Introducing phosphorus into the entire surface of the silicon substrate;
The silicon substrate is secondly heated in an oxidizing atmosphere to getter the nickel element diffused in the silicon substrate onto the silicon substrate surface,
A method for manufacturing a photoelectric conversion device, comprising removing a thermal oxide film containing phosphorus and a nickel element on the silicon substrate formed by the second heating. In claim 1 or 2,
Further, texture treatment is performed on the silicon substrate, and an uneven portion is formed on the surface side of the silicon substrate,
Introducing phosphorus into the surface side of the silicon substrate;
Heating the silicon substrate in a nitrogen atmosphere to getter the nickel element;
Forming an antireflection film on the surface side of the silicon substrate;
Forming a contact hole on the surface side of the silicon substrate;
An electrode is formed at a position where the contact hole is formed. A method for manufacturing a photoelectric conversion device. In any one of Claims 1 thru | or 3,
After the nickel element gettering, a thermal oxide film is formed on the entire surface of the silicon substrate,
Removing the thermal oxide film leaving the thermal oxide film formed on the side surface of the silicon substrate;
Performing ion implantation of ions imparting a second conductivity type on the surface side of the silicon substrate to form a conductive region having the second conductivity type;
Performing ion implantation of ions imparting the first conductivity type on the back side of the silicon substrate to form a conductive region having the first conductivity type;
Forming a passivation film on the surface side of the silicon substrate;
Forming a contact hole on the surface side of the silicon substrate;
An electrode is formed at a position where the contact hole is formed. A method for manufacturing a photoelectric conversion device. In any one of Claims 1 thru | or 3,
After the nickel element gettering, a thermal oxide film is formed on the entire surface of the silicon substrate,
Contact holes are formed on the front and back sides of the silicon substrate,
Performing ion implantation of ions imparting a second conductivity type on the surface side of the silicon substrate to form a conductive region having the second conductivity type;
Performing ion implantation of ions imparting the first conductivity type on the back side of the silicon substrate to form a conductive region having the first conductivity type;
An electrode is formed at a position where the contact hole is formed. A method for manufacturing a photoelectric conversion device. The thermal oxide film is formed on the entire surface of the silicon substrate after gettering the nickel element according to any one of claims 1 to 3.
Removing the thermal oxide film leaving the thermal oxide film formed on the side surface of the silicon substrate;
Performing ion implantation of ions imparting the second conductivity type from the surface side of the silicon substrate to form a conductive region having the second conductivity type;
Forming a passivation film on the surface side of the silicon substrate;
Forming a contact hole on the surface side of the silicon substrate;
Forming a transparent electrode on the entire front surface of the silicon substrate;
Forming an electrode on the entire back surface of the silicon substrate;
A method for manufacturing a photoelectric conversion device, wherein a conductive region having a first conductivity type is formed using the electrode as a diffusion source of ions imparting the first conductivity type. In any one of Claims 1 thru | or 3,
After the nickel element gettering, the silicon substrate is heat-treated in an atmosphere for imparting a second conductivity type, and a conductive layer having the second conductivity type is formed on the entire surface of the silicon substrate.
Removing the conductive layer having the second conductivity type formed on the back side of the silicon substrate;
Forming a passivation film on the front and side surfaces of the silicon substrate;
Forming a first electrode on the entire back surface of the silicon substrate;
A conductive region having a first conductivity type is formed using the first electrode as an ion diffusion source imparting a first conductivity type;
Forming a contact hole on the surface side of the silicon substrate;
A method of manufacturing a photoelectric conversion device, comprising: forming a second electrode at a position where the contact hole is formed. In any one of Claims 1 thru | or 7,
The method for manufacturing a photoelectric conversion device, wherein the silicon substrate having crystallinity is a single crystal silicon substrate or a polycrystalline silicon substrate. In any one of claims 4, 6 or 7,
The method for manufacturing a photoelectric conversion device, wherein the passivation film is a silicon nitride film.

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