JP4193787B2 - Cell voltage equalization device for battery pack - Google Patents

Description

  The present invention relates to an assembled battery cell voltage equalizing apparatus that equalizes the voltage of each cell with respect to an assembled battery configured by connecting cells of a plurality of secondary batteries in series.

  An assembled battery used as a battery of an electric vehicle (EV) or a hybrid electric vehicle (HV) requires a high voltage of about 100V to 400V, and thus has a configuration in which a large number of secondary batteries (cells) are connected in series. ing. For example, in the case of a 300V battery pack, 150 cells are connected in series for a lead battery (about 2V / cell), 250 cells are connected for a nickel metal hydride battery (1.2V / cell), and 80 cells are connected in series for a lithium ion battery (3.6V / cell). Has been. Among these, lithium ion batteries have characteristics superior to lead batteries and nickel metal hydride batteries in terms of volume energy density, weight energy density, and cycle life.

  However, since secondary batteries, particularly lithium ion batteries, are vulnerable to overcharge and overdischarge, there is a risk that the capacity will be remarkably reduced or heat will be generated if they are not used within the specified limit voltage range. Therefore, when using an assembled battery, constant voltage charging control is performed so that the voltage of the assembled battery is within a voltage range determined by a predetermined upper limit voltage and lower limit voltage, and the voltage of the assembled battery is within the above-mentioned limit voltage range. A protection circuit is used so as not to be outside.

  Furthermore, there is a problem of variations in cell voltage due to variations in state of charge (SOC) between cells constituting the assembled battery. In an assembled battery, the SOC of each cell and thus the cell voltage varies due to individual differences in capacity and self-discharge characteristics of each cell. In particular, since the overcharge resistance and overdischarge resistance of lithium ion batteries are much weaker than other types of secondary batteries, they cannot be used at all as the SOC variation between the cells progresses.

As a conventional technique for solving this problem, Patent Document 1 discloses that when a variation exceeding a predetermined level is detected during vehicle operation, the remaining capacity of the assembled battery is changed to the target remaining capacity when the vehicle is stopped by charging and discharging for each cell. In addition, when there is a cell whose terminal voltage exceeds a predetermined equalization reference voltage when the vehicle is stopped, the cell is discharged so that the terminal voltage of each cell becomes equal to the equalization reference voltage. Techniques for adjustment are disclosed. Patent Document 2 discloses a technique for preventing overdischarge of a secondary battery by forcibly turning off a discharge switch of a discharge circuit when a voltage applied from the secondary battery to be discharged is abnormally reduced. Has been. In addition, Patent Document 3 discloses an assembled battery voltage adjusting device and an assembled battery voltage adjusting method.
JP 2004-080909 A JP 2004-248348 A JP 2000-287370 A

  FIG. 3 shows a configuration of a comparator used in a cell voltage equalization apparatus for an assembled battery. The assembled battery 1 has a configuration in which cells BC1,..., BCn-1, BCn, BCn + 1,... Are connected in series, and the reference voltage generation circuit 2 includes resistors R1,. , Rn + 1, Rn + 2,... Are connected in series. The comparator CPn compares the voltage Vn + 1 of the negative terminal of the cell BCn with the divided voltage VRn + 1 of the reference voltage generation circuit 2. Similarly, a comparator CPn−1 (not shown) compares the voltage Vn at the plus terminal of the cell BCn with the divided voltage VRn of the reference voltage generation circuit 2. The discharge of the cell BCn is controlled based on the output signal of the comparator CPn and the output signal of the comparator CPn-1.

  The comparator CPn includes PNP-type differential amplifier transistors Q1 to Q4. The base of the transistor Q1 is connected to the negative terminal (voltage Vn + 1) of the cell BCn, and the base of the transistor Q2 is connected to the common connection point (voltage VRn + 1) of the resistors Rn and Rn + 1. . Here, when the voltage Vn + 1 becomes higher than the voltage VRn + 1 by the forward voltage Vf or more, the pn junction between the collector and base of the transistor Q4 is biased in the forward direction, and the transistor Q4 stops the amplification operation. . Therefore, in this cell voltage equalization apparatus, when the cell voltage non-uniformity becomes large, each comparator may not operate normally and normal equalization control may not be performed.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a cell voltage equalization apparatus for a battery pack that can perform normalization operation normally even when the cell voltage unevenness is large. .

According to the means described in claim 1, instead of directly comparing the inter-terminal voltage and the reference voltage of each cell constituting the assembled battery, the voltage at the common connection point between the cells and the corresponding reference voltage And the discharge operation of the discharge circuit connected between the terminals of each cell is controlled based on the comparison result. The reference voltage is generated by a reference voltage generating circuit composed of a resistor connected in series between both terminals of the battery pack.

In this case, the comparison circuit receives power supply voltage from the positive side terminal of the cell located on the high potential side and the negative side terminal of the cell located on the low potential side with respect to the common connection point of the cells to be compared. Configured to work. In other words, the power supply voltage supplied to the comparator circuit is supplied from the terminals of the two cells connected in series across a common connection point between cells to be compared, the power supply voltage supplied in the conventional configuration ( The voltage is expanded to the low potential side, the high potential side, or both potential sides than the voltage between terminals of one cell).

  Accordingly, when the state of charge (SOC) of the assembled battery is large and the voltage at the common connection point to be compared is lower than the corresponding reference voltage (when the differential input transistor is a PNP type) or Even if it is high (when the differential input transistor is an NPN type), as long as the corresponding reference voltage is substantially within the extended power supply voltage range, the comparison circuit performs the comparison operation normally and equalizes the cell voltage. The apparatus can perform the equalization operation normally.

The ratio較回path, the differential input transistors, in addition to the load circuit provided between the collector and the power supply line of the differential input transistors (e.g., active load circuits), the collector and the load circuit of the differential input transistors A diode for preventing backflow is provided between them. Therefore, when the battery pack is in an extremely uneven charge state, and the corresponding reference voltage drops beyond the power supply voltage range (if the differential input transistor is a PNP type) or rises (if the differential input transistor is Even in the case of the NPN type), no current flows from the power supply line to the reference voltage generation circuit through the comparison circuit, and it is possible to prevent the reference voltage from being shifted in the reference voltage generation circuit.

According to a second aspect of the present invention, the comparison circuit includes a base current compensation circuit that supplies a base current to the differential input transistor. Thereby, since the input bias current of the comparison circuit is reduced, it is possible to reduce the flow of current from the comparison circuit to the reference voltage generation circuit, and to prevent the reference voltage from being shifted in the reference voltage generation circuit.

According to the means described in claim 3 , the discharge circuit connected between the terminals of the nth cell (n = 1, 2,...) Compares the voltage of the positive terminal of the nth cell. The discharge operation is performed based on the output signal of the circuit and the output signal of the comparison circuit that compares the voltage at the negative terminal of the nth cell. The condition for discharging is limited to the case where the inter-terminal voltage of the nth cell is higher than the reference voltage in the equalized state.

  The conditions that meet this are the case where the voltage of the positive terminal of the nth cell is higher than the corresponding reference voltage and the voltage of the negative terminal of the nth cell is equal to or lower than the corresponding reference voltage and the nth cell. This is a case where the voltage at the positive terminal of the cell is equal to the corresponding reference voltage and the voltage at the negative terminal of the nth cell is lower than the corresponding reference voltage. By controlling the discharge of each cell according to such a logic, each cell is sequentially discharged and finally all the cells are equalized.

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 and 2. In FIG. 1, the same components as those in FIG. 3 showing the prior art are denoted by the same reference numerals.
FIG. 1 is a configuration diagram of an equalization circuit that equalizes the voltages of the cells constituting the assembled battery. The assembled battery 1 is used as a battery for an electric vehicle (EV) or a hybrid electric vehicle (HV), and is composed of, for example, a lithium ion battery. The assembled battery 1 is composed of a plurality of cell groups connected in series, and each cell group is composed of eight cells BC1 to BC8 connected in series. The assembled battery 1 includes a positive terminal T1 of the cell BC1, a positive terminal of the cell BC2 (a negative terminal of the cell BC1) T2,..., A positive terminal of the cell BC8 (a negative terminal of the cell BC7) T8 and a cell BC8. Negative side terminal TG is provided.

  The equalization circuit 3 (corresponding to the cell voltage equalization device of the assembled battery) is in a state in which the vehicle IG switch (including the main power switch; the same applies hereinafter) is turned off, that is, at night when the vehicle is not used By controlling the discharge so that the voltages of the cells BC1 to BC8 constituting the assembled battery 1 are aligned with the lowest voltage among the cells BC1 to BC8, the variation in the state of charge (SOC) of the cells BC1 to BC8 can be reduced. It is a circuit to equalize.

  The equalization circuit 3 includes a reference voltage generation circuit 2, a comparison circuit unit 4, a discharge control circuit unit 5, and a discharge circuit unit 6, and overcharge / overdischarge detection in a state where the IG switch of the vehicle is turned on. It is integrated into a single chip along with circuits. Hereinafter, each circuit configuration will be described in order.

  The reference voltage generation circuit 2 includes eight resistors R1 to R8 connected in series between terminals T1 and TG. A connection node N2 between the resistors R1 and R2, a connection node N3 between the resistors R2 and R3,..., And a connection node N8 between the resistors R7 and R8 have a reference voltage VR2 in a state where all the cells BC1 to BC8 are equalized. , VR3,..., VR8 are generated. The cells BC1 to BC8 all have the same standard, and the resistors R1 to R8 are all set to the same resistance value.

  The comparison circuit unit 4 includes comparators CP2a and CP2b that compare the voltage V2 at the terminal T2 with the reference voltage VR2 at the node N2, and comparators CP3a, CP3b that compare the voltage V3 at the terminal T3 and the reference voltage VR3 at the node N3,. Comparators CP8a and CP8b compare the voltage V8 at the terminal T8 with the reference voltage VR8 at the node N8.

  For example, the comparators CP2a and CP2b are supplied with a voltage corresponding to two cells as a power supply voltage from the plus side terminal T1 of the cell BC1 located on the high potential side and the minus side terminal T3 of the cell BC2 located on the low potential side relative to the terminal T2. It is designed to work with the supply. The non-inverting input terminal and the inverting input terminal of the comparator CP2a are connected to the node N2 and the terminal T2, respectively. The non-inverting input terminal and the inverting input terminal of the comparator CP2b are connected to the terminal T2 and the node N2, respectively. The comparators CP2a and CP2b have an input offset voltage and operate as a window comparator as will be described later. This power supply voltage supply mode, connection mode, and operation mode are the same for the comparators CP3a, CP3b,..., CP8a, CP8b.

  FIG. 2 shows a circuit configuration of the comparator CP2b. The comparator CP2b includes a differential pair 7 having PNP-type differential input transistors Q1 to Q4, and a base current compensation circuit 8 that supplies a base current to the transistors Q1 and Q2. In the differential pair 7, the bases of the transistors Q3 and Q4 are connected to the terminal T2 and the node N2 via resistors R9 and R10, respectively. The emitters of the transistors Q3 and Q4 are connected to the transistors Q1 and Q2, respectively. Connected to the base. Constant current circuits 11 and 12 are connected between the emitters of the transistors Q3 and Q4 and the power supply line 9 connected to the terminal T1, and between the emitters of the transistors Q1 and Q2 connected to each other and the power supply line 9. Is connected to a constant current circuit 13. The reason why the differential input section transistors are configured in two stages as described above is to reduce the input bias current.

  An active load circuit 14 (corresponding to a load circuit) including transistors Q5 and Q6 is connected to the power supply line 10 connected to the terminal T3. Between the differential input transistors Q1 and Q2 and the active load circuit 14, diodes D1 and D2 for backflow prevention are connected, respectively, and between the differential input transistors Q3 and Q4 and the power supply line 10, respectively. Diodes D3 and D4 for preventing backflow are connected.

  The base current compensation circuit 8 is provided to further reduce the input bias current. That is, a constant current circuit 15, a transistor Q7 and a diode D5 are connected in series between the power supply lines 9 and 10, and a transistor Q8 is connected between the base of the transistor Q7 and the power supply line 10. ing. Transistors Q9 and Q10 are respectively connected between the bases of the transistors Q3 and Q4 and the power supply line 10, and the transistors Q9 and Q10 and the transistor Q8 constitute a current mirror circuit. The configuration described above is the same for the comparators CP2a, CP3a, CP3b,..., CP8a, CP8b.

  In FIG. 1, the discharge control circuit unit 5 outputs a discharge control signal to the discharge circuit unit 6 based on the output signal of the comparison circuit unit 4, and is mainly composed of logic circuits LG1 to LG8. . The discharge circuit unit 6 includes a discharge circuit DC1 connected between both terminals of the cell BC1, a discharge circuit DC2 connected between both terminals of the cell BC2,..., And a discharge circuit DC8 connected between both terminals of the cell BC8. It is configured. The discharge circuits DC <b> 1 to DC <b> 8 are switch circuits configured by using transistors as discharge paths, for example, and turn on and off the discharge paths in response to a discharge control signal from the discharge control circuit unit 5. In the discharge state, for example, a constant current, a current determined according to the cell voltage, or a current proportional to the cell voltage is passed.

Next, the operation of this embodiment will be described.
The assembled battery 1 is repeatedly charged and discharged in use. When charging / discharging is repeated, the state of charge (SOC) of the cells BC1 to BC8 varies due to individual differences in capacity of the cells BC1 to BC8, differences in self-discharge characteristics, and the like, and the voltages of the cells are uneven. The equalization circuit 3 equalizes the cell voltages as follows in a state where the IG switch of the vehicle is turned off.

(1) Control of the discharge circuit DC1 of the cell BC1 The comparator CP2a changes the output signal from the L level to the H level when the voltage V2 at the terminal T2 becomes lower than the reference voltage VR2 at the node N2 by the offset voltage Voffset or more. On the other hand, the comparator CP2b changes the output signal from the L level to the H level when the voltage V2 at the terminal T2 becomes higher than the reference voltage VR2 at the node N2 by the offset voltage Voffset or more. Here, the L level and the H level for the comparators CP2a and CP2b are the voltage V3 at the terminal T3 and the voltage V1 at the terminal T1, respectively.

  As described above, the comparators CP2a and CP2b are supplied with power from the terminal T1 having a potential higher by the voltage of the cell BC1 than the voltage V2 of the terminal T2 to be compared and the terminal T3 having a potential lower by the voltage of the cell BC2. Therefore, if the reference voltage VR2 is lower than V1-2 · Vf and higher than V3, the comparison operation can be normally performed regardless of the magnitude relationship between the voltage V2 and the reference voltage VR2.

  As a result, when the output signal of the comparator CP2a is at the H level and the output signal of the comparator CP2b is at the L level, the voltage V2 at the terminal T2 is lower than the reference voltage VR2 of the node N2 by the offset voltage Voffset (V2: first On the other hand, when the output signal of the comparator CP2a is L level and the output signal of the comparator CP2b is H level, the voltage V2 of the terminal T2 is higher than the reference voltage VR2 of the node N2 by more than the offset voltage Voffset (V2: first) 2 state). When the output signals of the comparators CP2a and CP2b are both at the L level, the difference between the voltage V2 at the terminal T2 and the reference voltage VR2 at the node N2 is smaller than the offset voltage Voffset, and both are substantially equal (V2: first) 3 state).

  In the first state, since the voltage of the cell BC1 is higher than the cell voltage in the equalized state (hereinafter referred to as the equalized cell voltage), the logic circuit LG1 discharges the discharge circuit DC1. The discharge control signal to be instructed is output. On the other hand, since the voltage of the cell BC1 is lower or substantially equal to the equalized cell voltage in the second or third state, the logic circuit LG1 instructs the discharge circuit DC1 to stop discharging. A discharge control signal is output.

(2) Control of the discharge circuit DC2 of the cell BC2 The comparators CP3a and 3b perform the comparison operation of the voltage V3 and the reference voltage VR3 regardless of the magnitude relationship between the voltage V3 and the reference voltage VR3, similarly to the comparators CP2a and CP2b. be able to. When the output signal of the comparator CP3a is H level and the output signal of the comparator CP3b is L level, the voltage V3 of the terminal T3 is lower than the reference voltage VR3 of the node N3 by the offset voltage Voffset (V3: first state) On the contrary, when the output signal of the comparator CP3a is L level and the output signal of the comparator CP3b is H level, the voltage V3 at the terminal T3 is higher than the reference voltage VR2 of the node N3 by the offset voltage Voffset (V3: second) State). When the output signals of the comparators CP3a and CP3b are both at the L level, the difference between the voltage V3 at the terminal T3 and the reference voltage VR3 at the node N3 is smaller than the offset voltage Voffset, and both are substantially equal (V3: first) 3 state).

  When the voltage V2 is higher than the reference voltage VR2 by the offset voltage Voffset (V2: second state) and the voltage V3 is lower than or equal to the reference voltage VR3 by the offset voltage Voffset (V3: first or third state), When the voltage V2 is substantially equal to the reference voltage VR2 (V2: third state) and the voltage V3 is lower than the reference voltage VR3 by the offset voltage Voffset (V3: first state), the voltage of the cell BC2 is Since the voltage is higher than the equalized cell voltage, the logic circuit LG2 outputs a discharge control signal instructing the discharge circuit DC2 to discharge. In other cases, since the voltage of the cell BC2 is lower than or substantially equal to the equalized cell voltage, the logic circuit LG2 outputs a discharge control signal instructing the discharge circuit DC2 to stop discharging. . The control of the discharge circuit DC2 of the cell BC2 is the same as the control of the discharge circuits DC3 to DC7 of the cells BC3 to BC7.

(3) Control of the discharge circuit DC8 of the cell BC8 When the voltage V8 is higher than the reference voltage VR8 by the offset voltage Voffset (V8: second state), the voltage of the cell BC8 is higher than the equalized cell voltage Therefore, the logic circuit LG8 outputs a discharge control signal instructing the discharge circuit DC8 to discharge. On the other hand, when the voltage V8 is lower than or equal to the offset voltage Voffset or higher than the reference voltage VR8 (V8: first or third state), the voltage of the cell BC8 is lower than or equal to the equalized cell voltage. In this state, the logic circuit LG8 outputs a discharge control signal that instructs the discharge circuit DC8 to stop discharging.

  By such discharge control, the voltages of the cells BC1 to BC8 become equal to the lowest voltage among the cells BC1 to BC8, and the variation in the state of charge (SOC) of the cells BC1 to BC8 is equalized.

  According to the present embodiment, the comparators CPna and CPnb (n = 2 to 8) for comparing the voltage Vn of the common connection terminal Tn of the battery pack 1 with the reference voltage VRn are positioned on the high potential side with respect to the terminal Tn. Since the power is supplied from the positive side terminal of the cell BCn-1 and the negative side terminal of the cell BCn located on the low potential side, the voltage Vn and the reference voltage are obtained even if the cell voltages are not uniform. The comparison operation can be normally performed regardless of the magnitude relationship with VRn.

  Each of the comparators CPna and CPnb (n = 2 to 8) includes two-stage differential input transistors Q1 and Q3, Q2 and Q4, and the base current compensation circuit 8, so that the input bias current is small. For this reason, there is little flow of current into the reference voltage generation circuit 2, and it is possible to prevent the deviation of the reference voltages VR2 to VR8.

Further, each of the comparators CPna and CPnb (n = 2 to 8) includes diodes D1 to D5 for preventing backflow, so that the cells BC1 to BC8 of the assembled battery 1 are in a remarkably uneven charging state, and the reference Even when the voltage VRn drops below the voltage Vn + 1 of the terminal Tn + 1, there is no current flowing into the reference voltage generation circuit 2 through the comparators CPna and CPnb, and the deviation of the reference voltages VR2 to VR8 occurs. Can be prevented.

  Since the comparison circuit unit 4 uses a window comparator including two comparators CPna and CPnb (n = 2 to 8), it is possible to detect a magnitude relationship including a state where the voltage Vn and the reference voltage VRn are substantially equal. Since the discharge control circuit unit 5 generates a discharge control signal based on the output signal of the comparison circuit unit 4, the voltage of the cell BCn (n = 1 to 8) is approximately equal to the equalized cell voltage. Unnecessary discharge operation can be suppressed.

The present invention is not limited to the embodiment described above and shown in the drawings. For example, the present invention can be modified or expanded as follows.
The input offset voltage of the comparator CPna (n = 2 to 8) may be set to zero, and the comparator CPnb may be omitted. The discharge control circuit unit 5 in this case may perform discharge control assuming that the third state described above is not present. For example, in the discharge control of the cell BC2, the logic circuit LG2 outputs a discharge control signal that instructs the discharge circuit DC2 to discharge when the voltage V2 is higher than the reference voltage VR2 and the voltage V3 is lower than the reference voltage VR3. In other cases, a discharge control signal that instructs the discharge circuit DC2 to stop discharge may be output.
The assembled battery 1 is not limited to a lithium ion battery, and may be a secondary battery such as a lead battery or a nickel metal hydride battery.

1 is an electrical configuration diagram of an equalization circuit showing an embodiment of the present invention. Circuit diagram of the comparator Configuration diagram of a comparator in a conventional cell voltage equalization apparatus

Explanation of symbols

  1 is an assembled battery, 2 is a reference voltage generation circuit, 3 is an equalization circuit (cell voltage equalization device for the assembled battery), 5 is a discharge control circuit unit (discharge control circuit), 8 is a base current compensation circuit, and 14 is active Load circuits (load circuits), BC1 to BC8 are cells, CP2a, CP2b,..., CP8a and CP8b are comparators (comparison circuits), T1 to T8 and TG are terminals, DC1 to DC8 are discharge circuits, and Q1 to Q4 are differential Input transistors D1 to D4 are backflow prevention diodes.

Claims (3)

In an assembled battery cell voltage equalizing apparatus for equalizing the voltage of each cell with respect to an assembled battery configured by connecting cells of a plurality of secondary batteries in series,
A discharge circuit connected between the terminals of each cell;
A reference voltage generation circuit that generates, as a reference voltage, a voltage equal to the voltage of each common connection point between cells in a state where all the cells are equalized;
Comparing the voltage at the common connection point between the cells and the reference voltage corresponding to the common connection point, the positive terminal of the cell located on the high potential side with respect to the common connection point and the low potential A comparison circuit that operates by receiving supply of voltage for two cells from the negative terminal of the cell located on the side,
A discharge control circuit for controlling the discharge operation of the discharge circuit so as to equalize cells according to the output signal of the comparison circuit ;
The comparison circuit is
A differential input transistor;
A load circuit provided between the collector of the differential input transistor and the power supply line;
A backflow prevention diode connected between the collector of the differential input transistor and the load circuit;
The reference voltage generation circuit is constituted by a resistor connected in series between both terminals of the assembled battery, and the cell voltage equalizing device for the assembled battery. 2. The battery voltage equalization apparatus for an assembled battery according to claim 1, wherein the comparison circuit includes a base current compensation circuit that supplies a base current to the differential input transistor . The discharge control circuit includes an output signal of a comparison circuit that compares the voltage of the positive terminal of the nth cell with respect to the discharge circuit connected between the terminals of the nth cell constituting the assembled battery, and the nth cell An output signal of a comparison circuit that compares the voltage of the negative terminal of the cell is input, the voltage of the positive terminal of the nth cell is higher than the corresponding reference voltage, and the negative terminal of the nth cell When the voltage is equal to or lower than the corresponding reference voltage, and the voltage at the positive terminal of the nth cell is equal to the corresponding reference voltage and the voltage at the negative terminal of the nth cell is lower than the corresponding reference voltage 3. The battery voltage equalization apparatus for an assembled battery according to claim 1, wherein the discharge circuit is discharged in the case .

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