JP4193773B2 - Arithmetic control device and program - Google Patents

Description

  The present invention relates to an arithmetic control device and a program.

  2. Description of the Related Art Conventionally, there are various arithmetic control devices, and those that can execute arithmetic operations such as four arithmetic operations and cumulative calculations at high speed are also known. In particular, when it is necessary to perform complicated floating-point arithmetic, the user often causes the arithmetic control device to perform arithmetic. The ANSI / IEEE 754-1958 standard (“IEEE 754”) is well known as the most common arithmetic standard for performing floating point arithmetic, and is single precision (32 bits), double precision (64 bits), and extended double. It is possible to perform floating point arithmetic with three types of precision (96 bits).

However, when floating-point arithmetic is performed using these precisions, so-called “digit loss” occurs, in which the number of significant digits is extremely reduced due to restrictions on the number of arithmetic digits in subtraction between numerical values that are close to each other. Problem arises. In order to explain this “digit loss”, a case where subtraction “1.00123 ³ −1” is performed with 8 significant digits is considered.

First "1.00123 ^3" is determined as "1.0036945" a valid digit number 8 digits. Therefore, when this value is used, the calculation result is “1.00036945-1 = 0.0036945”, and the number of significant digits is reduced from 8 digits to 5 digits. That is, in this example, a 3-digit drop has occurred.

  Usually, in the arithmetic and control unit, when the value of the most significant digit of the operation result becomes “0” by subtraction or the like, a normalization process is performed to shift this to a value other than “0” by performing bit shift. This is generally performed, and in the above examples, the calculation result is often expressed as “3.66945000 e-3”. For this reason, the conventional arithmetic system has a problem that the arithmetic processing is delayed due to the normalization processing.

Accordingly, various arithmetic control devices have been devised that perform normalization processing without delay by predicting a digit loss before performing arithmetic operations such as subtraction, thereby speeding up the arithmetic processing (for example, Patent Document 1). ).
JP 2000-322238 A

  However, the arithmetic and control apparatus of Patent Document 1 performs normalization processing without delay by predicting a digit loss in advance, thereby speeding up the arithmetic processing. However, an accurate digit number of the arithmetic result obtained by the operation is calculated. Since it is not detected, an incorrect digit loss prediction may be performed. In addition, when a digit loss is predicted, since there is no means for notifying that the occurrence of the digit loss is predicted, the user is expected to calculate the calculated result and calculate that a digit loss will occur. I could not know if it was a result. In addition, since it is intended to predict a digit loss in the first place, it has not been possible to notify the exact number of digits that have been lost or the number of effective digits.

  The present invention has been made in view of such a problem, and the object of the present invention is to perform an operation with the number of input arithmetic digits and detect the exact number of digits that are lost in the calculated operation result. It is to realize an arithmetic and control unit that informs of the digit loss.

The arithmetic control device according to the present invention includes an arithmetic digit input means for inputting an arithmetic digit number according to a user operation, an arithmetic type specifying means for specifying an arithmetic type according to the user operation, and a type specified by the arithmetic type specifying means. The calculation execution means for executing the above calculation with the calculation digit number input by the calculation digit number input means, and the additional calculation digit obtained by adding a predetermined additional digit number to the calculation digit number input by the calculation digit number input means Comparing the value of each digit of the calculation result by the additional calculation execution means with the value of each digit of the calculation result by the calculation execution means, A digit number detection unit that detects a number as a digit loss digit, and the sum of the number of digits that are detected by the digit detection unit and the number of digits that are input by the operation digit number input unit The additional performance If execution unit or less additional computation digits calculated by the calculation result by the additional execution unit, characterized in that it comprises a display control means for performing control to display rounded to the number of operation digits .

According to the first aspect of the present invention, when the sum of the detected digit number of digits and the input calculation digit number is equal to or less than the additional calculation digit number obtained by adding a predetermined additional digit number to the calculation digit number. The calculation result obtained by executing the calculation with the additional calculation digits can be displayed rounded to the calculation digits.

  Hereinafter, with reference to FIGS. 1 to 13, two embodiments when the present invention is applied to a graph scientific calculator which is one of arithmetic control devices will be described in detail.

First, the overall configuration common to the embodiments will be described.
FIG. 1 is an overview diagram of a graph scientific calculator 1. As shown in the figure, the graph scientific calculator 1 includes a key group 3 including various operation keys and a display 4.

  The key group 3 includes keys for the user to input a numerical value to the graph scientific calculator 1 and to instruct the display of the calculation result. For example, the numeric key group 3a, the direction key 3b, the EXE key 3c, A digit number display key 3d, an effective precision digit number display key 3e, a digit number increase display key 3f, and a digit loss part identification display key 3g are provided.

  The number key group 3a is a key for inputting numbers. The direction key 3b is a key that is pressed when the cursor is moved or a function is selected. In this embodiment, the direction key 3b is configured to be able to input instructions in the vertical and horizontal directions.

  The EXE key 3c is a key for instructing the graph scientific calculator 1 to execute and determine processing. The digit reduction digit number display key 3d is a key for giving an instruction to display the digit loss digit of the calculated result. The effective precision digit number display key 3e is a key for giving an instruction to display the effective precision digit number. The number of effective precision digits is the number of digits of effective precision excluding the digit digits in the calculation result, and is obtained by the difference between the number of digits entered by the user and the number of digits digits discarded.

  The digit increase display key 3f is a key for giving an instruction to display the calculation result when the calculation is performed with the additional calculation digit number obtained by adding the predetermined additional digit number to the calculation digit number input by the user. is there. The digit part identification display key 3g is a key for giving an instruction to identify and display the digit value and other values of the calculation result in different display forms.

  The display 4 is a portion where data and graphs are displayed in response to pressing of various keys, and is configured by an LCD (Liquid Crystal Display) or the like, and performs various displays based on display signals input from the CPU 20. .

  FIG. 2 is a block diagram showing a configuration of the graph scientific calculator 1. In the figure, the graph scientific calculator 1 includes a CPU (Central Processing Unit) 20, an input unit 30, a display unit 40, a ROM (Read Only Memory) 50, a RAM (Random Access Memory) 60, and a decimal arithmetic unit 70. Each unit is configured to be connected to each other via a bus 80 so that data communication is possible.

  The CPU 20 reads out a predetermined program from the ROM 50 based on an instruction input via the input unit 30, temporarily stores the program in the RAM 60, and a calculation result calculated by the decimal arithmetic unit 70 using the program. After executing various processing such as detection of the number of missing digits and detection of the number of effective precision digits, the processing result is output to the display unit 40. That is, the CPU 20 plays a role of comprehensively controlling each part of the graph scientific calculator 1.

  The input unit 30 is an input device having a key group such as numeric keys and direction keys, and outputs a signal of the pressed key to the CPU 20. By means of key input in the input unit 30, input means such as numerical value input, calculation execution, and display processing execution instruction are realized. The input unit 30 corresponds to the key group 3 shown in FIG. 1, but is not necessarily a key, and may be a touch panel, for example.

  The display unit 40 displays various screens based on various signals input from the CPU 20, and corresponds to the display 4 shown in FIG.

  The ROM 50 stores, in addition to a program and data for setting the graph scientific calculator 1 to an initial state when the power is turned on, a program for realizing each embodiment to be described later. The ROM 50 will be described as the ROM 51 in the first embodiment and as the ROM 53 in the second embodiment.

  The RAM 60 is a storage area for temporarily storing various data as a work area of the CPU 20. The RAM 60 will be described as the RAM 61 in the first embodiment and as the RAM 63 in the second embodiment.

  The decimal arithmetic unit 70 includes a program ROM 710 and is an arithmetic device that executes a decimal operation according to a machine language instruction of a machine language program, and can perform an operation with an arbitrary number of designated digits. The program ROM 710 stores an arbitrary digit number calculation program 7101 for performing calculation with an arbitrary number of input digits and a plurality of calculation types 7103.

  FIG. 3 is a block diagram showing a circuit configuration of the decimal arithmetic unit 70. The decimal arithmetic unit 70 includes a program ROM 710, a program counter 712, a latch unit 714, an instruction decoder 716, a variable parameter storage unit 720, selectors 731 to 734, an address control circuit 750 including an address counter 740, A register unit 760, an arithmetic unit 770, and a shifter 780 are provided. Hereinafter, the configuration and function of the decimal arithmetic unit 70 will be described.

  Arbitrary digit calculation program 7101 and multiple calculation types 7103 stored in program ROM 710 are selected as appropriate according to the number of calculation digits input by the user and the specified calculation type, and machine language instructions are read one by one. And is held by the latch portion 714.

  Here, one instruction in the machine language includes an instruction part having an instruction code OP and a 4-bit extended instruction code EXT and an operand part having 2-bit data Fu and Su and 4-bit data Fl and Sl. Is done.

  The register unit 760 includes four registers X, Y, Z, and A each consisting of 16 words, and the operation data input by the user is BCD encoded, and every four digits in decimal number (1 in 16 bits). Word).

  The four registers X, Y, Z, and A can be specified by 2-bit data Fu and Su in the operand part. In addition, as shown in FIG. 4A, the 16 words can be specified by two methods: (1) direct address method and (2) indirect address method. A method of directly specifying a word with 4-bit data Fl, S1 in the operand part is a direct address system, and data W, v stored in the registers W, V of the variable parameter storage part 720 with an extended instruction code EXT in the instruction part. A method of accessing and indirectly specifying a word using this value is an indirect addressing method, and a word to be operated can be specified by either method.

  Instructions are classified into two types: (1) 1 word instruction and (2) continuous word instruction. The one-word instruction is an instruction for designating one word by a direct or indirect address method and performing an operation on the word.

  On the other hand, the continuous word instruction is an instruction for designating a start word and an end word by a direct or indirect address method and performing an operation using a series of words from the start word to the end word.

  The indirect addressing method includes a word designation for designating a word and a digit designation for designating a digit. In word designation, data v stored in register V can be accessed and a word can be designated using this value, whereas in digit designation, data i stored in register I is accessed. This value can be used to specify a digit in the word. In word designation, calculation can be performed only in word units, that is, in units of four digits, but in digit designation, calculations can be performed in units of digits, that is, an arbitrary number of calculation digits.

  As shown in FIG. 4B, the indirect / direct address type and the continuous word / 1 word instruction are set by the 4-bit extended instruction code EXT. The first bit data (EXT [1]) of the extended instruction code EXT indicates whether it is a continuous word / 1-word instruction, “0” for a continuous word instruction and “1” for a 1-word instruction. Each is set.

  The second bit data (EXT [2]) and the third bit data (EXT [3]) of the extended instruction code EXT indicate different types of indirect / direct addressing methods. “01” is set for digit designation by the indirect address method, and “10” is set for word designation by the indirect address method.

  Further, the fourth bit data (EXT [4]) of the extended instruction code EXT indicates the indirect / direct address system, and is “0” in the case of word designation by the direct address system, and the word designation by the indirect address system. In this case, “1” is set. It should be noted that setting of digit designation by the indirect address method cannot be performed with EXT [4].

Next, the meaning and operation of instructions will be described with specific examples.
FIG. 4C is a diagram showing four types of commands and their operation contents among the 12 types of values that the extended instruction code EXT can take. In the figure, “ADD” in the instruction part is an instruction code representing “addition”, and 4-bit data following “ADD” represents an extended instruction code EXT.

(1) Extended instruction code EXT = "0000"
In this case, the instruction is a continuous word instruction and is executed by word designation by the direct address method. First, the latch unit 714 includes Fu = “00 (X)”, Fl = “1111 (15)”, Su = “01 (Y)”, Sl = “0100 (4)”, OP = “ADD”, EXT = “0000” is latched.

  In the selectors 731 to 734, data of each bit of EXT = “0000” is input as a selection control signal, and various data is selected and output. In this case, Fl = “1111” is selected and output from the selector 731, and S1 = “0100” is selected and output from the selector 732. Further, the output data of the selector 732, that is, S1 = "0100" is set in the address counter 740, and the output data of the address counter 740, that is, S1 = "0100" is selected and output from the selectors 733 and 734.

  As a result, Fu = “00” and S1 = “0100” are input to the address terminal Fad of the register unit 760, so that the operation data stored in the fourth word of the register X is output from the output terminal Fout. Is done. Further, when Su = “01” and S1 = “0100” are input to the address terminal Sad, the operation data stored in the fourth word of the register Y is output from the output terminal Sout.

  On the other hand, the instruction decoder 716 decodes (decodes) that the “ADD” of the instruction code OP is an addition, and outputs an arithmetic control signal instructing the addition to the arithmetic unit 770. Thereby, in the arithmetic unit 770, the two arithmetic data output from the register unit 760 are added, and the addition result is input to the input terminal Fin and written to the fourth word of the register X (operation: X4 + Y4 → X4). .

  Thereafter, until the address counter 740 counts up and the instruction control signal “1” is output by the address control circuit 750, addition using a series of words from the fourth word to the fifteenth word is repeatedly executed. (Operation: X4-15 + Y4-15 → X4-15). As a result, addition is performed with 48 (= 4 × (15−4 + 1)) operation digits.

(2) Extended instruction code EXT = "0100"
In this case, the instruction is a continuous word instruction and is executed by digit designation by the indirect addressing method. First, the latch unit 714 includes Fu = “00 (X)”, Fl = “1111 (15)”, Su = “01 (Y)”, Sl = “*”, OP = “ADD”, EXT = “ 0100 "is latched.

  Fl = “1111” is selected and output from the selector 731, and data i is selected and output from the selector 732. Further, data i is set in the address counter 740, and both data i are selected and output from the selectors 733 and 734.

  As a result, Fu = “00” and data i are input to the address terminal Fad of the register unit 760, so that the operation data stored in the i-th digit of the register X is output from the output terminal Fout. In addition, when Su = “01” and data i are input to the address terminal Sad, operation data stored in the i-th digit of the register Y is output from the output terminal Sout.

  Then, in the arithmetic unit 770, the two arithmetic data output from the register unit 760 are added, and the addition result is input to the input terminal Fin and written in the i-th digit of the register X (operation: Xi + Yi → Xi).

  Thereafter, the addition from the i-th digit to the 15th word is repeatedly executed until the address counter 740 counts up and the instruction end signal “1” is output by the address control circuit 750 (operation: Xi˜ 15 + Yi-15 → Xi-15). Since the value of i is variable, calculation with an arbitrary number of calculation digits is possible by changing i.

(3) Extended instruction code EXT = “0001”
In this case, the instruction is a one-word instruction and is executed by word designation by the direct address method. First, the latch unit 714 includes Fu = “00 (X)”, Fl = “1111 (15)”, Su = “01 (Y)”, Sl = “0100 (4)”, OP = “ADD”, EXT = “0001” is latched.

  The selector 731 selects and outputs Fl = “1111”, and the selector 732 selects and outputs S1 = “0100”. In addition, Sl = “0100” is set in the address counter 740, Fl = “1111” is selected from the selector 733, and S1 = “0100” is selected and output from the selector 734.

  As a result, Fu = “00” and Fl = “1111” are input to the address terminal Fad of the register unit 760, so that the operation data stored in the 15th word of the register X is output from the output terminal Fout. Is done. Further, when Su = “01” and S1 = “0100” are input to the address terminal Sad, the operation data stored in the fourth word of the register Y is output from the output terminal Sout.

  Then, in the arithmetic unit 770, the two arithmetic data output from the register unit 760 are added, and the addition result is input to the input terminal Fin and written into the fifteenth word of the register X (operation: X15 + Y4 → X15).

  On the other hand, since EXT [1] is 1, the instruction end signal “1” is always output from the address control circuit 750, and the execution of the instruction is ended. As a result, the operation data of the 15th word of the register X and the operation data of the fourth word of the register Y are added, and the operation with 4 operation digits is executed.

(4) Extended instruction code EXT = "1101"
In this case, the instruction is a one-word instruction and is executed by specifying a digit by the indirect address method. First, Fu = “00 (X)”, Fl = “*”, Su = “01 (Y)”, Sl = “*”, OP = “ADD”, EXT = “1101” are stored in the latch unit 714. Latched.

  The selector 731 selects and outputs data w, and the selector 732 selects and outputs data i. Further, data i is set in the address counter 740, data w is selected from the selector 733, and data i is selected and output from the selector 734, respectively.

  As a result, Fu = “00” and data w are input to the address terminal Fad of the register unit 760, so that the operation data stored in the wth word of the register X is output from the output terminal Fout. In addition, when Su = “01” and data i are input to the address terminal Sad, operation data stored in the i-th digit of the register Y is output from the output terminal Sout.

  Then, in the arithmetic unit 770, the two arithmetic data output from the register unit 760 are added, and the addition result is input to the input terminal Fin and written to the w-th word of the register X (operation: Xw + Yi → Xw).

  On the other hand, since EXT [1] is 1, the instruction end signal “1” is always output from the address control circuit 750, and the execution of the instruction is ended. Thereby, the operation data of the w-th word of the register X and the operation data of the i-th digit of the register Y are added.

  The operation of the decimal arithmetic unit 70 has been described above by taking only four types of instructions as an example. However, it is possible to perform calculations with an arbitrary number of arithmetic digits depending on the machine language program selected and the type of instruction. .

[First Embodiment]
The first embodiment will be described with reference to FIGS.

First, the configuration will be described.
FIG. 5A is a diagram showing a configuration of a ROM 51 provided in the graph scientific calculator 1 according to the first embodiment in place of the ROM 50 of FIG. The ROM 51 stores a first calculation display program 511 that is read by the CPU 20 and executed as a first calculation display process (see FIG. 6).

  The first calculation display processing is to perform calculation according to the input calculation digit number and the specified calculation type, and to detect the number of lost digits and the effective precision digit of the calculation result obtained by the calculation, This is a process of performing display for notifying a digit loss in accordance with various display instructions together with the calculation result. The operation of the first calculation display process will be described later in detail.

  FIG. 5B is a diagram illustrating a configuration of a RAM 61 provided in the graph scientific calculator 1 according to the first embodiment in place of the RAM 60 in FIG. 2. The RAM 61 stores an operation digit number storage area 611 for storing the input operation digit number, an operation type storage area 613 for storing the specified operation type, and an input operand. There is provided an operand storage area 615, a digit loss digit storage area 617 for storing the number of digits discarded by the calculation, and an effective precision digit number storage area 619 for storing the effective precision digit number of the calculation result. ing. Here, the number of digits of calculation refers to the number of digits to be calculated, and the type of calculation refers to the type of function to be calculated.

Next, the operation will be described.
FIG. 6 is a flowchart showing the flow of the first calculation display process executed in the graph scientific calculator 1 by reading and executing the first calculation display program 511 by the CPU 20.

  First, when the calculation digit number is input by the user via the input unit 30 (step A1), the CPU 20 stores the input calculation digit number in the calculation digit number storage area 611, and then the calculation type is the user. Is designated (step A3), the designated computation type is stored in the computation type storage area 613. When the user inputs an operand (step A5), the CPU 20 stores the input operand in the operand storage area 615.

  Next, the CPU 20 uses the input operand to generate a machine language program for executing an operation of the specified operation type with the input operation digit number, and performs an operation (hereinafter referred to as a decimal operation unit 70). , Referred to as “first calculation”) (step A7). In addition, a machine language program is generated to execute an operation of the specified operation type with an additional operation digit number obtained by adding a predetermined additional number of digits (for example, “4 digits”) to the input operation digit number. The arithmetic operation unit 70 is caused to execute an operation (hereinafter referred to as “second operation”) (step A9).

  Next, the CPU 20 sets the value of the most significant digit of the calculation results obtained by the first calculation and the second calculation (hereinafter referred to as “first calculation result” and “second calculation result” respectively) to a value other than 0. Normalization processing is performed (step A11).

  Next, the CPU 20 compares the value of each digit of the first calculation result and the second calculation result, detects the number of digits whose values do not match as the number of digits discarded (step A13), and stores the number of digits discarded. Store in area 617. Further, the CPU 20 detects the effective precision digit number by using the detected number of discarded digits (step A15) and stores it in the effective precision digit number storage area 619. Here, the number of effective precision digits is the number of digits of effective precision excluding the digit digits in the first calculation result, and is detected as the difference between the number of digits entered and the number of digits discarded. .

  Next, the CPU 20 displays the first calculation result on the display unit 40 (step A17). Then, the CPU 20 determines whether or not an instruction for displaying the number of digits to be discarded has been issued by determining whether or not the digit number display key 3d has been pressed (step A19). (A19; Yes), the number of digits discarded in step A13 is displayed on the display unit 40 (step A21). If it is determined that no instruction has been given (step A19; No), the process proceeds to step A23.

  Then, the CPU 20 determines whether or not an effective precision digit number display key 3e has been pressed by determining whether or not the effective precision digit number display key 3e has been pressed (step A23). (A23; Yes), the number of effective precision digits detected in step A15 is displayed on the display unit 40 (step A25). If it is determined that it has not been made (step A23; No), the process proceeds to step A27.

  Next, the CPU 20 determines whether or not an instruction for increasing the number of digits has been issued by determining whether or not the digit number increasing display key 3f has been pressed (step A27). If it is determined that it has been made (step A27; Yes) The second calculation result is displayed on the display unit 40 (step A29). If it is determined that the second calculation result has not been made (step A27; No), the process proceeds to step A31.

  Then, the CPU 20 determines whether or not a digit part identification display key 3g has been pressed to determine whether or not a digit part identification display instruction has been issued (step A31). (A31; Yes), the digit value of the first calculation result and other values are identified by different display forms and displayed on the display unit (step A33), and the first calculation display process is terminated.

  On the other hand, when it is determined in step A31 that no digit part identification display instruction has been given (step A31; No), the CPU 20 ends the first calculation display process.

Next, the processing so far will be specifically described with reference to a display screen example.
FIG. 7A shows a display screen 401 which is an example of a display screen displayed on the display unit 40 of the graph scientific calculator 1.

  In the upper part of the display screen 401, a calculation digit number input box 4011 for the user to input the calculation digit number, a calculation type specification box 4013 for specifying the calculation type, and a calculation target for inputting the operand A child input box 4015 is displayed. Note that the calculation type can be selected and designated from a pull-down menu.

  At the bottom of the display screen 401, a calculation result display box 4017 for displaying the first calculation result, a digit number increasing display box 4019 for displaying the second calculation result, and a digit for displaying the number of digits to be discarded. A drop digit display box 4021 and an effective precision digit display box 4023 in which the effective precision digits are displayed are displayed.

  In addition, four types of display instructions 4025 are displayed at the bottom of the display screen 401 so that the user can see at a glance which display instruction has been made. For example, when an instruction for displaying the number of digits to be discarded is issued by pressing the digit number display key 3d, a portion of the display instruction 4025 that is displayed as “number of digits to be discarded” is highlighted. .

FIG. 7B shows a display screen 401 when an operation type is designated from the pull-down menu. In the pull-down menu of the calculation type designation box 4013, a plurality of calculation types such as “x ² ”, “logx”... Are displayed. Here, “(1 + x)” is a kind of compound interest calculation and is indicated by 4013a. “ ³ −1” is designated and highlighted.

FIG. 8A shows a display screen 401 when the user inputs the number of operation digits, specifies the operation type, and inputs the operand. In the operation digit number input box, “8” indicated by 4011a is input as the operation digit number (step A1 in FIG. 6), and “(1 + x) ³ −1 indicated by 4013a as the operation type in the operation type designation box. "Is designated (step A3 in FIG. 6). In the operand input box, “0.00123” indicated by 4015a is input as the operand (here, a numerical value assigned to the variable x) (step A5 in FIG. 6).

  FIG. 8B shows a display screen 401 when the first calculation result is displayed. In the calculation result display box, “3.6695000 e-3” indicated by 4017a is displayed as the first calculation result (step A17 in FIG. 6). Of the displayed first calculation results, “3.6945000” represents the mantissa part and “e-3” represents the exponent part.

  FIG. 9A shows a display screen 401 when an instruction to display the number of digits is given by the user. When an instruction for displaying the number of digits to be discarded is given (step A19 in FIG. 6; Yes), the “number of digits to be discarded” at the bottom of the display screen 401 is highlighted as 4025a. “3” indicated by 4021a is displayed as the number of digits to be dropped (step A21 in FIG. 6). Thereby, it can be seen that the displayed first calculation result has a 3-digit drop.

  FIG. 9B shows the display screen 401 when the effective precision digit number display instruction is given by the user. When an instruction to display the effective precision digits is given (step A23 in FIG. 6; Yes), the “effective precision” at the bottom of the display screen 401 is highlighted as 4025b, and the effective precision digits display box displays the effective precision digits. “5” indicated by the number 4023a is displayed (step A25 in FIG. 6). Thereby, it can be seen that the number of effective precision digits of the displayed first calculation result is 5 digits.

  FIG. 10A shows a display screen 401 when the user has issued an instruction to increase the number of digits. When an instruction to increase the number of digits is issued (step A27 in FIG. 6; Yes), “digit increase display” at the bottom of the display screen 401 is highlighted as 4025c, and the second calculation result is displayed in the digit increase display box. "3.66944056000 e-3" indicated by 4019a is displayed (step A29 in FIG. 6). That is, it can be seen that the second calculation was executed with 12 additional calculation digits obtained by adding 4 digits as the additional digits to the input 8 calculation digits (step A9 in FIG. 6). Further, when comparing 4017a which is the first calculation result and 4019a which is the second calculation result, the value of the lower three digits of the first calculation result does not match the value of each corresponding digit of the second calculation result. Therefore, the user can understand that a digit loss has occurred in the lower three digits of the first calculation result. Further, a calculation result with higher accuracy can be obtained by the calculation result with the additional calculation digits.

  FIG. 10 (b) shows a display screen 401 when an instruction for identifying the digit portion is displayed by the user. As a result of the digit part identification display instruction (step A33 in FIG. 6; Yes), the “identification display” at the bottom of the display screen 401 is highlighted as 4025d, and the calculation result display box displays the first calculation result. Among them, the lower three digits “0”, which is a missing part, are identified and displayed by the lower case 4017b (step A35 in FIG. 6). Thereby, it can be visually recognized that a digit loss has occurred in the lower three digits of the displayed first calculation result.

  As described above, according to the first embodiment, the calculation is executed according to the input calculation digit number and the specified calculation type, and the number of lost digits and the effective precision digit of the obtained calculation result are detected. By doing so, it is possible to perform a display informing that the digits are lost. For this reason, it is possible to realize an arithmetic and control unit that performs an operation with the input number of arithmetic digits, detects the exact number of digits that are lost in the calculated result, and makes it possible to notify the user that the digits are lost.

[Modification]
In addition, in the digit part identification display of step A33, it demonstrated as identifying the value of a digit part by a small letter, However, The identification method is not necessarily restricted to this. For example, it may be possible to identify by the thickness of the line, such as displaying the value of the omitted part in thin characters and displaying the other values in bold, or displaying the value of the omitted part in red. Of course, other parts may be identified by color, such as displaying in black.

  In addition, the four types of display instructions are independent of each other, and the display is performed individually. However, when a plurality of desired display instructions are given at the same time, the display may be performed simultaneously. For example, when an instruction to display the number of digits dropped and an instruction to increase the number of digits are issued at the same time, by displaying the number of digits discarded and the result of the second calculation at the same time, the user can better understand the presence of digits. It becomes easy.

[Second Embodiment]
The second embodiment will be described with reference to FIGS.

First, the configuration will be described.
FIG. 11A is a diagram showing a configuration of a ROM 53 provided in the graph scientific calculator 1 according to the second embodiment in place of the ROM 50 of FIG. The ROM 53 stores a second calculation display program 531 that is read by the CPU 20 and executed as a second calculation display process (see FIG. 12).

  The second calculation display process executes the calculation according to the number of input calculation digits and the specified calculation type, detects the number of digits that are lost in the calculated result, and corrects the digits. This is a process for displaying the calculated result. The operation of the second calculation display process will be described later in detail.

  FIG. 11B is a diagram illustrating a configuration of a RAM 63 provided in the graph scientific calculator 1 according to the second embodiment in place of the RAM 60 of FIG. The RAM 63 stores an operation digit number storage area 631 for storing the operation digit number input by the user, an operation type storage area 633 for storing the specified operation type, and the input operand. An operand storage area 635 for storing the result, and a digit storage area 637 for storing the number of digits discarded as the result of the operation. The number of calculation digits and the calculation type are the same as in the first embodiment.

Next, the operation will be described.
FIG. 12 is a flowchart showing the flow of the second calculation display process executed in the graph scientific calculator 1 when the second calculation display program 531 is read and executed by the CPU 20.

  First, when the calculation digit number is input by the user via the input unit 30 (step B1), the CPU 20 stores the input calculation digit number in the calculation digit number storage area 631, and then the calculation type is the user. Is designated (step B3), the designated computation type is stored in the computation type storage area 633. When the operand is input by the user (step B5), the CPU 20 stores the input operand in the operand storage area 635.

  Next, the CPU 20 uses the input operand to generate a machine language program for executing an operation of the specified operation type with the input operation digit number, and performs an operation (first operation) on the decimal arithmetic unit 70. 1 calculation) is executed (step B7). Further, a machine language program for executing an operation of a specified operation type with an additional operation digit number obtained by adding a predetermined additional number of digits (for example, “4 digits”) to the input operation digit number, The decimal arithmetic unit 70 is caused to execute the calculation (second calculation) (step B9).

  Next, the CPU 20 performs a normalization process for setting the value of the most significant digit of the calculation results obtained by the first calculation and the second calculation to a value other than 0 (step B11).

  Next, the CPU 20 compares the value of each digit of the first calculation result and the second calculation result, detects the number of digits whose values do not match as the number of digits discarded (step B13), and stores the number of digits discarded. Store in area 637.

  Thereafter, the CPU 20 determines whether or not the sum of the number of digits removed in step B13 and the number of digits calculated in step B1 is equal to or less than the number of additional digits calculated in step B9. If it is determined (step B15) and it is determined that it is not less than or equal to the number of additional calculation digits (step B15; No), the detected number of lost digits and a predetermined additional number of digits are added to the input calculation digits The decimal arithmetic unit 70 is made to execute the second calculation again with the new additional calculation digits (step B17).

  Then, the CPU 20 performs a normalization process for setting the value of the most significant digit of the second calculation result obtained again to a value other than 0 (step B19), and the number of calculation digits to which the normalized second calculation result is input. (Step B21), the rounded second calculation result is displayed on the display unit 40 (step B23), and the second calculation display process is terminated. On the other hand, if it is determined in step B15 that the number is less than or equal to the additional calculation digits (step B15; Yes), the CPU 20 shifts the process to step B21.

Next, the processing so far will be specifically described with reference to a display screen example.
FIG. 13A shows a display screen 403 which is an example of a display screen displayed on the display unit 40 of the graph scientific calculator 1.

On the display screen 403, as in the first embodiment, “8” digits are input and designated as the calculation type, “(1 + x) ³ −1”, and “0.00123” as the operand. (Steps B1 to B5 in FIG. 12). In the present embodiment, the second calculation result rounded to the input calculation digit number (here, “8 digits”) is displayed in the calculation result display box 4031.

  FIG. 13B shows a display screen 403 when the second calculation result is displayed. In the calculation result display box, “3.6945406 e-3” indicated by 4031a is displayed as the second calculation result rounded to the input calculation digit number of 8 (steps B21 and B23 in FIG. 12). . In this example, the digit loss generated in the first calculation result is 3 digits (step B13 in FIG. 12), and 11 digits, which is the sum of 3 digits of the digit loss and 8 digits of the calculation digit, is the additional calculation digit number. Because of the following (step B15 in FIG. 12; Yes), the second calculation result normalized in step B11 is displayed by being rounded to 8 digits as it is (steps B21 and B23 in FIG. 12).

  This calculation result is obtained by rounding the calculation result obtained by performing the calculation with 12 additional calculation digits by adding the predetermined additional digit number of 4 digits to the input calculation digit number of 8 digits to the detected digit. Since the number of missing digits was 3, it is an accurate calculation result in which the lost digits were corrected.

  As described above, according to the second embodiment, the calculation is performed according to the input number of calculation digits and the specified calculation type, and the number of digits discarded in the calculated calculation result is detected and detected. It is possible to display the calculation result obtained by correcting the digit digits depending on the number of digit digits.

  For example, when the number of digits that have been detected is 5 and the sum of 13 digits including the number of digits to be discarded and 8 digits of calculation exceeds 12 digits of additional calculation (FIG. 12). Step B15; No), and the calculation is performed again with a new additional calculation digit number of 17 digits, which is obtained by adding 5 digits of lost digits and a predetermined additional digit number of 4 to the calculation digit number of 8 digits (FIG. 12). In step B17), this calculation result is rounded to 8 digits (step B21 in FIG. 12), thereby correcting the calculation result. In addition, although it has been described that the predetermined number of additional digits is four digits, it is not limited thereto, and may be set by a user, for example.

  As described above, the case where the present invention is applied to the graph scientific calculator which is a kind of the arithmetic control device has been described in the two embodiments. However, the applicable product is not limited to the graph scientific calculator, for example, a calculator having no graph drawing function. It can also be applied to electronic devices such as personal computers, PDAs (Personal Digital Assistance).

  Moreover, although the decimal arithmetic unit 70 was demonstrated as what was incorporated in the electronic device (in the said embodiment, a graph scientific calculator), it is good also as detachable mounting | wearing. An example is shown in FIG.

  FIG. 14 shows an arithmetic system S composed of the personal computer 100 and the arithmetic device 200. The arithmetic device 200 is a small device capable of USB (Universal Serial Bus) connection, which incorporates a decimal arithmetic unit 70, and enables data communication with each other by inserting the terminal U1 into the USB port U2 of the PC 100.

1 is an overview diagram of a graph scientific calculator to which the present invention is applied. The block diagram which shows the internal structure of the graph scientific calculator to which this invention is applied. The figure which shows the circuit structure of a decimal arithmetic unit. (A) The figure which shows a direct / indirect address system. (B) The figure which shows the extended instruction code EXT. (C) The figure which shows an example of an instruction | command and its operation | movement. (A) The figure which shows the data structure of ROM in 1st Embodiment. (B) The figure which shows the data structure of RAM in 1st Embodiment. The flowchart which shows the flow of a 1st calculation display process. (A) The figure which shows an example of the display screen displayed in a 1st calculation display process. (B) The figure which shows an example of the display screen in case a calculation kind is designated. (A) The figure which shows an example of the display screen at the time of the input of the number of calculation digits, designation | designated of a calculation type, and the input of an operand being made. (B) The figure which shows an example of the display screen when a 1st calculation result is displayed. (A) The figure which shows an example of the display screen when a digit removal digit number display instruction | indication is made. (B) The figure which shows an example of the display screen when the effective precision digit number display instruction | indication is made. (A) The figure which shows an example of the display screen in case the digit number increase display instruction | indication is made. (B) The figure which shows an example of the display screen at the time of instruction | indication of a digit part identification display. (A) The figure which shows the data structure of ROM in 2nd Embodiment. (B) The figure which shows the data structure of RAM in 2nd Embodiment. The flowchart which shows the flow of a 2nd calculation display process. (A) The figure which shows an example of the display screen at the time of the input of the number of calculation digits, the designation | designated of a calculation type, and the input of an operand being made in 2nd calculation display processing. (B) The figure which shows an example of the display screen when the rounded 2nd calculation result is displayed. The figure which shows an example of the arithmetic system comprised with a personal computer and USB arithmetic device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Graph scientific calculator 3 Key group 3a Number key group 3b Direction key 3c EXE key 3d Digit digit display key 3e Effective precision digit display key 3f Digit increase display key 3g Digit part identification display key 4 Display 20 CPU
30 Input unit 40 Display unit 50 ROM
511 First calculation display program 531 Second calculation display program 60 RAM
611, 631 Operation digit number storage area 613, 633 Operation type storage area 615, 635 Operand storage area 617, 637 Digit digit number storage area 619 Effective precision digit number storage area 70 Decimal arithmetic unit 710 Program ROM
712 Program counter 714 Latch unit 716 Instruction decoder 720 Variable parameter storage unit 731 to 734 Selector 740 Address counter 750 Address control circuit 760 Register unit 770 Calculator 780 Shifter 80 Bus

Claims (2)

Calculation digit number input means for inputting the calculation digit number according to the user operation;
A calculation type specifying means for specifying a calculation type according to a user operation;
An operation executing means for executing the operation of the type specified by the operation type specifying means with the operation digit number input by the operation digit number input means;
An additional calculation execution means for re-executing the calculation with an additional calculation digit number obtained by adding a predetermined additional digit number to the calculation digit number input by the calculation digit number input means;
Compare the value of each digit of the calculation result by this additional calculation execution means with the value of each digit of the calculation result by the calculation execution means, and detect the number of digits that do not match as the number of digits to be discarded Detection means;
The sum of the number of digits discarded by the digit number detection means and the number of digits calculated by the calculation digit number input means is equal to or less than the number of additional calculation digits calculated by the additional calculation execution means. Display control means for performing control to display the calculation result by the additional calculation execution means by rounding to the number of calculation digits ;
An arithmetic and control unit comprising: On the computer,
Calculation digit number input means for inputting the calculation digit number according to the user operation;
A calculation type specifying means for specifying a calculation type according to a user operation;
An operation executing means for executing the operation of the type specified by the operation type specifying means with the operation digit number input by the operation digit number input means;
An additional calculation execution means for re-executing the calculation with an additional calculation digit number obtained by adding a predetermined additional digit number to the calculation digit number input by the calculation digit number input means;
Compare the value of each digit of the calculation result by this additional calculation execution means with the value of each digit of the calculation result by the calculation execution means, and detect the number of digits that do not match as the number of digits to be discarded Detection means;
The sum of the number of digits discarded by the digit number detection means and the number of digits calculated by the calculation digit number input means is equal to or less than the number of additional calculation digits calculated by the additional calculation execution means. Display control means for performing control to display the calculation result by the additional calculation execution means by rounding to the number of calculation digits ;
A program to realize

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