JP4188457B2 - Liquid crystal display - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device used for a display screen of a computer, and more particularly to a liquid crystal driving circuit.
[0002]
[Prior art]
In order to realize a high-resolution and multi-gradation liquid crystal display device, it is necessary to transmit a large amount of image data to the liquid crystal display device at high speed.
FIG. 7 is a schematic configuration diagram showing a conventional liquid crystal display device.
In FIG. 7, 1 is a control circuit board on which the timing controller 2 is mounted, 3 is a bus board that transmits image data from the timing controller 2, and 4 is a liquid crystal drive that receives image data from the timing controller 2 via the bus board 3. Circuit. Reference numeral 5 denotes a matrix type display unit having matrix pixels to which signals are supplied from the liquid crystal driving circuit 4.
FIG. 8 is a schematic configuration diagram showing a liquid crystal driving circuit of a conventional liquid crystal display device, and the configuration will be described later.
[0003]
Conventionally, as shown in FIG. 7, a plurality of image data is supplied in parallel from the timing controller 2 of the control circuit board 1 to the liquid crystal drive circuit 4 via the bus board 3, and corresponds to each pixel in the liquid crystal drive circuit 4. The latched data is latched and a signal is supplied to the matrix type display unit 5. For example, in the case of a 64-gradation liquid crystal display device, 18 pieces of data of 6 bits for each RGB are wired and transmitted in parallel. In addition, some high-resolution liquid crystal display devices such as XGA (Extended Graphics Array) have a large amount of image data and high-speed signals. Therefore, some of them are divided into odd columns and even columns and further transmitted in parallel. In this case, in order to obtain 64 gradations, 36 pieces of data are wired and transmitted in parallel.
[0004]
For example, as shown in FIG. 8, the liquid crystal driving circuit 4 includes a shift register 6, a latch circuit / data register 7, a level shifter 8, a D / A converter 9, an output buffer 10, and the like. A plurality of pieces of data input in parallel are distributed to predetermined lines by the shift register 6, latched at a certain timing by the latch circuit, and written to the data register. At this time, RGB multi-bit data is latched at the same timing, and a signal is output to the matrix display unit 5 via the level shifter 8, the D / A converter 9, and the output buffer 10 based on the data.
[0005]
[Problems to be solved by the invention]
When a lot of data is transmitted in parallel at the same timing, a phase difference occurs in the input to the liquid crystal drive circuit 4 due to the delay generated in the bus substrate 3, and therefore a timing error may occur if latched at the same timing. is there. Further, radiation from the signal line (unwanted radiation), radiation from the power source and ground due to simultaneous switching increase, and EMI (Electromagnetic Interference) becomes a problem. Although it is conceivable to output the data at different phases, the liquid crystal drive circuit 4 that receives the signal latches the image data at the same timing, so that it is impossible to secure the setup time and hold time for all the data.
[0006]
The present invention has been made to solve the above-described problems, absorbs the delay generated in the bus board, prevents the occurrence of a timing error, and sets up all image data in the liquid crystal driving circuit. An object of the present invention is to obtain a liquid crystal display device that can secure sufficient time and hold time and can reduce radiation from a signal line, a power source, and a ground.
[0007]
[Means for Solving the Problems]
In the liquid crystal display device according to the present invention, a liquid crystal driving circuit for supplying a driving signal corresponding to image data to the display unit, and a plurality of image data having different phases and temporally changing phases are arranged in parallel to the liquid crystal driving circuit. A control unit for supplying a plurality of image data supplied in parallel from the control unit, and a plurality of latch controls each having a timing corresponding to a phase of the plurality of image data, wherein the liquid crystal driving circuit is latched at different timings. Ru der that a latch control circuit for supplying a signal.
[0008]
The plurality of image data is divided into a plurality of different blocks of phases, Ru der those latched at different timings for each block.
[0009]
The latch control circuit, Ru der those provided in the liquid crystal driving circuit.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
Embodiment 1 FIG.
1 is a schematic configuration diagram showing a liquid crystal display device according to Embodiment 1 of the present invention.
In the figure, 1 is a control circuit board on which a timing controller 2 as a control unit is mounted, 3 is a bus board for transmitting image data from the timing controller 2, and 4 is image data from the timing controller 2 via the bus board 3. A liquid crystal driving circuit for receiving. Reference numeral 5 denotes a matrix type display unit having matrix pixels to which signals are supplied from the liquid crystal driving circuit 4.
A latch control circuit 12 provided on the control circuit board 1 is connected to the timing controller 2 and receives a signal to generate a latch control signal that is a timing signal for latching the image data of the liquid crystal driving circuit 4 to generate a plurality of images. Latch data at different times.
FIG. 2 is a schematic timing chart showing signals of the liquid crystal display device according to Embodiment 1 of the present invention.
[0011]
The timing controller 2 supplies a plurality of image data signals to the liquid crystal drive circuit 4 via the bus substrate 3, and the liquid crystal drive circuit 4 latches image data corresponding to each pixel and sends a signal to the matrix type display unit 5. Supply. Here, a latch control signal for latching data of the liquid crystal driving circuit 4 is generated by the latch control circuit 12 provided on the control circuit board 1, and a plurality of image data are latched at different timings. Although FIG. 1 shows an example in which the latch control circuit 12 is provided on the control circuit board 1, the latch control circuit 12 may be provided on the bus board 3 or the timing controller 2.
Thus, for example, latch control signals A, B, and C having different phases are transmitted corresponding to the phases of a plurality of data A, B, and C, and the liquid crystal driving circuit 4 latches the data at a timing corresponding to each. To do.
[0012]
Embodiment 2. FIG.
FIG. 3 is a schematic timing chart showing signals of the liquid crystal display device according to the second embodiment of the present invention.
The latch control circuit 12 transmits latch control signals A, B, and C to a plurality of image data R0 to R5, G0 to G5, and B0 to B5 divided into a plurality of blocks having different phases according to different blocks, The image data is latched at the timing of the phase difference suitable for each.
[0013]
Embodiment 3 FIG.
FIG. 4 is a schematic timing chart showing signals of the liquid crystal display device according to Embodiment 3 of the present invention.
Latch control circuit 12 is time-varying phase of a plurality of different image data A, B, C with respect to, latches control signals A, B, optimal position in accordance with the phase change of the image data C The data is transmitted while being changed in time so as to be the timing of the phase difference, and the data is latched at the timing of the phase difference suitable for each.
[0014]
Embodiment 4 FIG.
FIG. 5 is a schematic configuration diagram showing a liquid crystal driving circuit of a liquid crystal display device according to Embodiment 4 of the present invention.
In the figure, 6 to 10 are the same as those in FIG.
In the fourth embodiment, different a torque locking CLK phase generated by the clock generating circuit (not shown), are input to the latch circuit / data register 7. By using a plurality of clocks having different phases for a plurality of image data having different phases , the data is latched at different timings according to each clock by using one latch control signal.
[0015]
Embodiment 5 FIG.
FIG. 6 is a schematic configuration diagram showing a liquid crystal driving circuit of a liquid crystal display device according to Embodiment 5 of the present invention.
In the figure, 6 to 10 are the same as those in FIG.
In the fifth embodiment, in order to latch a plurality of image data having different phases at different timings, a latch control circuit 12 having a function of changing the latch timing is provided inside the liquid crystal drive circuit 4.
[0016]
【The invention's effect】
Since the present invention is configured as described above, the following effects can be obtained.
A liquid crystal driving circuit that supplies a driving signal corresponding to image data to the display unit, a control unit that supplies, in parallel, a plurality of image data having different phases and temporally changing phases to the liquid crystal driving circuit. A liquid crystal driving circuit is formed to latch a plurality of image data supplied in parallel at different timings, and includes a latch control circuit for supplying a plurality of latch control signals having timings corresponding to the phases of the plurality of image data, respectively . Therefore, even time-varying image data can be latched at a suitable timing, and timing errors caused by delay of the image data can be prevented, and the liquid crystal drive circuit can be used for all image data. setup and hold times can be sufficiently ensured, Ru can be reduced radiation from the wiring.
[0017]
The plurality of image data is divided into a plurality of different blocks of phases, because it is latched at different timing for each block, Ru can be latched with a phase difference that is suitable for each block.
[0018]
The latch control circuit, since provided the liquid crystal driving circuit, Ru can optimally absorb the delay of image data.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram showing a liquid crystal display device according to a first embodiment of the invention.
FIG. 2 is a schematic timing chart showing signals of a liquid crystal display device according to Embodiment 1 of the present invention.
FIG. 3 is a schematic timing chart showing signals of a liquid crystal display device according to Embodiment 2 of the present invention.
FIG. 4 is a schematic timing chart showing signals of a liquid crystal display device according to Embodiment 3 of the present invention.
FIG. 5 is a schematic configuration diagram showing a liquid crystal driving circuit of a liquid crystal display device according to Embodiment 4 of the present invention.
FIG. 6 is a schematic configuration diagram showing a liquid crystal driving circuit of a liquid crystal display device according to a fifth embodiment of the present invention.
FIG. 7 is a schematic configuration diagram showing a conventional liquid crystal display device.
FIG. 8 is a schematic configuration diagram showing a liquid crystal driving circuit of a conventional liquid crystal display device.
[Explanation of symbols]
1 control circuit board, 2 timing controller, 3 bus board,
4 liquid crystal drive circuit, 5 matrix type display, 6 shift register,
7 latch circuit / data register, 8 level shifter,
9 D / A converter, 10 output buffer,
12 Latch control circuit.

Claims (3)

  A liquid crystal driving circuit that supplies a driving signal corresponding to image data to the display unit, a control unit that supplies, in parallel, a plurality of image data having different phases and temporally varying phases to the liquid crystal driving circuit, and the control unit A latch control circuit configured to latch the plurality of image data supplied in parallel from the liquid crystal drive circuit at different timings, and to supply a plurality of latch control signals having timings corresponding to the phases of the plurality of image data, respectively. A liquid crystal display device comprising:   The liquid crystal display device according to claim 1, wherein the plurality of image data are divided into a plurality of blocks having different phases and are latched at different timings for each block. Latch control circuit according to claim 1 or claim 2 liquid crystal display equipment according to, characterized in that provided in the liquid crystal driving circuit.

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